[U-Boot] [PATCH v3 0/6] davinci: omapl138_lcdk: fix a few bugs for SPL boot
This patchset tries to fix the SPL on omapl138_lcdk. With this patchset, the SPL will be able to boot from EMMC/SPI.
The NAND support is still broken so the default u-boot.ais image still has a SPL that is unable to load u-boot.
Changes v2 .. v3 * Make CONFIG_SYS_DA850_PLL_INIT & CONFIG_SYS_DA850_DDR_INIT to be new Kconfig options.
Changes v1 .. v2: * Don't add an AIS config file but instead configure the PLL and DDR in the SPL. This follow what other boards are doing. * Use new kconfig option to support EMMC boot.
Fabien Parent (6): ARM: davinci: Move CONFIG_SYS_DA850_PLL_INIT to Kconfig ARM: davinci: Move CONFIG_SYS_DA850_DDR_INIT to Kconfig davinci: omapl138_lcdk: configure pll0 davinci: omapl138_lcdk: configure ddr2 davinci: da850evm: fix empty boot method list in the SPL davinci: omapl138_lcdk: add u-boot sector for mmc/sd boot
arch/arm/mach-davinci/Kconfig | 16 ++++++++++ board/davinci/da8xxevm/u-boot-spl-da850evm.lds | 3 ++ configs/omapl138_lcdk_defconfig | 1 + include/configs/calimain.h | 2 -- include/configs/da850evm.h | 2 -- include/configs/ipam390.h | 2 -- include/configs/legoev3.h | 2 -- include/configs/omapl138_lcdk.h | 41 ++++++++++++++++++++++++++ scripts/config_whitelist.txt | 2 -- 9 files changed, 61 insertions(+), 10 deletions(-)
Clean config headers by moving CONFIG_SYS_DA850_PLL_INIT away to a Kconfig file.
Signed-off-by: Fabien Parent fparent@baylibre.com ---
v1 -> v3 * New patch
--- arch/arm/mach-davinci/Kconfig | 7 +++++++ include/configs/calimain.h | 1 - include/configs/da850evm.h | 1 - include/configs/ipam390.h | 1 - include/configs/legoev3.h | 1 - scripts/config_whitelist.txt | 1 - 6 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 5d1c5c5..ffb9a45 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -7,10 +7,12 @@ choice config TARGET_IPAM390 bool "IPAM390 board" select SUPPORT_SPL + select SYS_DA850_PLL_INIT
config TARGET_DA850EVM bool "DA850 EVM board" select SUPPORT_SPL + select SYS_DA850_PLL_INIT
config TARGET_EA20 bool "EA20 board" @@ -21,15 +23,20 @@ config TARGET_OMAPL138_LCDK
config TARGET_CALIMAIN bool "Calimain board" + select SYS_DA850_PLL_INIT
config TARGET_LEGOEV3 bool "LEGO MINDSTORMS EV3" + select SYS_DA850_PLL_INIT
endchoice
config SYS_SOC default "davinci"
+config SYS_DA850_PLL_INIT + bool + source "board/Barix/ipam390/Kconfig" source "board/davinci/da8xxevm/Kconfig" source "board/davinci/ea20/Kconfig" diff --git a/include/configs/calimain.h b/include/configs/calimain.h index bf173ff..41c8eb5 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -32,7 +32,6 @@ #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SYS_TEXT_BASE 0x60000000 #define CONFIG_DA850_LOWLEVEL -#define CONFIG_SYS_DA850_PLL_INIT #define CONFIG_SYS_DA850_DDR_INIT #define CONFIG_ARCH_CPU_INIT #define CONFIG_DA8XX_GPIO diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 3560115..1f3b003 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -31,7 +31,6 @@ #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_SYS_DA850_PLL_INIT #define CONFIG_SYS_DA850_DDR_INIT
#ifdef CONFIG_DIRECT_NOR_BOOT diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index 381fe04..13c9d56 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -32,7 +32,6 @@ #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_SYS_DA850_PLL_INIT #define CONFIG_SYS_DA850_DDR_INIT #define CONFIG_SYS_TEXT_BASE 0xc1080000
diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index d91e75d..adb2446 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -26,7 +26,6 @@ #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_SYS_DA850_PLL_INIT #define CONFIG_SYS_DA850_DDR_INIT
#define CONFIG_SYS_TEXT_BASE 0xc1080000 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index d0b5e7f..60795ee 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -4778,7 +4778,6 @@ CONFIG_SYS_DA850_PLL1_PLLDIV2 CONFIG_SYS_DA850_PLL1_PLLDIV3 CONFIG_SYS_DA850_PLL1_PLLM CONFIG_SYS_DA850_PLL1_POSTDIV -CONFIG_SYS_DA850_PLL_INIT CONFIG_SYS_DA850_SYSCFG_SUSPSRC CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
On Tue, Nov 29, 2016 at 02:23:36PM +0100, Fabien Parent wrote:
Clean config headers by moving CONFIG_SYS_DA850_PLL_INIT away to a Kconfig file.
Signed-off-by: Fabien Parent fparent@baylibre.com
Reviewed-by: Tom Rini trini@konsulko.com
On Tue, Nov 29, 2016 at 02:23:36PM +0100, Fabien Parent wrote:
Clean config headers by moving CONFIG_SYS_DA850_PLL_INIT away to a Kconfig file.
Signed-off-by: Fabien Parent fparent@baylibre.com Reviewed-by: Tom Rini trini@konsulko.com
Applied to u-boot/master, thanks!
Clean config headers by moving CONFIG_SYS_DA850_DDR_INIT away to a Kconfig file.
Signed-off-by: Fabien Parent fparent@baylibre.com ---
v1 -> v3 * New patch
--- arch/arm/mach-davinci/Kconfig | 7 +++++++ include/configs/calimain.h | 1 - include/configs/da850evm.h | 1 - include/configs/ipam390.h | 1 - include/configs/legoev3.h | 1 - scripts/config_whitelist.txt | 1 - 6 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index ffb9a45..cf4ee16 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -8,11 +8,13 @@ config TARGET_IPAM390 bool "IPAM390 board" select SUPPORT_SPL select SYS_DA850_PLL_INIT + select SYS_DA850_DDR_INIT
config TARGET_DA850EVM bool "DA850 EVM board" select SUPPORT_SPL select SYS_DA850_PLL_INIT + select SYS_DA850_DDR_INIT
config TARGET_EA20 bool "EA20 board" @@ -24,10 +26,12 @@ config TARGET_OMAPL138_LCDK config TARGET_CALIMAIN bool "Calimain board" select SYS_DA850_PLL_INIT + select SYS_DA850_DDR_INIT
config TARGET_LEGOEV3 bool "LEGO MINDSTORMS EV3" select SYS_DA850_PLL_INIT + select SYS_DA850_DDR_INIT
endchoice
@@ -37,6 +41,9 @@ config SYS_SOC config SYS_DA850_PLL_INIT bool
+config SYS_DA850_DDR_INIT + bool + source "board/Barix/ipam390/Kconfig" source "board/davinci/da8xxevm/Kconfig" source "board/davinci/ea20/Kconfig" diff --git a/include/configs/calimain.h b/include/configs/calimain.h index 41c8eb5..dab4ec2 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -32,7 +32,6 @@ #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SYS_TEXT_BASE 0x60000000 #define CONFIG_DA850_LOWLEVEL -#define CONFIG_SYS_DA850_DDR_INIT #define CONFIG_ARCH_CPU_INIT #define CONFIG_DA8XX_GPIO #define CONFIG_HW_WATCHDOG diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 1f3b003..18a8e26 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -31,7 +31,6 @@ #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_SYS_DA850_DDR_INIT
#ifdef CONFIG_DIRECT_NOR_BOOT #define CONFIG_ARCH_CPU_INIT diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index 13c9d56..991dad1 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -32,7 +32,6 @@ #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_SYS_DA850_DDR_INIT #define CONFIG_SYS_TEXT_BASE 0xc1080000
/* diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index adb2446..f2f82ac 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -26,7 +26,6 @@ #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_SYS_DA850_DDR_INIT
#define CONFIG_SYS_TEXT_BASE 0xc1080000
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 60795ee..f0004e5 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -4762,7 +4762,6 @@ CONFIG_SYS_DA850_DDR2_SDBCR2 CONFIG_SYS_DA850_DDR2_SDRCR CONFIG_SYS_DA850_DDR2_SDTIMR CONFIG_SYS_DA850_DDR2_SDTIMR2 -CONFIG_SYS_DA850_DDR_INIT CONFIG_SYS_DA850_PLL0_PLLDIV1 CONFIG_SYS_DA850_PLL0_PLLDIV2 CONFIG_SYS_DA850_PLL0_PLLDIV3
On Tue, Nov 29, 2016 at 02:23:37PM +0100, Fabien Parent wrote:
Clean config headers by moving CONFIG_SYS_DA850_DDR_INIT away to a Kconfig file.
Signed-off-by: Fabien Parent fparent@baylibre.com
Reviewed-by: Tom Rini trini@konsulko.com
On Tue, Nov 29, 2016 at 02:23:37PM +0100, Fabien Parent wrote:
Clean config headers by moving CONFIG_SYS_DA850_DDR_INIT away to a Kconfig file.
Signed-off-by: Fabien Parent fparent@baylibre.com Reviewed-by: Tom Rini trini@konsulko.com
Applied to u-boot/master, thanks!
The SPL is not able to boot properly because the PLL0 is not configured. Configure it.
Signed-off-by: Fabien Parent fparent@baylibre.com ---
v2 -> v3 * Use new Kconfig option SYS_DA850_PLL_INIT instead of defining it in the config header file
v1 -> v2 * New patch
--- arch/arm/mach-davinci/Kconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index cf4ee16..067b6c3 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -22,6 +22,7 @@ config TARGET_EA20 config TARGET_OMAPL138_LCDK bool "OMAPL138 LCDK" select SUPPORT_SPL + select SYS_DA850_PLL_INIT
config TARGET_CALIMAIN bool "Calimain board"
On Tue, Nov 29, 2016 at 02:23:38PM +0100, Fabien Parent wrote:
The SPL is not able to boot properly because the PLL0 is not configured. Configure it.
Signed-off-by: Fabien Parent fparent@baylibre.com
Reviewed-by: Tom Rini trini@konsulko.com
On Tue, Nov 29, 2016 at 02:23:38PM +0100, Fabien Parent wrote:
The SPL is not able to boot properly because the PLL0 is not configured. Configure it.
Signed-off-by: Fabien Parent fparent@baylibre.com Reviewed-by: Tom Rini trini@konsulko.com
Applied to u-boot/master, thanks!
The SPL is unable to load u-boot because the DDR2 is not configured. Configure the DDR2.
Signed-off-by: Fabien Parent fparent@baylibre.com ---
v2 -> v3 * Use new Kconfig option SYS_DA850_DDR_INIT instead of defining it in the config header file
v1 -> v2 * New patch
--- arch/arm/mach-davinci/Kconfig | 1 + include/configs/omapl138_lcdk.h | 41 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+)
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 067b6c3..c593dad 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -23,6 +23,7 @@ config TARGET_OMAPL138_LCDK bool "OMAPL138 LCDK" select SUPPORT_SPL select SYS_DA850_PLL_INIT + select SYS_DA850_DDR_INIT
config TARGET_CALIMAIN bool "Calimain board" diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 854fc47..9db9cea 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -79,6 +79,47 @@ #define CONFIG_SYS_DA850_PLL1_PLLM 21
/* + * DDR2 memory configuration + */ +#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \ + DV_DDR_PHY_EXT_STRBEN | \ + (0x5 << DV_DDR_PHY_RD_LATENCY_SHIFT)) + +#define CONFIG_SYS_DA850_DDR2_SDBCR ( \ + (1 << DV_DDR_SDCR_DDR2EN_SHIFT) | \ + (1 << DV_DDR_SDCR_DDREN_SHIFT) | \ + (1 << DV_DDR_SDCR_SDRAMEN_SHIFT) | \ + (1 << DV_DDR_SDCR_BUS_WIDTH_SHIFT) | \ + (4 << DV_DDR_SDCR_CL_SHIFT) | \ + (3 << DV_DDR_SDCR_IBANK_SHIFT) | \ + (2 << DV_DDR_SDCR_PAGESIZE_SHIFT)) + +/* SDBCR2 is only used if IBANK_POS bit in SDBCR is set */ +#define CONFIG_SYS_DA850_DDR2_SDBCR2 0 + +#define CONFIG_SYS_DA850_DDR2_SDTIMR ( \ + (19 << DV_DDR_SDTMR1_RFC_SHIFT) | \ + (1 << DV_DDR_SDTMR1_RP_SHIFT) | \ + (1 << DV_DDR_SDTMR1_RCD_SHIFT) | \ + (2 << DV_DDR_SDTMR1_WR_SHIFT) | \ + (6 << DV_DDR_SDTMR1_RAS_SHIFT) | \ + (8 << DV_DDR_SDTMR1_RC_SHIFT) | \ + (1 << DV_DDR_SDTMR1_RRD_SHIFT) | \ + (1 << DV_DDR_SDTMR1_WTR_SHIFT)) + +#define CONFIG_SYS_DA850_DDR2_SDTIMR2 ( \ + (7 << DV_DDR_SDTMR2_RASMAX_SHIFT) | \ + (2 << DV_DDR_SDTMR2_XP_SHIFT) | \ + (0 << DV_DDR_SDTMR2_ODT_SHIFT) | \ + (10 << DV_DDR_SDTMR2_XSNR_SHIFT) | \ + (199 << DV_DDR_SDTMR2_XSRD_SHIFT) | \ + (1 << DV_DDR_SDTMR2_RTP_SHIFT) | \ + (2 << DV_DDR_SDTMR2_CKE_SHIFT)) + +#define CONFIG_SYS_DA850_DDR2_SDRCR 0x00000492 +#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30 + +/* * Serial Driver info */ #define CONFIG_SYS_NS16550_SERIAL
On Tue, Nov 29, 2016 at 02:23:39PM +0100, Fabien Parent wrote:
The SPL is unable to load u-boot because the DDR2 is not configured. Configure the DDR2.
Signed-off-by: Fabien Parent fparent@baylibre.com
Reviewed-by: Tom Rini trini@konsulko.com
On Tue, Nov 29, 2016 at 02:23:39PM +0100, Fabien Parent wrote:
The SPL is unable to load u-boot because the DDR2 is not configured. Configure the DDR2.
Signed-off-by: Fabien Parent fparent@baylibre.com Reviewed-by: Tom Rini trini@konsulko.com
Applied to u-boot/master, thanks!
The list of available boot method is not part of the binary which prevent the SPL from booting u-boot or Linux.
Add the missing .u_boot_list* sections to the binary to fix it.
Signed-off-by: Fabien Parent fparent@baylibre.com Reviewed-by: Tom Rini trini@konsulko.com ---
v2 -> v3:
* No change
v1 -> v2:
* No change
--- board/davinci/da8xxevm/u-boot-spl-da850evm.lds | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/board/davinci/da8xxevm/u-boot-spl-da850evm.lds b/board/davinci/da8xxevm/u-boot-spl-da850evm.lds index ab4f50c..85a6be9 100644 --- a/board/davinci/da8xxevm/u-boot-spl-da850evm.lds +++ b/board/davinci/da8xxevm/u-boot-spl-da850evm.lds @@ -34,6 +34,9 @@ SECTIONS .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
. = ALIGN(4); + .u_boot_list : { KEEP(*(SORT(.u_boot_list*))); } >.sram + + . = ALIGN(4); .rel.dyn : { __rel_dyn_start = .; *(.rel*)
On Tue, Nov 29, 2016 at 02:23:40PM +0100, Fabien Parent wrote:
The list of available boot method is not part of the binary which prevent the SPL from booting u-boot or Linux.
Add the missing .u_boot_list* sections to the binary to fix it.
Signed-off-by: Fabien Parent fparent@baylibre.com Reviewed-by: Tom Rini trini@konsulko.com
Applied to u-boot/master, thanks!
Set the correct CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR value in order to be able to boot from MMC/SD.
The SPL is stored at sector 0x75, while u-boot will follow at sector 0xb5.
Signed-off-by: Fabien Parent fparent@baylibre.com Reviewed-by: Tom Rini trini@konsulko.com ---
v2 -> v3:
* No change
v1 -> v2:
* Rebased on Sam's patches, i.e. use new Kconfig option instead of setting the value inside the config header file
--- configs/omapl138_lcdk_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index bcd1acb..4a5f435 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -9,6 +9,7 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " # CONFIG_CMD_IMLS is not set
On Tue, Nov 29, 2016 at 02:23:41PM +0100, Fabien Parent wrote:
Set the correct CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR value in order to be able to boot from MMC/SD.
The SPL is stored at sector 0x75, while u-boot will follow at sector 0xb5.
Signed-off-by: Fabien Parent fparent@baylibre.com Reviewed-by: Tom Rini trini@konsulko.com
Applied to u-boot/master, thanks!
participants (2)
-
Fabien Parent -
Tom Rini