This patch configures U-Boot SPL for DHCOR SoM to permit DFU upload of SPL and subsequent u-boot.itb for recovery or commissioning purposes.

To start U-Boot on DHCOR based board, e.g. Avenger96, proceed as follows: - Install dfu-util on the host PC (in debian this is package 'dfu-util')

- Power off the Avenger96 board. - Connect both USB-serial console and USB-OTG microB ports to host PC. - Switch Avenger96 to USB boot mode -- BOOT0..2 switches all set to 0. - Power on the Avenger96 board. - Verify using '$ dmesg' that a new device has been detected as follows: New USB device found, idVendor=0483, idProduct=df11, bcdDevice= 2.00 New USB device strings: Mfr=1, Product=2, SerialNumber=3 Product: DFU in HS Mode @Device ID /0x500, @Revision ID /0x0000 Manufacturer: STMicroelectronics

- Upload U-Boot SPL: $ dfu-util -a 1 -D u-boot-spl.stm32 - Upload U-Boot proper: $ dfu-util -a 0 -D u-boot.itb

- At this point, SPL will wait for user to press "Ctrl-C" on serial console. When ready to interact with U-Boot, press Ctrl-C to start the bootloader.

Signed-off-by: Marek Vasut marex@denx.de Cc: Patrice Chotard patrice.chotard@foss.st.com Cc: Patrick Delaunay patrick.delaunay@foss.st.com --- arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 42 ++++++++++++++++++++++ configs/stm32mp15_dhcor_basic_defconfig | 14 ++++++-- include/configs/stm32mp15_dh_dhsom.h | 7 ++++ 3 files changed, 61 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi index 502cd95da05..71375510b4a 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi @@ -27,6 +27,7 @@

&i2c4 { u-boot,dm-pre-reloc; + u-boot,dm-spl; };

&i2c4_pins_a { @@ -38,6 +39,15 @@

&pmic { u-boot,dm-pre-reloc; + u-boot,dm-spl; + + regulators { + u-boot,dm-spl; + }; +}; + +&pwr_regulators { + u-boot,dm-spl; };

&qspi { @@ -152,3 +162,35 @@ u-boot,dm-pre-reloc; }; }; + +&reg11 { + u-boot,dm-spl; +}; + +&reg18 { + u-boot,dm-spl; +}; + +&usbotg_hs { + u-boot,dm-spl; +}; + +&usbphyc { + u-boot,dm-spl; +}; + +&usbphyc_port0 { + u-boot,dm-spl; +}; + +&usbphyc_port1 { + u-boot,dm-spl; +}; + +&vdd_io { + u-boot,dm-spl; +}; + +&vdd_usb { + u-boot,dm-spl; +}; diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 2356de76baf..87980d2570d 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -16,6 +16,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000 CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its" # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=1 @@ -25,12 +26,17 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 +CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_DFU=y CONFIG_SYS_PROMPT="STM32MP> " # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set @@ -76,6 +82,7 @@ CONFIG_USE_ENV_SPI_MODE=y CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_ENV_IS_NOWHERE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=1536 @@ -84,7 +91,6 @@ CONFIG_SPL_BLOCK_CACHE=y CONFIG_DFU_MMC=y CONFIG_DFU_MTD=y CONFIG_DFU_RAM=y -CONFIG_DFU_VIRT=y CONFIG_GPIO_HOG=y CONFIG_DM_HWSPINLOCK=y CONFIG_HWSPINLOCK_STM32=y @@ -113,18 +119,20 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y CONFIG_PHY=y +CONFIG_SPL_PHY=y CONFIG_PHY_STM32_USBPHYC=y CONFIG_PINCONF=y # CONFIG_SPL_PINCTRL_FULL is not set CONFIG_PINCTRL_STMFX=y CONFIG_DM_PMIC=y -# CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_PMIC_STPMIC1=y CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_STM32_VREFBUF=y CONFIG_DM_REGULATOR_STPMIC1=y +CONFIG_SPL_DM_REGULATOR_STPMIC1=y CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y @@ -136,8 +144,10 @@ CONFIG_STM32_SPI=y CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC2=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_GADGET=y diff --git a/include/configs/stm32mp15_dh_dhsom.h b/include/configs/stm32mp15_dh_dhsom.h index d2fe923a33b..9e7d4b8144f 100644 --- a/include/configs/stm32mp15_dh_dhsom.h +++ b/include/configs/stm32mp15_dh_dhsom.h @@ -8,6 +8,13 @@ #ifndef __CONFIG_STM32MP15_DH_DHSOM_H__ #define __CONFIG_STM32MP15_DH_DHSOM_H__

+#ifdef CONFIG_SPL_BUILD +#define CONFIG_EXTRA_ENV_SETTINGS \ + "dfu_alt_info_ram=u-boot.itb ram " \ + __stringify(CONFIG_SPL_LOAD_FIT_ADDRESS) \ + " 0x800000\0" +#endif + #define STM32MP_BOARD_EXTRA_ENV \ "usb_pgood_delay=1000\0" \ "update_sf=" /* Erase SPI NOR and install U-Boot from SD */ \

Hi Marek

On 12/6/21 21:58, Marek Vasut wrote:

In case the SoC reports the boot device type is USB, it means the SPL was loaded via BootROM DFU mode. Currently the spl_boot_device() returns boot device as USB host, change it to DFU instead, so the SPL can continue the DFU boot and load U-Boot via DFU.

Signed-off-by: Marek Vasut marex@denx.de Cc: Patrice Chotard patrice.chotard@foss.st.com Cc: Patrick Delaunay patrick.delaunay@foss.st.com

---

arch/arm/mach-stm32mp/spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/spl.c index 405eff68a3b..51fe0698fab 100644 --- a/arch/arm/mach-stm32mp/spl.c +++ b/arch/arm/mach-stm32mp/spl.c @@ -43,7 +43,7 @@ u32 spl_boot_device(void) case BOOT_SERIAL_UART_8: return BOOT_DEVICE_UART; case BOOT_SERIAL_USB_OTG:

• return BOOT_DEVICE_USB;
  

• return BOOT_DEVICE_DFU;
  

  case BOOT_FLASH_NAND_FMC: return BOOT_DEVICE_NAND; case BOOT_FLASH_NOR_QSPI:

Applied to u-boot-stm/master

Thanks Patrice