[U-Boot-Users] [RFC/PATCH 1/6] Move definition of container_of() to common.h

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Haavard Skinnemoen

16 May 2008 16 May '08

11:10 a.m.

AVR32 and AT91SAM9 both have their own identical definitions of container_of() taken from the Linux kernel. Move it to common.h so that all architectures can use it.

container_of() is already used by some drivers, and will be used extensively by the new and improved SPI API.

Signed-off-by: Haavard Skinnemoen haavard.skinnemoen@atmel.com --- include/asm-arm/arch-at91sam9/hardware.h | 11 ----------- include/asm-avr32/u-boot.h | 11 ----------- include/common.h | 11 +++++++++++ 3 files changed, 11 insertions(+), 22 deletions(-)

diff --git a/include/asm-arm/arch-at91sam9/hardware.h b/include/asm-arm/arch-at91sam9/hardware.h index d2fe453..fba3908 100644 --- a/include/asm-arm/arch-at91sam9/hardware.h +++ b/include/asm-arm/arch-at91sam9/hardware.h @@ -42,15 +42,4 @@ #error "Unsupported AT91 processor" #endif

-/* - * container_of - cast a member of a structure out to the containing structure - * - * @ptr: the pointer to the member. - * @type: the type of the container struct this is embedded in. - * @member: the name of the member within the struct. - */ -#define container_of(ptr, type, member) ({ \ - const typeof(((type *)0)->member) *__mptr = (ptr); \ - (type *)((char *)__mptr - offsetof(type, member)); }) - #endif diff --git a/include/asm-avr32/u-boot.h b/include/asm-avr32/u-boot.h index 71dfcaf..85ef008 100644 --- a/include/asm-avr32/u-boot.h +++ b/include/asm-avr32/u-boot.h @@ -42,15 +42,4 @@ typedef struct bd_info { #define bi_memstart bi_dram[0].start #define bi_memsize bi_dram[0].size

-/** - * container_of - cast a member of a structure out to the containing structure - * - * @ptr: the pointer to the member. - * @type: the type of the container struct this is embedded in. - * @member: the name of the member within the struct. - */ -#define container_of(ptr, type, member) ({ \ - const typeof( ((type *)0)->member ) *__mptr = (ptr); \ - (type *)( (char *)__mptr - offsetof(type,member) );}) - #endif /* __ASM_U_BOOT_H__ */ diff --git a/include/common.h b/include/common.h index d0f5704..26e1b46 100644 --- a/include/common.h +++ b/include/common.h @@ -176,6 +176,17 @@ typedef void (interrupt_handler_t)(void *); (__x > __y) ? __x : __y; })

+/** + * container_of - cast a member of a structure out to the containing structure + * @ptr: the pointer to the member. + * @type: the type of the container struct this is embedded in. + * @member: the name of the member within the struct. + * + */ +#define container_of(ptr, type, member) ({ \ + const typeof( ((type *)0)->member ) *__mptr = (ptr); \ + (type *)( (char *)__mptr - offsetof(type,member) );}) + /* * Function Prototypes */

-- 1.5.4.3

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Haavard Skinnemoen

16 May 16 May

11:10 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 2/6] SPI API improvements

From: Haavard Skinnemoen hskinnemoen@atmel.com

This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible.

Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated.

Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.)

To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this.

Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware.

spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future.

This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection.

I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API.

But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why?

Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit.

Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver

Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API.

Signed-off-by: Haavard Skinnemoen hskinnemoen@atmel.com --- board/amcc/taihu/taihu.c | 16 ++- board/freescale/mpc8349emds/mpc8349emds.c | 25 +++--- board/sacsng/sacsng.c | 35 +++---- board/ssv/adnpesc1/adnpesc1.c | 27 +++--- common/cmd_df.c | 37 +++++++ common/cmd_spi.c | 42 +++++---- common/soft_spi.c | 124 ++++++++++++++++++------ cpu/nios/spi.c | 79 +++++++++++---- drivers/rtc/ds1306.c | 67 ++++++++++---- drivers/rtc/mc13783-rtc.c | 43 +++++++- drivers/spi/mpc8xxx_spi.c | 54 +++++++++-- drivers/spi/mxc_spi.c | 88 +++++++++++------ include/configs/imx31_litekit.h | 3 +- include/configs/mx31ads.h | 3 +- include/spi.h | 150 ++++++++++++++++++++++++----- 15 files changed, 584 insertions(+), 209 deletions(-) create mode 100644 common/cmd_df.c

diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c index eedde59..891b4d9 100644 --- a/board/amcc/taihu/taihu.c +++ b/board/amcc/taihu/taihu.c @@ -165,16 +165,20 @@ unsigned char spi_read(void) return (unsigned char)gpio_read_in_bit(SPI_DIN_GPIO15); }

-void taihu_spi_chipsel(int cs) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) { - gpio_write_bit(SPI_CS_GPIO0, cs); + return bus == 0 && cs == 0; }

-spi_chipsel_type spi_chipsel[]= { - taihu_spi_chipsel -}; +void spi_cs_activate(struct spi_slave *slave) +{ + gpio_write_bit(SPI_CS_GPIO0, 1); +}

-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); +void spi_cs_deactivate(struct spi_slave *slave) +{ + gpio_write_bit(SPI_CS_GPIO0, 0); +}

#ifdef CONFIG_PCI static unsigned char int_lines[32] = { diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c index 6c82596..e18e68e 100644 --- a/board/freescale/mpc8349emds/mpc8349emds.c +++ b/board/freescale/mpc8349emds/mpc8349emds.c @@ -257,25 +257,24 @@ void sdram_init(void)

#define SPI_CS_MASK 0x80000000

-void spi_eeprom_chipsel(int cs) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(struct spi_slave *slave) { volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];

- if (cs) - iopd->dat &= ~SPI_CS_MASK; - else - iopd->dat |= SPI_CS_MASK; + iopd->dat &= ~SPI_CS_MASK; }

-/* - * The SPI command uses this table of functions for controlling the SPI - * chip selects. - */ -spi_chipsel_type spi_chipsel[] = { - spi_eeprom_chipsel, -}; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); +void spi_cs_deactivate(struct spi_slave *slave) +{ + volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];

+ iopd->dat |= SPI_CS_MASK; +} #endif /* CONFIG_HARD_SPI */

#if defined(CONFIG_OF_BOARD_SETUP) diff --git a/board/sacsng/sacsng.c b/board/sacsng/sacsng.c index 25209e0..e85a0fc 100644 --- a/board/sacsng/sacsng.c +++ b/board/sacsng/sacsng.c @@ -842,37 +842,30 @@ void show_boot_progress (int status) #define SPI_ADC_CS_MASK 0x00000800 #define SPI_DAC_CS_MASK 0x00001000

-void spi_adc_chipsel(int cs) +static const u32 cs_mask[] = { + SPI_ADC_CS_MASK, + SPI_DAC_CS_MASK, +}; + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs < sizeof(cs_mask) / sizeof(cs_mask[0]); +} + +void spi_cs_activate(struct spi_slave *slave) { volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */);

- if(cs) - iopd->pdat &= ~SPI_ADC_CS_MASK; /* activate the chip select */ - else - iopd->pdat |= SPI_ADC_CS_MASK; /* deactivate the chip select */ + iopd->pdat &= ~cs_mask[slave->cs]; }

-void spi_dac_chipsel(int cs) +void spi_cs_deactivate(struct spi_slave *slave) { volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */);

- if(cs) - iopd->pdat &= ~SPI_DAC_CS_MASK; /* activate the chip select */ - else - iopd->pdat |= SPI_DAC_CS_MASK; /* deactivate the chip select */ + iopd->pdat |= cs_mask[slave->cs]; }

-/* - * The SPI command uses this table of functions for controlling the SPI - * chip selects: it calls the appropriate function to control the SPI - * chip selects. - */ -spi_chipsel_type spi_chipsel[] = { - spi_adc_chipsel, - spi_dac_chipsel -}; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); - #endif

#endif /* CONFIG_MISC_INIT_R */ diff --git a/board/ssv/adnpesc1/adnpesc1.c b/board/ssv/adnpesc1/adnpesc1.c index 2ec3a72..3ee8ba5 100644 --- a/board/ssv/adnpesc1/adnpesc1.c +++ b/board/ssv/adnpesc1/adnpesc1.c @@ -69,25 +69,24 @@ long int initdram (int board_type)

#define SPI_RTC_CS_MASK 0x00000001

-void spi_rtc_chipsel(int cs) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(struct spi_slave *slave) { nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE;

- if (cs) - spi->slaveselect = SPI_RTC_CS_MASK; /* activate (1) */ - else - spi->slaveselect = 0; /* deactivate (0) */ + spi->slaveselect = SPI_RTC_CS_MASK; /* activate (1) */ }

-/* - * The SPI command uses this table of functions for controlling the SPI - * chip selects: it calls the appropriate function to control the SPI - * chip selects. - */ -spi_chipsel_type spi_chipsel[] = { - spi_rtc_chipsel -}; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); +void spi_cs_deactivate(struct spi_slave *slave) +{ + nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE; + + spi->slaveselect = 0; /* deactivate (0) */ +}

#endif

diff --git a/common/cmd_df.c b/common/cmd_df.c new file mode 100644 index 0000000..5f65044 --- /dev/null +++ b/common/cmd_df.c @@ -0,0 +1,37 @@ +/* + * Command for accessing DataFlash. + * + * Copyright (C) 2008 Atmel Corporation + */ +#include <common.h> +#include <df.h> + +static int do_df(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + const char *cmd; + + /* need at least two arguments */ + if (argc < 2) + goto usage; + + cmd = argv[1]; + + if (strcmp(cmd, "init") == 0) { + df_init(0, 0, 1000000); + return 0; + } + + if (strcmp(cmd, "info") == 0) { + df_show_info(); + return 0; + } + +usage: + printf("Usage:\n%s\n", cmdtp->usage); + return 1; +} + +U_BOOT_CMD( + sf, 2, 1, do_serial_flash, + "sf - Serial flash sub-system\n", + "probe [bus:]cs - init flash device on given SPI bus and CS\n") diff --git a/common/cmd_spi.c b/common/cmd_spi.c index 7604422..40ee7e7 100644 --- a/common/cmd_spi.c +++ b/common/cmd_spi.c @@ -37,20 +37,20 @@ # define MAX_SPI_BYTES 32 /* Maximum number of bytes we can handle */ #endif

-/* - * External table of chip select functions (see the appropriate board - * support for the actual definition of the table). - */ -extern spi_chipsel_type spi_chipsel[]; -extern int spi_chipsel_cnt; +#ifndef CONFIG_DEFAULT_SPI_BUS +# define CONFIG_DEFAULT_SPI_BUS 0 +#endif +#ifndef CONFIG_DEFAULT_SPI_MODE +# define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 +#endif

/* * Values from last command. */ -static int device; -static int bitlen; -static uchar dout[MAX_SPI_BYTES]; -static uchar din[MAX_SPI_BYTES]; +static unsigned int device; +static int bitlen; +static uchar dout[MAX_SPI_BYTES]; +static uchar din[MAX_SPI_BYTES];

/* * SPI read/write @@ -65,6 +65,7 @@ static uchar din[MAX_SPI_BYTES];

int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { + struct spi_slave *slave; char *cp = 0; uchar tmp; int j; @@ -101,19 +102,24 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } }

- if ((device < 0) || (device >= spi_chipsel_cnt)) { - printf("Invalid device %d, giving up.\n", device); - return 1; - } if ((bitlen < 0) || (bitlen > (MAX_SPI_BYTES * 8))) { printf("Invalid bitlen %d, giving up.\n", bitlen); return 1; }

- debug ("spi_chipsel[%d] = %08X\n", - device, (uint)spi_chipsel[device]); + /* FIXME: Make these parameters run-time configurable */ + slave = spi_setup_slave(CONFIG_DEFAULT_SPI_BUS, device, 1000000, + CONFIG_DEFAULT_SPI_MODE); + if (!slave) { + printf("Invalid device %d, giving up.\n", device); + return 1; + } + + debug ("spi chipsel = %08X\n", device);

- if(spi_xfer(spi_chipsel[device], bitlen, dout, din) != 0) { + spi_claim_bus(slave); + if(spi_xfer(slave, bitlen, dout, din, + SPI_XFER_BEGIN | SPI_XFER_END) != 0) { printf("Error with the SPI transaction.\n"); rcode = 1; } else { @@ -123,6 +129,8 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } printf("\n"); } + spi_release_bus(slave); + spi_free_slave(slave);

return rcode; } diff --git a/common/soft_spi.c b/common/soft_spi.c index e425061..c131650 100644 --- a/common/soft_spi.c +++ b/common/soft_spi.c @@ -29,6 +29,8 @@

#if defined(CONFIG_SOFT_SPI)

+#include <malloc.h> + /*----------------------------------------------------------------------- * Definitions */ @@ -39,6 +41,15 @@ #define PRINTD(fmt,args...) #endif

+struct soft_spi_slave { + struct spi_slave slave; + unsigned int mode; +}; + +static inline struct soft_spi_slave *to_soft_spi(struct spi_slave *slave) +{ + return container_of(slave, struct soft_spi_slave, slave); +}

/*=====================================================================*/ /* Public Functions */ @@ -56,6 +67,57 @@ void spi_init (void) #endif }

+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct soft_spi_slave *ss; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + ss = malloc(sizeof(struct soft_spi_slave)); + if (!ss) + return NULL; + + ss->slave.bus = bus; + ss->slave.cs = cs; + ss->mode = mode; + + /* TODO: Use max_hz to limit the SCK rate */ + + return &ss->slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + struct soft_spi_slave *ss = to_soft_spi(slave); + + free(ss); +} + +int spi_claim_bus(struct spi_slave *slave) +{ +#ifdef CFG_IMMR + volatile immap_t *immr = (immap_t *)CFG_IMMR; +#endif + struct soft_spi_slave *ss = to_soft_spi(slave); + + /* + * Make sure the SPI clock is in idle state as defined for + * this slave. + */ + if (ss->mode & SPI_CPOL) + SPI_SCL(1); + else + SPI_SCL(0); + + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + /* Nothing to do */ +}

/*----------------------------------------------------------------------- * SPI transfer @@ -68,50 +130,54 @@ void spi_init (void) * and "din" can point to the same memory location, in which case the * input data overwrites the output data (since both are buffered by * temporary variables, this is OK). - * - * If the chipsel() function is not NULL, it is called with a parameter - * of '1' (chip select active) at the start of the transfer and again with - * a parameter of '0' at the end of the transfer. - * - * If the chipsel() function _is_ NULL, it the responsibility of the - * caller to make the appropriate chip select active before calling - * spi_xfer() and making it inactive after spi_xfer() returns. */ -int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) { #ifdef CFG_IMMR volatile immap_t *immr = (immap_t *)CFG_IMMR; #endif - uchar tmpdin = 0; - uchar tmpdout = 0; - int j; + struct soft_spi_slave *ss = to_soft_spi(slave); + uchar tmpdin = 0; + uchar tmpdout = 0; + const u8 *txd = dout; + u8 *rxd = din; + int cpol = ss->mode & SPI_CPOL; + int cpha = ss->mode & SPI_CPHA; + unsigned int j;

- PRINTD("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", - (int)chipsel, *(uint *)dout, *(uint *)din, bitlen); + PRINTD("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", + slave->bus, slave->cs, *(uint *)txd, *(uint *)rxd, bitlen);

- if(chipsel != NULL) { - (*chipsel)(1); /* select the target chip */ - } + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave);

for(j = 0; j < bitlen; j++) { /* * Check if it is time to work on a new byte. */ if((j % 8) == 0) { - tmpdout = *dout++; + tmpdout = *txd++; if(j != 0) { - *din++ = tmpdin; + *rxd++ = tmpdin; } tmpdin = 0; } - SPI_SCL(0); + + if (!cpha) + SPI_SCL(!cpol); SPI_SDA(tmpdout & 0x80); SPI_DELAY; - SPI_SCL(1); + if (cpha) + SPI_SCL(!cpol); + else + SPI_SCL(cpol); + tmpdin <<= 1; + tmpdin |= SPI_READ; + tmpdout <<= 1; SPI_DELAY; - tmpdin <<= 1; - tmpdin |= SPI_READ; - tmpdout <<= 1; + if (cpha) + SPI_SCL(cpol); } /* * If the number of bits isn't a multiple of 8, shift the last @@ -120,14 +186,10 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) */ if((bitlen % 8) != 0) tmpdin <<= 8 - (bitlen % 8); - *din++ = tmpdin; - - SPI_SCL(0); /* SPI wants the clock left low for idle */ + *rxd++ = tmpdin;

- if(chipsel != NULL) { - (*chipsel)(0); /* deselect the target chip */ - - } + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave);

return(0); } diff --git a/cpu/nios/spi.c b/cpu/nios/spi.c index f37146b..6408180 100644 --- a/cpu/nios/spi.c +++ b/cpu/nios/spi.c @@ -63,10 +63,10 @@ static char quickhex (int i) return hex_digit[i]; }

-static void memdump (void *pv, int num) +static void memdump (const void *pv, int num) { int i; - unsigned char *pc = (unsigned char *) pv; + const unsigned char *pc = (const unsigned char *) pv;

for (i = 0; i < num; i++) printf ("%c%c ", quickhex (pc[i] >> 4), quickhex (pc[i] & 0x0f)); @@ -83,26 +83,64 @@ static void memdump (void *pv, int num) #endif /* DEBUG */

+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct spi_slave *slave; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + slave = malloc(sizeof(struct spi_slave)); + if (!slave) + return NULL; + + slave->bus = bus; + slave->cs = cs; + + /* TODO: Add support for different modes and speeds */ + + return slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + free(slave); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + +} + /* * SPI transfer: * * See include/spi.h and http://www.altera.com/literature/ds/ds_nios_spi.pdf * for more informations. */ -int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) +int spi_xfer(struct spi_slave *slave, int bitlen, const void *dout, + void *din, unsigned long flags) { + const u8 *txd = dout; + u8 *rxd = din; int j;

- DPRINT(("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", - (int)chipsel, *(uint *)dout, *(uint *)din, bitlen)); + DPRINT(("spi_xfer: slave %u:%u dout %08X din %08X bitlen %d\n", + slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen));

- memdump((void*)dout, (bitlen + 7) / 8); + memdump(dout, (bitlen + 7) / 8);

- if(chipsel != NULL) { - chipsel(1); /* select the target chip */ - } + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave);

- if (bitlen > CFG_NIOS_SPIBITS) { /* leave chip select active */ + if (!(flags & SPI_XFER_END) || bitlen > CFG_NIOS_SPIBITS) { + /* leave chip select active */ spi->control |= NIOS_SPI_SSO; }

@@ -114,11 +152,11 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)

while ((spi->status & NIOS_SPI_TRDY) == 0) ; - spi->txdata = (unsigned)(dout[j]); + spi->txdata = (unsigned)(txd[j]);

while ((spi->status & NIOS_SPI_RRDY) == 0) ; - din[j] = (unsigned char)(spi->rxdata & 0xff); + rxd[j] = (unsigned char)(spi->rxdata & 0xff);

#elif (CFG_NIOS_SPIBITS == 16) j++, j++) { @@ -126,15 +164,15 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) while ((spi->status & NIOS_SPI_TRDY) == 0) ; if ((j+1) < ((bitlen + 7) / 8)) - spi->txdata = (unsigned)((dout[j] << 8) | dout[j+1]); + spi->txdata = (unsigned)((txd[j] << 8) | txd[j+1]); else - spi->txdata = (unsigned)(dout[j] << 8); + spi->txdata = (unsigned)(txd[j] << 8);

while ((spi->status & NIOS_SPI_RRDY) == 0) ; - din[j] = (unsigned char)((spi->rxdata >> 8) & 0xff); + rxd[j] = (unsigned char)((spi->rxdata >> 8) & 0xff); if ((j+1) < ((bitlen + 7) / 8)) - din[j+1] = (unsigned char)(spi->rxdata & 0xff); + rxd[j+1] = (unsigned char)(spi->rxdata & 0xff);

#else #error "*** unsupported value of CFG_NIOS_SPIBITS ***" @@ -142,15 +180,14 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)

}

- if (bitlen > CFG_NIOS_SPIBITS) { + if (bitlen > CFG_NIOS_SPIBITS && (flags & SPI_XFER_END)) { spi->control &= ~NIOS_SPI_SSO; }

- if(chipsel != NULL) { - chipsel(0); /* deselect the target chip */ - } + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave);

- memdump((void*)din, (bitlen + 7) / 8); + memdump(din, (bitlen + 7) / 8);

return 0; } diff --git a/drivers/rtc/ds1306.c b/drivers/rtc/ds1306.c index 1c8ac7f..29854fc 100644 --- a/drivers/rtc/ds1306.c +++ b/drivers/rtc/ds1306.c @@ -62,13 +62,6 @@

#define RTC_USER_RAM_BASE 0x20

-/* - * External table of chip select functions (see the appropriate board - * support for the actual definition of the table). - */ -extern spi_chipsel_type spi_chipsel[]; -extern int spi_chipsel_cnt; - static unsigned int bin2bcd (unsigned int n); static unsigned char bcd2bin (unsigned char c);

@@ -305,11 +298,29 @@ void rtc_reset (void) static unsigned char rtc_read (unsigned char reg); static void rtc_write (unsigned char reg, unsigned char val);

+static struct spi_slave *slave; + /* read clock time from DS1306 and return it in *tmp */ int rtc_get (struct rtc_time *tmp) { unsigned char sec, min, hour, mday, wday, mon, year;

+ /* + * Assuming Vcc = 2.0V (lowest speed) + * + * REVISIT: If we add an rtc_init() function we can do this + * step just once. + */ + if (!slave) { + slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000, + SPI_MODE_3 | SPI_CS_HIGH); + if (!slave) + return; + } + + if (spi_claim_bus(slave)) + return; + sec = rtc_read (RTC_SECONDS); min = rtc_read (RTC_MINUTES); hour = rtc_read (RTC_HOURS); @@ -318,6 +329,8 @@ int rtc_get (struct rtc_time *tmp) mon = rtc_read (RTC_MONTH); year = rtc_read (RTC_YEAR);

+ spi_release_bus(slave); + debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " "hr: %02x min: %02x sec: %02x\n", year, mon, mday, wday, hour, min, sec); @@ -360,6 +373,17 @@ int rtc_get (struct rtc_time *tmp) /* set clock time from *tmp in DS1306 RTC */ void rtc_set (struct rtc_time *tmp) { + /* Assuming Vcc = 2.0V (lowest speed) */ + if (!slave) { + slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000, + SPI_MODE_3 | SPI_CS_HIGH); + if (!slave) + return; + } + + if (spi_claim_bus(slave)) + return; + debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec); @@ -371,6 +395,8 @@ void rtc_set (struct rtc_time *tmp) rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday)); rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon)); rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000)); + + spi_release_bus(slave); }

/* ------------------------------------------------------------------------- */ @@ -378,6 +404,17 @@ void rtc_set (struct rtc_time *tmp) /* reset the DS1306 */ void rtc_reset (void) { + /* Assuming Vcc = 2.0V (lowest speed) */ + if (!slave) { + slave = spi_setup_slave(0, CFG_SPI_RTC_DEVID, 600000, + SPI_MODE_3 | SPI_CS_HIGH); + if (!slave) + return; + } + + if (spi_claim_bus(slave)) + return; + /* clear the control register */ rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */ rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */ @@ -391,22 +428,18 @@ void rtc_reset (void) rtc_write (RTC_HOURS_ALARM1, 0x00); rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00); rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00); + + spi_release_bus(slave); }

/* ------------------------------------------------------------------------- */

static unsigned char rtc_read (unsigned char reg) { - unsigned char dout[2]; /* SPI Output Data Bytes */ - unsigned char din[2]; /* SPI Input Data Bytes */ - - dout[0] = reg; + int ret;

- if (spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din) != 0) { - return 0; - } else { - return din[1]; - } + ret = spi_w8r8(slave, reg); + return ret < 0 ? 0 : ret; }

/* ------------------------------------------------------------------------- */ @@ -419,7 +452,7 @@ static void rtc_write (unsigned char reg, unsigned char val) dout[0] = 0x80 | reg; dout[1] = val;

- spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din); + spi_xfer (slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); }

#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */ diff --git a/drivers/rtc/mc13783-rtc.c b/drivers/rtc/mc13783-rtc.c index 35b1b8b..b6e1501 100644 --- a/drivers/rtc/mc13783-rtc.c +++ b/drivers/rtc/mc13783-rtc.c @@ -24,34 +24,50 @@ #include <rtc.h> #include <spi.h>

+static struct spi_slave *slave; + int rtc_get(struct rtc_time *rtc) { u32 day1, day2, time; u32 reg; int err, tim, i = 0;

- spi_select(1, 0, SPI_MODE_2 | SPI_CS_HIGH); + if (!slave) { + /* FIXME: Verify the max SCK rate */ + slave = spi_setup_slave(1, 0, 1000000, + SPI_MODE_2 | SPI_CS_HIGH); + if (!slave) + return -1; + } + + if (spi_claim_bus(slave)) + return -1;

do { reg = 0x2c000000; - err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day1); + err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day1, + SPI_XFER_BEGIN | SPI_XFER_END);

if (err) return err;

reg = 0x28000000; - err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time); + err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time, + SPI_XFER_BEGIN | SPI_XFER_END);

if (err) return err;

reg = 0x2c000000; - err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day2); + err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day2, + SPI_XFER_BEGIN | SPI_XFER_END);

if (err) return err; } while (day1 != day2 && i++ < 3);

+ spi_release_bus(slave); + tim = day1 * 86400 + time; to_tm(tim, rtc);

@@ -65,16 +81,31 @@ void rtc_set(struct rtc_time *rtc) { u32 time, day, reg;

+ if (!slave) { + /* FIXME: Verify the max SCK rate */ + slave = spi_setup_slave(1, 0, 1000000, + SPI_MODE_2 | SPI_CS_HIGH); + if (!slave) + return; + } + time = mktime(rtc->tm_year, rtc->tm_mon, rtc->tm_mday, rtc->tm_hour, rtc->tm_min, rtc->tm_sec); day = time / 86400; time %= 86400;

+ if (spi_claim_bus(slave)) + return; + reg = 0x2c000000 | day | 0x80000000; - spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day); + spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day, + SPI_XFER_BEGIN | SPI_XFER_END);

reg = 0x28000000 | time | 0x80000000; - spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time); + spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time, + SPI_XFER_BEGIN | SPI_XFER_END); + + spi_release_bus(slave); }

void rtc_reset(void) diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 2fe838c..136fb50 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -24,6 +24,7 @@ #include <common.h> #if defined(CONFIG_MPC8XXX_SPI) && defined(CONFIG_HARD_SPI)

+#include <malloc.h> #include <spi.h> #include <asm/mpc8xxx_spi.h>

@@ -37,6 +38,34 @@

#define SPI_TIMEOUT 1000

+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct spi_slave *slave; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + slave = malloc(sizeof(struct spi_slave)); + if (!slave) + return NULL; + + slave->bus = bus; + slave->cs = cs; + + /* + * TODO: Some of the code in spi_init() should probably move + * here, or into spi_claim_bus() below. + */ + + return slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + free(slave); +} + void spi_init(void) { volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; @@ -53,7 +82,18 @@ void spi_init(void) spi->com = 0; /* LST bit doesn't do anything, so disregard */ }

-int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) +int spi_claim_bus(struct spi_slave *slave) +{ + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, + void *din, unsigned long flags) { volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; unsigned int tmpdout, tmpdin, event; @@ -61,11 +101,11 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) int tm, isRead = 0; unsigned char charSize = 32;

- debug("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", - (int)chipsel, *(uint *) dout, *(uint *) din, bitlen); + debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", + slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);

- if (chipsel != NULL) - (*chipsel) (1); /* select the target chip */ + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave);

spi->event = 0xffffffff; /* Clear all SPI events */

@@ -135,8 +175,8 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin); }

- if (chipsel != NULL) - (*chipsel) (0); /* deselect the target chip */ + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave);

return 0; } diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index b2e3ab9..e080959 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -19,6 +19,7 @@ */

#include <common.h> +#include <malloc.h> #include <spi.h> #include <asm/io.h>

@@ -61,17 +62,18 @@ static unsigned long spi_bases[] = { 0x53f84000, };

-static unsigned long spi_base; - #endif

-spi_chipsel_type spi_chipsel[] = { - (spi_chipsel_type)0, - (spi_chipsel_type)1, - (spi_chipsel_type)2, - (spi_chipsel_type)3, +struct mxc_spi_slave { + struct spi_slave slave; + unsigned long base; + u32 ctrl_reg; }; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); + +static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave) +{ + return container_of(slave, struct mxc_spi_slave, slave); +}

static inline u32 reg_read(unsigned long addr) { @@ -83,30 +85,31 @@ static inline void reg_write(unsigned long addr, u32 val) *(volatile unsigned long*)addr = val; }

-static u32 spi_xchg_single(u32 data, int bitlen) +static u32 spi_xchg_single(struct spi_slave *slave, u32 data, int bitlen) { - - unsigned int cfg_reg = reg_read(spi_base + MXC_CSPICTRL); + struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); + unsigned int cfg_reg = reg_read(mxcs->base + MXC_CSPICTRL);

if (MXC_CSPICTRL_BITCOUNT(bitlen - 1) != (cfg_reg & MXC_CSPICTRL_BITCOUNT(31))) { cfg_reg = (cfg_reg & ~MXC_CSPICTRL_BITCOUNT(31)) | MXC_CSPICTRL_BITCOUNT(bitlen - 1); - reg_write(spi_base + MXC_CSPICTRL, cfg_reg); + reg_write(mxcs->base + MXC_CSPICTRL, cfg_reg); }

- reg_write(spi_base + MXC_CSPITXDATA, data); + reg_write(mxcs->base + MXC_CSPITXDATA, data);

cfg_reg |= MXC_CSPICTRL_XCH;

- reg_write(spi_base + MXC_CSPICTRL, cfg_reg); + reg_write(mxcs->base + MXC_CSPICTRL, cfg_reg);

- while (reg_read(spi_base + MXC_CSPICTRL) & MXC_CSPICTRL_XCH) + while (reg_read(mxcs->base + MXC_CSPICTRL) & MXC_CSPICTRL_XCH) ;

- return reg_read(spi_base + MXC_CSPIRXDATA); + return reg_read(mxcs->base + MXC_CSPIRXDATA); }

-int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, + void *din, unsigned long flags) { int n_blks = (bitlen + 31) / 32; u32 *out_l, *in_l; @@ -117,13 +120,10 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) return 1; }

- if (!spi_base) - spi_select(CONFIG_MXC_SPI_IFACE, (int)chipsel, SPI_MODE_2 | SPI_CS_HIGH); - for (i = 0, in_l = (u32 *)din, out_l = (u32 *)dout; i < n_blks; i++, in_l++, out_l++, bitlen -= 32) - *in_l = spi_xchg_single(*out_l, bitlen); + *in_l = spi_xchg_single(slave, *out_l, bitlen);

return 0; } @@ -132,17 +132,17 @@ void spi_init(void) { }

-int spi_select(unsigned int bus, unsigned int dev, unsigned long mode) +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) { unsigned int ctrl_reg; + struct mxc_spi_slave *mxcs;

if (bus >= sizeof(spi_bases) / sizeof(spi_bases[0]) || - dev > 3) - return 1; - - spi_base = spi_bases[bus]; + cs > 3) + return NULL;

- ctrl_reg = MXC_CSPICTRL_CHIPSELECT(dev) | + ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) | MXC_CSPICTRL_BITCOUNT(31) | MXC_CSPICTRL_DATARATE(7) | /* FIXME: calculate data rate */ MXC_CSPICTRL_EN | @@ -155,12 +155,38 @@ int spi_select(unsigned int bus, unsigned int dev, unsigned long mode) if (mode & SPI_CS_HIGH) ctrl_reg |= MXC_CSPICTRL_SSPOL;

- reg_write(spi_base + MXC_CSPIRESET, 1); + mxcs = malloc(sizeof(struct mxc_spi_slave)); + if (!mxcs) + return NULL; + + mxcs->slave.bus = bus; + mxcs->slave.cs = cs; + mxcs->base = spi_bases[bus]; + mxcs->ctrl_reg = ctrl_reg; + + return &mxcs->slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + free(slave); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); + + reg_write(mxcs->base + MXC_CSPIRESET, 1); udelay(1); - reg_write(spi_base + MXC_CSPICTRL, ctrl_reg); - reg_write(spi_base + MXC_CSPIPERIOD, + reg_write(mxcs->base + MXC_CSPICTRL, mxcs->ctrl_reg); + reg_write(mxcs->base + MXC_CSPIPERIOD, MXC_CSPIPERIOD_32KHZ); - reg_write(spi_base + MXC_CSPIINT, 0); + reg_write(mxcs->base + MXC_CSPIINT, 0);

return 0; } + +void spi_release_bus(struct spi_slave *slave) +{ + /* TODO: Shut the controller down */ +} diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index 4281d73..ec4ed1e 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -65,7 +65,8 @@

#define CONFIG_HARD_SPI 1 #define CONFIG_MXC_SPI 1 -#define CONFIG_MXC_SPI_IFACE 1 +#define CONFIG_DEFAULT_SPI_BUS 1 +#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)

#define CONFIG_RTC_MC13783 1

diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index 2ea48a6..37ba872 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -62,7 +62,8 @@

#define CONFIG_HARD_SPI 1 #define CONFIG_MXC_SPI 1 -#define CONFIG_MXC_SPI_IFACE 1 /* Default SPI interface number */ +#define CONFIG_DEFAULT_SPI_BUS 1 +#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)

#define CONFIG_RTC_MC13783 1

diff --git a/include/spi.h b/include/spi.h index 3a55a68..7744c2e 100644 --- a/include/spi.h +++ b/include/spi.h @@ -31,22 +31,87 @@ #define SPI_MODE_1 (0|SPI_CPHA) #define SPI_MODE_2 (SPI_CPOL|0) #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) -#define SPI_CS_HIGH 0x04 /* chipselect active high? */ +#define SPI_CS_HIGH 0x04 /* CS active high */ #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ #define SPI_3WIRE 0x10 /* SI/SO signals shared */ #define SPI_LOOP 0x20 /* loopback mode */

-/* - * The function call pointer type used to drive the chip select. - */ -typedef void (*spi_chipsel_type)(int cs); +/* SPI transfer flags */ +#define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */ +#define SPI_XFER_END 0x02 /* Deassert CS after transfer */

+/*----------------------------------------------------------------------- + * Representation of a SPI slave, i.e. what we're communicating with. + * + * Drivers are expected to extend this with controller-specific data. + * + * bus: ID of the bus that the slave is attached to. + * cs: ID of the chip select connected to the slave. + */ +struct spi_slave { + unsigned int bus; + unsigned int cs; +};

/*----------------------------------------------------------------------- * Initialization, must be called once on start up. + * + * TODO: I don't think we really need this. */ void spi_init(void);

+/*----------------------------------------------------------------------- + * Set up communications parameters for a SPI slave. + * + * This must be called once for each slave. Note that this function + * usually doesn't touch any actual hardware, it only initializes the + * contents of spi_slave so that the hardware can be easily + * initialized later. + * + * bus: Bus ID of the slave chip. + * cs: Chip select ID of the slave chip on the specified bus. + * max_hz: Maximum SCK rate in Hz. + * mode: Clock polarity, clock phase and other parameters. + * + * Returns: A spi_slave reference that can be used in subsequent SPI + * calls, or NULL if one or more of the parameters are not supported. + */ +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode); + +/*----------------------------------------------------------------------- + * Free any memory associated with a SPI slave. + * + * slave: The SPI slave + */ +void spi_free_slave(struct spi_slave *slave); + +/*----------------------------------------------------------------------- + * Claim the bus and prepare it for communication with a given slave. + * + * This must be called before doing any transfers with a SPI slave. It + * will enable and initialize any SPI hardware as necessary, and make + * sure that the SCK line is in the correct idle state. It is not + * allowed to claim the same bus for several slaves without releasing + * the bus in between. + * + * slave: The SPI slave + * + * Returns: 0 if the bus was claimed successfully, or a negative value + * if it wasn't. + */ +int spi_claim_bus(struct spi_slave *slave); + +/*----------------------------------------------------------------------- + * Release the SPI bus + * + * This must be called once for every call to spi_claim_bus() after + * all transfers have finished. It may disable any SPI hardware as + * appropriate. + * + * slave: The SPI slave + */ +void spi_release_bus(struct spi_slave *slave);

/*----------------------------------------------------------------------- * SPI transfer @@ -60,28 +125,67 @@ void spi_init(void); * input data overwrites the output data (since both are buffered by * temporary variables, this is OK). * - * If the chipsel() function is not NULL, it is called with a parameter - * of '1' (chip select active) at the start of the transfer and again with - * a parameter of '0' at the end of the transfer. - * - * If the chipsel() function _is_ NULL, it the responsibility of the - * caller to make the appropriate chip select active before calling - * spi_xfer() and making it inactive after spi_xfer() returns. - * * spi_xfer() interface: - * chipsel: Routine to call to set/clear the chip select: - * if chipsel is NULL, it is not used. - * if(cs), make the chip select active (typically '0'). - * if(!cs), make the chip select inactive (typically '1'). - * dout: Pointer to a string of bits to send out. The bits are - * held in a byte array and are sent MSB first. - * din: Pointer to a string of bits that will be filled in. - * bitlen: How many bits to write and read. + * slave: The SPI slave which will be sending/receiving the data. + * bitlen: How many bits to write and read. + * dout: Pointer to a string of bits to send out. The bits are + * held in a byte array and are sent MSB first. + * din: Pointer to a string of bits that will be filled in. + * flags: A bitwise combination of SPI_XFER_* flags. * * Returns: 0 on success, not 0 on failure */ -int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din); +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, + void *din, unsigned long flags); + +/*----------------------------------------------------------------------- + * Determine if a SPI chipselect is valid. + * This function is provided by the board if the low-level SPI driver + * needs it to determine if a given chipselect is actually valid. + * + * Returns: 1 if bus:cs identifies a valid chip on this board, 0 + * otherwise. + */ +int spi_cs_is_valid(unsigned int bus, unsigned int cs); + +/*----------------------------------------------------------------------- + * Activate a SPI chipselect. + * This function is provided by the board code when using a driver + * that can't control its chipselects automatically (e.g. + * common/soft_spi.c). When called, it should activate the chip select + * to the device identified by "slave". + */ +void spi_cs_activate(struct spi_slave *slave); + +/*----------------------------------------------------------------------- + * Deactivate a SPI chipselect. + * This function is provided by the board code when using a driver + * that can't control its chipselects automatically (e.g. + * common/soft_spi.c). When called, it should deactivate the chip + * select to the device identified by "slave". + */ +void spi_cs_deactivate(struct spi_slave *slave); + +/*----------------------------------------------------------------------- + * Write 8 bits, then read 8 bits. + * slave: The SPI slave we're communicating with + * byte: Byte to be written + * + * Returns: The value that was read, or a negative value on error. + * + * TODO: This function probably shouldn't be inlined. + */ +static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte) +{ + unsigned char dout[2]; + unsigned char din[2]; + int ret; + + dout[0] = byte; + dout[1] = 0;

-int spi_select(unsigned int bus, unsigned int dev, unsigned long mode); + ret = spi_xfer(slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); + return ret < 0 ? ret : din[1]; +}

#endif /* _SPI_H_ */

-- 1.5.4.3

Haavard Skinnemoen

11:10 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 3/6] atmel_spi: Driver for the Atmel SPI controller

From: Hans-Christian Egtvedt hcegtvedt@atmel.com

This adds a driver for the SPI controller found on most AT91 and AVR32 chips, implementing the new SPI API.

Changed in v4: - Update to new API - Handle zero-length transfers appropriately. The user may send a zero-length SPI transfer with SPI_XFER_END set in order to deactivate the chip select after a series of transfers with chip select active. This is useful e.g. when polling the status register of DataFlash.

Signed-off-by: Haavard Skinnemoen hskinnemoen@atmel.com --- cpu/at32ap/at32ap700x/gpio.c | 43 +++++ drivers/spi/Makefile | 1 + drivers/spi/atmel_spi.c | 210 +++++++++++++++++++++ drivers/spi/atmel_spi.h | 95 +++++++++ include/asm-avr32/arch-at32ap700x/chip-features.h | 1 + include/asm-avr32/arch-at32ap700x/clk.h | 6 + include/asm-avr32/arch-at32ap700x/gpio.h | 4 + 7 files changed, 360 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/atmel_spi.c create mode 100644 drivers/spi/atmel_spi.h

diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c index 859124a..3da35d4 100644 --- a/cpu/at32ap/at32ap700x/gpio.c +++ b/cpu/at32ap/at32ap700x/gpio.c @@ -21,8 +21,11 @@ */ #include <common.h>

+#include <asm/io.h> + #include <asm/arch/chip-features.h> #include <asm/arch/gpio.h> +#include <asm/arch/memory-map.h>

/* * Lots of small functions here. We depend on --gc-sections getting @@ -142,3 +145,43 @@ void gpio_enable_mmci(void) gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */ } #endif + +#ifdef AT32AP700x_CHIP_HAS_SPI +void gpio_enable_spi0(unsigned long cs_mask) +{ + u32 pa_mask = 0; + + gpio_select_periph_A(GPIO_PIN_PA0, 0); /* MISO */ + gpio_select_periph_A(GPIO_PIN_PA1, 0); /* MOSI */ + gpio_select_periph_A(GPIO_PIN_PA2, 0); /* SCK */ + + if (cs_mask & (1 << 0)) + pa_mask |= 1 << 3; /* NPCS0 */ + if (cs_mask & (1 << 1)) + pa_mask |= 1 << 4; /* NPCS1 */ + if (cs_mask & (1 << 2)) + pa_mask |= 1 << 5; /* NPCS2 */ + if (cs_mask & (1 << 3)) + pa_mask |= 1 << 20; /* NPCS3 */ + + __raw_writel(pa_mask, PIOA_BASE + 0x00); + __raw_writel(pa_mask, PIOA_BASE + 0x30); + __raw_writel(pa_mask, PIOA_BASE + 0x10); +} + +void gpio_enable_spi1(unsigned long cs_mask) +{ + gpio_select_periph_B(GPIO_PIN_PA0, 0); /* MISO */ + gpio_select_periph_B(GPIO_PIN_PB1, 0); /* MOSI */ + gpio_select_periph_B(GPIO_PIN_PB5, 0); /* SCK */ + + if (cs_mask & (1 << 0)) + gpio_select_periph_B(GPIO_PIN_PB2, 0); /* NPCS0 */ + if (cs_mask & (1 << 1)) + gpio_select_periph_B(GPIO_PIN_PB3, 0); /* NPCS1 */ + if (cs_mask & (1 << 2)) + gpio_select_periph_B(GPIO_PIN_PB4, 0); /* NPCS2 */ + if (cs_mask & (1 << 3)) + gpio_select_periph_A(GPIO_PIN_PA27, 0); /* NPCS3 */ +} +#endif diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index bc8a104..e66e0ee 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libspi.a

COBJS-y += mpc8xxx_spi.o +COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o

COBJS := $(COBJS-y) diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c new file mode 100644 index 0000000..317c0b4 --- /dev/null +++ b/drivers/spi/atmel_spi.c @@ -0,0 +1,210 @@ +/* + * Copyright (C) 2007 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <spi.h> +#include <malloc.h> + +#include <asm/io.h> + +#include <asm/arch/clk.h> +#include <asm/arch/memory-map.h> + +#include "atmel_spi.h" + +void spi_init() +{ + +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct atmel_spi_slave *as; + unsigned int scbr; + u32 csrx; + void *regs; + + if (cs > 3 || !spi_cs_is_valid(bus, cs)) + return NULL; + + switch (bus) { + case 0: + regs = (void *)SPI0_BASE; + break; +#ifdef SPI1_BASE + case 1: + regs = (void *)SPI1_BASE; + break; +#endif +#ifdef SPI2_BASE + case 2: + regs = (void *)SPI2_BASE; + break; +#endif +#ifdef SPI3_BASE + case 3: + regs = (void *)SPI3_BASE; + break; +#endif + default: + return NULL; + } + + + scbr = (get_spi_clk_rate(bus) + max_hz - 1) / max_hz; + if (scbr > ATMEL_SPI_CSRx_SCBR_MAX) + /* Too low max SCK rate */ + return NULL; + if (scbr < 1) + scbr = 1; + + csrx = ATMEL_SPI_CSRx_SCBR(scbr); + csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8); + if (!(mode & SPI_CPHA)) + csrx |= ATMEL_SPI_CSRx_NCPHA; + if (mode & SPI_CPOL) + csrx |= ATMEL_SPI_CSRx_CPOL; + + as = malloc(sizeof(struct atmel_spi_slave)); + if (!as) + return NULL; + + as->slave.bus = bus; + as->slave.cs = cs; + as->regs = regs; + as->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS + | ATMEL_SPI_MR_PCS(~(1 << cs) & 0xf); + spi_writel(as, CSR(cs), csrx); + + return &as->slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + struct atmel_spi_slave *as = to_atmel_spi(slave); + + free(as); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + struct atmel_spi_slave *as = to_atmel_spi(slave); + + /* Enable the SPI hardware */ + spi_writel(as, CR, ATMEL_SPI_CR_SPIEN); + + /* + * Select the slave. This should set SCK to the correct + * initial state, etc. + */ + spi_writel(as, MR, as->mr); + + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + struct atmel_spi_slave *as = to_atmel_spi(slave); + + /* Disable the SPI hardware */ + spi_writel(as, CR, ATMEL_SPI_CR_SPIDIS); +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct atmel_spi_slave *as = to_atmel_spi(slave); + unsigned int len_tx; + unsigned int len_rx; + unsigned int len; + int ret; + u32 status; + const u8 *txp = dout; + u8 *rxp = din; + u8 value; + + ret = 0; + if (bitlen == 0) + /* Finish any previously submitted transfers */ + goto out; + + /* + * TODO: The controller can do non-multiple-of-8 bit + * transfers, but this driver currently doesn't support it. + * + * It's also not clear how such transfers are supposed to be + * represented as a stream of bytes...this is a limitation of + * the current SPI interface. + */ + if (bitlen % 8) { + /* Errors always terminate an ongoing transfer */ + flags |= SPI_XFER_END; + goto out; + } + + len = bitlen / 8; + + /* + * The controller can do automatic CS control, but it is + * somewhat quirky, and it doesn't really buy us much anyway + * in the context of U-Boot. + */ + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave); + + for (len_tx = 0, len_rx = 0; len_rx < len; ) { + status = spi_readl(as, SR); + + if (status & ATMEL_SPI_SR_OVRES) + return -1; + + if (len_tx < len && (status & ATMEL_SPI_SR_TDRE)) { + if (txp) + value = *txp++; + else + value = 0; + spi_writel(as, TDR, value); + len_tx++; + } + if (status & ATMEL_SPI_SR_RDRF) { + value = spi_readl(as, RDR); + if (rxp) + *rxp++ = value; + len_rx++; + } + } + +out: + if (flags & SPI_XFER_END) { + /* + * Wait until the transfer is completely done before + * we deactivate CS. + */ + do { + status = spi_readl(as, SR); + } while (!(status & ATMEL_SPI_SR_TXEMPTY)); + + spi_cs_deactivate(slave); + } + + return 0; +} diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h new file mode 100644 index 0000000..8b69a6d --- /dev/null +++ b/drivers/spi/atmel_spi.h @@ -0,0 +1,95 @@ +/* + * Register definitions for the Atmel AT32/AT91 SPI Controller + */ + +/* Register offsets */ +#define ATMEL_SPI_CR 0x0000 +#define ATMEL_SPI_MR 0x0004 +#define ATMEL_SPI_RDR 0x0008 +#define ATMEL_SPI_TDR 0x000c +#define ATMEL_SPI_SR 0x0010 +#define ATMEL_SPI_IER 0x0014 +#define ATMEL_SPI_IDR 0x0018 +#define ATMEL_SPI_IMR 0x001c +#define ATMEL_SPI_CSR(x) (0x0030 + 4 * (x)) +#define ATMEL_SPI_VERSION 0x00fc + +/* Bits in CR */ +#define ATMEL_SPI_CR_SPIEN (1 << 0) +#define ATMEL_SPI_CR_SPIDIS (1 << 1) +#define ATMEL_SPI_CR_SWRST (1 << 7) +#define ATMEL_SPI_CR_LASTXFER (1 << 24) + +/* Bits in MR */ +#define ATMEL_SPI_MR_MSTR (1 << 0) +#define ATMEL_SPI_MR_PS (1 << 1) +#define ATMEL_SPI_MR_PCSDEC (1 << 2) +#define ATMEL_SPI_MR_FDIV (1 << 3) +#define ATMEL_SPI_MR_MODFDIS (1 << 4) +#define ATMEL_SPI_MR_LLB (1 << 7) +#define ATMEL_SPI_MR_PCS(x) (((x) & 15) << 16) +#define ATMEL_SPI_MR_DLYBCS(x) ((x) << 24) + +/* Bits in RDR */ +#define ATMEL_SPI_RDR_RD(x) (x) +#define ATMEL_SPI_RDR_PCS(x) ((x) << 16) + +/* Bits in TDR */ +#define ATMEL_SPI_TDR_TD(x) (x) +#define ATMEL_SPI_TDR_PCS(x) ((x) << 16) +#define ATMEL_SPI_TDR_LASTXFER (1 << 24) + +/* Bits in SR/IER/IDR/IMR */ +#define ATMEL_SPI_SR_RDRF (1 << 0) +#define ATMEL_SPI_SR_TDRE (1 << 1) +#define ATMEL_SPI_SR_MODF (1 << 2) +#define ATMEL_SPI_SR_OVRES (1 << 3) +#define ATMEL_SPI_SR_ENDRX (1 << 4) +#define ATMEL_SPI_SR_ENDTX (1 << 5) +#define ATMEL_SPI_SR_RXBUFF (1 << 6) +#define ATMEL_SPI_SR_TXBUFE (1 << 7) +#define ATMEL_SPI_SR_NSSR (1 << 8) +#define ATMEL_SPI_SR_TXEMPTY (1 << 9) +#define ATMEL_SPI_SR_SPIENS (1 << 16) + +/* Bits in CSRx */ +#define ATMEL_SPI_CSRx_CPOL (1 << 0) +#define ATMEL_SPI_CSRx_NCPHA (1 << 1) +#define ATMEL_SPI_CSRx_CSAAT (1 << 3) +#define ATMEL_SPI_CSRx_BITS(x) ((x) << 4) +#define ATMEL_SPI_CSRx_SCBR(x) ((x) << 8) +#define ATMEL_SPI_CSRx_SCBR_MAX 0xff +#define ATMEL_SPI_CSRx_DLYBS(x) ((x) << 16) +#define ATMEL_SPI_CSRx_DLYBCT(x) ((x) << 24) + +/* Bits in VERSION */ +#define ATMEL_SPI_VERSION_REV(x) ((x) << 0) +#define ATMEL_SPI_VERSION_MFN(x) ((x) << 16) + +/* Constants for CSRx:BITS */ +#define ATMEL_SPI_BITS_8 0 +#define ATMEL_SPI_BITS_9 1 +#define ATMEL_SPI_BITS_10 2 +#define ATMEL_SPI_BITS_11 3 +#define ATMEL_SPI_BITS_12 4 +#define ATMEL_SPI_BITS_13 5 +#define ATMEL_SPI_BITS_14 6 +#define ATMEL_SPI_BITS_15 7 +#define ATMEL_SPI_BITS_16 8 + +struct atmel_spi_slave { + struct spi_slave slave; + void *regs; + u32 mr; +}; + +static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave) +{ + return container_of(slave, struct atmel_spi_slave, slave); +} + +/* Register access macros */ +#define spi_readl(as, reg) \ + readl(as->regs + ATMEL_SPI_##reg) +#define spi_writel(as, reg, value) \ + writel(value, as->regs + ATMEL_SPI_##reg) diff --git a/include/asm-avr32/arch-at32ap700x/chip-features.h b/include/asm-avr32/arch-at32ap700x/chip-features.h index 29b1fd6..c47107e 100644 --- a/include/asm-avr32/arch-at32ap700x/chip-features.h +++ b/include/asm-avr32/arch-at32ap700x/chip-features.h @@ -25,6 +25,7 @@ /* Currently, all the AP700x chips have these */ #define AT32AP700x_CHIP_HAS_USART #define AT32AP700x_CHIP_HAS_MMCI +#define AT32AP700x_CHIP_HAS_SPI

/* Only AP7000 has ethernet interface */ #ifdef CONFIG_AT32AP7000 diff --git a/include/asm-avr32/arch-at32ap700x/clk.h b/include/asm-avr32/arch-at32ap700x/clk.h index 385319a..bd6f2e5 100644 --- a/include/asm-avr32/arch-at32ap700x/clk.h +++ b/include/asm-avr32/arch-at32ap700x/clk.h @@ -74,6 +74,12 @@ static inline unsigned long get_mci_clk_rate(void) return get_pbb_clk_rate(); } #endif +#ifdef AT32AP700x_CHIP_HAS_SPI +static inline unsigned long get_spi_clk_rate(unsigned int dev_id) +{ + return get_pba_clk_rate(); +} +#endif

/* Board code may need the SDRAM base clock as a compile-time constant */ #define SDRAMC_BUS_HZ (MAIN_CLK_RATE >> CFG_CLKDIV_HSB) diff --git a/include/asm-avr32/arch-at32ap700x/gpio.h b/include/asm-avr32/arch-at32ap700x/gpio.h index b10a3e4..ef20cea 100644 --- a/include/asm-avr32/arch-at32ap700x/gpio.h +++ b/include/asm-avr32/arch-at32ap700x/gpio.h @@ -216,5 +216,9 @@ void gpio_enable_macb1(void); #ifdef AT32AP700x_CHIP_HAS_MMCI void gpio_enable_mmci(void); #endif +#ifdef AT32AP700x_CHIP_HAS_SPI +void gpio_enable_spi0(unsigned long cs_mask); +void gpio_enable_spi1(unsigned long cs_mask); +#endif

#endif /* __ASM_AVR32_ARCH_GPIO_H__ */

-- 1.5.4.3

Haavard Skinnemoen

11:10 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 4/6] SPI Flash subsystem

This adds a new SPI flash subsystem.

Currently, only AT45 DataFlash in non-power-of-two mode is supported, but some preliminary support for other flash types is in place as well.

Signed-off-by: Haavard Skinnemoen haavard.skinnemoen@atmel.com --- Makefile | 2 + drivers/mtd/spi/Makefile | 47 +++++ drivers/mtd/spi/atmel.c | 362 ++++++++++++++++++++++++++++++++++ drivers/mtd/spi/spi_flash.c | 162 +++++++++++++++ drivers/mtd/spi/spi_flash_internal.h | 45 +++++ include/spi_flash.h | 70 +++++++ 6 files changed, 688 insertions(+), 0 deletions(-) create mode 100644 drivers/mtd/spi/Makefile create mode 100644 drivers/mtd/spi/atmel.c create mode 100644 drivers/mtd/spi/spi_flash.c create mode 100644 drivers/mtd/spi/spi_flash_internal.h create mode 100644 include/spi_flash.h

diff --git a/Makefile b/Makefile index 6548f8e..c09d8f9 100644 --- a/Makefile +++ b/Makefile @@ -224,6 +224,7 @@ LIBS += drivers/mtd/libmtd.a LIBS += drivers/mtd/nand/libnand.a LIBS += drivers/mtd/nand_legacy/libnand_legacy.a LIBS += drivers/mtd/onenand/libonenand.a +LIBS += drivers/mtd/spi/libspi_flash.a LIBS += drivers/net/libnet.a LIBS += drivers/net/sk98lin/libsk98lin.a LIBS += drivers/pci/libpci.a @@ -390,6 +391,7 @@ TAG_SUBDIRS += drivers/mtd TAG_SUBDIRS += drivers/mtd/nand TAG_SUBDIRS += drivers/mtd/nand_legacy TAG_SUBDIRS += drivers/mtd/onenand +TAG_SUBDIRS += drivers/mtd/spi TAG_SUBDIRS += drivers/net TAG_SUBDIRS += drivers/net/sk98lin TAG_SUBDIRS += drivers/pci diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile new file mode 100644 index 0000000..af6af97 --- /dev/null +++ b/drivers/mtd/spi/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)libspi_flash.a + +COBJS-$(CONFIG_SPI_FLASH) += spi_flash.o +COBJS-$(CONFIG_SPI_FLASH_ATMEL) += atmel.o + +COBJS := $(COBJS-y) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(LIB) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/drivers/mtd/spi/atmel.c b/drivers/mtd/spi/atmel.c new file mode 100644 index 0000000..fb7a4a9 --- /dev/null +++ b/drivers/mtd/spi/atmel.c @@ -0,0 +1,362 @@ +/* + * Atmel SPI DataFlash support + * + * Copyright (C) 2008 Atmel Corporation + */ +#define DEBUG +#include <common.h> +#include <malloc.h> +#include <spi_flash.h> + +#include "spi_flash_internal.h" + +/* AT45-specific commands */ +#define CMD_AT45_READ_STATUS 0xd7 +#define CMD_AT45_ERASE_PAGE 0x81 +#define CMD_AT45_LOAD_PROG_BUF1 0x82 +#define CMD_AT45_LOAD_BUF1 0x84 +#define CMD_AT45_LOAD_PROG_BUF2 0x85 +#define CMD_AT45_LOAD_BUF2 0x87 +#define CMD_AT45_PROG_BUF1 0x88 +#define CMD_AT45_PROG_BUF2 0x89 + +/* AT45 status register bits */ +#define AT45_STATUS_P2_PAGE_SIZE (1 << 0) +#define AT45_STATUS_READY (1 << 7) + +/* DataFlash family IDs, as obtained from the second idcode byte */ +#define DF_FAMILY_AT26F 0 +#define DF_FAMILY_AT45 1 +#define DF_FAMILY_AT26DF 2 /* AT25DF and AT26DF */ + +struct atmel_spi_flash_params { + u8 idcode1; + /* Log2 of page size in power-of-two mode */ + u8 l2_page_size; + u8 pages_per_block; + u8 blocks_per_sector; + u8 nr_sectors; + const char *name; +}; + +struct atmel_spi_flash { + const struct atmel_spi_flash_params *params; + struct spi_flash flash; +}; + +static inline struct atmel_spi_flash * +to_atmel_spi_flash(struct spi_flash *flash) +{ + return container_of(flash, struct atmel_spi_flash, flash); +} + +static const struct atmel_spi_flash_params atmel_spi_flash_table[] = { + { + .idcode1 = 0x28, + .l2_page_size = 10, + .pages_per_block = 8, + .blocks_per_sector = 32, + .nr_sectors = 32, + .name = "AT45DB642D", + }, +}; + +static int at45_wait_ready(struct spi_flash *flash, unsigned long timeout) +{ + struct spi_slave *spi = flash->spi; + unsigned long timebase; + int ret; + u8 cmd = CMD_AT45_READ_STATUS; + u8 status; + + timebase = get_timer(0); + + ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN); + if (ret) + return -1; + + do { + ret = spi_xfer(spi, 8, NULL, &status, 0); + if (ret) + return -1; + + if (status & AT45_STATUS_READY) + break; + } while (get_timer(timebase) < timeout); + + /* Deactivate CS */ + spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); + + if (status & AT45_STATUS_READY) + return 0; + + /* Timed out */ + return -1; +} + +/* + * Assemble the address part of a command for AT45 devices in + * non-power-of-two page size mode. + */ +static void at45_build_address(struct atmel_spi_flash *asf, u8 *cmd, u32 offset) +{ + unsigned long page_addr; + unsigned long byte_addr; + unsigned long page_size; + unsigned int page_shift; + + /* + * The "extra" space per page is the power-of-two page size + * divided by 32. + */ + page_shift = asf->params->l2_page_size; + page_size = (1 << page_shift) + (1 << (page_shift - 5)); + page_shift++; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + cmd[0] = page_addr >> (16 - page_shift); + cmd[1] = page_addr << (page_shift - 8) | (byte_addr >> 8); + cmd[2] = byte_addr; +} + +static int dataflash_read_fast_p2(struct spi_flash *flash, + u32 offset, size_t len, void *buf) +{ + u8 cmd[5]; + + cmd[0] = CMD_READ_ARRAY_FAST; + cmd[1] = offset >> 16; + cmd[2] = offset >> 8; + cmd[3] = offset; + cmd[4] = 0x00; + + return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len); +} + +static int dataflash_read_fast_at45(struct spi_flash *flash, + u32 offset, size_t len, void *buf) +{ + struct atmel_spi_flash *asf = to_atmel_spi_flash(flash); + u8 cmd[5]; + + cmd[0] = CMD_READ_ARRAY_FAST; + at45_build_address(asf, cmd + 1, offset); + cmd[4] = 0x00; + + return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len); +} + +static int dataflash_write_at45(struct spi_flash *flash, + u32 offset, size_t len, const void *buf) +{ + struct atmel_spi_flash *asf = to_atmel_spi_flash(flash); + unsigned long page_addr; + unsigned long byte_addr; + unsigned long page_size; + unsigned int page_shift; + size_t chunk_len; + size_t actual; + int ret; + u8 cmd[4]; + + page_shift = asf->params->l2_page_size; + page_size = (1 << page_shift) + (1 << (page_shift - 5)); + page_shift++; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + for (actual = 0; actual < len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + /* Use the same address bits for both commands */ + cmd[0] = CMD_AT45_LOAD_BUF1; + cmd[1] = page_addr >> (16 - page_shift); + cmd[2] = page_addr << (page_shift - 8) | (byte_addr >> 8); + cmd[3] = byte_addr; + + ret = spi_flash_cmd_write(flash->spi, cmd, 4, + buf + actual, chunk_len); + if (ret < 0) { + debug("SF: Loading AT45 buffer failed\n"); + goto out; + } + + cmd[0] = CMD_AT45_PROG_BUF1; + ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0); + if (ret < 0) { + debug("SF: AT45 page programming failed\n"); + goto out; + } + + ret = at45_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); + if (ret < 0) { + debug("SF: AT45 page programming timed out\n"); + goto out; + } + + page_addr++; + byte_addr = 0; + } + + debug("SF: AT45: Successfully programmed %u bytes @ 0x%x\n", + len, offset); + ret = 0; + +out: + spi_release_bus(flash->spi); + return ret; +} + +int dataflash_erase_at45(struct spi_flash *flash, u32 offset, size_t len) +{ + struct atmel_spi_flash *asf = to_atmel_spi_flash(flash); + unsigned long page_addr; + unsigned long page_size; + unsigned int page_shift; + size_t actual; + int ret; + u8 cmd[4]; + + /* + * TODO: This function currently uses page erase only. We can + * probably speed things up by using block and/or sector erase + * when possible. + */ + + page_shift = asf->params->l2_page_size; + page_size = (1 << page_shift) + (1 << (page_shift - 5)); + page_shift++; + page_addr = offset / page_size; + + if (offset % page_size || len % page_size) { + debug("SF: Erase offset/length not multiple of page size\n"); + return -1; + } + + cmd[0] = CMD_AT45_ERASE_PAGE; + cmd[3] = 0x00; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + for (actual = 0; actual < len; actual += page_size) { + cmd[1] = page_addr >> (16 - page_shift); + cmd[2] = page_addr << (page_shift - 8); + + ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0); + if (ret < 0) { + debug("SF: AT45 page erase failed\n"); + goto out; + } + + ret = at45_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT); + if (ret < 0) { + debug("SF: AT45 page erase timed out\n"); + goto out; + } + + page_addr++; + } + + debug("SF: AT45: Successfully erased %u bytes @ 0x%x\n", + len, offset); + ret = 0; + +out: + spi_release_bus(flash->spi); + return ret; +} + +struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode) +{ + const struct atmel_spi_flash_params *params; + unsigned long page_size; + unsigned int family; + struct atmel_spi_flash *asf; + unsigned int i; + int ret; + u8 status; + + for (i = 0; i < ARRAY_SIZE(atmel_spi_flash_table); i++) { + params = &atmel_spi_flash_table[i]; + if (params->idcode1 == idcode[1]) + break; + } + + if (i == ARRAY_SIZE(atmel_spi_flash_table)) { + debug("SF: Unsupported DataFlash ID %02x\n", + idcode[1]); + return NULL; + } + + asf = malloc(sizeof(struct atmel_spi_flash)); + if (!asf) { + debug("SF: Failed to allocate memory\n"); + return NULL; + } + + asf->params = params; + asf->flash.spi = spi; + asf->flash.name = params->name; + + /* Assuming power-of-two page size initially. */ + page_size = 1 << params->l2_page_size; + + family = idcode[1] >> 5; + + switch (family) { + case DF_FAMILY_AT45: + /* + * AT45 chips have configurable page size. The status + * register indicates which configuration is active. + */ + ret = spi_flash_cmd(spi, CMD_AT45_READ_STATUS, &status, 1); + if (ret) + goto err; + + debug("SF: AT45 status register: %02x\n", status); + + if (!(status & AT45_STATUS_P2_PAGE_SIZE)) { + asf->flash.read = dataflash_read_fast_at45; + asf->flash.write = dataflash_write_at45; + asf->flash.erase = dataflash_erase_at45; + page_size += 1 << (params->l2_page_size - 5); + } else { + asf->flash.read = dataflash_read_fast_p2; + } + + break; + + case DF_FAMILY_AT26F: + case DF_FAMILY_AT26DF: + asf->flash.read = dataflash_read_fast_p2; + break; + + default: + debug("SF: Unsupported DataFlash family %u\n", family); + goto err; + } + + asf->flash.size = page_size * params->pages_per_block + * params->blocks_per_sector + * params->nr_sectors; + + debug("SF: Detected %s with page size %u, total %u bytes\n", + params->name, page_size, asf->flash.size); + + return &asf->flash; + +err: + free(asf); + return NULL; +} diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c new file mode 100644 index 0000000..d581cb3 --- /dev/null +++ b/drivers/mtd/spi/spi_flash.c @@ -0,0 +1,162 @@ +/* + * SPI flash interface + * + * Copyright (C) 2008 Atmel Corporation + */ +#define DEBUG +#include <common.h> +#include <malloc.h> +#include <spi.h> +#include <spi_flash.h> + +#include "spi_flash_internal.h" + +int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len) +{ + unsigned long flags = SPI_XFER_BEGIN; + int ret; + + if (len == 0) + flags |= SPI_XFER_END; + + ret = spi_xfer(spi, 8, &cmd, NULL, flags); + if (ret) { + debug("SF: Failed to send command %02x: %d\n", cmd, ret); + return ret; + } + + if (len) { + ret = spi_xfer(spi, len * 8, NULL, response, SPI_XFER_END); + if (ret) + debug("SF: Failed to read response (%zu bytes): %d\n", + len, ret); + } + + return ret; +} + +int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, + size_t cmd_len, void *data, size_t data_len) +{ + unsigned long flags = SPI_XFER_BEGIN; + int ret; + + if (data_len == 0) + flags |= SPI_XFER_END; + + ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); + if (ret) { + debug("SF: Failed to send read command (%zu bytes): %d\n", + cmd_len, ret); + } else if (data_len != 0) { + ret = spi_xfer(spi, data_len * 8, NULL, data, SPI_XFER_END); + if (ret) + debug("SF: Failed to read %zu bytes of data: %d\n", + data_len, ret); + } + + return ret; +} + +int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, + const void *data, size_t data_len) +{ + unsigned long flags = SPI_XFER_BEGIN; + int ret; + + if (data_len == 0) + flags |= SPI_XFER_END; + + ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); + if (ret) { + debug("SF: Failed to send read command (%zu bytes): %d\n", + cmd_len, ret); + } else if (data_len != 0) { + ret = spi_xfer(spi, data_len * 8, data, NULL, SPI_XFER_END); + if (ret) + debug("SF: Failed to read %zu bytes of data: %d\n", + data_len, ret); + } + + return ret; +} + + +int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, + size_t cmd_len, void *data, size_t data_len) +{ + struct spi_slave *spi = flash->spi; + int ret; + + spi_claim_bus(spi); + ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len); + spi_release_bus(spi); + + return ret; +} + +struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int spi_mode) +{ + struct spi_slave *spi; + struct spi_flash *flash; + int ret; + u8 idcode[3]; + + spi = spi_setup_slave(bus, cs, max_hz, spi_mode); + if (!spi) { + debug("SF: Failed to set up slave\n"); + return NULL; + } + + ret = spi_claim_bus(spi); + if (ret) { + debug("SF: Failed to claim SPI bus: %d\n", ret); + goto err_claim_bus; + } + + /* Read the ID codes */ + ret = spi_flash_cmd(spi, CMD_READ_ID, &idcode, sizeof(idcode)); + if (ret) + goto err_read_id; + + debug("SF: Got idcode %02x %02x %02x\n", idcode[0], + idcode[1], idcode[2]); + + switch (idcode[0]) { +#ifdef CONFIG_SPI_FLASH_SPANSION + case 0x01: + flash = spi_flash_probe_spansion(spi, idcode); + break; +#endif +#ifdef CONFIG_SPI_FLASH_ATMEL + case 0x1F: + flash = spi_flash_probe_atmel(spi, idcode); + break; +#endif + default: + debug("SF: Unsupported manufacturer %02X\n", idcode[0]); + flash = NULL; + break; + } + + if (!flash) + goto err_manufacturer_probe; + + spi_release_bus(spi); + + return flash; + +err_manufacturer_probe: +err_read_id: + spi_release_bus(spi); +err_claim_bus: + spi_free_slave(spi); + return NULL; +} + +void spi_flash_free(struct spi_flash *flash) +{ + spi_free_slave(flash->spi); + free(flash); +} diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h new file mode 100644 index 0000000..1438050 --- /dev/null +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -0,0 +1,45 @@ +/* + * SPI flash internal definitions + * + * Copyright (C) 2008 Atmel Corporation + */ + +/* Common parameters */ +#define SPI_FLASH_PROG_TIMEOUT ((10 * CFG_HZ) / 1000) +#define SPI_FLASH_PAGE_ERASE_TIMEOUT ((50 * CFG_HZ) / 1000) +#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CFG_HZ) + +/* Common commands */ +#define CMD_READ_ID 0x9f + +#define CMD_READ_ARRAY_SLOW 0x03 +#define CMD_READ_ARRAY_FAST 0x0b +#define CMD_READ_ARRAY_LEGACY 0xe8 + +/* Send a single-byte command to the device and read the response */ +int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); + +/* + * Send a multi-byte command to the device and read the response. Used + * for flash array reads, etc. + */ +int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, + size_t cmd_len, void *data, size_t data_len); + +/* + * Send a multi-byte command to the device followed by (optional) + * data. Used for programming the flash array, etc. + */ +int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, + const void *data, size_t data_len); + +/* + * Same as spi_flash_cmd_read() except it also claims/releases the SPI + * bus. Used as common part of the ->read() operation. + */ +int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, + size_t cmd_len, void *data, size_t data_len); + +/* Manufacturer-specific probe functions */ +struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode); +struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode); diff --git a/include/spi_flash.h b/include/spi_flash.h new file mode 100644 index 0000000..de4f174 --- /dev/null +++ b/include/spi_flash.h @@ -0,0 +1,70 @@ +/* + * Interface to SPI flash + * + * Copyright (C) 2008 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _SPI_FLASH_H_ +#define _SPI_FLASH_H_ + +#include <spi.h> + +struct spi_flash_region { + unsigned int count; + unsigned int size; +}; + +struct spi_flash { + struct spi_slave *spi; + + const char *name; + + u32 size; + + int (*read)(struct spi_flash *flash, u32 offset, + size_t len, void *buf); + int (*write)(struct spi_flash *flash, u32 offset, + size_t len, const void *buf); + int (*erase)(struct spi_flash *flash, u32 offset, + size_t len); +}; + +struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int spi_mode); +void spi_flash_free(struct spi_flash *flash); + +static inline int spi_flash_read(struct spi_flash *flash, u32 offset, + size_t len, void *buf) +{ + return flash->read(flash, offset, len, buf); +} + +static inline int spi_flash_write(struct spi_flash *flash, u32 offset, + size_t len, const void *buf) +{ + return flash->write(flash, offset, len, buf); +} + +static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, + size_t len) +{ + return flash->erase(flash, offset, len); +} + +#endif /* _SPI_FLASH_H_ */

-- 1.5.4.3

Haavard Skinnemoen

11:10 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 5/6] SPI Flash: Add "sf" command

This adds a new command, "sf" which can be used to manipulate SPI flash. Currently, initialization, reading, writing and erasing is supported.

Signed-off-by: Haavard Skinnemoen haavard.skinnemoen@atmel.com --- common/Makefile | 1 + common/cmd_sf.c | 191 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 192 insertions(+), 0 deletions(-) create mode 100644 common/cmd_sf.c

diff --git a/common/Makefile b/common/Makefile index 9678799..d90b5f2 100644 --- a/common/Makefile +++ b/common/Makefile @@ -143,6 +143,7 @@ COBJS-y += xyzModem.o COBJS-y += cmd_mac.o COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o COBJS-$(CONFIG_MP) += cmd_mp.o +COBJS-$(CONFIG_CMD_SF) += cmd_sf.o

COBJS := $(COBJS-y) SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/common/cmd_sf.c b/common/cmd_sf.c new file mode 100644 index 0000000..8c0a751 --- /dev/null +++ b/common/cmd_sf.c @@ -0,0 +1,191 @@ +/* + * Command for accessing SPI flash. + * + * Copyright (C) 2008 Atmel Corporation + */ +#include <common.h> +#include <spi_flash.h> + +#include <asm/io.h> + +#ifndef CONFIG_SF_DEFAULT_SPEED +# define CONFIG_SF_DEFAULT_SPEED 1000000 +#endif +#ifndef CONFIG_SF_DEFAULT_MODE +# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 +#endif + +static struct spi_flash *flash; + +static int do_spi_flash_probe(int argc, char *argv[]) +{ + unsigned int bus = 0; + unsigned int cs; + unsigned int speed = CONFIG_SF_DEFAULT_SPEED; + unsigned int mode = CONFIG_SF_DEFAULT_MODE; + char *endp; + struct spi_flash *new; + + if (argc < 2) + goto usage; + + cs = simple_strtoul(argv[1], &endp, 0); + if (*argv[1] == 0 || (*endp != 0 && *endp != ':')) + goto usage; + if (*endp == ':') { + if (endp[1] == 0) + goto usage; + + bus = cs; + cs = simple_strtoul(endp + 1, &endp, 0); + if (*endp != 0) + goto usage; + } + + if (argc >= 3) { + speed = simple_strtoul(argv[2], &endp, 0); + if (*argv[2] == 0 || *endp != 0) + goto usage; + } + if (argc >= 4) { + mode = simple_strtoul(argv[3], &endp, 0); + if (*argv[3] == 0 || *endp != 0) + goto usage; + } + + new = spi_flash_probe(bus, cs, speed, mode); + if (!new) { + printf("Failed to initialize SPI flash at %u:%u\n", bus, cs); + return 1; + } + + if (flash) + spi_flash_free(flash); + flash = new; + + printf("%u KiB %s at %u:%u is now current device\n", + flash->size >> 10, flash->name, bus, cs); + + return 0; + +usage: + puts("Usage: sf probe [bus:]cs [hz] [mode]\n"); + return 1; +} + +static int do_spi_flash_read_write(int argc, char *argv[]) +{ + unsigned long addr; + unsigned long offset; + unsigned long len; + void *buf; + char *endp; + int ret; + + if (argc < 4) + goto usage; + + addr = simple_strtoul(argv[1], &endp, 16); + if (*argv[1] == 0 || *endp != 0) + goto usage; + offset = simple_strtoul(argv[2], &endp, 16); + if (*argv[2] == 0 || *endp != 0) + goto usage; + len = simple_strtoul(argv[3], &endp, 16); + if (*argv[3] == 0 || *endp != 0) + goto usage; + + buf = map_physmem(addr, len, MAP_WRBACK); + if (!buf) { + puts("Failed to map physical memory\n"); + return 1; + } + + if (strcmp(argv[0], "read") == 0) + ret = spi_flash_read(flash, offset, len, buf); + else + ret = spi_flash_write(flash, offset, len, buf); + + unmap_physmem(buf, len); + + if (ret) { + printf("SPI flash %s failed\n", argv[0]); + return 1; + } + + return 0; + +usage: + printf("Usage: sf %s addr offset len\n", argv[0]); + return 1; +} + +static int do_spi_flash_erase(int argc, char *argv[]) +{ + unsigned long offset; + unsigned long len; + char *endp; + int ret; + + if (argc < 3) + goto usage; + + offset = simple_strtoul(argv[1], &endp, 16); + if (*argv[1] == 0 || *endp != 0) + goto usage; + len = simple_strtoul(argv[2], &endp, 16); + if (*argv[2] == 0 || *endp != 0) + goto usage; + + ret = spi_flash_erase(flash, offset, len); + if (ret) { + printf("SPI flash %s failed\n", argv[0]); + return 1; + } + + return 0; + +usage: + puts("Usage: sf erase offset len\n"); + return 1; +} + +static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + const char *cmd; + + /* need at least two arguments */ + if (argc < 2) + goto usage; + + cmd = argv[1]; + + if (strcmp(cmd, "probe") == 0) + return do_spi_flash_probe(argc - 1, argv + 1); + + /* The remaining commands require a selected device */ + if (!flash) { + puts("No SPI flash selected. Please run `sf probe'\n"); + return 1; + } + + if (strcmp(cmd, "read") == 0 || strcmp(cmd, "write") == 0) + return do_spi_flash_read_write(argc - 1, argv + 1); + if (strcmp(cmd, "erase") == 0) + return do_spi_flash_erase(argc - 1, argv + 1); + +usage: + printf("Usage:\n%s\n", cmdtp->usage); + return 1; +} + +U_BOOT_CMD( + sf, 5, 1, do_spi_flash, + "sf - SPI flash sub-system\n", + "probe [bus:]cs [hz] [mode] - init flash device on given SPI bus\n" + " and chip select\n" + "sf read addr offset len - read `len' bytes starting at\n" + " `offset' to memory at `addr'\n" + "sf write addr offset len - write `len' bytes from memory\n" + " at `addr' to flash at `offset'\n" + "sf erase offset len - erase `len' bytes from `offset'\n");

-- 1.5.4.3

Haavard Skinnemoen

11:10 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 6/6] Add support for environment in SPI flash

This is pretty incomplete...it doesn't handle reading the environment before relocation, it doesn't support redundant environment, and it doesn't support embedded environment. But apart from that, it does seem to work.

Signed-off-by: Haavard Skinnemoen haavard.skinnemoen@atmel.com --- common/Makefile | 1 + common/cmd_nvedit.c | 3 +- common/env_common.c | 3 +- common/env_sf.c | 131 +++++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 136 insertions(+), 2 deletions(-) create mode 100644 common/env_sf.c

diff --git a/common/Makefile b/common/Makefile index d90b5f2..b425795 100644 --- a/common/Makefile +++ b/common/Makefile @@ -113,6 +113,7 @@ COBJS-y += env_dataflash.o COBJS-y += env_flash.o COBJS-y += env_eeprom.o COBJS-y += env_onenand.o +COBJS-y += env_sf.o COBJS-y += env_nvram.o COBJS-y += env_nowhere.o COBJS-y += exports.o diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index 9c5d1fc..49f134a 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -58,8 +58,9 @@ DECLARE_GLOBAL_DATA_PTR; !defined(CFG_ENV_IS_IN_DATAFLASH) && \ !defined(CFG_ENV_IS_IN_NAND) && \ !defined(CFG_ENV_IS_IN_ONENAND) && \ + !defined(CFG_ENV_IS_IN_SPI_FLASH) && \ !defined(CFG_ENV_IS_NOWHERE) -# error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|NOWHERE} +# error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|SPI_FLASH|NOWHERE} #endif

#define XMK_STR(x) #x diff --git a/common/env_common.c b/common/env_common.c index a494812..e6df9a5 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -134,7 +134,8 @@ uchar default_environment[] = { "\0" };

-#if defined(CFG_ENV_IS_IN_NAND) /* Environment is in Nand Flash */ +#if defined(CFG_ENV_IS_IN_NAND) /* Environment is in Nand Flash */ \ + || defined(CFG_ENV_IS_IN_SPI_FLASH) int default_environment_size = sizeof(default_environment); #endif

diff --git a/common/env_sf.c b/common/env_sf.c new file mode 100644 index 0000000..d641a9a --- /dev/null +++ b/common/env_sf.c @@ -0,0 +1,131 @@ +/* + * (C) Copyright 2000-2002 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Andreas Heppel aheppel@sysgo.de + * + * (C) Copyright 2008 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#ifdef CFG_ENV_IS_IN_SPI_FLASH + +#include <environment.h> +#include <spi_flash.h> + +#ifndef CFG_ENV_SPI_BUS +# define CFG_ENV_SPI_BUS 0 +#endif +#ifndef CFG_ENV_SPI_CS +# define CFG_ENV_SPI_CS 0 +#endif +#ifndef CFG_ENV_SPI_MAX_HZ +# define CFG_ENV_SPI_MAX_HZ 1000000 +#endif +#ifndef CFG_ENV_SPI_MODE +# define CFG_ENV_SPI_MODE SPI_MODE_3 +#endif + +DECLARE_GLOBAL_DATA_PTR; + +/* references to names in env_common.c */ +extern uchar default_environment[]; +extern int default_environment_size; + +char * env_name_spec = "SPI Flash"; +env_t *env_ptr; + +static struct spi_flash *env_flash; + +uchar env_get_char_spec(int index) +{ + return *((uchar *)(gd->env_addr + index)); +} + +int saveenv(void) +{ + if (!env_flash) { + puts("Environment SPI flash not initialized\n"); + return 1; + } + + puts("Erasing SPI flash..."); + if (spi_flash_erase(env_flash, CFG_ENV_OFFSET, CFG_ENV_SIZE)) + return 1; + + puts("Writing to SPI flash..."); + if (spi_flash_write(env_flash, CFG_ENV_OFFSET, CFG_ENV_SIZE, env_ptr)) + return 1; + + puts("done\n"); + return 0; +} + +void env_relocate_spec(void) +{ + int ret; + + env_flash = spi_flash_probe(CFG_ENV_SPI_BUS, CFG_ENV_SPI_CS, + CFG_ENV_SPI_MAX_HZ, CFG_ENV_SPI_MODE); + if (!env_flash) + goto err_probe; + + ret = spi_flash_read(env_flash, CFG_ENV_OFFSET, CFG_ENV_SIZE, env_ptr); + if (ret) + goto err_read; + + if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc) + goto err_crc; + + gd->env_valid = 1; + + return; + +err_read: + spi_flash_free(env_flash); + env_flash = NULL; +err_probe: +err_crc: + puts("*** Warning - bad CRC, using default environment\n\n"); + + if (default_environment_size > CFG_ENV_SIZE) { + gd->env_valid = 0; + puts("*** Error - default environment is too large\n\n"); + return; + } + + memset(env_ptr, 0, sizeof(env_t)); + memcpy(env_ptr->data, default_environment, default_environment_size); + env_ptr->crc = crc32(0, env_ptr->data, ENV_SIZE); + gd->env_valid = 1; +} + +int env_init(void) +{ + /* SPI flash isn't usable before relocation */ + gd->env_addr = (ulong)&default_environment[0]; + gd->env_valid = 1; + + return 0; +} + +#endif /* CFG_ENV_IS_IN_SPI_FLASH */

-- 1.5.4.3

Wolfgang Denk

5 Jun 5 Jun

12:06 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 6/6] Add support for environment in SPI flash

In message 1210929035-7997-6-git-send-email-haavard.skinnemoen@atmel.com you wrote:

...

This is pretty incomplete...it doesn't handle reading the environment before relocation, it doesn't support redundant environment, and it doesn't support embedded environment. But apart from that, it does seem to work.

I suppose more patches to add the missing features will follow soon ?

...

Signed-off-by: Haavard Skinnemoen haavard.skinnemoen@atmel.com

common/Makefile | 1 + common/cmd_nvedit.c | 3 +- common/env_common.c | 3 +- common/env_sf.c | 131 +++++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 136 insertions(+), 2 deletions(-) create mode 100644 common/env_sf.c

Applied, thanks.

Best regards,

Wolfgang Denk

-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de The joys of love made her human and the agonies of love destroyed her. -- Spock, "Requiem for Methuselah", stardate 5842.8

Haavard Skinnemoen

1:18 p.m.

New subject: [U-Boot-Users] [RFC/PATCH 6/6] Add support for environment in SPI flash

Wolfgang Denk wd@denx.de wrote:

...

In message 1210929035-7997-6-git-send-email-haavard.skinnemoen@atmel.com you wrote:

...
This is pretty incomplete...it doesn't handle reading the environment before relocation, it doesn't support redundant environment, and it doesn't support embedded environment. But apart from that, it does seem to work.

I suppose more patches to add the missing features will follow soon ?

Yeah...I didn't actually expect you to apply it, hence the RFC. But now that it's in, I guess I should put in some effort to make it more complete.

As for reading the environment before relocation, I don't really know how to do it without using writeable RAM. env_nand does not support this either -- it depends on embedded environment.

Haavard

Wolfgang Denk

12:06 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 5/6] SPI Flash: Add "sf" command

In message 1210929035-7997-5-git-send-email-haavard.skinnemoen@atmel.com you wrote:

...

This adds a new command, "sf" which can be used to manipulate SPI flash. Currently, initialization, reading, writing and erasing is supported.

Signed-off-by: Haavard Skinnemoen haavard.skinnemoen@atmel.com

common/Makefile | 1 + common/cmd_sf.c | 191 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 192 insertions(+), 0 deletions(-) create mode 100644 common/cmd_sf.c

Applied, thanks.

Best regards,

Wolfgang Denk

-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de "The whole problem with the world is that fools and fanatics are always so certain of themselves, but wiser people so full of doubts." - Bertrand Russell

Wolfgang Denk

12:06 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 4/6] SPI Flash subsystem

In message 1210929035-7997-4-git-send-email-haavard.skinnemoen@atmel.com you wrote:

...

This adds a new SPI flash subsystem.

Currently, only AT45 DataFlash in non-power-of-two mode is supported, but some preliminary support for other flash types is in place as well.

Signed-off-by: Haavard Skinnemoen haavard.skinnemoen@atmel.com

Makefile | 2 + drivers/mtd/spi/Makefile | 47 +++++ drivers/mtd/spi/atmel.c | 362 ++++++++++++++++++++++++++++++++++ drivers/mtd/spi/spi_flash.c | 162 +++++++++++++++ drivers/mtd/spi/spi_flash_internal.h | 45 +++++ include/spi_flash.h | 70 +++++++ 6 files changed, 688 insertions(+), 0 deletions(-) create mode 100644 drivers/mtd/spi/Makefile create mode 100644 drivers/mtd/spi/atmel.c create mode 100644 drivers/mtd/spi/spi_flash.c create mode 100644 drivers/mtd/spi/spi_flash_internal.h create mode 100644 include/spi_flash.h

Applied, thanks.

Best regards,

Wolfgang Denk

-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de The management question ... is not _whether_ to build a pilot system and throw it away. You _will_ do that. The only question is whether to plan in advance to build a throwaway, or to promise to deliver the throwaway to customers. - Fred Brooks, "The Mythical Man Month"

Wolfgang Denk

12:06 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 3/6] atmel_spi: Driver for the Atmel SPI controller

In message 1210929035-7997-3-git-send-email-haavard.skinnemoen@atmel.com you wrote:

...

From: Hans-Christian Egtvedt hcegtvedt@atmel.com

This adds a driver for the SPI controller found on most AT91 and AVR32 chips, implementing the new SPI API.

Changed in v4:

Update to new API

Handle zero-length transfers appropriately. The user may send a zero-length SPI transfer with SPI_XFER_END set in order to deactivate the chip select after a series of transfers with chip select active. This is useful e.g. when polling the status register of DataFlash.

Signed-off-by: Haavard Skinnemoen hskinnemoen@atmel.com

cpu/at32ap/at32ap700x/gpio.c | 43 +++++ drivers/spi/Makefile | 1 + drivers/spi/atmel_spi.c | 210 +++++++++++++++++++++ drivers/spi/atmel_spi.h | 95 +++++++++ include/asm-avr32/arch-at32ap700x/chip-features.h | 1 + include/asm-avr32/arch-at32ap700x/clk.h | 6 + include/asm-avr32/arch-at32ap700x/gpio.h | 4 + 7 files changed, 360 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/atmel_spi.c create mode 100644 drivers/spi/atmel_spi.h

Applied, thanks.

Best regards,

Wolfgang Denk

-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de This all sounds complicated, but it mostly does excatly what you ex- pect. It's just difficult for us to explain what you expect... - L. Wall & R. L. Schwartz, _Programming Perl_

Guennadi Liakhovetski

16 May 16 May

12:41 p.m.

New subject: [U-Boot-Users] [RFC/PATCH 2/6] SPI API improvements

On Fri, 16 May 2008, Haavard Skinnemoen wrote:

...

From: Haavard Skinnemoen hskinnemoen@atmel.com

This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible.

Ok, this looks good to me now. And it works too. Just one question:

...

diff --git a/drivers/rtc/mc13783-rtc.c b/drivers/rtc/mc13783-rtc.c index 35b1b8b..b6e1501 100644 --- a/drivers/rtc/mc13783-rtc.c +++ b/drivers/rtc/mc13783-rtc.c @@ -24,34 +24,50 @@ #include <rtc.h> #include <spi.h>

+static struct spi_slave *slave;

int rtc_get(struct rtc_time *rtc) { u32 day1, day2, time; u32 reg; int err, tim, i = 0;

spi_select(1, 0, SPI_MODE_2 | SPI_CS_HIGH);
if (!slave) {
/* FIXME: Verify the max SCK rate */
slave = spi_setup_slave(1, 0, 1000000,
		SPI_MODE_2 | SPI_CS_HIGH);
if (!slave)
	return -1;
}

if (spi_claim_bus(slave))
return -1;
do { reg = 0x2c000000;
err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day1);
err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day1,
		SPI_XFER_BEGIN | SPI_XFER_END);
if (err) return err;

reg = 0x28000000;
err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time,
		SPI_XFER_BEGIN | SPI_XFER_END);
if (err) return err;

reg = 0x2c000000;
err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day2);
err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day2,
		SPI_XFER_BEGIN | SPI_XFER_END);

Here... We perform 3 transfers on SPI one after another, and every time we do "SPI_XFER_BEGIN | SPI_XFER_EN"... Doesn't this defeat the whole purpose of these flags? Would it be bad, if we did

...

reg = 0x2c000000;

err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day1);

err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day1,

```
		SPI_XFER_BEGIN);
```

```
if (err)
```
```
	return err;
```
reg = 0x28000000;

err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);

err |= spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time, 0);

```
if (err)
```
```
	return err;
```
reg = 0x2c000000;

err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day2);

err |= spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day2,

```
		SPI_XFER_END);
```
if (err) return err;

? The worst that can happen with this, is that the first or the second transfer return an error, and we go on with one or two more transfers instead of aborting immediately. Can this have any negative effects?

...

@@ -65,16 +81,31 @@ void rtc_set(struct rtc_time *rtc) { u32 time, day, reg;
if (!slave) {
/* FIXME: Verify the max SCK rate */
slave = spi_setup_slave(1, 0, 1000000,
		SPI_MODE_2 | SPI_CS_HIGH);
if (!slave)
	return;
}

time = mktime(rtc->tm_year, rtc->tm_mon, rtc->tm_mday, rtc->tm_hour, rtc->tm_min, rtc->tm_sec); day = time / 86400; time %= 86400;

if (spi_claim_bus(slave))
return;
reg = 0x2c000000 | day | 0x80000000;
spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day);
spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day,
	SPI_XFER_BEGIN | SPI_XFER_END);
reg = 0x28000000 | time | 0x80000000;
spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time,
	SPI_XFER_BEGIN | SPI_XFER_END);
spi_release_bus(slave);
}

void rtc_reset(void)

Here error is not checked at all... So, it should be no problem doing only SPI_XFER_BEGIN in the first xfer and only SPI_XFER_END in the second one.

Thanks Guennadi --- Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de

Haavard Skinnemoen

2:22 p.m.

New subject: [U-Boot-Users] [RFC/PATCH 2/6] SPI API improvements

On Fri, 16 May 2008 12:41:04 +0200 (CEST) Guennadi Liakhovetski lg@denx.de wrote:

...

On Fri, 16 May 2008, Haavard Skinnemoen wrote:

...
From: Haavard Skinnemoen hskinnemoen@atmel.com

This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible.

Ok, this looks good to me now. And it works too. Just one question:

Great!

...

...
do { reg = 0x2c000000;
err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day1);
err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day1,
		SPI_XFER_BEGIN | SPI_XFER_END);
if (err) return err;

reg = 0x28000000;
err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time,
		SPI_XFER_BEGIN | SPI_XFER_END);
if (err) return err;

reg = 0x2c000000;
err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day2);
err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day2,
		SPI_XFER_BEGIN | SPI_XFER_END);
Here... We perform 3 transfers on SPI one after another, and every time we do "SPI_XFER_BEGIN | SPI_XFER_EN"... Doesn't this defeat the whole purpose of these flags? Would it be bad, if we did

Well, no, I wouldn't say it defeats the purpose of these flags...

...

...
reg = 0x2c000000;
err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day1);
err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day1,
		SPI_XFER_BEGIN);
if (err)
	return err;
reg = 0x28000000;
err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
err |= spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time, 0);
if (err)
	return err;
reg = 0x2c000000;
err = spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day2);
err |= spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day2,
		SPI_XFER_END);
if (err) return err;
? The worst that can happen with this, is that the first or the second transfer return an error, and we go on with one or two more transfers instead of aborting immediately. Can this have any negative effects?

While I don't know the RTC in question well enough to say for sure, there's a very real possibility that your suggestion simply won't work.

The purpose of the spi_xfer flags parameter isn't to gang together multiple transfers -- it's to allow more precise chip select control so that you can split a transfer into multiple spi_xfer() calls. This is useful for devices where you typically start with a command, possibly with a few bytes of parameters, then transfer data without releasing the chip select in between.

The SPI flash driver posted later in this thread does this -- it first sends a command along with any address bytes, and then starts the actual data transfer with the buffer provided by the caller. The chip select must stay active during the whole sequence, so without this tweak, it would have to copy everything into a temporary buffer first.

If you try to combine multiple transfers into one like you did above, the chip select will stay active all the time. And many devices expect the chip select to go inactive after each command, and may simply ignore all but the first or last if it stays active.

It could be that your solution works, but I wanted to mimic the existing behaviour as closely as possible. And I definitely don't want to "optimize" chip select control without knowing the device in question very well.

...

...
reg = 0x2c000000 | day | 0x80000000;

spi_xfer(0, 32, (uchar *)&reg, (uchar *)&day);
spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day,
	SPI_XFER_BEGIN | SPI_XFER_END);
reg = 0x28000000 | time | 0x80000000;
spi_xfer(0, 32, (uchar *)&reg, (uchar *)&time);
spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time,
	SPI_XFER_BEGIN | SPI_XFER_END);
spi_release_bus(slave);
}

void rtc_reset(void)
Here error is not checked at all... So, it should be no problem doing only SPI_XFER_BEGIN in the first xfer and only SPI_XFER_END in the second one.

No, I don't think that will work, for the reasons mentioned above. There's no error checking because the existing code doesn't check for errors...and there's no way to return an error status from the function anyway.

Btw, there are a few spi_xfer() semantics that I want to be a bit more clearly defined, but I forgot to document it before sending the patch. These are: * If spi_xfer() fails, it automatically terminates the transfer as if the SPI_XFER_END flag was set. * If bitlen == 0, spi_xfer() must deactivate CS if the SPI_XFER_END flag is set. * If dout == NULL, spi_xfer() will transmit unspecified data. Alternatively, we could specify that it must send zeroes. * If din == NULL, spi_xfer() will ignore any received data.

If people agree that these semantics make sense, we should probably go through the drivers and make sure it's handled appropriately.

Oh, and I want to do something about the "bitlen" parameter, but I don't wanna open that particular can of worms in this patchset :-)

Haavard

Guennadi Liakhovetski

2:51 p.m.

New subject: [U-Boot-Users] [RFC/PATCH 2/6] SPI API improvements

On Fri, 16 May 2008, Haavard Skinnemoen wrote:

...

The purpose of the spi_xfer flags parameter isn't to gang together multiple transfers -- it's to allow more precise chip select control so that you can split a transfer into multiple spi_xfer() calls. This is useful for devices where you typically start with a command, possibly with a few bytes of parameters, then transfer data without releasing the chip select in between.

Ok, understand now. Thanks for the explanation!

Tested-by: Guennadi Liakhovetski lg@denx.de

(if you want, you can add this to [1/6] too).

Thanks Guennadi --- Guennadi Liakhovetski, Ph.D.

Jean-Christophe PLAGNIOL-VILLARD

17 May 17 May

12:56 p.m.

New subject: [U-Boot-Users] [RFC/PATCH 2/6] SPI API improvements

You've forget ds1722 and AMD Elan cpu which use SPI too

Best Regards, J.

Haavard Skinnemoen

18 May 18 May

7:37 p.m.

New subject: [U-Boot-Users] [RFC/PATCH 2/6] SPI API improvements

On Sat, 17 May 2008 12:56:00 +0200 Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com wrote:

...

You've forget ds1722 and AMD Elan cpu which use SPI too

I don't think so. ds1722 uses some sort of home-grown API which I don't want anything to do with.

Elan seems to be using a different API too...

hskinnemoen@siona:~/work/u-boot/spi$ git grep spi_xfer cpu/i386/ include/asm-i386/ board/sc* hskinnemoen@siona:~/work/u-boot/spi$ git grep -i elan drivers/spi/

Or am I missing something?

Haavard

Ben Warren

26 May 26 May

8:57 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 2/6] SPI API improvements

Hi Haavard,

Haavard Skinnemoen wrote:

...

From: Haavard Skinnemoen hskinnemoen@atmel.com

This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible.

Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks:

spi_cs_activate(): Activates the chipselect for a given slave

spi_cs_deactivate(): Deactivates the chipselect for a given slave

spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated.

Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.)

To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this.

Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware.

spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future.

This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection.

I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API.

But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why?

Changed in v4:

Build fixes for various boards, drivers and commands

Provide common struct spi_slave definition that can be extended by drivers

Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate

Make default bus and mode build-time configurable

Override default SPI bus ID and mode on mx32ads and imx31_litekit.

Changed in v3:

Add opaque struct spi_slave for controller-specific data associated with a slave.

Add spi_claim_bus() and spi_release_bus()

Add spi_free_slave()

spi_setup() is now called spi_setup_slave() and returns a struct spi_slave

soft_spi now supports four SPI modes (CPOL|CPHA)

Add bus parameter to spi_setup_slave()

Convert the new i.MX32 SPI driver

Convert the new MC13783 RTC driver

Changed in v2:

Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API.

Signed-off-by: Haavard Skinnemoen hskinnemoen@atmel.com

Tested on MPC8349EMDS, works great! Nice work. Sorry for taking so long. I finally have my gear all set up again.

Acked-by: Ben Warren biggerbadderben@gmail.com

regards, Ben

Wolfgang Denk

5 Jun 5 Jun

12:06 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 2/6] SPI API improvements

In message 1210929035-7997-2-git-send-email-haavard.skinnemoen@atmel.com you wrote:

...

From: Haavard Skinnemoen hskinnemoen@atmel.com

This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible.

...

Signed-off-by: Haavard Skinnemoen hskinnemoen@atmel.com

board/amcc/taihu/taihu.c | 16 ++- board/freescale/mpc8349emds/mpc8349emds.c | 25 +++--- board/sacsng/sacsng.c | 35 +++---- board/ssv/adnpesc1/adnpesc1.c | 27 +++--- common/cmd_df.c | 37 +++++++ common/cmd_spi.c | 42 +++++---- common/soft_spi.c | 124 ++++++++++++++++++------ cpu/nios/spi.c | 79 +++++++++++---- drivers/rtc/ds1306.c | 67 ++++++++++---- drivers/rtc/mc13783-rtc.c | 43 +++++++- drivers/spi/mpc8xxx_spi.c | 54 +++++++++-- drivers/spi/mxc_spi.c | 88 +++++++++++------ include/configs/imx31_litekit.h | 3 +- include/configs/mx31ads.h | 3 +- include/spi.h | 150 ++++++++++++++++++++++++----- 15 files changed, 584 insertions(+), 209 deletions(-) create mode 100644 common/cmd_df.c

Applied, thanks.

Best regards,

Wolfgang Denk

Jean-Christophe PLAGNIOL-VILLARD

16 May 16 May

11:56 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 1/6] Move definition of container_of() to common.h

On 11:10 Fri 16 May , Haavard Skinnemoen wrote:

...

AVR32 and AT91SAM9 both have their own identical definitions of container_of() taken from the Linux kernel. Move it to common.h so that all architectures can use it.

container_of() is already used by some drivers, and will be used extensively by the new and improved SPI API.

Signed-off-by: Haavard Skinnemoen haavard.skinnemoen@atmel.com

Acked-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com

Wolfgang Denk

5 Jun 5 Jun

12:06 a.m.

New subject: [U-Boot-Users] [RFC/PATCH 1/6] Move definition of container_of() to common.h

In message 1210929035-7997-1-git-send-email-haavard.skinnemoen@atmel.com you wrote:

...

AVR32 and AT91SAM9 both have their own identical definitions of container_of() taken from the Linux kernel. Move it to common.h so that all architectures can use it.

container_of() is already used by some drivers, and will be used extensively by the new and improved SPI API.

Signed-off-by: Haavard Skinnemoen haavard.skinnemoen@atmel.com

include/asm-arm/arch-at91sam9/hardware.h | 11 ----------- include/asm-avr32/u-boot.h | 11 ----------- include/common.h | 11 +++++++++++ 3 files changed, 11 insertions(+), 22 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de HR Manager to job candidate "I see you've had no computer training. Although that qualifies you for upper management, it means you're under-qualified for our entry level positions."

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participants (5)

Ben Warren
Guennadi Liakhovetski
Haavard Skinnemoen
Jean-Christophe PLAGNIOL-VILLARD
Wolfgang Denk