Commit 90f262a6951f ("vexpress64: Clean up BASE_FVP boot configuration") cleaned up the usage of default address variables, but missed to update the address for the kernel in the FVP's bootcmd definition.

Change ${kernel_addr} to read ${kernel_addr_r} to bring back the automated boot for the fastmodel. Also use "setenv" instead of the potentially ambiguous "set" on the way.

Fixes: 90f262a6951f ("vexpress64: Clean up BASE_FVP boot configuration") Signed-off-by: Andre Przywara andre.przywara@arm.com --- configs/vexpress_aemv8a_semi_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 82a5b52f1e..448d012e1c 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -17,7 +17,7 @@ CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9" -CONFIG_BOOTCOMMAND="if smhload ${boot_name} ${boot_addr_r}; then set bootargs; abootimg addr ${boot_addr_r}; abootimg get dtb --index=0 fdt_addr_r; bootm ${boot_addr_r} ${boot_addr_r} ${fdt_addr_r}; else; set fdt_high 0xffffffffffffffff; set initrd_high 0xffffffffffffffff; smhload ${kernel_name} ${kernel_addr}; smhload ${fdtfile} ${fdt_addr_r}; smhload ${ramdisk_name} ${ramdisk_addr_r} ramdisk_end; fdt addr ${fdt_addr_r}; fdt resize; fdt chosen ${ramdisk_addr_r} ${ramdisk_end}; booti $kernel_addr - $fdt_addr_r; fi" +CONFIG_BOOTCOMMAND="if smhload ${boot_name} ${boot_addr_r}; then setenv bootargs; abootimg addr ${boot_addr_r}; abootimg get dtb --index=0 fdt_addr_r; bootm ${boot_addr_r} ${boot_addr_r} ${fdt_addr_r}; else; setenv fdt_high 0xffffffffffffffff; setenv initrd_high 0xffffffffffffffff; smhload ${kernel_name} ${kernel_addr_r}; smhload ${fdtfile} ${fdt_addr_r}; smhload ${ramdisk_name} ${ramdisk_addr_r} ramdisk_end; fdt addr ${fdt_addr_r}; fdt resize; fdt chosen ${ramdisk_addr_r} ${ramdisk_end}; booti $kernel_addr_r - $fdt_addr_r; fi" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# "

At the moment we define three "VExpress64" boards in arch/arm/Kconfig, plus have a second Kconfig file in board/armltd/Kconfig. One of those three boards is actually bogus (TARGET_VEXPRESS64_AEMV8A), that stanza looks like being forgotten in a previous cleanup.

To remove the clutter from the generic Kconfig file, just define some ARCH_VEXPRESS64 symbol there, enable some common options, and do the board/model specific configuration in the board/armltd Kconfig file.

That allows to streamline and fine tune the configuration later, and to also pull a lot of "non user choices" out of the defconfigs.

Signed-off-by: Andre Przywara andre.przywara@arm.com --- arch/arm/Kconfig | 28 +++----------------------- board/armltd/vexpress64/Kconfig | 20 +++++++++++++++++- configs/vexpress_aemv8a_juno_defconfig | 3 ++- configs/vexpress_aemv8a_semi_defconfig | 4 +--- 4 files changed, 25 insertions(+), 30 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 391a77c2b4..34dbd73cce 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1235,34 +1235,12 @@ config ARCH_TEGRA imply DISTRO_DEFAULTS imply FAT_WRITE

-config TARGET_VEXPRESS64_AEMV8A - bool "Support vexpress_aemv8a" +config ARCH_VEXPRESS64 + bool "Support ARMv8 Arm Ltd. VExpress based boards and models" select ARM64 - select GPIO_EXTRA_HEADER - select PL01X_SERIAL - -config TARGET_VEXPRESS64_BASE_FVP - bool "Support Versatile Express ARMv8a FVP BASE model" - select ARM64 - select GPIO_EXTRA_HEADER - select PL01X_SERIAL - select SEMIHOSTING - -config TARGET_VEXPRESS64_JUNO - bool "Support Versatile Express Juno Development Platform" - select ARM64 - select GPIO_EXTRA_HEADER - select PL01X_SERIAL select DM - select OF_CONTROL - select CLK select DM_SERIAL - select ARM_PSCI_FW - select PSCI_RESET - select DM_ETH - select BLK - select USB - imply OF_HAS_PRIOR_STAGE + select PL01X_SERIAL

config TARGET_TOTAL_COMPUTE bool "Support Total Compute Platform" diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig index 4aab3f092e..55fe0118e1 100644 --- a/board/armltd/vexpress64/Kconfig +++ b/board/armltd/vexpress64/Kconfig @@ -1,4 +1,4 @@ -if TARGET_VEXPRESS64_BASE_FVP || TARGET_VEXPRESS64_JUNO +if ARCH_VEXPRESS64

config SYS_BOARD default "vexpress64" @@ -9,6 +9,24 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "vexpress_aemv8"

+choice + prompt "VExpress64 board variant" + +config TARGET_VEXPRESS64_BASE_FVP + bool "Support Versatile Express ARMv8a FVP BASE model" + select SEMIHOSTING + +config TARGET_VEXPRESS64_JUNO + bool "Support Versatile Express Juno Development Platform" + select DM_ETH + select USB + select OF_CONTROL + select CLK + select BLK + imply OF_HAS_PRIOR_STAGE + +endchoice + config JUNO_DTB_PART string "NOR flash partition holding DTB" default "board.dtb" diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index e02124cc7f..2fcbcce308 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -1,5 +1,5 @@ CONFIG_ARM=y -CONFIG_TARGET_VEXPRESS64_JUNO=y +CONFIG_ARCH_VEXPRESS64=y CONFIG_SYS_TEXT_BASE=0xe0000000 CONFIG_SYS_MALLOC_LEN=0x810000 CONFIG_SYS_MALLOC_F_LEN=0x2000 @@ -10,6 +10,7 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="juno-r2" CONFIG_IDENT_STRING=" vexpress_aemv8a" +CONFIG_TARGET_VEXPRESS64_JUNO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x90000000 diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 448d012e1c..24af87904f 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y # CONFIG_ARM64_CRC32 is not set -CONFIG_TARGET_VEXPRESS64_BASE_FVP=y +CONFIG_ARCH_VEXPRESS64=y CONFIG_SYS_TEXT_BASE=0x88000000 CONFIG_SYS_MALLOC_LEN=0x840000 CONFIG_SYS_MALLOC_F_LEN=0x2000 @@ -38,7 +38,6 @@ CONFIG_CMD_UBI=y # CONFIG_EFI_PARTITION is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xFFC0000 -CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y @@ -46,5 +45,4 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_DM_SERIAL=y CONFIG_OF_LIBFDT=y

The Arm Fixed Virtual Platform (FVP) is a software model for an artificial ARM platform, it is available for free on the Arm website[1].

Add the devicetree files for the latest RevC version, as we will need them to enable OF_CONTROL for the vexpress_aemv8a_semi board.

This is a verbatim copy of the respective files from Linux v5.17-rc6, which is unchanged from the v5.16 release.

[1] https://developer.arm.com/tools-and-software/simulation-models/fast-models

Signed-off-by: Andre Przywara andre.przywara@arm.com --- arch/arm/dts/fvp-base-revc.dts | 246 +++++++++++++++++++++ arch/arm/dts/rtsm_ve-motherboard-rs2.dtsi | 27 +++ arch/arm/dts/rtsm_ve-motherboard.dtsi | 258 ++++++++++++++++++++++ 3 files changed, 531 insertions(+) create mode 100644 arch/arm/dts/fvp-base-revc.dts create mode 100644 arch/arm/dts/rtsm_ve-motherboard-rs2.dtsi create mode 100644 arch/arm/dts/rtsm_ve-motherboard.dtsi

diff --git a/arch/arm/dts/fvp-base-revc.dts b/arch/arm/dts/fvp-base-revc.dts new file mode 100644 index 0000000000..269b649934 --- /dev/null +++ b/arch/arm/dts/fvp-base-revc.dts @@ -0,0 +1,246 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Ltd. Fast Models + * + * Architecture Envelope Model (AEM) ARMv8-A + * ARMAEMv8AMPCT + * + * FVP Base RevC + */ + +/dts-v1/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/memreserve/ 0x80000000 0x00010000; + +#include "rtsm_ve-motherboard.dtsi" +#include "rtsm_ve-motherboard-rs2.dtsi" + +/ { + model = "FVP Base RevC"; + compatible = "arm,fvp-base-revc", "arm,vexpress"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + aliases { + serial0 = &v2m_serial0; + serial1 = &v2m_serial1; + serial2 = &v2m_serial2; + serial3 = &v2m_serial3; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x000>; + enable-method = "psci"; + }; + cpu1: cpu@100 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + }; + cpu2: cpu@200 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x200>; + enable-method = "psci"; + }; + cpu3: cpu@300 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x300>; + enable-method = "psci"; + }; + cpu4: cpu@10000 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x10000>; + enable-method = "psci"; + }; + cpu5: cpu@10100 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x10100>; + enable-method = "psci"; + }; + cpu6: cpu@10200 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x10200>; + enable-method = "psci"; + }; + cpu7: cpu@10300 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x10300>; + enable-method = "psci"; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x80000000 0 0x80000000>, + <0x00000008 0x80000000 0 0x80000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Chipselect 2,00000000 is physically at 0x18000000 */ + vram: vram@18000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0x00000000 0x18000000 0 0x00800000>; + no-map; + }; + }; + + gic: interrupt-controller@2f000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + interrupt-controller; + reg = <0x0 0x2f000000 0 0x10000>, // GICD + <0x0 0x2f100000 0 0x200000>, // GICR + <0x0 0x2c000000 0 0x2000>, // GICC + <0x0 0x2c010000 0 0x2000>, // GICH + <0x0 0x2c02f000 0 0x2000>; // GICV + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + + its: msi-controller@2f020000 { + #msi-cells = <1>; + compatible = "arm,gic-v3-its"; + reg = <0x0 0x2f020000 0x0 0x20000>; // GITS + msi-controller; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; + }; + + spe-pmu { + compatible = "arm,statistical-profiling-extension-v1"; + interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; + }; + + pci: pci@40000000 { + #address-cells = <0x3>; + #size-cells = <0x2>; + #interrupt-cells = <0x1>; + compatible = "pci-host-ecam-generic"; + device_type = "pci"; + bus-range = <0x0 0x1>; + reg = <0x0 0x40000000 0x0 0x10000000>; + ranges = <0x2000000 0x0 0x50000000 0x0 0x50000000 0x0 0x10000000>; + interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic 0 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic 0 0 GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic 0 0 GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + msi-map = <0x0 &its 0x0 0x10000>; + iommu-map = <0x0 &smmu 0x0 0x10000>; + + dma-coherent; + }; + + smmu: iommu@2b400000 { + compatible = "arm,smmu-v3"; + reg = <0x0 0x2b400000 0x0 0x100000>; + interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eventq", "gerror", "priq", "cmdq-sync"; + dma-coherent; + #iommu-cells = <1>; + msi-parent = <&its 0x10000>; + }; + + panel { + compatible = "arm,rtsm-display", "panel-dpi"; + port { + panel_in: endpoint { + remote-endpoint = <&clcd_pads>; + }; + }; + }; + + bus@8000000 { + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 63>; + interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <0 0 1 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <0 0 2 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <0 0 3 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <0 0 4 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <0 0 5 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <0 0 6 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <0 0 7 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <0 0 8 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <0 0 9 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <0 0 10 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <0 0 11 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <0 0 12 &gic 0 0 GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <0 0 13 &gic 0 0 GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <0 0 14 &gic 0 0 GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <0 0 15 &gic 0 0 GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <0 0 16 &gic 0 0 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <0 0 17 &gic 0 0 GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <0 0 18 &gic 0 0 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <0 0 19 &gic 0 0 GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <0 0 20 &gic 0 0 GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, + <0 0 21 &gic 0 0 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, + <0 0 22 &gic 0 0 GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, + <0 0 23 &gic 0 0 GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, + <0 0 24 &gic 0 0 GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <0 0 25 &gic 0 0 GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <0 0 26 &gic 0 0 GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <0 0 27 &gic 0 0 GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <0 0 28 &gic 0 0 GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, + <0 0 29 &gic 0 0 GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <0 0 30 &gic 0 0 GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <0 0 31 &gic 0 0 GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <0 0 32 &gic 0 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <0 0 33 &gic 0 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <0 0 34 &gic 0 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <0 0 35 &gic 0 0 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <0 0 36 &gic 0 0 GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, + <0 0 37 &gic 0 0 GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, + <0 0 38 &gic 0 0 GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, + <0 0 39 &gic 0 0 GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <0 0 40 &gic 0 0 GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <0 0 43 &gic 0 0 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <0 0 44 &gic 0 0 GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + }; +}; diff --git a/arch/arm/dts/rtsm_ve-motherboard-rs2.dtsi b/arch/arm/dts/rtsm_ve-motherboard-rs2.dtsi new file mode 100644 index 0000000000..33182d9e58 --- /dev/null +++ b/arch/arm/dts/rtsm_ve-motherboard-rs2.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Ltd. Fast Models + * + * "rs2" extension for the v2m motherboard + */ +/ { + bus@8000000 { + motherboard-bus@8000000 { + arm,v2m-memory-map = "rs2"; + + iofpga-bus@300000000 { + virtio-p9@140000 { + compatible = "virtio,mmio"; + reg = <0x140000 0x200>; + interrupts = <43>; + }; + + virtio-net@150000 { + compatible = "virtio,mmio"; + reg = <0x150000 0x200>; + interrupts = <44>; + }; + }; + }; + }; +}; diff --git a/arch/arm/dts/rtsm_ve-motherboard.dtsi b/arch/arm/dts/rtsm_ve-motherboard.dtsi new file mode 100644 index 0000000000..5f6cab668a --- /dev/null +++ b/arch/arm/dts/rtsm_ve-motherboard.dtsi @@ -0,0 +1,258 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Ltd. Fast Models + * + * Versatile Express (VE) system model + * Motherboard component + * + * VEMotherBoard.lisa + */ +/ { + v2m_clk24mhz: clk24mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "v2m:clk24mhz"; + }; + + v2m_refclk1mhz: refclk1mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1000000>; + clock-output-names = "v2m:refclk1mhz"; + }; + + v2m_refclk32khz: refclk32khz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "v2m:refclk32khz"; + }; + + v2m_fixed_3v3: v2m-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + mcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <&v2m_sysreg>; + + v2m_oscclk1: oscclk1 { + /* CLCD clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 1>; + freq-range = <23750000 63500000>; + #clock-cells = <0>; + clock-output-names = "v2m:oscclk1"; + }; + + reset { + compatible = "arm,vexpress-reset"; + arm,vexpress-sysreg,func = <5 0>; + }; + + muxfpga { + compatible = "arm,vexpress-muxfpga"; + arm,vexpress-sysreg,func = <7 0>; + }; + + shutdown { + compatible = "arm,vexpress-shutdown"; + arm,vexpress-sysreg,func = <8 0>; + }; + + reboot { + compatible = "arm,vexpress-reboot"; + arm,vexpress-sysreg,func = <9 0>; + }; + + dvimode { + compatible = "arm,vexpress-dvimode"; + arm,vexpress-sysreg,func = <11 0>; + }; + }; + + bus@8000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0x8000000 0 0x8000000 0x18000000>; + + motherboard-bus@8000000 { + compatible = "arm,vexpress,v2m-p1", "simple-bus"; + #address-cells = <2>; /* SMB chipselect number and offset */ + #size-cells = <1>; + ranges = <0 0 0 0x08000000 0x04000000>, + <1 0 0 0x14000000 0x04000000>, + <2 0 0 0x18000000 0x04000000>, + <3 0 0 0x1c000000 0x04000000>, + <4 0 0 0x0c000000 0x04000000>, + <5 0 0 0x10000000 0x04000000>; + + flash@0 { + compatible = "arm,vexpress-flash", "cfi-flash"; + reg = <0 0x00000000 0x04000000>, + <4 0x00000000 0x04000000>; + bank-width = <4>; + }; + + ethernet@202000000 { + compatible = "smsc,lan91c111"; + reg = <2 0x02000000 0x10000>; + interrupts = <15>; + }; + + iofpga-bus@300000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 3 0 0x200000>; + + v2m_sysreg: sysreg@10000 { + compatible = "arm,vexpress-sysreg"; + reg = <0x010000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + }; + + v2m_sysctl: sysctl@20000 { + compatible = "arm,sp810", "arm,primecell"; + reg = <0x020000 0x1000>; + clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>; + clock-names = "refclk", "timclk", "apb_pclk"; + #clock-cells = <1>; + clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; + assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>; + assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>; + }; + + aaci@40000 { + compatible = "arm,pl041", "arm,primecell"; + reg = <0x040000 0x1000>; + interrupts = <11>; + clocks = <&v2m_clk24mhz>; + clock-names = "apb_pclk"; + }; + + mmc@50000 { + compatible = "arm,pl180", "arm,primecell"; + reg = <0x050000 0x1000>; + interrupts = <9>, <10>; + cd-gpios = <&v2m_sysreg 0 0>; + wp-gpios = <&v2m_sysreg 1 0>; + max-frequency = <12000000>; + vmmc-supply = <&v2m_fixed_3v3>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "mclk", "apb_pclk"; + }; + + kmi@60000 { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x060000 0x1000>; + interrupts = <12>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "KMIREFCLK", "apb_pclk"; + }; + + kmi@70000 { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x070000 0x1000>; + interrupts = <13>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "KMIREFCLK", "apb_pclk"; + }; + + v2m_serial0: serial@90000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x090000 0x1000>; + interrupts = <5>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + v2m_serial1: serial@a0000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0a0000 0x1000>; + interrupts = <6>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + v2m_serial2: serial@b0000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0b0000 0x1000>; + interrupts = <7>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + v2m_serial3: serial@c0000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0c0000 0x1000>; + interrupts = <8>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + watchdog@f0000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x0f0000 0x1000>; + interrupts = <0>; + clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>; + clock-names = "wdog_clk", "apb_pclk"; + }; + + v2m_timer01: timer@110000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x110000 0x1000>; + interrupts = <2>; + clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>; + clock-names = "timclken1", "timclken2", "apb_pclk"; + }; + + v2m_timer23: timer@120000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x120000 0x1000>; + interrupts = <3>; + clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>; + clock-names = "timclken1", "timclken2", "apb_pclk"; + }; + + virtio-block@130000 { + compatible = "virtio,mmio"; + reg = <0x130000 0x200>; + interrupts = <42>; + }; + + rtc@170000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0x170000 0x1000>; + interrupts = <4>; + clocks = <&v2m_clk24mhz>; + clock-names = "apb_pclk"; + }; + + clcd@1f0000 { + compatible = "arm,pl111", "arm,primecell"; + reg = <0x1f0000 0x1000>; + interrupt-names = "combined"; + interrupts = <14>; + clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>; + clock-names = "clcdclk", "apb_pclk"; + memory-region = <&vram>; + + port { + clcd_pads: endpoint { + remote-endpoint = <&panel_in>; + arm,pl11x,tft-r0g0b0-pads = <0 8 16>; + }; + }; + }; + }; + }; + }; +};

The FVP base model is relying on a DT for Linux operation, so there is no reason we would need to rely on hardcoded information for U-Boot. Letting U-Boot use a DT will open up the usage of actual peripherals, beyond the support for semihosting only.

Enable OF_CONTROL in the Kconfig, and use the latest dts files from Linux. Depending on whether we use the boot-wrapper or TF-A, there is already a DTB provided or not, respectively.

To cover the boot-wrapper, we add an arm64 Linux kernel header, which allows the boot-wrapper to treat U-Boot like a Linux kernel. U-Boot will find the pointer to the DTB in x0, and will use it.

Even though TF-A carries a DT, at the moment this is not made available to non-secure world, so to not break users, we use the U-Boot provided DTB copy in that case. For some reason TF-A puts some DT like structure at the address x0 is pointing at, but that is very small and doesn't carry any hardware information. Make the code to ignore those small DTBs.

Signed-off-by: Andre Przywara andre.przywara@arm.com --- arch/arm/Kconfig | 2 ++ arch/arm/dts/Makefile | 1 + board/armltd/vexpress64/Kconfig | 8 ++++++-- board/armltd/vexpress64/vexpress64.c | 8 +++++++- configs/vexpress_aemv8a_semi_defconfig | 2 +- 5 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 34dbd73cce..afb42e62d8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1241,6 +1241,8 @@ config ARCH_VEXPRESS64 select DM select DM_SERIAL select PL01X_SERIAL + select OF_CONTROL + select CLK

config TARGET_TOTAL_COMPUTE bool "Support Total Compute Platform" diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 960f1a9fd4..4c8492cd7d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1180,6 +1180,7 @@ dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb # TODO(Linus Walleij linus.walleij@linaro.org): Should us a single vexpress # Kconfig option to build all of these. See examples above. dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb +dtb-$(CONFIG_TARGET_VEXPRESS64_BASE_FVP) += fvp-base-revc.dtb dtb-$(CONFIG_TARGET_VEXPRESS64_JUNO) += juno-r2.dtb

dtb-$(CONFIG_TARGET_TOTAL_COMPUTE) += total_compute.dtb diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig index 55fe0118e1..34126446a7 100644 --- a/board/armltd/vexpress64/Kconfig +++ b/board/armltd/vexpress64/Kconfig @@ -15,13 +15,14 @@ choice config TARGET_VEXPRESS64_BASE_FVP bool "Support Versatile Express ARMv8a FVP BASE model" select SEMIHOSTING + select LINUX_KERNEL_IMAGE_HEADER + select POSITION_INDEPENDENT + select OF_BOARD

config TARGET_VEXPRESS64_JUNO bool "Support Versatile Express Juno Development Platform" select DM_ETH select USB - select OF_CONTROL - select CLK select BLK imply OF_HAS_PRIOR_STAGE

@@ -34,4 +35,7 @@ config JUNO_DTB_PART The ARM partition name in the NOR flash memory holding the device tree blob to configure U-Boot.

+config LNX_KRNL_IMG_TEXT_OFFSET_BASE + default SYS_TEXT_BASE + endif diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index 5e22e89824..7d5e5516f9 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -168,11 +168,17 @@ void *board_fdt_blob_setup(int *err) } #endif

- if (fdt_magic(prior_stage_fdt_address) == FDT_MAGIC) { + if (fdt_magic(prior_stage_fdt_address) == FDT_MAGIC && + fdt_totalsize(prior_stage_fdt_address) > 0x100) { *err = 0; return (void *)prior_stage_fdt_address; }

+ if (fdt_magic(gd->fdt_blob) == FDT_MAGIC) { + *err = 0; + return (void *)gd->fdt_blob; + } + *err = -ENXIO; return NULL; } diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 24af87904f..cbabc2f96a 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0xff000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_DEFAULT_DEVICE_TREE="fvp-base-revc" CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y @@ -45,4 +46,3 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_OF_LIBFDT=y

The definition of the standard environment variables (kernel_addr_r and friends) has been improved lately for the FVP model, but the Juno board is still using some custom scheme. Since we need to extend this to a third board soon, let's unify the definition: - Define the Juno addresses in the same generic way we do for the FVP model, and move the actual variable setting out of the board #ifdef's. - Add the missing addresses for a PXE file and a boot script. - Cleanup some stale comments on the way.

As the FVP model doesn't have support for distro_boot quite yet, add a dummy definition for now, to be replaced with the real thing later.

Signed-off-by: Andre Przywara andre.przywara@arm.com --- include/configs/vexpress_aemv8.h | 83 +++++++++++++++++--------------- 1 file changed, 45 insertions(+), 38 deletions(-)

diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index f0c5ceb384..983d60211a 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -102,8 +102,6 @@ /* BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE

-/* Miscellaneous configurable options */ - /* Physical Memory Map */ #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ /* Top 16MB reserved for secure world use */ @@ -119,11 +117,7 @@ #define PHYS_SDRAM_2_SIZE 0x80000000 #endif

-/* Enable memtest */ - -/* Initial environment variables */ -#ifdef CONFIG_TARGET_VEXPRESS64_JUNO -/* Copy the kernel and FDT to DRAM memory and boot */ +/* Copy the kernel, initrd and FDT from NOR flash to DRAM memory and boot. */ #define BOOTENV_DEV_AFS(devtypeu, devtypel, instance) \ "bootcmd_afs=" \ "afs load ${kernel_name} ${kernel_addr_r} ;"\ @@ -146,6 +140,10 @@ "booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}\0" #define BOOTENV_DEV_NAME_AFS(devtypeu, devtypel, instance) "afs "

+/* Boot sources for distro boot and load addresses, per board */ + +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO /* Arm Juno board */ + #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(SATA, sata, 0) \ @@ -156,40 +154,49 @@

#include <config_distro_bootcmd.h>

-/* - * Defines where the kernel and FDT exist in NOR flash and where it will - * be copied into DRAM - */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "kernel_name=norkern\0" \ - "kernel_alt_name=Image\0" \ - "kernel_addr_r=0x80080000\0" \ - "ramdisk_name=ramdisk.img\0" \ - "ramdisk_addr_r=0x88000000\0" \ - "fdtfile=board.dtb\0" \ - "fdt_alt_name=juno\0" \ - "fdt_addr_r=0x80000000\0" \ - BOOTENV - -#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP - -#define VEXPRESS_KERNEL_ADDR 0x80080000 -#define VEXPRESS_FDT_ADDR 0x8fc00000 -#define VEXPRESS_BOOT_ADDR 0x8fd00000 -#define VEXPRESS_RAMDISK_ADDR 0x8fe00000 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "kernel_name=Image\0" \ - "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \ - "ramdisk_name=ramdisk.img\0" \ - "ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \ - "fdtfile=devtree.dtb\0" \ - "fdt_addr_r=" __stringify(VEXPRESS_FDT_ADDR) "\0" \ - "boot_name=boot.img\0" \ - "boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0" +#define VEXPRESS_KERNEL_ADDR 0x80080000 +#define VEXPRESS_PXEFILE_ADDR 0x8fb00000 +#define VEXPRESS_FDT_ADDR 0x8fc00000 +#define VEXPRESS_SCRIPT_ADDR 0x8fd00000 +#define VEXPRESS_RAMDISK_ADDR 0x8fe00000 + +#define EXTRA_ENV_NAMES \ + "kernel_name=norkern\0" \ + "kernel_alt_name=Image\0" \ + "ramdisk_name=ramdisk.img\0" \ + "fdtfile=board.dtb\0" \ + "fdt_alt_name=juno\0" + +#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP /* ARMv8-A base model */ + +#define VEXPRESS_KERNEL_ADDR 0x80080000 +#define VEXPRESS_PXEFILE_ADDR 0x8fa00000 +#define VEXPRESS_SCRIPT_ADDR 0x8fb00000 +#define VEXPRESS_FDT_ADDR 0x8fc00000 +#define VEXPRESS_BOOT_ADDR 0x8fd00000 +#define VEXPRESS_RAMDISK_ADDR 0x8fe00000 + +#define EXTRA_ENV_NAMES \ + "kernel_name=Image\0" \ + "ramdisk_name=ramdisk.img\0" \ + "fdtfile=devtree.dtb\0" \ + "boot_name=boot.img\0" \ + "boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0" + +#define BOOTENV

#endif

+/* Default load addresses and names for the different payloads. */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \ + "ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \ + "pxefile_addr_r=" __stringify(VEXPRESS_PXEFILE_ADDR) "\0" \ + "fdt_addr_r=" __stringify(VEXPRESS_FDT_ADDR) "\0" \ + "scriptaddr=" __stringify(VEXPRESS_SCRIPT_ADDR) "\0" \ + EXTRA_ENV_NAMES \ + BOOTENV + /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_MAXARGS 64 /* max command args */

The defconfigs for the Arm Juno board and the FVP model are quite large, setting a lot of platform-fixed variables like SYS_TEXT_BASE. As those values are not really a user choice, let's provide default values for them in our Kconfig file, so a lot of cruft can be removed from the defconfig files. This also moves the driver selection out of there, since this is again not something a user should really decide on. Instead we allow users to enable or disable subsystems, and select the appropriate drivers based on that in the Kconfig file.

Signed-off-by: Andre Przywara andre.przywara@arm.com --- arch/arm/Kconfig | 4 +++ board/armltd/vexpress64/Kconfig | 41 ++++++++++++++++++++++++-- configs/vexpress_aemv8a_juno_defconfig | 21 ++----------- configs/vexpress_aemv8a_semi_defconfig | 10 ------- 4 files changed, 44 insertions(+), 32 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index afb42e62d8..a46522db9d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1243,6 +1243,10 @@ config ARCH_VEXPRESS64 select PL01X_SERIAL select OF_CONTROL select CLK + select BLK + select MTD_NOR_FLASH if MTD + select FLASH_CFI_DRIVER if MTD + select ENV_IS_IN_FLASH if MTD

config TARGET_TOTAL_COMPUTE bool "Support Total Compute Platform" diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig index 34126446a7..512bbbe72e 100644 --- a/board/armltd/vexpress64/Kconfig +++ b/board/armltd/vexpress64/Kconfig @@ -15,15 +15,24 @@ choice config TARGET_VEXPRESS64_BASE_FVP bool "Support Versatile Express ARMv8a FVP BASE model" select SEMIHOSTING + select VIRTIO_BLK if VIRTIO_MMIO + select VIRTIO_NET if VIRTIO_MMIO + select DM_ETH if VIRTIO_NET select LINUX_KERNEL_IMAGE_HEADER select POSITION_INDEPENDENT select OF_BOARD

config TARGET_VEXPRESS64_JUNO bool "Support Versatile Express Juno Development Platform" - select DM_ETH - select USB - select BLK + select PCIE_ECAM_GENERIC if PCI + select SATA_SIL + select SMC911X if DM_ETH + select SMC911X_32_BIT if SMC911X + select CMD_USB if USB + select USB_EHCI_HCD if USB + select USB_EHCI_GENERIC if USB + select USB_OHCI_HCD if USB + select USB_OHCI_GENERIC if USB imply OF_HAS_PRIOR_STAGE

endchoice @@ -38,4 +47,30 @@ config JUNO_DTB_PART config LNX_KRNL_IMG_TEXT_OFFSET_BASE default SYS_TEXT_BASE

+config SYS_TEXT_BASE + default 0x88000000 if TARGET_VEXPRESS64_BASE_FVP + default 0xe0000000 if TARGET_VEXPRESS64_JUNO + +config SYS_MALLOC_LEN + default 0x810000 if TARGET_VEXPRESS64_JUNO + default 0x840000 if TARGET_VEXPRESS64_BASE_FVP + +config SYS_MALLOC_F_LEN + default 0x2000 + +config SYS_LOAD_ADDR + default 0x90000000 + +config ENV_ADDR + default 0x0BFC0000 if TARGET_VEXPRESS64_JUNO + default 0x0FFC0000 if TARGET_VEXPRESS64_BASE_FVP + +config ENV_SIZE + default 0x10000 if TARGET_VEXPRESS64_JUNO + default 0x40000 + +config ENV_SECT_SIZE + default 0x10000 if TARGET_VEXPRESS64_JUNO + default 0x40000 + endif diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 2fcbcce308..a0d3370ae2 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -1,19 +1,13 @@ CONFIG_ARM=y CONFIG_ARCH_VEXPRESS64=y -CONFIG_SYS_TEXT_BASE=0xe0000000 -CONFIG_SYS_MALLOC_LEN=0x810000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0xff000000 -CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="juno-r2" CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_TARGET_VEXPRESS64_JUNO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y -CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlycon=pl011,0x7ff80000 debug user_debug=31 androidboot.hardware=juno loglevel=9" @@ -28,28 +22,17 @@ CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_PCI=y CONFIG_CMD_SATA=y -CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set CONFIG_CMD_CACHE=y # CONFIG_CMD_SLEEP is not set CONFIG_CMD_UBI=y -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_ENV_ADDR=0xBFC0000 -CONFIG_SATA_SIL=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SMC911X=y -CONFIG_SMC911X_32_BIT=y +CONFIG_DM_ETH=y CONFIG_PCI=y -CONFIG_PCIE_ECAM_GENERIC=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB=y diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index cbabc2f96a..3e2d076837 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -1,19 +1,13 @@ CONFIG_ARM=y # CONFIG_ARM64_CRC32 is not set CONFIG_ARCH_VEXPRESS64=y -CONFIG_SYS_TEXT_BASE=0x88000000 -CONFIG_SYS_MALLOC_LEN=0x840000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0xff000000 -CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="fvp-base-revc" CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y -CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y @@ -37,12 +31,8 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_UBI=y # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_ENV_ADDR=0xFFC0000 # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y

So far the FVP model just supports booting through semihosting, so by loading files from the host the model is running on. This allows for quick booting of new kernels (or replacing DTBs), but prevents more featureful boots like using UEFI.

Enable the distro_boot feature, and provide a list of possible boot sources that U-Boot should check: - For backwards compatibility we start with semihosting, which gets its commands migrated from CONFIG_BOOTCOMMAND into the distro_boot infrastructure. This is also slightly tweaked to fail graceful in case the required files could not be found. - Next we try to use a user provided script, that could be easily placed into memory using the model command line. - Since we gained virtio support with the enablement of OF_CONTROL, let's check virtio block devices next. This is where UEFI boot can be easily used, for instance by providing a distro installer .iso file through virtio-blk. - Networking is now provided by virtio as well, so enable the default PXE and DHCP boot flows, mostly because we can.

Signed-off-by: Andre Przywara andre.przywara@arm.com --- arch/arm/Kconfig | 1 + configs/vexpress_aemv8a_juno_defconfig | 1 - configs/vexpress_aemv8a_semi_defconfig | 5 +-- include/configs/vexpress_aemv8.h | 57 ++++++++++++++++++++++++-- 4 files changed, 55 insertions(+), 9 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a46522db9d..974555f900 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1247,6 +1247,7 @@ config ARCH_VEXPRESS64 select MTD_NOR_FLASH if MTD select FLASH_CFI_DRIVER if MTD select ENV_IS_IN_FLASH if MTD + imply DISTRO_DEFAULTS

config TARGET_TOTAL_COMPUTE bool "Support Total Compute Platform" diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index a0d3370ae2..b51f946ee1 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -6,7 +6,6 @@ CONFIG_SYS_MEMTEST_END=0xff000000 CONFIG_DEFAULT_DEVICE_TREE="juno-r2" CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_TARGET_VEXPRESS64_JUNO=y -CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 3e2d076837..abbff36de9 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -6,13 +6,11 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0xff000000 CONFIG_DEFAULT_DEVICE_TREE="fvp-base-revc" CONFIG_IDENT_STRING=" vexpress_aemv8a" -CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9" -CONFIG_BOOTCOMMAND="if smhload ${boot_name} ${boot_addr_r}; then setenv bootargs; abootimg addr ${boot_addr_r}; abootimg get dtb --index=0 fdt_addr_r; bootm ${boot_addr_r} ${boot_addr_r} ${fdt_addr_r}; else; setenv fdt_high 0xffffffffffffffff; setenv initrd_high 0xffffffffffffffff; smhload ${kernel_name} ${kernel_addr_r}; smhload ${fdtfile} ${fdt_addr_r}; smhload ${ramdisk_name} ${ramdisk_addr_r} ramdisk_end; fdt addr ${fdt_addr_r}; fdt resize; fdt chosen ${ramdisk_addr_r} ${ramdisk_end}; booti $kernel_addr_r - $fdt_addr_r; fi" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# " @@ -29,10 +27,9 @@ CONFIG_CMD_ARMFLASH=y CONFIG_CMD_CACHE=y # CONFIG_CMD_SLEEP is not set CONFIG_CMD_UBI=y -# CONFIG_ISO_PARTITION is not set -# CONFIG_EFI_PARTITION is not set # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_VIRTIO_MMIO=y diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 983d60211a..2bf0c78a56 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -140,6 +140,50 @@ "booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}\0" #define BOOTENV_DEV_NAME_AFS(devtypeu, devtypel, instance) "afs "

+/* Boot by executing a U-Boot script pre-loaded into DRAM. */ +#define BOOTENV_DEV_MEM(devtypeu, devtypel, instance) \ + "bootcmd_mem= " \ + "source ${scriptaddr}; " \ + "if test $? -eq 1; then " \ + " env import -t ${scriptaddr}; " \ + " if test -n $uenvcmd; then " \ + " echo Running uenvcmd ...; " \ + " run uenvcmd; " \ + " fi; " \ + "fi\0" +#define BOOTENV_DEV_NAME_MEM(devtypeu, devtypel, instance) "mem " + +#ifdef CONFIG_CMD_VIRTIO +#define FUNC_VIRTIO(func) func(VIRTIO, virtio, 0) +#else +#define FUNC_VIRTIO(func) +#endif + +/* + * Boot by loading an Android image, or kernel, initrd and FDT through + * semihosting into DRAM. + */ +#define BOOTENV_DEV_SMH(devtypeu, devtypel, instance) \ + "bootcmd_smh= " \ + "if smhload ${boot_name} ${boot_addr_r}; then" \ + " setenv bootargs;" \ + " abootimg addr ${boot_addr_r};" \ + " abootimg get dtb --index=0 fdt_addr_r;" \ + " bootm ${boot_addr_r} ${boot_addr_r} ${fdt_addr_r};" \ + "else" \ + " if smhload ${kernel_name} ${kernel_addr_r}; then" \ + " setenv fdt_high 0xffffffffffffffff;" \ + " setenv initrd_high 0xffffffffffffffff;" \ + " smhload ${fdtfile} ${fdt_addr_r};" \ + " smhload ${ramdisk_name} ${ramdisk_addr_r} ramdisk_end;" \ + " fdt addr ${fdt_addr_r};" \ + " fdt resize;" \ + " fdt chosen ${ramdisk_addr_r} ${ramdisk_end};" \ + " booti $kernel_addr_r - $fdt_addr_r;" \ + " fi;" \ + "fi\0" +#define BOOTENV_DEV_NAME_SMH(devtypeu, devtypel, instance) "smh " + /* Boot sources for distro boot and load addresses, per board */

#ifdef CONFIG_TARGET_VEXPRESS64_JUNO /* Arm Juno board */ @@ -152,8 +196,6 @@ func(DHCP, dhcp, na) \ func(AFS, afs, na)

-#include <config_distro_bootcmd.h> - #define VEXPRESS_KERNEL_ADDR 0x80080000 #define VEXPRESS_PXEFILE_ADDR 0x8fb00000 #define VEXPRESS_FDT_ADDR 0x8fc00000 @@ -169,6 +211,13 @@

#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP /* ARMv8-A base model */

+#define BOOT_TARGET_DEVICES(func) \ + func(SMH, smh, na) \ + func(MEM, mem, na) \ + FUNC_VIRTIO(func) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + #define VEXPRESS_KERNEL_ADDR 0x80080000 #define VEXPRESS_PXEFILE_ADDR 0x8fa00000 #define VEXPRESS_SCRIPT_ADDR 0x8fb00000 @@ -183,10 +232,10 @@ "boot_name=boot.img\0" \ "boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0"

-#define BOOTENV - #endif

+#include <config_distro_bootcmd.h> + /* Default load addresses and names for the different payloads. */ #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \