Hello,

I'm working on the port of u-boot to a custom board based on the MPC8250. I'm using a snapshot from the git repository (last date in the changelog is 7/14/07). I started with the Rattler configuration and have slowly progressed to this point (see output below). I've been stuck here for a couple days and so I thought that I would ask for advice now - hopefully, I am not missing the obvious! I have DEBUG enabled. Boot flash starts at 0xFE000000 (this is also the value of TEXT_BASE) and even though I've set CFG_FLASH_PROTECTION, the CFI code is erasing the flash over the "protected" range - that is, it starts writing at 0xFE000000. Any help would be greatly appreciated!

Anyway, here is a (hopefully) pertinent snippet from my config file:

<snip>

#define CFG_FLASH_PROTECTION 1 /* Real (hardware) sectors protection */ #define CFG_FLASH_BASE 0xFE000000 #define CFG_FLASH_CFI #define CFG_FLASH_CFI_DRIVER #define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks */ #define CFG_MAX_FLASH_SECT 32 /* max num of sects on one chip */ #define CFG_DIRECT_FLASH_TFTP

<snip>

#define CFG_MONITOR_BASE TEXT_BASE #if (CFG_MONITOR_BASE < CFG_FLASH_BASE) #define CFG_RAMBOOT #endif

#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */

#define CFG_ENV_IS_IN_FLASH

#ifdef CFG_ENV_IS_IN_FLASH #define CFG_ENV_SECT_SIZE 0x10000 #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #endif /* CFG_ENV_IS_IN_FLASH */

<snip>

**********************

And the output to the console:

MPC8250 Clock Configuration - Bus-to-Core Mult 2x, VCO Div 2, 60x Bus Freq 50-150, Core Freq 100-300 - dfbrg 1, corecnf 0x04, busdf 3, cpmdf 1, plldf 0, pllmf 1, pcidf 3 - vco_out 264000000, scc_clk 66000000, brg_clk 16500000 - cpu_clk 132000000, cpm_clk 132000000, bus_clk 66000000

CPU: MPC8250 (HiP4 Rev 14, Mask C.0 5K25A) at 132 MHz Board: Aztek CTA MPC8250. DRAM: 64 MB Top of RAM usable for U-Boot at: 04000000 Reserving 224k for U-Boot at: 03fc7000 Reserving 4160k for malloc() at: 03bb7000 Reserving 76 Bytes for Board Info at: 03bb6fb4 Reserving 72 Bytes for Global Data at: 03bb6f6c Stack Pointer at: 03bb6f48 New Stack Pointer is: 03bb6f48 Now running in RAM - U-Boot at: 03fc7000 FLASH: flash detect cfi fwc addr fe000000 cmd 0 0 8bit x 8 bit fwc addr fe000055 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr fe000010 is= 83 51 fwc addr fe000555 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr fe000010 is= 83 51 fwc addr fe000000 cmd 0 0000 16bit x 8 bit fwc addr fe0000aa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr fe000020 is= 0051 5151 fwc addr fe000aaa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr fe000020 is= 0051 5151 fwc addr fe000000 cmd 0 0000 16bit x 16 bit fwc addr fe0000aa cmd 98 0098 16bit x 16 bit is= cmd 51(Q) addr fe000020 is= 0051 0051 is= cmd 52(R) addr fe000022 is= 0052 0052 is= cmd 59(Y) addr fe000024 is= 0059 0059 ushort addr is at fe000050 info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x2 addr[2] = 0x0 addr[3] = 0x0 retval = 0x2 device interface is 2 found port 2 chip 2 port 16 bits chip 16 bits ushort addr is at fe000026 info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x2 addr[2] = 0x0 addr[3] = 0x0 retval = 0x2 fwc addr fe000000 cmd f0 00f0 16bit x 16 bit fwc addr fe000aaa cmd aa 00aa 16bit x 16 bit fwc addr fe000554 cmd 55 0055 16bit x 16 bit fwc addr fe000aaa cmd 90 0090 16bit x 16 bit fwc addr fe000000 cmd f0 00f0 16bit x 16 bit fwc addr fe0000aa cmd 98 0098 16bit x 16 bit ushort addr is at fe00002a info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x40 addr[2] = 0x0 addr[3] = 0x0 retval = 0x40 fe000020 : 00 51 00 52 00 59 00 02 00 00 00 40 00 00 00 00 .Q.R.Y.....@.... fe000030 : 00 00 00 00 00 00 00 27 00 36 00 00 00 00 00 04 .......'.6...... fe000040 : 00 00 00 0a 00 00 00 05 00 00 00 04 00 00 00 15 ................ fe000050 : 00 02 00 00 00 00 00 00 00 04 00 00 00 00 00 40 ...............@ fe000060 : 00 00 00 01 00 00 00 20 00 00 00 00 00 00 00 80 ....... ........ fe000070 : 00 00 00 1e 00 00 00 00 00 01 00 00 00 00 00 00 ................ fe000080 : 00 50 00 52 00 49 00 31 00 30 00 00 00 02 00 01 .P.R.I.1.0...... fe000090 : 00 01 00 04 00 00 00 00 00 00 00 00 00 00 00 00 ................ manufacturer is 2 manufacturer id is 0x1 device id is 0x49 device id2 is 0x0 cfi version is 0x3130 size_ratio 1 port 16 bits chip 16 bits found 4 erase regions long addr is at fe00005a info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x0 addr[2] = 0x0 addr[3] = 0x0 addr[4] = 0x0 addr[5] = 0x40 addr[6] = 0x0 addr[7] = 0x0 erase_region_count = 1 erase_region_size = 16384 long addr is at fe000062 info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x1 addr[2] = 0x0 addr[3] = 0x0 addr[4] = 0x0 addr[5] = 0x20 addr[6] = 0x0 addr[7] = 0x0 erase_region_count = 2 erase_region_size = 8192 long addr is at fe00006a info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x0 addr[2] = 0x0 addr[3] = 0x0 addr[4] = 0x0 addr[5] = 0x80 addr[6] = 0x0 addr[7] = 0x0 erase_region_count = 1 erase_region_size = 32768 long addr is at fe000072 info->portwidth = 2 addr[0] = 0x0 addr[1] = 0x1e addr[2] = 0x0 addr[3] = 0x0 addr[4] = 0x0 addr[5] = 0x0 addr[6] = 0x0 addr[7] = 0x1 erase_region_count = 31 erase_region_size = 65536

******

Thanks, Scott