[Patch v2 0/3] Enable octal read support for mt35xu* flashes
v2 version of series update dependencies of the patches and add lx2160aqds node buswidth in patch3. No dependency on patch1 and patch2. Patch3 has dependency on https://patchwork.ozlabs.org/patch/1236164/.
Patch series enable octal read(1-1-8) support for LX2160ARDB and LS1028ARDB which have mt35xu512aba and mt35xu02g flashes respectively.
mt35xu512aba and mt35xu02g flashes support SINGLE and OCTAL I/O. Previously, 1 bit mode was used in u-boot and now use octal mode for the flashes.
Patch 1 enables octal read flag for flashes in framework. Patch 2/3 adds RX,TX buswidth in qspi dts entries to use octal mode for LS1028ARDB/QDS, LX2160ARDB/QDS.
Kuldeep Singh (3): mtd: spi-nor-ids: Enable SPI_NOR_OCTAL_READ flag for mt35xu* arm: dts: ls1028a: Add RX,TX buswidth in qspi to use octal mode arm: dts: lx2160a: Add RX,TX buswidth in qspi to use octal mode
arch/arm/dts/fsl-ls1028a-qds.dts | 2 ++ arch/arm/dts/fsl-ls1028a-rdb.dts | 2 ++ arch/arm/dts/fsl-lx2160a-qds.dts | 4 ++++ arch/arm/dts/fsl-lx2160a-rdb.dts | 4 ++++ drivers/mtd/spi/spi-nor-ids.c | 4 ++-- 5 files changed, 14 insertions(+), 2 deletions(-)
Commit "658df8bd9464"(mtd: spi-nor-core: Add octal mode support) enables octal mode(1-1-8) support in spi-nor framework.
mt35xu512aba and mt35xu02g supports SINGLE and OCTAL I/O. Hence, enable SPI_NOR_OCTAL_READ flag for these flashes.
Signed-off-by: Kuldeep Singh kuldeep.singh@nxp.com --- v2: Reword commit message
drivers/mtd/spi/spi-nor-ids.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 973b6f8..334c074 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -182,8 +182,8 @@ const struct flash_info spi_nor_ids[] = { { INFO("n25q00", 0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, - { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_4B_OPCODES) }, - { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_4B_OPCODES) }, + { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ /* Spansion/Cypress -- single (large) sector size only, at least
On 11/02/20 11:59 am, Kuldeep Singh wrote:
Commit "658df8bd9464"(mtd: spi-nor-core: Add octal mode support) enables octal mode(1-1-8) support in spi-nor framework.
mt35xu512aba and mt35xu02g supports SINGLE and OCTAL I/O. Hence, enable SPI_NOR_OCTAL_READ flag for these flashes.
Signed-off-by: Kuldeep Singh kuldeep.singh@nxp.com
Reviewed-by: Vignesh Raghavendra vigneshr@ti.com
v2: Reword commit message
drivers/mtd/spi/spi-nor-ids.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 973b6f8..334c074 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -182,8 +182,8 @@ const struct flash_info spi_nor_ids[] = { { INFO("n25q00", 0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
- { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_4B_OPCODES) },
- { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_4B_OPCODES) },
- { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
- { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
#endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ /* Spansion/Cypress -- single (large) sector size only, at least
Signed-off-by: Kuldeep Singh kuldeep.singh@nxp.com --- v2: No change
arch/arm/dts/fsl-ls1028a-qds.dts | 2 ++ arch/arm/dts/fsl-ls1028a-rdb.dts | 2 ++ 2 files changed, 4 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1028a-qds.dts b/arch/arm/dts/fsl-ls1028a-qds.dts index 3fd37be..029a8e3 100644 --- a/arch/arm/dts/fsl-ls1028a-qds.dts +++ b/arch/arm/dts/fsl-ls1028a-qds.dts @@ -49,6 +49,8 @@ compatible = "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <0>; + spi-rx-bus-width = <8>; + spi-tx-bus-width = <1>; }; };
diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts index a8f4085..85b4815 100644 --- a/arch/arm/dts/fsl-ls1028a-rdb.dts +++ b/arch/arm/dts/fsl-ls1028a-rdb.dts @@ -48,6 +48,8 @@ compatible = "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <0>; + spi-rx-bus-width = <8>; + spi-tx-bus-width = <1>; }; };
Signed-off-by: Kuldeep Singh kuldeep.singh@nxp.com --- Depends on https://patchwork.ozlabs.org/patch/1236164/ v2: -Add lx2160qds buswidth -Update dependencies
arch/arm/dts/fsl-lx2160a-qds.dts | 4 ++++ arch/arm/dts/fsl-lx2160a-rdb.dts | 4 ++++ 2 files changed, 8 insertions(+)
diff --git a/arch/arm/dts/fsl-lx2160a-qds.dts b/arch/arm/dts/fsl-lx2160a-qds.dts index cffefae..b29af20 100644 --- a/arch/arm/dts/fsl-lx2160a-qds.dts +++ b/arch/arm/dts/fsl-lx2160a-qds.dts @@ -36,6 +36,8 @@ compatible = "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <0>; + spi-rx-bus-width = <8>; + spi-tx-bus-width = <1>; };
mt35xu512aba1: flash@1 { @@ -44,6 +46,8 @@ compatible = "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <1>; + spi-rx-bus-width = <8>; + spi-tx-bus-width = <1>; }; };
diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts index e542c69..87617ca 100644 --- a/arch/arm/dts/fsl-lx2160a-rdb.dts +++ b/arch/arm/dts/fsl-lx2160a-rdb.dts @@ -39,6 +39,8 @@ compatible = "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <0>; + spi-rx-bus-width = <8>; + spi-tx-bus-width = <1>; };
mt35xu512aba1: flash@1 { @@ -47,6 +49,8 @@ compatible = "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <1>; + spi-rx-bus-width = <8>; + spi-tx-bus-width = <1>; }; };
participants (2)
-
Kuldeep Singh -
Vignesh Raghavendra