[U-Boot] [PATCH 0/4] ARM: uniphier: refactor and fix UniPhier outer cache
Masahiro Yamada (4): ARM: uniphier: refactor outer cache operation slightly ARM: uniphier: factor out outer cache sync as a helper function ARM: uniphier: fix range invalidate for outer cache ARM: uniphier: set active ways to really enable outer cache
arch/arm/mach-uniphier/cache_uniphier.c | 43 ++++++++++++++++++++++++++++----- 1 file changed, 37 insertions(+), 6 deletions(-)
Improve readability without changing the behavior.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/mach-uniphier/cache_uniphier.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-uniphier/cache_uniphier.c b/arch/arm/mach-uniphier/cache_uniphier.c index b4ca8b6..4a79966 100644 --- a/arch/arm/mach-uniphier/cache_uniphier.c +++ b/arch/arm/mach-uniphier/cache_uniphier.c @@ -67,7 +67,9 @@ static void uniphier_cache_maint_range(u32 start, u32 end, u32 operation) */ start = start & ~(SSC_LINE_SIZE - 1);
- if (start == 0 && end >= (u32)(-SSC_LINE_SIZE)) { + size = end - start; + + if (unlikely(size >= (u32)(-SSC_LINE_SIZE))) { /* this means cache operation for all range */ uniphier_cache_maint_all(operation); return; @@ -77,7 +79,7 @@ static void uniphier_cache_maint_range(u32 start, u32 end, u32 operation) * If end address is not aligned to cache-line, * do cache operation for the last cache-line */ - size = (end - start + SSC_LINE_SIZE - 1) & ~(SSC_LINE_SIZE - 1); + size = ALIGN(size, SSC_LINE_SIZE);
while (size) { u32 chunk_size = size > SSC_RANGE_OP_MAX_SIZE ?
Avoid repeating the same code.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/mach-uniphier/cache_uniphier.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-uniphier/cache_uniphier.c b/arch/arm/mach-uniphier/cache_uniphier.c index 4a79966..6c77316 100644 --- a/arch/arm/mach-uniphier/cache_uniphier.c +++ b/arch/arm/mach-uniphier/cache_uniphier.c @@ -11,6 +11,12 @@ #include "ssc-regs.h"
#ifdef CONFIG_UNIPHIER_L2CACHE_ON +static void uniphier_cache_sync(void) +{ + writel(SSCOPE_CM_SYNC, SSCOPE); /* drain internal buffers */ + readl(SSCOPE); /* need a read back to confirm */ +} + static void uniphier_cache_maint_all(u32 operation) { /* try until the command is successfully set */ @@ -25,8 +31,7 @@ static void uniphier_cache_maint_all(u32 operation) /* clear the complete notification flag */ writel(SSCOLPQS_EF, SSCOLPQS);
- writel(SSCOPE_CM_SYNC, SSCOPE); /* drain internal buffers */ - readl(SSCOPE); /* need a read back to confirm */ + uniphier_cache_sync(); }
void v7_outer_cache_flush_all(void) @@ -90,8 +95,7 @@ static void uniphier_cache_maint_range(u32 start, u32 end, u32 operation) size -= chunk_size; }
- writel(SSCOPE_CM_SYNC, SSCOPE); /* drain internal buffers */ - readl(SSCOPE); /* need a read back to confirm */ + uniphier_cache_sync(); }
void v7_outer_cache_flush_range(u32 start, u32 end)
If invalidate operation is invoked against a cache-unaliged region, the both ends of the region should be flushed, not invalidated.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/mach-uniphier/cache_uniphier.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
diff --git a/arch/arm/mach-uniphier/cache_uniphier.c b/arch/arm/mach-uniphier/cache_uniphier.c index 6c77316..8435a33 100644 --- a/arch/arm/mach-uniphier/cache_uniphier.c +++ b/arch/arm/mach-uniphier/cache_uniphier.c @@ -105,6 +105,29 @@ void v7_outer_cache_flush_range(u32 start, u32 end)
void v7_outer_cache_inval_range(u32 start, u32 end) { + if (start & (SSC_LINE_SIZE - 1)) { + start &= ~(SSC_LINE_SIZE - 1); + __uniphier_cache_maint_range(start, SSC_LINE_SIZE, + SSCOQM_CM_WB_INV); + start += SSC_LINE_SIZE; + } + + if (start >= end) { + uniphier_cache_sync(); + return; + } + + if (end & (SSC_LINE_SIZE - 1)) { + end &= ~(SSC_LINE_SIZE - 1); + __uniphier_cache_maint_range(end, SSC_LINE_SIZE, + SSCOQM_CM_WB_INV); + } + + if (start >= end) { + uniphier_cache_sync(); + return; + } + uniphier_cache_maint_range(start, end, SSCOQM_CM_INV); }
Each way must be unlocked to make it effective.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/mach-uniphier/cache_uniphier.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-uniphier/cache_uniphier.c b/arch/arm/mach-uniphier/cache_uniphier.c index 8435a33..4398114 100644 --- a/arch/arm/mach-uniphier/cache_uniphier.c +++ b/arch/arm/mach-uniphier/cache_uniphier.c @@ -134,6 +134,8 @@ void v7_outer_cache_inval_range(u32 start, u32 end) void v7_outer_cache_enable(void) { u32 tmp; + + writel(U32_MAX, SSCLPDAWCR); /* activate all ways */ tmp = readl(SSCC); tmp |= SSCC_ON; writel(tmp, SSCC);
2016-01-17 10:13 GMT+09:00 Masahiro Yamada yamada.masahiro@socionext.com:
Masahiro Yamada (4): ARM: uniphier: refactor outer cache operation slightly ARM: uniphier: factor out outer cache sync as a helper function ARM: uniphier: fix range invalidate for outer cache ARM: uniphier: set active ways to really enable outer cache
arch/arm/mach-uniphier/cache_uniphier.c | 43 ++++++++++++++++++++++++++++----- 1 file changed, 37 insertions(+), 6 deletions(-)
Applied to u-boot-uniphier/master.
participants (1)
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Masahiro Yamada