U-Boot 2020.01-rc4 - PCI support missing on Trimslice Pro

Hello
I've built U-Boot 2020.01-rc4 and found that the PCI bus isn't recognised on my Trimslice Pro. This is using the 'trimslice' default U-Boot configuration file ('make trimslice_config')
I tried 2019.04 and a couple of other older versions, just in case - but nothing recent works.
Is there anything I can do to debug this? The configuration file looks okay, in that the Tegra PCI support is selected.
Thanks s.
U-Boot 2020.01-rc4 (Dec 06 2019 - 14:08:52 +0000)
SoC: tegra20 Model: Compulab TrimSlice board Board: Compulab Trimslice DRAM: 1 GiB MMC: sdhci@c8000000: 1, sdhci@c8000600: 0 Loading Environment from SPI Flash... SF: Detected w25q80bl with page size 256 Bytes, erase size 4 KiB, total 1 MiB *** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 Tegra20 (TrimSlice) # Tegra20 (TrimSlice) # pci No such bus Tegra20 (TrimSlice) #
Compare with the U-Boot from the vendor (Compulab):
U-Boot 2012.04.01-1.02 (Feb 11 2013 - 16:11:37)
TEGRA2 Board: Compulab Trimslice DRAM: 1 GiB MMC: Tegra2 SD/MMC: 0, Tegra2 SD/MMC: 1 SF: Detected W25Q80BL with page size 4 KiB, total 1 MiB In: serial Out: serial Err: serial Net: PCI device RTL8169#0: unknown chip version, assuming RTL-8169 PCI device: TxConfig = 0x2B1000C0 RTL8169#0 Hit any key to stop autoboot: 0 Tegra2 (TrimSlice) # Tegra2 (TrimSlice) # pci Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x10de 0x0bf0 Bridge device 0x04 Tegra2 (TrimSlice) #

On Fri, Dec 06, 2019 at 02:21:19PM +0000, Stuart Winter wrote:
Hello
I've built U-Boot 2020.01-rc4 and found that the PCI bus isn't recognised on my Trimslice Pro. This is using the 'trimslice' default U-Boot configuration file ('make trimslice_config')
I tried 2019.04 and a couple of other older versions, just in case - but nothing recent works.
Is there anything I can do to debug this? The configuration file looks okay, in that the Tegra PCI support is selected.
Can you run a 'git bisect' to narrow down what commit broke things? Thanks!
participants (2)
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Stuart Winter
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Tom Rini