[U-Boot] [PATCH 1/8 V2] add at91 SoC access with c structures
* prepare board config files for Soc access update
Signed-off-by: Jens Scharsig js_at_ng@scharsoft.de --- include/configs/afeb9260.h | 4 ++ include/configs/at91cap9adk.h | 4 ++ include/configs/at91rm9200dk.h | 13 ++++- include/configs/at91rm9200ek.h | 11 ++++- include/configs/at91sam9260ek.h | 5 ++ include/configs/at91sam9261ek.h | 5 ++ include/configs/at91sam9263ek.h | 83 ++++++++++++++++++------------------ include/configs/at91sam9m10g45ek.h | 6 +++ include/configs/at91sam9rlek.h | 5 ++ include/configs/cmc_pu2.h | 10 ++++- include/configs/cpu9260.h | 4 ++ include/configs/cpuat91.h | 2 + include/configs/csb637.h | 10 ++++- include/configs/kb9202.h | 10 ++++- include/configs/m501sk.h | 11 ++++- include/configs/meesc.h | 5 ++ include/configs/mp2usb.h | 10 ++++- include/configs/pm9261.h | 7 +++ include/configs/pm9263.h | 5 ++ include/configs/sbc35_a9g20.h | 4 ++ include/configs/tny_a9260.h | 4 ++ 21 files changed, 166 insertions(+), 52 deletions(-)
diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 58b8c8c..ddd5f52 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -26,6 +26,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ #define CONFIG_SYS_HZ 1000 @@ -45,6 +47,7 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 #define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 @@ -107,6 +110,7 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif
/* NOR flash - no real flash on this board */ diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 322718f..7679a09 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -27,6 +27,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ #define CONFIG_SYS_HZ 1000 @@ -47,6 +49,7 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 #define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 @@ -131,6 +134,7 @@ #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif
/* Ethernet */ diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 590c69a..7480e25 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -25,6 +25,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */ #define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */ @@ -113,8 +115,6 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII
-#include <asm/arch/AT91RM9200.h> /* needed for port definitions */ - #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */ @@ -122,7 +122,14 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
-#define CONFIG_DRIVER_ETHER +#define CONFIG_NET_MULTI 1 +#ifdef CONFIG_NET_MULTI +#define CONFIG_DRIVER_AT91EMAC 1 +#define CONFIG_SYS_RX_ETH_BUFFER 8 +#else +#define CONFIG_DRIVER_ETHER 1 +#endif + #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_AT91C_USE_RMII
diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index b4f075e..5b4175f 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -26,6 +26,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ /* * from 18.432 MHz crystal @@ -135,7 +137,6 @@ #undef CONFIG_CMD_MISC #undef CONFIG_CMD_LOADS
-#include <asm/arch/AT91RM9200.h> /* needed for port definitions */ /* Options for MMC/SD Card */ #define CONFIG_DOS_PARTITION 1 #undef CONFIG_MMC @@ -145,7 +146,13 @@ /* * Network Driver Setting */ -#define CONFIG_DRIVER_ETHER +#define CONFIG_NET_MULTI 1 +#ifdef CONFIG_NET_MULTI +#define CONFIG_DRIVER_AT91EMAC 1 +#define CONFIG_SYS_RX_ETH_BUFFER 8 +#else +#define CONFIG_DRIVER_ETHER 1 +#endif #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_AT91C_USE_RMII
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 0509011..4c3b0a2 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -27,6 +27,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ #define CONFIG_SYS_HZ 1000 @@ -52,6 +54,8 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 + #define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 @@ -123,6 +127,7 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif
/* NOR flash - no real flash on this board */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index fbf7389..066f256 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -27,6 +27,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ #define CONFIG_SYS_HZ 1000 @@ -50,6 +52,8 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 + #define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 @@ -133,6 +137,7 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif
/* NOR flash - no real flash on this board */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 571351c..68e8310 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -49,6 +49,8 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 + #define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 @@ -69,9 +71,9 @@
/* LED */ #define CONFIG_AT91_LED -#define CONFIG_RED_LED AT91_PIN_PB7 /* this is the power led */ -#define CONFIG_GREEN_LED AT91_PIN_PB8 /* this is the user1 led */ -#define CONFIG_YELLOW_LED AT91_PIN_PC29 /* this is the user2 led */ +#define CONFIG_RED_LED AT91_PORTPIN(B, 7) /* the power led */ +#define CONFIG_GREEN_LED AT91_PORTPIN(B, 8) /* the user1 led */ +#define CONFIG_YELLOW_LED AT91_PORTPIN(C, 29) /* the user2 led */
#define CONFIG_BOOTDELAY 3
@@ -147,39 +149,36 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define MASTER_PLL_MUL 171 #define MASTER_PLL_DIV 14 +#define MASTER_PLL_OUT 3
/* clocks */ #define CONFIG_SYS_MOR_VAL \ - (AT91_PMC_MOSCEN | \ - (255 << 8)) /* Main Oscillator Start-up Time */ -#define CONFIG_SYS_PLLAR_VAL \ - (AT91_PMC_PLLA_WR_ERRATA | /* Bit 29 must be 1 when prog */ \ - AT91_PMC_OUT | \ - AT91_PMC_PLLCOUNT | /* PLL Counter */ \ - (2 << 28) | /* PLL Clock Frequency Range */ \ - ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV)) + (AT91_PMC_MOR_MOSCEN | AT91_PMC_MOR_OSCOUNT(255)) +#define CONFIG_SYS_PLLAR_VAL \ + (AT91_PMC_PLLAR_29 | \ + AT91_PMC_PLLxR_OUT(MASTER_PLL_OUT) | \ + AT91_PMC_PLLxR_PLLCOUNT(63) | \ + AT91_PMC_PLLxR_MUL(MASTER_PLL_MUL - 1) | \ + AT91_PMC_PLLxR_DIV(MASTER_PLL_DIV))
/* PCK/2 = MCK Master Clock from PLLA */ #define CONFIG_SYS_MCKR1_VAL \ - (AT91_PMC_CSS_SLOW | \ - AT91_PMC_PRES_1 | \ - AT91SAM9_PMC_MDIV_2 | \ - AT91_PMC_PDIV_1) + (AT91_PMC_MCKR_CSS_SLOW | AT91_PMC_MCKR_PRES_1 | \ + AT91_PMC_MCKR_MDIV_2) + /* PCK/2 = MCK Master Clock from PLLA */ #define CONFIG_SYS_MCKR2_VAL \ - (AT91_PMC_CSS_PLLA | \ - AT91_PMC_PRES_1 | \ - AT91SAM9_PMC_MDIV_2 | \ - AT91_PMC_PDIV_1) + (AT91_PMC_MCKR_CSS_PLLA | AT91_PMC_MCKR_PRES_1 | \ + AT91_PMC_MCKR_MDIV_2)
/* define PDC[31:16] as DATA[31:16] */ #define CONFIG_SYS_PIOD_PDR_VAL1 0xFFFF0000 /* no pull-up for D[31:16] */ #define CONFIG_SYS_PIOD_PPUDR_VAL 0xFFFF0000 /* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */ -#define CONFIG_SYS_MATRIX_EBI0CSA_VAL \ - (AT91_MATRIX_EBI0_DBPUC | AT91_MATRIX_EBI0_VDDIOMSEL_3_3V | \ - AT91_MATRIX_EBI0_CS1A_SDRAMC) +#define CONFIG_SYS_MATRIX_EBICSA_VAL \ + (AT91_MATRIX_CSA_DBPUC | AT91_MATRIX_CSA_VDDIOMSEL_3_3V | \ + AT91_MATRIX_CSA_EBI_CS1A)
/* SDRAM */ /* SDRAMC_MR Mode register */ @@ -221,33 +220,32 @@ #define CONFIG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */
/* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ -#define CONFIG_SYS_SMC0_SETUP0_VAL \ - (AT91_SMC_NWESETUP_(10) | AT91_SMC_NCS_WRSETUP_(10) | \ - AT91_SMC_NRDSETUP_(10) | AT91_SMC_NCS_RDSETUP_(10)) -#define CONFIG_SYS_SMC0_PULSE0_VAL \ - (AT91_SMC_NWEPULSE_(11) | AT91_SMC_NCS_WRPULSE_(11) | \ - AT91_SMC_NRDPULSE_(11) | AT91_SMC_NCS_RDPULSE_(11)) +#define CONFIG_SYS_SMC0_SETUP0_VAL \ + (AT91_SMC_SETUP_NWE(10) | AT91_SMC_SETUP_NCS_WR(10) | \ + AT91_SMC_SETUP_NRD(10) | AT91_SMC_SETUP_NCS_RD(10)) +#define CONFIG_SYS_SMC0_PULSE0_VAL \ + (AT91_SMC_PULSE_NWE(11) | AT91_SMC_PULSE_NCS_WR(11) | \ + AT91_SMC_PULSE_NRD(11) | AT91_SMC_PULSE_NCS_RD(11)) #define CONFIG_SYS_SMC0_CYCLE0_VAL \ - (AT91_SMC_NWECYCLE_(22) | AT91_SMC_NRDCYCLE_(22)) + (AT91_SMC_CYCLE_NWE(22) | AT91_SMC_CYCLE_NRD(22)) #define CONFIG_SYS_SMC0_MODE0_VAL \ - (AT91_SMC_READMODE | AT91_SMC_WRITEMODE | \ - AT91_SMC_DBW_16 | \ - AT91_SMC_TDFMODE | \ - AT91_SMC_TDF_(6)) + (AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | \ + AT91_SMC_MODE_DBW_16 | \ + AT91_SMC_MODE_TDF | AT91_SMC_MODE_TDF_CYCLE(6))
/* user reset enable */ #define CONFIG_SYS_RSTC_RMR_VAL \ (AT91_RSTC_KEY | \ - AT91_RSTC_PROCRST | \ - AT91_RSTC_RSTTYP_WAKEUP | \ - AT91_RSTC_RSTTYP_WATCHDOG) + AT91_RSTC_MR_URSTEN | \ + AT91_RSTC_MR_ERSTL(15))
/* Disable Watchdog */ #define CONFIG_SYS_WDTC_WDMR_VAL \ - (AT91_WDT_WDIDLEHLT | AT91_WDT_WDDBGHLT | \ - AT91_WDT_WDV | \ - AT91_WDT_WDDIS | \ - AT91_WDT_WDD) + (AT91_WDT_MR_WDIDLEHLT | AT91_WDT_MR_WDDBGHLT | \ + AT91_WDT_MR_WDV(0xfff) | \ + AT91_WDT_MR_WDDIS | \ + AT91_WDT_MR_WDD(0xfff)) + #endif
#else @@ -264,9 +262,10 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PORTPIN(D, 15) +#define CONFIG_SYS_NAND_READY_PIN AT91_PORTPIN(A, 22)
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif
/* Ethernet */ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 06184e7..cc1bf9a 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -27,6 +27,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ #define CONFIG_SYS_HZ 1000 @@ -50,6 +52,8 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 + #define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 @@ -118,6 +122,7 @@ /* NOR flash, if populated */ #ifndef CONFIG_CMD_NAND #define CONFIG_SYS_NO_FLASH 1 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #else #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 @@ -141,6 +146,7 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif
/* Ethernet */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 6fad75d..62e760f 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -27,6 +27,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ #define CONFIG_SYS_HZ 1000 @@ -47,6 +49,8 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 + #define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 @@ -119,6 +123,7 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif
/* Ethernet - not present */ diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h index be478b2..ffe83f0 100644 --- a/include/configs/cmc_pu2.h +++ b/include/configs/cmc_pu2.h @@ -25,6 +25,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */ #define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK/3) /* peripheral clock */ @@ -152,7 +154,13 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
-#define CONFIG_DRIVER_ETHER +#define CONFIG_NET_MULTI 1 +#ifdef CONFIG_NET_MULTI +#define CONFIG_DRIVER_AT91EMAC 1 +#define CONFIG_SYS_RX_ETH_BUFFER 8 +#else +#define CONFIG_DRIVER_ETHER 1 +#endif #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_AT91C_USE_RMII
diff --git a/include/configs/cpu9260.h b/include/configs/cpu9260.h index 4ef8566..50e31ff 100644 --- a/include/configs/cpu9260.h +++ b/include/configs/cpu9260.h @@ -31,6 +31,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + #define CONFIG_DISPLAY_CPUINFO 1
#define AT91_MAIN_CLOCK 18432000 @@ -242,6 +244,8 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 + #define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 diff --git a/include/configs/cpuat91.h b/include/configs/cpuat91.h index 8746f70..9f0ac03 100644 --- a/include/configs/cpuat91.h +++ b/include/configs/cpuat91.h @@ -26,6 +26,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + #ifdef CONFIG_CPUAT91_RAM #define CONFIG_SKIP_LOWLEVEL_INIT 1 #define CONFIG_SKIP_RELOCATE_UBOOT 1 diff --git a/include/configs/csb637.h b/include/configs/csb637.h index f4fd808..efa2780 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -26,6 +26,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91C_MAIN_CLOCK 184320000 /* from 3.6864 MHz crystal (3686400 * 50) */ #define AT91C_MASTER_CLOCK 46080000 /* (AT91C_MAIN_CLOCK/4) peripheral clock */ @@ -126,7 +128,13 @@ #define CONFIG_SYS_ALT_MEMTEST 1 #define CONFIG_SYS_MEMTEST_SCRATCH CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 4
-#define CONFIG_DRIVER_ETHER +#define CONFIG_NET_MULTI 1 +#ifdef CONFIG_NET_MULTI +#define CONFIG_DRIVER_AT91EMAC 1 +#define CONFIG_SYS_RX_ETH_BUFFER 8 +#else +#define CONFIG_DRIVER_ETHER 1 +#endif #define CONFIG_NET_RETRY_COUNT 20 #undef CONFIG_AT91C_USE_RMII
diff --git a/include/configs/kb9202.h b/include/configs/kb9202.h index 7dd81e6..41ec1d5 100644 --- a/include/configs/kb9202.h +++ b/include/configs/kb9202.h @@ -29,6 +29,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91C_MAIN_CLOCK 180000000 /* from 10 MHz crystal */ #define AT91C_MASTER_CLOCK 60000000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */ @@ -115,7 +117,13 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - (512*1024)
-#define CONFIG_DRIVER_ETHER +#define CONFIG_NET_MULTI 1 +#ifdef CONFIG_NET_MULTI +#define CONFIG_DRIVER_AT91EMAC 1 +#define CONFIG_SYS_RX_ETH_BUFFER 8 +#else +#define CONFIG_DRIVER_ETHER 1 +#endif #define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_SYS_FLASH_BASE 0x10000000 diff --git a/include/configs/m501sk.h b/include/configs/m501sk.h index 5c06642..26c2bcb 100644 --- a/include/configs/m501sk.h +++ b/include/configs/m501sk.h @@ -27,6 +27,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ /* from 18.432 MHz crystal (18432000 / 4 * 39) */ #define AT91C_MAIN_CLOCK 179712000 @@ -34,6 +36,7 @@ #define AT91C_MASTER_CLOCK 59904000 #define AT91_SLOW_CLOCK 32768 /* slow clock */
+#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ #define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -166,7 +169,13 @@ /* CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144 */ #define CONFIG_SYS_MEMTEST_END 0x00100000
-#define CONFIG_DRIVER_ETHER +#define CONFIG_NET_MULTI 1 +#ifdef CONFIG_NET_MULTI +#define CONFIG_DRIVER_AT91EMAC 1 +#define CONFIG_SYS_RX_ETH_BUFFER 8 +#else +#define CONFIG_DRIVER_ETHER 1 +#endif #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_AT91C_USE_RMII
diff --git a/include/configs/meesc.h b/include/configs/meesc.h index ab5cbca..621b606 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -31,6 +31,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* Common stuff */ #define CONFIG_SYS_HZ 1000 /* decrementer freq */ #define CONFIG_MEESC 1 /* Board is esd MEESC */ @@ -56,6 +58,8 @@ */
/* Console output */ +#define CONFIG_AT91_GPIO 1 + #define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 @@ -121,6 +125,7 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif
/* Ethernet */ diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index 0c2ee60..3138b49 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -28,6 +28,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 45) */ #define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK/3) /* peripheral clock */ @@ -181,7 +183,13 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
-#define CONFIG_DRIVER_ETHER +#define CONFIG_NET_MULTI 1 +#ifdef CONFIG_NET_MULTI +#define CONFIG_DRIVER_AT91EMAC 1 +#define CONFIG_SYS_RX_ETH_BUFFER 8 +#else +#define CONFIG_DRIVER_ETHER 1 +#endif #define CONFIG_NET_RETRY_COUNT 20 #undef CONFIG_AT91C_USE_RMII
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 399d15f..65bc920 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -28,6 +28,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91SAM9261"
@@ -157,6 +159,8 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 + #define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 @@ -236,6 +240,9 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA16
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + + /* NOR flash */ #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 0af1280..b44c713 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -28,6 +28,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + /* ARM asynchronous clock */ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO @@ -171,6 +173,8 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 + #define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 @@ -259,6 +263,7 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PB30
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif
#define CONFIG_CMD_JFFS2 1 diff --git a/include/configs/sbc35_a9g20.h b/include/configs/sbc35_a9g20.h index f4b3477..3f0723f 100644 --- a/include/configs/sbc35_a9g20.h +++ b/include/configs/sbc35_a9g20.h @@ -26,6 +26,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + #if defined(CONFIG_SBC35_A9G20_NANDFLASH) || defined(CONFIG_SBC35_A9G20_EEPROM) #define CONFIG_SBC35_A9G20 #endif @@ -57,6 +59,8 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 + #define CONFIG_ATMEL_USART #define CONFIG_USART0 #undef CONFIG_USART1 diff --git a/include/configs/tny_a9260.h b/include/configs/tny_a9260.h index 4ad081b..466d27b 100644 --- a/include/configs/tny_a9260.h +++ b/include/configs/tny_a9260.h @@ -30,6 +30,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY + #if defined(CONFIG_TNY_A9260_NANDFLASH) || defined(CONFIG_TNY_A9260_EEPROM) #define CONFIG_TNY_A9260 #elif defined(CONFIG_TNY_A9G20_NANDFLASH) || defined(CONFIG_TNY_A9G20_EEPROM) @@ -66,6 +68,8 @@ /* * Hardware drivers */ +#define CONFIG_AT91_GPIO 1 + #define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1
Jens Scharsig wrote:
- prepare board config files for Soc access update
This review was cut short. The review of this and patch #2 are fairly complete.
run kernel checkpatch.pl against the patches you submit. In general errors must be fixed. Warnings should be fixed, if appropriate.
There should also be no warnings/errors when git -am is used on the patches.
The names of the patches should match what the patch is doing Every patch is named the same but there is much more going on in this patch set than just that. It may be appropriate to split this patchset up.
This patch is not bisectable. There are config setting changes that do not happen until later in the patch set. It would seem like the first patch would only set the CONFIG_LEGACY_AT91. Mixed in are config setting for gpio, nand, led and eth.
For large structural changes, the changes must be described in detail in the commit log.
<snip>
diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 58b8c8c..ddd5f52 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -26,6 +26,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_AT91_LEGACY
The meaning of this should be described in detail in the commit log. so other at91 developers can understand how to migrate or what happened to their board
/* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ #define CONFIG_SYS_HZ 1000 @@ -45,6 +47,7 @@ /*
- Hardware drivers
*/ +#define CONFIG_AT91_GPIO 1
This is not used until patch 5/8 where new gpio functions are defined Move this to that patch or later
#define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 @@ -107,6 +110,7 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
This is a fix for a nand warning. It an ok fix but belongs in its own patch
#endif
<snip>
#define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */ @@ -122,7 +122,14 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
-#define CONFIG_DRIVER_ETHER
This is an ethernet change that doesn't happen until patch 7
+#define CONFIG_NET_MULTI 1 +#ifdef CONFIG_NET_MULTI +#define CONFIG_DRIVER_AT91EMAC 1
<snip>
#define CONFIG_ATMEL_USART 1 #undef CONFIG_USART0 #undef CONFIG_USART1 @@ -69,9 +71,9 @@
/* LED */ #define CONFIG_AT91_LED -#define CONFIG_RED_LED AT91_PIN_PB7 /* this is the power led */ -#define CONFIG_GREEN_LED AT91_PIN_PB8 /* this is the user1 led */ -#define CONFIG_YELLOW_LED AT91_PIN_PC29 /* this is the user2 led */ +#define CONFIG_RED_LED AT91_PORTPIN(B, 7) /* the power led */ +#define CONFIG_GREEN_LED AT91_PORTPIN(B, 8) /* the user1 led */ +#define CONFIG_YELLOW_LED AT91_PORTPIN(C, 29) /* the user2 led */
AT91_PORTPIN is not defined until patch 5/8 - part 2/3
#define CONFIG_BOOTDELAY 3
@@ -147,39 +149,36 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define MASTER_PLL_MUL 171 #define MASTER_PLL_DIV 14 +#define MASTER_PLL_OUT 3
Why is this needed ?
Tom
Jens Scharsig wrote:
Please look at
http://lists.denx.de/pipermail/u-boot/2009-December/065688.html
<link included>
on request by Wolfgang, I have try to implement SoC access for AT91 arch with c structures. Additional I have add support for AT91RM9200 in at91 tree. I need to switch to a different project for more than half a year. So I think, it's time to publish the result.
What this Patch set do:
* add's the new temporary CONFIG_AT91_LEGACY to all board configs that not converted by this patch * add's a warning to all files, that not converted by this patch * add's the support for AT91RM9200 in at91 tree * add's c stucture SoC defines * convert all files cpu/../at91 to use c stucture SoC access * move the at gpio access to a real driver * add's at91_emac (AT91RM9200) network driver (NET_MULTI) * add's a new board (eb_cpux9k2) which demonstrates, how to use boards with AT91RM9200 cpu in at91 arch tree * convert following board: at91sam9263ek
</link included>
This is a concatenation of all the patches long commit logs. It is a good starting point. With a change of this size and when it is expected for others to carry on the work, more detail is needed.
It should be clear from the name of the patch, as appears in the subject line or short commit log, what the patch is trying to do. Then all the changes related to that patch should be contained in that one commit.
For example. It is unclear without looking closely at the patch that 7/8 is a network patch or 8/8 is a board patch.
By bisectable, i mean that early patches do not depend on later patches. It should be possible to just apply patch 1 without applying any of the other patch.
Patch 1 looks like is contains the union of all the config file changes. What it should have contained was only 1 change adding CONFIG_AT91_LEGACY. Fixing this will mean separating this changes into their logical parts and rebasing the patchset to include then in the correct order. This is a task best done as you develop instead of after the fact. This is why i recommended that it may be easier to break this patchset into multiple pieces and submit them separately.
Tom
for Patchset details _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Am 2010-01-17 19:25, schrieb Tom:
By bisectable, i mean that early patches do not depend on later patches. It should be possible to just apply patch 1 without applying any of the other patch.
This is my current problem. I underestimated the extent of the changes, when I started. Secondly, I am not very familiar with git. So I just tried to use individual commits for splitting the patch.
I will try rebase/restucture the patchset, but give me a lot of time.
Jens
Hello Tom,
By bisectable, i mean that early patches do not depend on later patches. It should be possible to just apply patch 1 without applying any of the other patch.
Patch 1 looks like is contains the union of all the config file changes. What it should have contained was only 1 change adding CONFIG_AT91_LEGACY. Fixing this will mean separating this changes into their logical parts and rebasing the patchset to include then in the correct order. This is a task best done as you develop instead of after the fact. This is why i recommended that it may be easier to break this patchset into multiple pieces and submit them separately.
I have fully restructured the patch. I will send this as V3 within the next hour. The Parts are now only depended from 9 to 1, but independed from 1 to 9.
regards
Jens
participants (2)
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Jens Scharsig -
Tom