[U-Boot] [PATCH] bootm: Simplying cache flush code

The cache flush of the kernel load area needs to be aligned outward to the DMA cache alignment. The operations are simpler if we think of this as aligning the start down, ALIGN_DOWN(load, ARCH_DMA_MINALIGN), and aligning the end up, ALIGN(load_end, ARCH_DMA_MINALIGN), and then find the length of the flushed region by subtracting the former from the latter.
Cc: Tom Rini trini@konsulko.com Cc: Simon Glass sjg@chromium.org Cc: Bryan O'Donoghue bryan.odonoghue@linaro.org Signed-off-by: Trent Piepho tpiepho@impinj.com --- common/bootm.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/common/bootm.c b/common/bootm.c index 8bf84ebcb7..8af8efd169 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -453,7 +453,6 @@ static int bootm_load_os(bootm_headers_t *images, int boot_progress) ulong image_start = os.image_start; ulong image_len = os.image_len; ulong flush_start = ALIGN_DOWN(load, ARCH_DMA_MINALIGN); - ulong flush_len; bool no_overlap; void *load_buf, *image_buf; int err; @@ -468,11 +467,7 @@ static int bootm_load_os(bootm_headers_t *images, int boot_progress) return err; }
- flush_len = load_end - load; - if (flush_start < load) - flush_len += load - flush_start; - - flush_cache(flush_start, ALIGN(flush_len, ARCH_DMA_MINALIGN)); + flush_cache(flush_start, ALIGN(load_end, ARCH_DMA_MINALIGN) - flush_start);
debug(" kernel loaded at 0x%08lx, end = 0x%08lx\n", load, load_end); bootstage_mark(BOOTSTAGE_ID_KERNEL_LOADED);

On Wed, 27 Mar 2019 at 17:50, Trent Piepho tpiepho@impinj.com wrote:
The cache flush of the kernel load area needs to be aligned outward to the DMA cache alignment. The operations are simpler if we think of this as aligning the start down, ALIGN_DOWN(load, ARCH_DMA_MINALIGN), and aligning the end up, ALIGN(load_end, ARCH_DMA_MINALIGN), and then find the length of the flushed region by subtracting the former from the latter.
Cc: Tom Rini trini@konsulko.com Cc: Simon Glass sjg@chromium.org Cc: Bryan O'Donoghue bryan.odonoghue@linaro.org Signed-off-by: Trent Piepho tpiepho@impinj.com
common/bootm.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org

On Wed, Mar 27, 2019 at 11:50:09PM +0000, Trent Piepho wrote:
The cache flush of the kernel load area needs to be aligned outward to the DMA cache alignment. The operations are simpler if we think of this as aligning the start down, ALIGN_DOWN(load, ARCH_DMA_MINALIGN), and aligning the end up, ALIGN(load_end, ARCH_DMA_MINALIGN), and then find the length of the flushed region by subtracting the former from the latter.
Cc: Tom Rini trini@konsulko.com Cc: Simon Glass sjg@chromium.org Cc: Bryan O'Donoghue bryan.odonoghue@linaro.org Signed-off-by: Trent Piepho tpiepho@impinj.com Reviewed-by: Simon Glass sjg@chromium.org
Applied to u-boot/master, thanks!
participants (3)
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Simon Glass
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Tom Rini
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Trent Piepho