[U-Boot] Status of fsl_elbc_nand driver and 4k page NAND / 4bit ECC
Hello, I work with several MPC83xx boards in our company, and a while ago we were informed that the NAND chip we used was being discontinued. The only options for a replacement were the newer 4k page ones. Specifically, we are using now the Micron 29F8G08ABABA (8 gigabit).
I was sweeping the repositories and this list's archives and I'm with the impression that these chips are not supported yet. I saw some patches sent hacking the driver to allow for the use of 4k pages.
Additionally, I'm worried about the use of the 4 bit ECC lib (BCH), as it seems to me that the fsl_elbc_nand driver is not prepared to use a software ECC config. Maybe I'm wrong, but it seems that the driver always uses the 1 bit HW ECC that's present in freescale's controller.
Because of this, I would like to ask for an overall status of these things. What can I expect to be working? What are the main areas of concern? If there is no complete implementation yet (as I saw some patches being rejected / not merged yet), what is currently missing? What is the area where most work is needed?
I ask all of this because we need these implementations and I'm looking for the correct starting point for any implementation that I would need to do.
Thanks in advance for any help, Rafael
On 04/11/2012 04:28 PM, Rafael Beims wrote:
Hello, I work with several MPC83xx boards in our company, and a while ago we were informed that the NAND chip we used was being discontinued. The only options for a replacement were the newer 4k page ones. Specifically, we are using now the Micron 29F8G08ABABA (8 gigabit).
I was sweeping the repositories and this list's archives and I'm with the impression that these chips are not supported yet. I saw some patches sent hacking the driver to allow for the use of 4k pages.
Additionally, I'm worried about the use of the 4 bit ECC lib (BCH), as it seems to me that the fsl_elbc_nand driver is not prepared to use a software ECC config. Maybe I'm wrong, but it seems that the driver always uses the 1 bit HW ECC that's present in freescale's controller.
Because of this, I would like to ask for an overall status of these things. What can I expect to be working? What are the main areas of concern? If there is no complete implementation yet (as I saw some patches being rejected / not merged yet), what is currently missing? What is the area where most work is needed?
The main thing that is missing from the current patches is migrating bad block markers on first use, and checking that this has happened before using the hack. See the discussion on the Linux version of these patches. I was hoping to take care of this earlier this year, but other tasks have intruded.
And as you note, many 4K-page NAND chips require 4-bit ECC which means the driver will need to be updated to support software ECC (this should be fairly straightforward, except maybe the decision of when to do this).
-Scott
participants (2)
-
Rafael Beims -
Scott Wood