[U-Boot] [PATC v2 00/15] imx6: Engicam i.CoreM6/Is.IoT eMMC boot support
From: Jagan Teki jagan@amarulasolutions.com
This series support boot from eMMC on Engicam i.CoreM6 QDL/Is.IoT boards.
Changes for v2: - Rebase on master - Add Is.IoT eMMC boot patches - Add few mmc env patches on board
Jagan Teki (15): imx6: Add imx6_src_get_boot_mode imx: spl: Update NAND bootmode detection bit imx: Use IMX6_BMODE_* macros instead of numericals imx6: Add src_base structure define macro imx6: isiotmx6ul: Update SPL board boot order for eMMC i.MX6UL: isiot: Add eMMC boot support i.MX6UL: isiot: Add modeboot env via board_late_init i.MX6UL: isiot: Add mmc_late_init i.MX6UL: isiot: Switch the mmc env based on devno arm: dts: imx6qdl-icore-rqs: Add eMMC node imx6: icorem6_rqs: Update SPL board boot order for eMMC imx6: icorem6_rqs: Add eMMC boot support i.MX6Q: icorem6_rqs: Add modeboot env via board_late_init i.MX6Q: icorem6_rqs: Add mmc_late_init i.MX6Q: isiot: Switch the mmc env based on devno
arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6qdl-icore-rqs.dtsi | 22 ++++++ arch/arm/dts/imx6ul-isiot-emmc.dts | 77 +++++++++++++++++++++ arch/arm/imx-common/init.c | 10 +++ arch/arm/imx-common/spl.c | 50 ++++++++------ arch/arm/include/asm/arch-mx6/imx-regs.h | 2 + arch/arm/include/asm/imx-common/sys_proto.h | 46 +++++++++++++ board/engicam/icorem6_rqs/icorem6_rqs.c | 96 +++++++++++++++++++++++++- board/engicam/isiotmx6ul/MAINTAINERS | 1 + board/engicam/isiotmx6ul/isiotmx6ul.c | 101 +++++++++++++++++++++++++++- configs/imx6dl_icore_rqs_mmc_defconfig | 1 + configs/imx6q_icore_rqs_mmc_defconfig | 1 + configs/imx6ul_isiot_emmc_defconfig | 40 +++++++++++ configs/imx6ul_isiot_mmc_defconfig | 1 + configs/imx6ul_isiot_nand_defconfig | 1 + include/configs/imx6qdl_icore_rqs.h | 36 +++++----- include/configs/imx6ul_isiot.h | 40 +++++------ 17 files changed, 460 insertions(+), 66 deletions(-) create mode 100644 arch/arm/dts/imx6ul-isiot-emmc.dts create mode 100644 configs/imx6ul_isiot_emmc_defconfig
For i.MX6, the bootmode determine code is part of spl_boot_device, but there is might be a possibility for other part the code need to check the desired boot mode for adding new functionalities like modeboot env variable, or changing boot order etc.
So introduced imx6_src_get_boot_mode which actually reading the boot mode register for desired modes.
More cleanup will be add in future patches.
Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@openedev.com --- arch/arm/imx-common/init.c | 12 ++++++++++++ arch/arm/imx-common/spl.c | 6 +++--- arch/arm/include/asm/imx-common/sys_proto.h | 14 ++++++++++++++ 3 files changed, 29 insertions(+), 3 deletions(-)
diff --git a/arch/arm/imx-common/init.c b/arch/arm/imx-common/init.c index e5dbd93..036ebb2 100644 --- a/arch/arm/imx-common/init.c +++ b/arch/arm/imx-common/init.c @@ -115,3 +115,15 @@ void boot_mode_apply(unsigned cfg_val) writel(reg, &psrc->gpr10); } #endif + +#if defined(CONFIG_MX6) +u32 imx6_src_get_boot_mode(void) +{ + struct src *psrc = (struct src *)SRC_BASE_ADDR; + + if (imx6_is_bmode_from_gpr9()) + return readl(&psrc->gpr9); + else + return readl(&psrc->sbmr1); +} +#endif diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index 60c4adf..a7f9705 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -10,6 +10,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> +#include <asm/arch/sys_proto.h> #include <asm/spl.h> #include <spl.h> #include <asm/imx-common/hab.h> @@ -19,16 +20,15 @@ u32 spl_boot_device(void) { struct src *psrc = (struct src *)SRC_BASE_ADDR; - unsigned int gpr10_boot = readl(&psrc->gpr10) & (1 << 28); - unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1); unsigned int bmode = readl(&psrc->sbmr2); + u32 reg = imx6_src_get_boot_mode();
/* * Check for BMODE if serial downloader is enabled * BOOT_MODE - see IMX6DQRM Table 8-1 */ if ((((bmode >> 24) & 0x03) == 0x01) || /* Serial Downloader */ - (gpr10_boot && (reg == 1))) + (imx6_is_bmode_from_gpr9() && (reg == 1))) return BOOT_DEVICE_UART; /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */ switch ((reg & 0x000000FF) >> 4) { diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index 539d34b..99e3869 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -8,6 +8,7 @@ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_
+#include <asm/io.h> #include <asm/imx-common/regs-common.h> #include <common.h> #include "../arch-imx/cpu.h" @@ -38,6 +39,19 @@ #define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL)) #define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL))
+#ifdef CONFIG_MX6 +#define IMX6_SRC_GPR10_BMODE BIT(28) + +static inline u8 imx6_is_bmode_from_gpr9(void) +{ + struct src *psrc = (struct src *)SRC_BASE_ADDR; + + return readl(&psrc->gpr10) & IMX6_SRC_GPR10_BMODE; +} + +u32 imx6_src_get_boot_mode(void); +#endif /* CONFIG_MX6 */ + u32 get_nr_cpus(void); u32 get_cpu_rev(void); u32 get_cpu_speed_grade_hz(void);
BOOT_CFG1[7:4] the NAND boot mode selection is done only when BOOT_CFG1[7] is 1 hence update the NAND boot mode detection bit case. This information available on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.
Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com Signed-off-by: Jagan Teki jagan@openedev.com --- arch/arm/imx-common/spl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index a7f9705..fc3704b 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -61,8 +61,8 @@ u32 spl_boot_device(void) case 0x6: case 0x7: return BOOT_DEVICE_MMC1; - /* NAND Flash: 8.5.2 */ - case 0x8 ... 0xf: + /* NAND Flash: 8.5.2, Table 8-10 */ + case 0x8: return BOOT_DEVICE_NAND; } return BOOT_DEVICE_NONE;
Use meaningful meacros IMX6_BMODE_*, instead of numerical number in boot mode detection code.
Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com Signed-off-by: Jagan Teki jagan@openedev.com --- arch/arm/imx-common/spl.c | 39 ++++++++++++++++++----------- arch/arm/include/asm/imx-common/sys_proto.h | 34 +++++++++++++++++++++++++ 2 files changed, 58 insertions(+), 15 deletions(-)
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index fc3704b..38789b2 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -30,39 +30,48 @@ u32 spl_boot_device(void) if ((((bmode >> 24) & 0x03) == 0x01) || /* Serial Downloader */ (imx6_is_bmode_from_gpr9() && (reg == 1))) return BOOT_DEVICE_UART; + /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */ - switch ((reg & 0x000000FF) >> 4) { + switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { /* EIM: See 8.5.1, Table 8-9 */ - case 0x0: + case IMX6_BMODE_EMI: /* BOOT_CFG1[3]: NOR/OneNAND Selection */ - if ((reg & 0x00000008) >> 3) + switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) { + case IMX6_BMODE_ONENAND: return BOOT_DEVICE_ONENAND; - else + case IMX6_BMODE_NOR: return BOOT_DEVICE_NOR; - break; + } /* SATA: See 8.5.4, Table 8-20 */ - case 0x2: + case IMX6_BMODE_SATA: return BOOT_DEVICE_SATA; /* Serial ROM: See 8.5.5.1, Table 8-22 */ - case 0x3: + case IMX6_BMODE_SERIAL: /* BOOT_CFG4[2:0] */ - switch ((reg & 0x07000000) >> 24) { - case 0x0 ... 0x4: + switch ((reg & IMX6_BMODE_SERIAL_MASK) >> + IMX6_BMODE_SERIAL_SHIFT) { + case IMX6_BMODE_ECSPI1: + case IMX6_BMODE_ECSPI2: + case IMX6_BMODE_ECSPI3: + case IMX6_BMODE_ECSPI4: + case IMX6_BMODE_ECSPI5: return BOOT_DEVICE_SPI; - case 0x5 ... 0x7: + case IMX6_BMODE_I2C1: + case IMX6_BMODE_I2C2: + case IMX6_BMODE_I2C3: return BOOT_DEVICE_I2C; } break; /* SD/eSD: 8.5.3, Table 8-15 */ - case 0x4: - case 0x5: + case IMX6_BMODE_SD: + case IMX6_BMODE_ESD: return BOOT_DEVICE_MMC1; /* MMC/eMMC: 8.5.3 */ - case 0x6: - case 0x7: + case IMX6_BMODE_MMC: + case IMX6_BMODE_EMMC: return BOOT_DEVICE_MMC1; /* NAND Flash: 8.5.2, Table 8-10 */ - case 0x8: + case IMX6_BMODE_NAND: return BOOT_DEVICE_NAND; } return BOOT_DEVICE_NONE; diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index 99e3869..d0cf3f1 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -42,6 +42,40 @@ #ifdef CONFIG_MX6 #define IMX6_SRC_GPR10_BMODE BIT(28)
+#define IMX6_BMODE_MASK GENMASK(7, 0) +#define IMX6_BMODE_SHIFT BIT(2) +#define IMX6_BMODE_EMI_MASK BIT(3) +#define IMX6_BMODE_EMI_SHIFT GENMASK(1, 0) +#define IMX6_BMODE_SERIAL_MASK GENMASK(26, 24) +#define IMX6_BMODE_SERIAL_SHIFT GENMASK(4, 3) + +enum imx6_bmode_serial { + IMX6_BMODE_ECSPI1, + IMX6_BMODE_ECSPI2, + IMX6_BMODE_ECSPI3, + IMX6_BMODE_ECSPI4, + IMX6_BMODE_ECSPI5, + IMX6_BMODE_I2C1, + IMX6_BMODE_I2C2, + IMX6_BMODE_I2C3, +}; + +enum imx6_bmode_emi { + IMX6_BMODE_ONENAND, + IMX6_BMODE_NOR, +}; + +enum imx6_bmode { + IMX6_BMODE_EMI, + IMX6_BMODE_SATA = 0x2, + IMX6_BMODE_SERIAL, + IMX6_BMODE_SD, + IMX6_BMODE_ESD, + IMX6_BMODE_MMC, + IMX6_BMODE_EMMC, + IMX6_BMODE_NAND, +}; + static inline u8 imx6_is_bmode_from_gpr9(void) { struct src *psrc = (struct src *)SRC_BASE_ADDR;
Hi Jagan,
Love this patch! This was long overdue.
On 01/27/2017 07:12 AM, Jagan Teki wrote:
Use meaningful meacros IMX6_BMODE_*, instead of numerical number in boot mode detection code.
s/meacros/macros/
Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com Signed-off-by: Jagan Teki jagan@openedev.com
arch/arm/imx-common/spl.c | 39 ++++++++++++++++++----------- arch/arm/include/asm/imx-common/sys_proto.h | 34 +++++++++++++++++++++++++ 2 files changed, 58 insertions(+), 15 deletions(-)
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index fc3704b..38789b2 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -30,39 +30,48 @@ u32 spl_boot_device(void) if ((((bmode >> 24) & 0x03) == 0x01) || /* Serial Downloader */ (imx6_is_bmode_from_gpr9() && (reg == 1))) return BOOT_DEVICE_UART;
- /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
- switch ((reg & 0x000000FF) >> 4) {
- switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { /* EIM: See 8.5.1, Table 8-9 */
- case 0x0:
- case IMX6_BMODE_EMI: /* BOOT_CFG1[3]: NOR/OneNAND Selection */
if ((reg & 0x00000008) >> 3)
switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {case IMX6_BMODE_ONENAND: return BOOT_DEVICE_ONENAND;
else
case IMX6_BMODE_NOR: return BOOT_DEVICE_NOR;
break;
}
- case 0x2:
- case IMX6_BMODE_SATA: return BOOT_DEVICE_SATA; /* Serial ROM: See 8.5.5.1, Table 8-22 */
- case 0x3:
- case IMX6_BMODE_SERIAL: /* BOOT_CFG4[2:0] */
switch ((reg & 0x07000000) >> 24) {case 0x0 ... 0x4:
switch ((reg & IMX6_BMODE_SERIAL_MASK) >>IMX6_BMODE_SERIAL_SHIFT) {case IMX6_BMODE_ECSPI1:case IMX6_BMODE_ECSPI2:case IMX6_BMODE_ECSPI3:case IMX6_BMODE_ECSPI4:case IMX6_BMODE_ECSPI5: return BOOT_DEVICE_SPI;
case 0x5 ... 0x7:
case IMX6_BMODE_I2C1:case IMX6_BMODE_I2C2:case IMX6_BMODE_I2C3: return BOOT_DEVICE_I2C;
- case 0x4:
- case 0x5:
- case IMX6_BMODE_SD:
- case IMX6_BMODE_ESD: return BOOT_DEVICE_MMC1; /* MMC/eMMC: 8.5.3 */
- case 0x6:
- case 0x7:
- case IMX6_BMODE_MMC:
- case IMX6_BMODE_EMMC: return BOOT_DEVICE_MMC1; /* NAND Flash: 8.5.2, Table 8-10 */
- case 0x8:
- case IMX6_BMODE_NAND: return BOOT_DEVICE_NAND; } return BOOT_DEVICE_NONE;
diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index 99e3869..d0cf3f1 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -42,6 +42,40 @@ #ifdef CONFIG_MX6 #define IMX6_SRC_GPR10_BMODE BIT(28)
+#define IMX6_BMODE_MASK GENMASK(7, 0)
This is a number (4), not a mask:
+#define IMX6_BMODE_SHIFT BIT(2) +#define IMX6_BMODE_EMI_MASK BIT(3)
Ditto (number, not mask):
+#define IMX6_BMODE_EMI_SHIFT GENMASK(1, 0)
Since there's also a "serial download mode", I'd prefer that these say "SERIAL_NOR" to avoid confusion.
+#define IMX6_BMODE_SERIAL_MASK GENMASK(26, 24) +#define IMX6_BMODE_SERIAL_SHIFT GENMASK(4, 3)
I'd prefer macros for these because they'd show the values directly, making a comparison with the RM easier.
+enum imx6_bmode_serial {
- IMX6_BMODE_ECSPI1,
- IMX6_BMODE_ECSPI2,
- IMX6_BMODE_ECSPI3,
- IMX6_BMODE_ECSPI4,
- IMX6_BMODE_ECSPI5,
- IMX6_BMODE_I2C1,
- IMX6_BMODE_I2C2,
- IMX6_BMODE_I2C3,
+};
+enum imx6_bmode_emi {
- IMX6_BMODE_ONENAND,
- IMX6_BMODE_NOR,
+};
+enum imx6_bmode {
- IMX6_BMODE_EMI,
Especially when doing things like this:
- IMX6_BMODE_SATA = 0x2,
- IMX6_BMODE_SERIAL,
- IMX6_BMODE_SD,
- IMX6_BMODE_ESD,
- IMX6_BMODE_MMC,
- IMX6_BMODE_EMMC,
- IMX6_BMODE_NAND,
+};
static inline u8 imx6_is_bmode_from_gpr9(void) { struct src *psrc = (struct src *)SRC_BASE_ADDR;
On Fri, Jan 27, 2017 at 4:18 PM, Eric Nelson eric@nelint.com wrote:
Hi Jagan,
Love this patch! This was long overdue.
On 01/27/2017 07:12 AM, Jagan Teki wrote:
Use meaningful meacros IMX6_BMODE_*, instead of numerical number in boot mode detection code.
s/meacros/macros/
Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com Signed-off-by: Jagan Teki jagan@openedev.com
arch/arm/imx-common/spl.c | 39 ++++++++++++++++++----------- arch/arm/include/asm/imx-common/sys_proto.h | 34 +++++++++++++++++++++++++ 2 files changed, 58 insertions(+), 15 deletions(-)
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index fc3704b..38789b2 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -30,39 +30,48 @@ u32 spl_boot_device(void) if ((((bmode >> 24) & 0x03) == 0x01) || /* Serial Downloader */ (imx6_is_bmode_from_gpr9() && (reg == 1))) return BOOT_DEVICE_UART;
/* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
switch ((reg & 0x000000FF) >> 4) {
switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { /* EIM: See 8.5.1, Table 8-9 */
case 0x0:
case IMX6_BMODE_EMI: /* BOOT_CFG1[3]: NOR/OneNAND Selection */
if ((reg & 0x00000008) >> 3)
switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {case IMX6_BMODE_ONENAND: return BOOT_DEVICE_ONENAND;
else
case IMX6_BMODE_NOR: return BOOT_DEVICE_NOR;
break;
} /* SATA: See 8.5.4, Table 8-20 */
case 0x2:
case IMX6_BMODE_SATA: return BOOT_DEVICE_SATA; /* Serial ROM: See 8.5.5.1, Table 8-22 */
case 0x3:
case IMX6_BMODE_SERIAL: /* BOOT_CFG4[2:0] */
switch ((reg & 0x07000000) >> 24) {case 0x0 ... 0x4:
switch ((reg & IMX6_BMODE_SERIAL_MASK) >>IMX6_BMODE_SERIAL_SHIFT) {case IMX6_BMODE_ECSPI1:case IMX6_BMODE_ECSPI2:case IMX6_BMODE_ECSPI3:case IMX6_BMODE_ECSPI4:case IMX6_BMODE_ECSPI5: return BOOT_DEVICE_SPI;
case 0x5 ... 0x7:
case IMX6_BMODE_I2C1:case IMX6_BMODE_I2C2:case IMX6_BMODE_I2C3: return BOOT_DEVICE_I2C; } break; /* SD/eSD: 8.5.3, Table 8-15 */
case 0x4:case 0x5:
case IMX6_BMODE_SD:case IMX6_BMODE_ESD: return BOOT_DEVICE_MMC1; /* MMC/eMMC: 8.5.3 */
case 0x6:case 0x7:
case IMX6_BMODE_MMC:case IMX6_BMODE_EMMC: return BOOT_DEVICE_MMC1; /* NAND Flash: 8.5.2, Table 8-10 */
case 0x8:
case IMX6_BMODE_NAND: return BOOT_DEVICE_NAND; } return BOOT_DEVICE_NONE;diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index 99e3869..d0cf3f1 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -42,6 +42,40 @@ #ifdef CONFIG_MX6 #define IMX6_SRC_GPR10_BMODE BIT(28)
+#define IMX6_BMODE_MASK GENMASK(7, 0)
This is a number (4), not a mask:
This is 0xff not 4 - switch ((reg & 0x000000FF) >> 4) { + switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
+#define IMX6_BMODE_SHIFT BIT(2) +#define IMX6_BMODE_EMI_MASK BIT(3)
Ditto (number, not mask):
The reason for calling this as mask as the reg value is and'ing to mask value of 8 (which is last 0 and 1 bits) - if ((reg & 0x00000008) >> 3) + switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {
+#define IMX6_BMODE_EMI_SHIFT GENMASK(1, 0)
Since there's also a "serial download mode", I'd prefer that these say "SERIAL_NOR" to avoid confusion.
Since serial here is also denoting I2C better to have SERIAL and we can use 'serial download' as SERIAL_DOWNLOAD or something similar.
+#define IMX6_BMODE_SERIAL_MASK GENMASK(26, 24) +#define IMX6_BMODE_SERIAL_SHIFT GENMASK(4, 3)
I'd prefer macros for these because they'd show the values directly, making a comparison with the RM easier.
But these macro's making bit functioning smooth.
thanks!
Hi Jagan,
On 01/27/2017 10:21 AM, Jagan Teki wrote:
On Fri, Jan 27, 2017 at 4:18 PM, Eric Nelson eric@nelint.com wrote:
Hi Jagan,
Love this patch! This was long overdue.
On 01/27/2017 07:12 AM, Jagan Teki wrote:
Use meaningful meacros IMX6_BMODE_*, instead of numerical number in boot mode detection code.
s/meacros/macros/
<snip>
diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index 99e3869..d0cf3f1 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -42,6 +42,40 @@ #ifdef CONFIG_MX6 #define IMX6_SRC_GPR10_BMODE BIT(28)
+#define IMX6_BMODE_MASK GENMASK(7, 0)
This is a number (4), not a mask:
This is 0xff not 4
I was referring to IMX6_BMODE_SHIFT.
switch ((reg & 0x000000FF) >> 4) {
switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {+#define IMX6_BMODE_SHIFT BIT(2) +#define IMX6_BMODE_EMI_MASK BIT(3)
Ditto (number, not mask):
The reason for calling this as mask as the reg value is and'ing to mask value of 8 (which is last 0 and 1 bits)
if ((reg & 0x00000008) >> 3)
switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {
Again, I'm referring to the _SHIFT macro below:
+#define IMX6_BMODE_EMI_SHIFT GENMASK(1, 0)
Since there's also a "serial download mode", I'd prefer that these say "SERIAL_NOR" to avoid confusion.
Since serial here is also denoting I2C better to have SERIAL and we can use 'serial download' as SERIAL_DOWNLOAD or something similar.
I2C is also serial ROM or serial NOR.
BMODE_SERIAL just seems to have multiple meanings.
+#define IMX6_BMODE_SERIAL_MASK GENMASK(26, 24) +#define IMX6_BMODE_SERIAL_SHIFT GENMASK(4, 3)
I'd prefer macros for these because they'd show the values directly, making a comparison with the RM easier.
But these macro's making bit functioning smooth.
My comment here was referring to the use of enums for imx6_bmode, imx6_bmode_emi, and imx6_bmode_serial.
If you use macros, it's easier to see that, for instance IMX6_BMODE_EMMC == 7
thanks!
No. Thank you for the patch. This was pretty contorted previously.
Regards,
Eric
On Fri, Jan 27, 2017 at 6:29 PM, Eric Nelson eric@nelint.com wrote:
Hi Jagan,
On 01/27/2017 10:21 AM, Jagan Teki wrote:
On Fri, Jan 27, 2017 at 4:18 PM, Eric Nelson eric@nelint.com wrote:
Hi Jagan,
Love this patch! This was long overdue.
On 01/27/2017 07:12 AM, Jagan Teki wrote:
Use meaningful meacros IMX6_BMODE_*, instead of numerical number in boot mode detection code.
s/meacros/macros/
<snip>
diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index 99e3869..d0cf3f1 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -42,6 +42,40 @@ #ifdef CONFIG_MX6 #define IMX6_SRC_GPR10_BMODE BIT(28)
+#define IMX6_BMODE_MASK GENMASK(7, 0)
This is a number (4), not a mask:
This is 0xff not 4
I was referring to IMX6_BMODE_SHIFT.
Sorry, I thought you replied on in-line to my messages and I'm trying to use bitops for possible vlaue BIT(2) make the value 4 (1 << 2)
switch ((reg & 0x000000FF) >> 4) {
switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {+#define IMX6_BMODE_SHIFT BIT(2) +#define IMX6_BMODE_EMI_MASK BIT(3)
Ditto (number, not mask):
The reason for calling this as mask as the reg value is and'ing to mask value of 8 (which is last 0 and 1 bits)
if ((reg & 0x00000008) >> 3)
switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {Again, I'm referring to the _SHIFT macro below:
Same comment as above.
+#define IMX6_BMODE_EMI_SHIFT GENMASK(1, 0)
Since there's also a "serial download mode", I'd prefer that these say "SERIAL_NOR" to avoid confusion.
Since serial here is also denoting I2C better to have SERIAL and we can use 'serial download' as SERIAL_DOWNLOAD or something similar.
I2C is also serial ROM or serial NOR.
BMODE_SERIAL just seems to have multiple meanings.
SERIAL_ROM may be better because SERIAL_NOR look spi-nor flash.
+#define IMX6_BMODE_SERIAL_MASK GENMASK(26, 24) +#define IMX6_BMODE_SERIAL_SHIFT GENMASK(4, 3)
I'd prefer macros for these because they'd show the values directly, making a comparison with the RM easier.
But these macro's making bit functioning smooth.
My comment here was referring to the use of enums for imx6_bmode, imx6_bmode_emi, and imx6_bmode_serial.
If you use macros, it's easier to see that, for instance IMX6_BMODE_EMMC == 7
May be this is true with imx6_bmode but the rest have serial in nature, but again enum make code compile time retain and good for for code readable instead of assigning values unlike macro.s
thanks!
No. Thank you for the patch. This was pretty contorted previously.
:)
thanks!
Hi Jagan,
On 01/27/2017 10:54 AM, Jagan Teki wrote:
On Fri, Jan 27, 2017 at 6:29 PM, Eric Nelson eric@nelint.com wrote:
Hi Jagan,
On 01/27/2017 10:21 AM, Jagan Teki wrote:
On Fri, Jan 27, 2017 at 4:18 PM, Eric Nelson eric@nelint.com wrote:
Hi Jagan,
Love this patch! This was long overdue.
On 01/27/2017 07:12 AM, Jagan Teki wrote:
Use meaningful meacros IMX6_BMODE_*, instead of numerical number in boot mode detection code.
s/meacros/macros/
<snip>
diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index 99e3869..d0cf3f1 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -42,6 +42,40 @@ #ifdef CONFIG_MX6 #define IMX6_SRC_GPR10_BMODE BIT(28)
+#define IMX6_BMODE_MASK GENMASK(7, 0)
This is a number (4), not a mask:
This is 0xff not 4
I was referring to IMX6_BMODE_SHIFT.
Sorry, I thought you replied on in-line to my messages and I'm trying to use bitops for possible vlaue BIT(2) make the value 4 (1 << 2)
Methinks you tries too hard!
Bitops don't help when you're referring to a bit **position**, only when referring to a mask.
switch ((reg & 0x000000FF) >> 4) {
switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {+#define IMX6_BMODE_SHIFT BIT(2) +#define IMX6_BMODE_EMI_MASK BIT(3)
Ditto (number, not mask):
The reason for calling this as mask as the reg value is and'ing to mask value of 8 (which is last 0 and 1 bits)
if ((reg & 0x00000008) >> 3)
switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {Again, I'm referring to the _SHIFT macro below:
Same comment as above.
+#define IMX6_BMODE_EMI_SHIFT GENMASK(1, 0)
Since there's also a "serial download mode", I'd prefer that these say "SERIAL_NOR" to avoid confusion.
Since serial here is also denoting I2C better to have SERIAL and we can use 'serial download' as SERIAL_DOWNLOAD or something similar.
I2C is also serial ROM or serial NOR.
BMODE_SERIAL just seems to have multiple meanings.
SERIAL_ROM may be better because SERIAL_NOR look spi-nor flash.
Okay by me.
+#define IMX6_BMODE_SERIAL_MASK GENMASK(26, 24) +#define IMX6_BMODE_SERIAL_SHIFT GENMASK(4, 3)
I'd prefer macros for these because they'd show the values directly, making a comparison with the RM easier.
But these macro's making bit functioning smooth.
My comment here was referring to the use of enums for imx6_bmode, imx6_bmode_emi, and imx6_bmode_serial.
If you use macros, it's easier to see that, for instance IMX6_BMODE_EMMC == 7
May be this is true with imx6_bmode but the rest have serial in nature, but again enum make code compile time retain and good for for code readable instead of assigning values unlike macro.s
If these were likely to be used more widely, I might agree, but opinions vary.
My main thought is that having the numbers handy would make it easier to compare against the reference manual (which I haven't) or even the constants you just replaced (which I also haven't done).
On Fri, Jan 27, 2017 at 7:10 PM, Eric Nelson eric@nelint.com wrote:
Hi Jagan,
On 01/27/2017 10:54 AM, Jagan Teki wrote:
On Fri, Jan 27, 2017 at 6:29 PM, Eric Nelson eric@nelint.com wrote:
Hi Jagan,
On 01/27/2017 10:21 AM, Jagan Teki wrote:
On Fri, Jan 27, 2017 at 4:18 PM, Eric Nelson eric@nelint.com wrote:
Hi Jagan,
Love this patch! This was long overdue.
On 01/27/2017 07:12 AM, Jagan Teki wrote:
Use meaningful meacros IMX6_BMODE_*, instead of numerical number in boot mode detection code.
s/meacros/macros/
<snip>
diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index 99e3869..d0cf3f1 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -42,6 +42,40 @@ #ifdef CONFIG_MX6 #define IMX6_SRC_GPR10_BMODE BIT(28)
+#define IMX6_BMODE_MASK GENMASK(7, 0)
This is a number (4), not a mask:
This is 0xff not 4
I was referring to IMX6_BMODE_SHIFT.
Sorry, I thought you replied on in-line to my messages and I'm trying to use bitops for possible vlaue BIT(2) make the value 4 (1 << 2)
Methinks you tries too hard!
Bitops don't help when you're referring to a bit **position**, only when referring to a mask.
OK, will fix.
switch ((reg & 0x000000FF) >> 4) {
switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {+#define IMX6_BMODE_SHIFT BIT(2) +#define IMX6_BMODE_EMI_MASK BIT(3)
Ditto (number, not mask):
The reason for calling this as mask as the reg value is and'ing to mask value of 8 (which is last 0 and 1 bits)
if ((reg & 0x00000008) >> 3)
switch ((reg & IMX6_BMODE_EMI_MASK) >> IMX6_BMODE_EMI_SHIFT) {Again, I'm referring to the _SHIFT macro below:
Same comment as above.
+#define IMX6_BMODE_EMI_SHIFT GENMASK(1, 0)
Since there's also a "serial download mode", I'd prefer that these say "SERIAL_NOR" to avoid confusion.
Since serial here is also denoting I2C better to have SERIAL and we can use 'serial download' as SERIAL_DOWNLOAD or something similar.
I2C is also serial ROM or serial NOR.
BMODE_SERIAL just seems to have multiple meanings.
SERIAL_ROM may be better because SERIAL_NOR look spi-nor flash.
Okay by me.
+#define IMX6_BMODE_SERIAL_MASK GENMASK(26, 24) +#define IMX6_BMODE_SERIAL_SHIFT GENMASK(4, 3)
I'd prefer macros for these because they'd show the values directly, making a comparison with the RM easier.
But these macro's making bit functioning smooth.
My comment here was referring to the use of enums for imx6_bmode, imx6_bmode_emi, and imx6_bmode_serial.
If you use macros, it's easier to see that, for instance IMX6_BMODE_EMMC == 7
May be this is true with imx6_bmode but the rest have serial in nature, but again enum make code compile time retain and good for for code readable instead of assigning values unlike macro.s
If these were likely to be used more widely, I might agree, but opinions vary.
My main thought is that having the numbers handy would make it easier to compare against the reference manual (which I haven't) or even the constants you just replaced (which I also haven't done).
Ok, then I will assign the values directly for imx6_bmode.
thanks!
Instead of initializing 'struct src' to SRC_BASE_ADDR on every function better to have global define macro.
Cc: Stefano Babic sbabic@denx.de Signed-off-by: Jagan Teki jagan@openedev.com --- arch/arm/imx-common/init.c | 6 ++---- arch/arm/imx-common/spl.c | 3 +-- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ arch/arm/include/asm/imx-common/sys_proto.h | 4 +--- 4 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/arch/arm/imx-common/init.c b/arch/arm/imx-common/init.c index 036ebb2..5b4f828 100644 --- a/arch/arm/imx-common/init.c +++ b/arch/arm/imx-common/init.c @@ -119,11 +119,9 @@ void boot_mode_apply(unsigned cfg_val) #if defined(CONFIG_MX6) u32 imx6_src_get_boot_mode(void) { - struct src *psrc = (struct src *)SRC_BASE_ADDR; - if (imx6_is_bmode_from_gpr9()) - return readl(&psrc->gpr9); + return readl(&src_base->gpr9); else - return readl(&psrc->sbmr1); + return readl(&src_base->sbmr1); } #endif diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index 38789b2..4d73a67 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -19,8 +19,7 @@ /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */ u32 spl_boot_device(void) { - struct src *psrc = (struct src *)SRC_BASE_ADDR; - unsigned int bmode = readl(&psrc->sbmr2); + unsigned int bmode = readl(&src_base->sbmr2); u32 reg = imx6_src_get_boot_mode();
/* diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 6727c56..646013d 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -473,6 +473,8 @@ struct src { u32 gpr10; };
+#define src_base ((struct src *)SRC_BASE_ADDR) + #define SRC_SCR_M4_ENABLE_OFFSET 22 #define SRC_SCR_M4_ENABLE_MASK (1 << 22) #define SRC_SCR_M4C_NON_SCLR_RST_OFFSET 4 diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index d0cf3f1..d149c9f 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -78,9 +78,7 @@ enum imx6_bmode {
static inline u8 imx6_is_bmode_from_gpr9(void) { - struct src *psrc = (struct src *)SRC_BASE_ADDR; - - return readl(&psrc->gpr10) & IMX6_SRC_GPR10_BMODE; + return readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE; }
u32 imx6_src_get_boot_mode(void);
From: Jagan Teki jagan@amarulasolutions.com
SPL mmc device index is get based on the boot device, like - BOOT_DEVICE_MMC1 for mmc device 0 - BOOT_DEVICE_MMC2 for mmc device 1
Currently BOOT_DEVICE_MMC1 is setting both SD/eSD and MMC/eMMC boot devices in i.MX, So u-boot is loading from mmc device 0 even "if the board booting from SD/eSD or MMC/eMMC"
So, this patch set BOOT_DEVICE_MMC2 for MMC/eMMC so for MMC/eMMC the u-boot is loading from mmc device 1 and the board file need to take care if the board have different mmc device order intialization.
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/isiotmx6ul/isiotmx6ul.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+)
diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c index ae3465f..6b84f02 100644 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ b/board/engicam/isiotmx6ul/isiotmx6ul.c @@ -205,6 +205,32 @@ int board_mmc_init(bd_t *bis)
return 0; } + +#ifdef CONFIG_ENV_IS_IN_MMC +void board_boot_order(u32 *spl_boot_list) +{ + u32 bmode = imx6_src_get_boot_mode(); + u8 boot_dev = BOOT_DEVICE_MMC1; + + switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { + case IMX6_BMODE_SD: + case IMX6_BMODE_ESD: + /* SD/eSD - BOOT_DEVICE_MMC1 */ + break; + case IMX6_BMODE_MMC: + case IMX6_BMODE_EMMC: + /* MMC/eMMC */ + boot_dev = BOOT_DEVICE_MMC2; + break; + default: + /* Default - BOOT_DEVICE_MMC1 */ + printf("Wrong board boot order\n"); + break; + } + + spl_boot_list[0] = boot_dev; +} +#endif #endif /* CONFIG_FSL_ESDHC */
static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
From: Jagan Teki jagan@amarulasolutions.com
Boot from eMMC: -------------- U-Boot SPL 2017.01-00314-gd0cd9cd-dirty (Jan 25 2017 - 13:25:27) Trying to boot from MMC2
U-Boot 2017.01-00314-gd0cd9cd-dirty (Jan 25 2017 - 13:25:27 +0100)
CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 36C Reset cause: POR Model: Engicam Is.IoT MX6UL eMMC Starterkit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 *** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial switch to partitions #0, OK mmc1(part 0) is current device
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6ul-isiot-emmc.dts | 77 +++++++++++++++++++++++++++++++++++ board/engicam/isiotmx6ul/MAINTAINERS | 1 + board/engicam/isiotmx6ul/isiotmx6ul.c | 26 +++++++++++- configs/imx6ul_isiot_emmc_defconfig | 39 ++++++++++++++++++ include/configs/imx6ul_isiot.h | 2 +- 6 files changed, 144 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/imx6ul-isiot-emmc.dts create mode 100644 configs/imx6ul_isiot_emmc_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 09e3bdb..cde7f41 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -314,6 +314,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6q-icore.dtb \ imx6q-icore-rqs.dtb \ imx6ul-geam-kit.dtb \ + imx6ul-isiot-emmc.dtb \ imx6ul-isiot-mmc.dtb \ imx6ul-isiot-nand.dtb
diff --git a/arch/arm/dts/imx6ul-isiot-emmc.dts b/arch/arm/dts/imx6ul-isiot-emmc.dts new file mode 100644 index 0000000..677de96 --- /dev/null +++ b/arch/arm/dts/imx6ul-isiot-emmc.dts @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "imx6ul-isiot.dtsi" + +/ { + model = "Engicam Is.IoT MX6UL eMMC Starterkit"; + compatible = "engicam,imx6ul-isiot", "fsl,imx6ul"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; + bus-width = <8>; + no-1-8-v; + status = "okay"; +}; + +&iomuxc { + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17070 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x10070 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17070 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17070 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17070 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17070 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17070 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17070 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17070 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17070 + MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17070 + >; + }; +}; diff --git a/board/engicam/isiotmx6ul/MAINTAINERS b/board/engicam/isiotmx6ul/MAINTAINERS index e99e02e..c99dfaa 100644 --- a/board/engicam/isiotmx6ul/MAINTAINERS +++ b/board/engicam/isiotmx6ul/MAINTAINERS @@ -4,4 +4,5 @@ S: Maintained F: board/engicam/isiotmx6ul F: include/configs/imx6ul_isiot.h F: configs/imx6ul_isiot_mmc_defconfig +F: configs/imx6ul_isiot_emmc_defconfig F: configs/imx6ul_isiot_nand_defconfig diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c index 6b84f02..17c19e0 100644 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ b/board/engicam/isiotmx6ul/isiotmx6ul.c @@ -153,10 +153,24 @@ static iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), };
+static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_NAND_ALE__USDHC2_RESET_B | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA00__USDHC2_DATA0| MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA04__USDHC2_DATA4| MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA05__USDHC2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + #define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) +#define USDHC2_CD_GPIO IMX_GPIO_NR(4, 5)
-struct fsl_esdhc_cfg usdhc_cfg[1] = { +struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC1_BASE_ADDR, 0, 4}, + {USDHC2_BASE_ADDR, 0, 8}, };
int board_mmc_getcd(struct mmc *mmc) @@ -168,6 +182,9 @@ int board_mmc_getcd(struct mmc *mmc) case USDHC1_BASE_ADDR: ret = !gpio_get_value(USDHC1_CD_GPIO); break; + case USDHC2_BASE_ADDR: + ret = !gpio_get_value(USDHC2_CD_GPIO); + break; }
return ret; @@ -181,6 +198,7 @@ int board_mmc_init(bd_t *bis) * According to the board_mmc_init() the following map is done: * (U-boot device node) (Physical Port) * mmc0 USDHC1 + * mmc1 USDHC2 */ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { switch (i) { @@ -190,6 +208,12 @@ int board_mmc_init(bd_t *bis) gpio_direction_input(USDHC1_CD_GPIO); usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc1_pads, ARRAY_SIZE(usdhc2_pads)); + gpio_direction_input(USDHC2_CD_GPIO); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + break; default: printf("Warning - USDHC%d controller not supporting\n", i + 1); diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig new file mode 100644 index 0000000..94fe808 --- /dev/null +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -0,0 +1,39 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_SPL_EXT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" +CONFIG_BOOTDELAY=3 +CONFIG_DEFAULT_FDT_FILE="imx6ul-isiot-emmc.dtb" +CONFIG_SPL=y +CONFIG_HUSH_PARSER=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_PROMPT="isiotmx6ul> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MMC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_BLK is not set +# CONFIG_DM_MMC_OPS is not set +CONFIG_FEC_MXC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h index 10311d0..1b0e436 100644 --- a/include/configs/imx6ul_isiot.h +++ b/include/configs/imx6ul_isiot.h @@ -145,7 +145,7 @@ /* MMC */ #ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0 -# define CONFIG_SYS_FSL_USDHC_NUM 1 +# define CONFIG_SYS_FSL_USDHC_NUM 2 # define CONFIG_SYS_FSL_ESDHC_ADDR 0 #endif
From: Jagan Teki jagan@amarulasolutions.com
Add runtime, modeboot env which is setting mmcboot, or nandboot based on the bootdevice so-that conditional macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should be avoided in config files.
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/isiotmx6ul/isiotmx6ul.c | 21 ++++++++++++++++++++ configs/imx6ul_isiot_emmc_defconfig | 1 + configs/imx6ul_isiot_mmc_defconfig | 1 + configs/imx6ul_isiot_nand_defconfig | 1 + include/configs/imx6ul_isiot.h | 36 ++++++++++++++++------------------- 5 files changed, 40 insertions(+), 20 deletions(-)
diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c index 17c19e0..3fc5bca 100644 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ b/board/engicam/isiotmx6ul/isiotmx6ul.c @@ -103,6 +103,27 @@ static void setup_gpmi_nand(void) } #endif /* CONFIG_NAND_MXS */
+int board_late_init(void) +{ + switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >> + IMX6_BMODE_SHIFT) { + case IMX6_BMODE_SD: + case IMX6_BMODE_ESD: + case IMX6_BMODE_MMC: + case IMX6_BMODE_EMMC: + setenv("modeboot", "mmcboot"); + break; + case IMX6_BMODE_NAND: + setenv("modeboot", "nandboot"); + break; + default: + setenv("modeboot", ""); + break; + } + + return 0; +} + int board_init(void) { /* Address of boot parameters */ diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 94fe808..4c3664f 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -37,3 +37,4 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_BOARD_LATE_INIT=y diff --git a/configs/imx6ul_isiot_mmc_defconfig b/configs/imx6ul_isiot_mmc_defconfig index 8ecdd8e..ea2d378 100644 --- a/configs/imx6ul_isiot_mmc_defconfig +++ b/configs/imx6ul_isiot_mmc_defconfig @@ -39,3 +39,4 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_BOARD_LATE_INIT=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index 6f1a054..f02a2ac 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -40,3 +40,4 @@ CONFIG_PINCTRL_IMX6=y CONFIG_SYS_I2C_MXC=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_BOARD_LATE_INIT=y diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h index 1b0e436..7258fed 100644 --- a/include/configs/imx6ul_isiot.h +++ b/include/configs/imx6ul_isiot.h @@ -64,8 +64,7 @@ "fitboot=echo Booting FIT image from mmc ...; " \ "run mmcargs; " \ "bootm ${loadaddr}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ + "_mmcboot=run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if run loadfdt; then " \ "bootm ${loadaddr} - ${fdt_addr}; " \ @@ -79,6 +78,20 @@ "else " \ "bootm; " \ "fi\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadfit; then " \ + "run fitboot; " \ + "else " \ + "if run loadimage; then " \ + "run _mmcboot; " \ + "fi; " \ + "fi; " \ + "fi; " \ + "fi\0" \ "nandboot=echo Booting from nand ...; " \ "if mtdparts; then " \ "echo Starting nand boot ...; " \ @@ -90,24 +103,7 @@ "nand read ${fdt_addr} dtb 0x100000; " \ "bootm ${loadaddr} - ${fdt_addr}\0"
-#ifdef CONFIG_NAND_MXS -# define CONFIG_BOOTCOMMAND "run nandboot" -#else -# define CONFIG_BOOTCOMMAND \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadfit; then " \ - "run fitboot; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "fi; " \ - "fi; " \ - "fi; " \ - "fi" -#endif +#define CONFIG_BOOTCOMMAND "run $modeboot"
/* Miscellaneous configurable options */ #define CONFIG_SYS_MEMTEST_START 0x80000000
From: Jagan Teki jagan@amarulasolutions.com
Let the runtime code can set the mmcdev and mmcroot based on the devno using mmc_get_env_dev instead of defining separately in build-time configs using mmc_late_init func.
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/isiotmx6ul/isiotmx6ul.c | 22 ++++++++++++++++++++++ include/configs/imx6ul_isiot.h | 2 -- 2 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c index 3fc5bca..920d317 100644 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ b/board/engicam/isiotmx6ul/isiotmx6ul.c @@ -7,6 +7,7 @@ */
#include <common.h> +#include <mmc.h>
#include <asm/io.h> #include <asm/gpio.h> @@ -103,6 +104,24 @@ static void setup_gpmi_nand(void) } #endif /* CONFIG_NAND_MXS */
+#ifdef CONFIG_ENV_IS_IN_MMC +static void mmc_late_init(void) +{ + char cmd[32]; + char mmcblk[32]; + u32 dev_no = mmc_get_env_dev(); + + setenv_ulong("mmcdev", dev_no); + + /* Set mmcblk env */ + sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no); + setenv("mmcroot", mmcblk); + + sprintf(cmd, "mmc dev %d", dev_no); + run_command(cmd, 0); +} +#endif + int board_late_init(void) { switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >> @@ -111,6 +130,9 @@ int board_late_init(void) case IMX6_BMODE_ESD: case IMX6_BMODE_MMC: case IMX6_BMODE_EMMC: +#ifdef CONFIG_ENV_IS_IN_MMC + mmc_late_init(); +#endif setenv("modeboot", "mmcboot"); break; case IMX6_BMODE_NAND: diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h index 7258fed..4009648 100644 --- a/include/configs/imx6ul_isiot.h +++ b/include/configs/imx6ul_isiot.h @@ -45,9 +45,7 @@ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "fdt_addr=0x87800000\0" \ "boot_fdt=try\0" \ - "mmcdev=0\0" \ "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \
From: Jagan Teki jagan@amarulasolutions.com
Add board_mmc_get_env_dev
Switch the mmc env based on the mmc devno, instead of separately defining a config item in include/configs using board_mmc_get_env_dev - devno 0: sd/esd - devno 1: mmc/emmc
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/isiotmx6ul/isiotmx6ul.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c index 920d317..df432a1 100644 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ b/board/engicam/isiotmx6ul/isiotmx6ul.c @@ -105,6 +105,12 @@ static void setup_gpmi_nand(void) #endif /* CONFIG_NAND_MXS */
#ifdef CONFIG_ENV_IS_IN_MMC +int board_mmc_get_env_dev(int devno) +{ + /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ + return (devno == 0) ? 0 : 1; +} + static void mmc_late_init(void) { char cmd[32];
Add usdhc4 node, which is eMMC for Engicam i.CoreM6 RQS modules.
eMMC Log: -------- icorem6qdl-rqs> mmc dev 1 switch to partitions #0, OK mmc1(part 0) is current device icorem6qdl-rqs> mmcinfo Device: FSL_SDHC Manufacturer ID: fe OEM: 14e Name: MMC04 Tran Speed: 52000000 Rd Block Len: 512 MMC version 4.4.1 High Capacity: Yes Capacity: 3.5 GiB Bus Width: 4-bit Erase Group Size: 512 KiB HC WP Group Size: 4 MiB User Capacity: 3.5 GiB Boot Capacity: 16 MiB ENH RPMB Capacity: 128 KiB ENH
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/imx6qdl-icore-rqs.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
diff --git a/arch/arm/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/dts/imx6qdl-icore-rqs.dtsi index 750229b..8b9d5b4 100644 --- a/arch/arm/dts/imx6qdl-icore-rqs.dtsi +++ b/arch/arm/dts/imx6qdl-icore-rqs.dtsi @@ -107,6 +107,13 @@ status = "okay"; };
+&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + no-1-8-v; + status = "okay"; +}; + &iomuxc { pinctrl_enet: enetgrp { fsl,pins = < @@ -167,4 +174,19 @@ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070 >; }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070 + >; + }; };
SPL mmc device index is get based on the boot device, like - BOOT_DEVICE_MMC1 for mmc device 0 - BOOT_DEVICE_MMC2 for mmc device 1
Currently BOOT_DEVICE_MMC1 is setting both SD/eSD and MMC/eMMC boot devices in i.MX, So u-boot is loading from mmc device 0 even "if the board booting from SD/eSD or MMC/eMMC"
So, this patch set BOOT_DEVICE_MMC2 for MMC/eMMC so for MMC/eMMC the u-boot is loading from mmc device 1 and the board file need to take care if the board have different mmc device order intialization.
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/icorem6_rqs/icorem6_rqs.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+)
diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index 2769177..e3c520f 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -125,6 +125,32 @@ int board_mmc_init(bd_t *bis)
return 0; } + +#ifdef CONFIG_ENV_IS_IN_MMC +void board_boot_order(u32 *spl_boot_list) +{ + u32 bmode = imx6_src_get_boot_mode(); + u8 boot_dev = BOOT_DEVICE_MMC1; + + switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { + case IMX6_BMODE_SD: + case IMX6_BMODE_ESD: + /* SD/eSD - BOOT_DEVICE_MMC1 */ + break; + case IMX6_BMODE_MMC: + case IMX6_BMODE_EMMC: + /* MMC/eMMC */ + boot_dev = BOOT_DEVICE_MMC2; + break; + default: + /* Default - BOOT_DEVICE_MMC1 */ + printf("Wrong board boot order\n"); + break; + } + + spl_boot_list[0] = boot_dev; +} +#endif #endif
/*
From: Jagan Teki jagan@amarulasolutions.com
Boot from eMMC: -------------- U-Boot SPL 2017.01-00318-g8e243f8 (Jan 26 2017 - 11:53:21) Trying to boot from MMC2
U-Boot 2017.01-00318-g8e243f8 (Jan 26 2017 - 11:53:21 +0100)
CPU: Freescale i.MX6D rev1.2 at 792 MHz Reset cause: POR Model: Engicam i.CoreM6 Quad/Dual RQS Starter Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 *** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial switch to partitions #0, OK mmc1(part 0) is current device Net: No ethernet found. Hit any key to stop autoboot: 0 Booting from mmc ... switch to partitions #0, OK mmc1(part 0) is current device
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/icorem6_rqs/icorem6_rqs.c | 24 ++++++++++++++++++++++-- include/configs/imx6qdl_icore_rqs.h | 2 +- 2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index e3c520f..66cf487 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -77,8 +77,22 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), };
-struct fsl_esdhc_cfg usdhc_cfg[1] = { +static iomux_v3_cfg_t const usdhc4_pads[] = { + IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), +}; + +struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR, 1, 4}, + {USDHC4_BASE_ADDR, 1, 8}, };
int board_mmc_getcd(struct mmc *mmc) @@ -88,6 +102,7 @@ int board_mmc_getcd(struct mmc *mmc)
switch (cfg->esdhc_base) { case USDHC3_BASE_ADDR: + case USDHC4_BASE_ADDR: ret = 1; break; } @@ -102,7 +117,8 @@ int board_mmc_init(bd_t *bis) /* * According to the board_mmc_init() the following map is done: * (U-boot device node) (Physical Port) - * mmc0 USDHC3 + * mmc0 USDHC3 + * mmc1 USDHC4 */ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { switch (i) { @@ -110,6 +126,10 @@ int board_mmc_init(bd_t *bis) SETUP_IOMUX_PADS(usdhc3_pads); usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); break; + case 1: + SETUP_IOMUX_PADS(usdhc4_pads); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + break; default: printf("Warning - USDHC%d controller not supporting\n", i + 1); diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index 6f7195d..cd94c5f 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -124,7 +124,7 @@ /* MMC */ #ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0 -# define CONFIG_SYS_FSL_USDHC_NUM 1 +# define CONFIG_SYS_FSL_USDHC_NUM 2 # define CONFIG_SYS_FSL_ESDHC_ADDR 0 #endif
From: Jagan Teki jagan@amarulasolutions.com
Add runtime, modeboot env which is setting mmcboot based on the bootdevice so-that conditional macros for MMC via CONFIG_BOOTCOMMAND should be avoided in config files.
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/icorem6_rqs/icorem6_rqs.c | 18 ++++++++++++++++++ configs/imx6dl_icore_rqs_mmc_defconfig | 1 + configs/imx6q_icore_rqs_mmc_defconfig | 1 + include/configs/imx6qdl_icore_rqs.h | 32 ++++++++++++++++---------------- 4 files changed, 36 insertions(+), 16 deletions(-)
diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index 66cf487..4bb43d1 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -45,6 +45,24 @@ int board_init(void) return 0; }
+int board_late_init(void) +{ + switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >> + IMX6_BMODE_SHIFT) { + case IMX6_BMODE_SD: + case IMX6_BMODE_ESD: + case IMX6_BMODE_MMC: + case IMX6_BMODE_EMMC: + setenv("modeboot", "mmcboot"); + break; + default: + setenv("modeboot", ""); + break; + } + + return 0; +} + int dram_init(void) { gd->ram_size = imx_ddr_size(); diff --git a/configs/imx6dl_icore_rqs_mmc_defconfig b/configs/imx6dl_icore_rqs_mmc_defconfig index 3b10e99..b15fcb2 100644 --- a/configs/imx6dl_icore_rqs_mmc_defconfig +++ b/configs/imx6dl_icore_rqs_mmc_defconfig @@ -38,3 +38,4 @@ CONFIG_FEC_MXC=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y +CONFIG_BOARD_LATE_INIT=y diff --git a/configs/imx6q_icore_rqs_mmc_defconfig b/configs/imx6q_icore_rqs_mmc_defconfig index 8df4ef0..987fdf7 100644 --- a/configs/imx6q_icore_rqs_mmc_defconfig +++ b/configs/imx6q_icore_rqs_mmc_defconfig @@ -38,3 +38,4 @@ CONFIG_FEC_MXC=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y +CONFIG_BOARD_LATE_INIT=y diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index cd94c5f..c62c1d4 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -56,8 +56,7 @@ "fitboot=echo Booting FIT image from mmc ...; " \ "run mmcargs; " \ "bootm ${loadaddr}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ + "_mmcboot=run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if run loadfdt; then " \ "bootm ${loadaddr} - ${fdt_addr}; " \ @@ -70,23 +69,24 @@ "fi; " \ "else " \ "bootm; " \ - "fi\0" - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadfit; then " \ - "run fitboot; " \ + "fi\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "mmc dev ${mmcdev};" \ + "if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ + "if run loadfit; then " \ + "run fitboot; " \ + "else " \ + "if run loadimage; then " \ + "run _mmcboot; " \ + "fi; " \ "fi; " \ "fi; " \ - "fi; " \ - "fi" + "fi\0" + +#define CONFIG_BOOTCOMMAND "run $modeboot"
/* Miscellaneous configurable options */ #define CONFIG_SYS_MEMTEST_START 0x80000000
From: Jagan Teki jagan@amarulasolutions.com
Let the runtime code can set the mmcdev and mmcroot based on the devno using mmc_get_env_dev instead of defining separately in build-time configs using mmc_late_init func.
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/icorem6_rqs/icorem6_rqs.c | 22 ++++++++++++++++++++++ include/configs/imx6qdl_icore_rqs.h | 2 -- 2 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index 4bb43d1..f289e91 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -7,6 +7,7 @@ */
#include <common.h> +#include <mmc.h>
#include <asm/io.h> #include <asm/gpio.h> @@ -45,6 +46,24 @@ int board_init(void) return 0; }
+#ifdef CONFIG_ENV_IS_IN_MMC +static void mmc_late_init(void) +{ + char cmd[32]; + char mmcblk[32]; + u32 dev_no = mmc_get_env_dev(); + + setenv_ulong("mmcdev", dev_no); + + /* Set mmcblk env */ + sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no); + setenv("mmcroot", mmcblk); + + sprintf(cmd, "mmc dev %d", dev_no); + run_command(cmd, 0); +} +#endif + int board_late_init(void) { switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >> @@ -53,6 +72,9 @@ int board_late_init(void) case IMX6_BMODE_ESD: case IMX6_BMODE_MMC: case IMX6_BMODE_EMMC: +#ifdef CONFIG_ENV_IS_IN_MMC + mmc_late_init(); +#endif setenv("modeboot", "mmcboot"); break; default: diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index c62c1d4..3358320 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -40,9 +40,7 @@ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "fdt_addr=0x18000000\0" \ "boot_fdt=try\0" \ - "mmcdev=0\0" \ "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \
From: Jagan Teki jagan@amarulasolutions.com
Add board_mmc_get_env_dev
Switch the mmc env based on the mmc devno, instead of separately defining a config item in include/configs using board_mmc_get_env_dev - devno 0: sd/esd - devno 1: mmc/emmc
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/icorem6_rqs/icorem6_rqs.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index f289e91..d2f9309 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -47,6 +47,12 @@ int board_init(void) }
#ifdef CONFIG_ENV_IS_IN_MMC +int board_mmc_get_env_dev(int devno) +{ + /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ + return (devno == 3) ? 1 : 0; +} + static void mmc_late_init(void) { char cmd[32];
participants (3)
-
Eric Nelson -
Jagan Teki -
Jagan Teki