[PATCH v2 00/16] add initial support for broadcom NS3 soc
This patch series adds initial support for Broadcom Northstar 3 SoC. NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors targeting a broad range of networking applications.
Changes from v1: -Address review comments from Marek Vasut, Split the series into samller and logical series like core, driver.
-Address review comments from Simon Glass, Update MAINTAINERS file.
Abhishek Shah (1): board: ns3: add api to save boot parameters passed from BL31
Bharat Gooty (2): include/configs: ns3: add env variables for Linux boot include/configs: ns3: add support for flashing images
Bharat Kumar Reddy Gooty (1): board: ns3: limit U-boot relocation within 16MB memory
Rayagonda Kokatanur (12): board: ns3: add support for Broadcom Northstar 3 arm: cpu: armv8: add L3 memory flush support configs: ns3: enable clock subsystem arm: dts: ns3: add clock dt node dt-bindings: memory: ns3: add memory definitions board: ns3: default reset type to L3 dt-bindings: memory: ns3: update GIC LPI address board: ns3: program GIC LPI tables configs: ns3: enable GIC ITS LPI table programing dt-bindings: memory: ns3: add ddr memory definition board: ns3: define ddr memory layout MAINTAINERS: update maintainers for broadcom ns3 platform
MAINTAINERS | 17 +- arch/arm/Kconfig | 10 + arch/arm/cpu/armv8/Makefile | 1 + arch/arm/cpu/armv8/bcmns3/Makefile | 5 + arch/arm/cpu/armv8/bcmns3/lowlevel.S | 99 ++ arch/arm/dts/Makefile | 2 + arch/arm/dts/ns3-board.dts | 47 + arch/arm/dts/ns3-clock.dtsi | 34 + arch/arm/dts/ns3.dtsi | 34 + arch/arm/include/asm/arch-bcmns3/bl33_info.h | 26 + board/broadcom/bcmns3/Kconfig | 15 + board/broadcom/bcmns3/Makefile | 5 + board/broadcom/bcmns3/ns3.c | 196 ++++ configs/bcm_ns3_defconfig | 25 + include/configs/bcm_ns3.h | 901 +++++++++++++++++++ include/dt-bindings/memory/bcm-ns3-mc.h | 65 ++ 16 files changed, 1481 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv8/bcmns3/Makefile create mode 100644 arch/arm/cpu/armv8/bcmns3/lowlevel.S create mode 100644 arch/arm/dts/ns3-board.dts create mode 100644 arch/arm/dts/ns3-clock.dtsi create mode 100644 arch/arm/dts/ns3.dtsi create mode 100644 arch/arm/include/asm/arch-bcmns3/bl33_info.h create mode 100644 board/broadcom/bcmns3/Kconfig create mode 100644 board/broadcom/bcmns3/Makefile create mode 100644 board/broadcom/bcmns3/ns3.c create mode 100644 configs/bcm_ns3_defconfig create mode 100644 include/configs/bcm_ns3.h create mode 100644 include/dt-bindings/memory/bcm-ns3-mc.h
Add support for Broadcom Northstar 3 SoC. NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors targeting a broad range of networking applications.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- arch/arm/Kconfig | 10 ++++++ arch/arm/dts/Makefile | 2 ++ arch/arm/dts/ns3-board.dts | 24 +++++++++++++ arch/arm/dts/ns3.dtsi | 34 ++++++++++++++++++ board/broadcom/bcmns3/Kconfig | 15 ++++++++ board/broadcom/bcmns3/Makefile | 5 +++ board/broadcom/bcmns3/ns3.c | 65 ++++++++++++++++++++++++++++++++++ configs/bcm_ns3_defconfig | 20 +++++++++++ include/configs/bcm_ns3.h | 40 +++++++++++++++++++++ 9 files changed, 215 insertions(+) create mode 100644 arch/arm/dts/ns3-board.dts create mode 100644 arch/arm/dts/ns3.dtsi create mode 100644 board/broadcom/bcmns3/Kconfig create mode 100644 board/broadcom/bcmns3/Makefile create mode 100644 board/broadcom/bcmns3/ns3.c create mode 100644 configs/bcm_ns3_defconfig create mode 100644 include/configs/bcm_ns3.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b494bcae95..c5a4fefd96 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -728,6 +728,15 @@ config TARGET_BCMNS2 ARMv8 Cortex-A57 processors targeting a broad range of networking applications.
+config TARGET_BCMNS3 + bool "Support Broadcom NS3" + select ARM64 + select BOARD_LATE_INIT + help + Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit + ARMv8 Cortex-A72 processors targeting a broad range of networking + applications. + config ARCH_EXYNOS bool "Samsung EXYNOS" select DM @@ -1863,6 +1872,7 @@ source "board/broadcom/bcm968580xref/Kconfig" source "board/broadcom/bcmcygnus/Kconfig" source "board/broadcom/bcmnsp/Kconfig" source "board/broadcom/bcmns2/Kconfig" +source "board/broadcom/bcmns3/Kconfig" source "board/cavium/thunderx/Kconfig" source "board/cirrus/edb93xx/Kconfig" source "board/eets/pdu001/Kconfig" diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 2c123bd6da..ecb1705697 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -886,6 +886,8 @@ dtb-$(CONFIG_ARCH_BCM68360) += \ dtb-$(CONFIG_ARCH_BCM6858) += \ bcm968580xref.dtb
+dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb + dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts new file mode 100644 index 0000000000..54e56879a5 --- /dev/null +++ b/arch/arm/dts/ns3-board.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Broadcom + */ + +/dts-v1/; + +#include "ns3.dtsi" + +/ { + model = "NS3 model"; + + aliases { + serial0 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi new file mode 100644 index 0000000000..09098aac3a --- /dev/null +++ b/arch/arm/dts/ns3.dtsi @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Broadcom + */ + +#include "skeleton64.dtsi" + +/ { + compatible = "brcm,ns3"; + #address-cells = <2>; + #size-cells = <2>; + + memory { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x80000000>, + <0x8 0x80000000 0x1 0x80000000>; + }; + + hsls { + compatible = "simple-bus"; + dma-ranges; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x68900000 0x17700000>; + + uart1: uart@110000 { + compatible = "snps,dw-apb-uart"; + reg = <0x00110000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + status = "disabled"; + }; + }; +}; diff --git a/board/broadcom/bcmns3/Kconfig b/board/broadcom/bcmns3/Kconfig new file mode 100644 index 0000000000..8ce21f980d --- /dev/null +++ b/board/broadcom/bcmns3/Kconfig @@ -0,0 +1,15 @@ +if TARGET_BCMNS3 + +config SYS_BOARD + default "bcmns3" + +config SYS_VENDOR + default "broadcom" + +config SYS_SOC + default "bcmns3" + +config SYS_CONFIG_NAME + default "bcm_ns3" + +endif diff --git a/board/broadcom/bcmns3/Makefile b/board/broadcom/bcmns3/Makefile new file mode 100644 index 0000000000..3404260148 --- /dev/null +++ b/board/broadcom/bcmns3/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright 2020 Broadcom. + +obj-y := ns3.o diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c new file mode 100644 index 0000000000..0b9af6ad9b --- /dev/null +++ b/board/broadcom/bcmns3/ns3.c @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020 Broadcom. + * + */ + +#include <asm/io.h> +#include <common.h> +#include <asm/armv8/mmu.h> +#include <asm/system.h> +#include <fdtdec.h> + +static struct mm_region ns3_mem_map[] = { + { + .virt = 0x0UL, + .phys = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = ns3_mem_map; + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + return 0; +} + +int board_late_init(void) +{ + return 0; +} + +int dram_init(void) +{ + if (fdtdec_setup_mem_size_base() != 0) + return -EINVAL; + + return 0; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + + return 0; +} + +void reset_cpu(ulong addr) +{ + psci_system_reset(); +} diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig new file mode 100644 index 0000000000..a81541e394 --- /dev/null +++ b/configs/bcm_ns3_defconfig @@ -0,0 +1,20 @@ +CONFIG_ARM=y +CONFIG_TARGET_BCMNS3=y +CONFIG_SYS_TEXT_BASE=0xFF000000 +CONFIG_ENV_SIZE=0x80000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_LOGLEVEL=7 +CONFIG_SILENT_CONSOLE=y +CONFIG_SILENT_U_BOOT_ONLY=y +# CONFIG_SILENT_CONSOLE_UPDATE_ON_SET is not set +CONFIG_SUPPORT_RAW_INITRD=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="u-boot> " +CONFIG_SYS_XTRACE="n" +# CONFIG_CMD_SOURCE is not set +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="ns3-board" +CONFIG_DM=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h new file mode 100644 index 0000000000..02a736456a --- /dev/null +++ b/include/configs/bcm_ns3.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Broadcom. + * + */ + +#ifndef __BCM_NS3_H +#define __BCM_NS3_H + +#include <linux/sizes.h> + +#define CONFIG_HOSTNAME "NS3" + +/* Physical Memory Map */ +#define V2M_BASE 0x80000000 +#define PHYS_SDRAM_1 V2M_BASE + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x80000) + +/* + * Initial SP before reloaction is placed at end of first DRAM bank, + * which is 0x1_0000_0000. + * Just before re-loaction, new SP is updated and re-location happens. + * So pointing the initial SP to end of 2GB DDR is not a problem + */ +#define CONFIG_SYS_INIT_SP_ADDR (PHYS_SDRAM_1 + 0x80000000) +/* 12MB Malloc size */ +#define CONFIG_SYS_MALLOC_LEN (SZ_8M + SZ_4M) + +/* console configuration */ +#define CONFIG_SYS_NS16550_CLK 25000000 + +#define CONFIG_SYS_CBSIZE SZ_1K +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#endif /* __BCM_NS3_H */
Add L3 memory flush support for NS3.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- arch/arm/cpu/armv8/Makefile | 1 + arch/arm/cpu/armv8/bcmns3/Makefile | 5 ++ arch/arm/cpu/armv8/bcmns3/lowlevel.S | 90 ++++++++++++++++++++++++++++ 3 files changed, 96 insertions(+) create mode 100644 arch/arm/cpu/armv8/bcmns3/Makefile create mode 100644 arch/arm/cpu/armv8/bcmns3/lowlevel.S
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index b349b13f49..75d866f4d7 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -35,3 +35,4 @@ obj-$(CONFIG_S32V234) += s32v234/ obj-$(CONFIG_TARGET_HIKEY) += hisilicon/ obj-$(CONFIG_ARMV8_PSCI) += psci.o obj-$(CONFIG_ARCH_SUNXI) += lowlevel_init.o +obj-$(CONFIG_TARGET_BCMNS3) += bcmns3/ diff --git a/arch/arm/cpu/armv8/bcmns3/Makefile b/arch/arm/cpu/armv8/bcmns3/Makefile new file mode 100644 index 0000000000..a35e29d11a --- /dev/null +++ b/arch/arm/cpu/armv8/bcmns3/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright 2020 Broadcom. + +obj-y += lowlevel.o diff --git a/arch/arm/cpu/armv8/bcmns3/lowlevel.S b/arch/arm/cpu/armv8/bcmns3/lowlevel.S new file mode 100644 index 0000000000..202286248e --- /dev/null +++ b/arch/arm/cpu/armv8/bcmns3/lowlevel.S @@ -0,0 +1,90 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Broadcom + * + * Extracted from fsl-layerscape/lowlevel.S + */ + +#include <asm/macro.h> +#include <linux/linkage.h> + +hnf_pstate_poll: + /* x0 has the desired status, return 0 for success, 1 for timeout + * clobber x1, x2, x3, x4, x6, x7 + */ + mov x1, x0 + mov x7, #0 /* flag for timeout */ + mrs x3, cntpct_el0 /* read timer */ + mov w0, #600 + mov w6, #1000 + mul w0, w0, w6 + add x3, x3, x0 /* timeout after 100 microseconds */ + mov x0, #0x18 + movk x0, #0x6120, lsl #16 /* HNF0_PSTATE_STATUS */ + mov w6, #4 /* HN-F node count */ +1: + ldr x2, [x0] + cmp x2, x1 /* check status */ + b.eq 2f + mrs x4, cntpct_el0 + cmp x4, x3 + b.ls 1b + mov x7, #1 /* timeout */ + b 3f +2: + add x0, x0, #0x10000 /* move to next node */ + subs w6, w6, #1 + cbnz w6, 1b +3: + mov x0, x7 + ret + +hnf_set_pstate: + /* x0 has the desired state, clobber x1, x2, x6 */ + mov x1, x0 + /* power state to SFONLY */ + mov w6, #4 /* HN-F node count */ + mov x0, #0x10 + movk x0, #0x6120, lsl #16 /* HNF0_PSTATE_REQ */ +1: /* set pstate to sfonly */ + ldr x2, [x0] + and x2, x2, #0xfffffffffffffffc /* & HNFPSTAT_MASK */ + orr x2, x2, x1 + str x2, [x0] + add x0, x0, #0x10000 /* move to next node */ + subs w6, w6, #1 + cbnz w6, 1b + + ret + +ENTRY(__asm_flush_l3_dcache) + /* + * Return status in x0 + * success 0 + * timeout 1 for setting SFONLY, 2 for FAM, 3 for both + */ + mov x29, lr + mov x8, #0 + + dsb sy + mov x0, #0x1 /* HNFPSTAT_SFONLY */ + bl hnf_set_pstate + + mov x0, #0x4 /* SFONLY status */ + bl hnf_pstate_poll + cbz x0, 1f + mov x8, #1 /* timeout */ +1: + dsb sy + mov x0, #0x3 /* HNFPSTAT_FAM */ + bl hnf_set_pstate + + mov x0, #0xc /* FAM status */ + bl hnf_pstate_poll + cbz x0, 1f + add x8, x8, #0x2 +1: + mov x0, x8 + mov lr, x29 + ret +ENDPROC(__asm_flush_l3_dcache)
Enable clock subsystem for ns3.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- configs/bcm_ns3_defconfig | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index a81541e394..7e51a926f7 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -16,5 +16,7 @@ CONFIG_SYS_XTRACE="n" CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="ns3-board" CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_CCF=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y
Add clock dt node for ns3.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- arch/arm/dts/ns3-clock.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 arch/arm/dts/ns3-clock.dtsi
diff --git a/arch/arm/dts/ns3-clock.dtsi b/arch/arm/dts/ns3-clock.dtsi new file mode 100644 index 0000000000..faa5194607 --- /dev/null +++ b/arch/arm/dts/ns3-clock.dtsi @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Broadcom + */ + + osc: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + + crmu_ref25m: crmu_ref25m { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&osc>; + clock-div = <2>; + clock-mult = <1>; + }; + + hsls_25m_clk: hsls_25m_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&crmu_ref25m>; + clock-div = <1>; + clock-mult = <1>; + }; + + hsls_25m_div2_clk: hsls_25m_div2_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&hsls_25m_clk>; + clock-div = <2>; + clock-mult = <1>; + };
Add NS3 memory definitions.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- include/dt-bindings/memory/bcm-ns3-mc.h | 34 +++++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 include/dt-bindings/memory/bcm-ns3-mc.h
diff --git a/include/dt-bindings/memory/bcm-ns3-mc.h b/include/dt-bindings/memory/bcm-ns3-mc.h new file mode 100644 index 0000000000..b4f78584a5 --- /dev/null +++ b/include/dt-bindings/memory/bcm-ns3-mc.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2020 Broadcom + */ + +#ifndef DT_BINDINGS_BCM_NS3_MC_H +#define DT_BINDINGS_BCM_NS3_MC_H + +/* + * Reserved Memory Map : SHMEM & TZDRAM. + * +--------+----------+ 0x8D000000 + * | SHMEM (NS) | 16 MB + * +-------------------+ 0x8E000000 + * | | TEE_RAM(S)| 4MB + * + TZDRAM +----------+ 0x8E400000 + * | | TA_RAM(S) | 12MB + * +--------+----------+ 0x8F000000 + * | BL31 + TMON + LPM | + * | memory | 1MB + * +-------------------+ 0x8F100000 + */ + +#define BCM_NS3_MEM_SHARE_START 0x8D000000 +#define BCM_NS3_MEM_SHARE_LEN 0x020FFFFF + +/* ATF/U-boot/Linux error logs */ +#define BCM_NS3_MEM_ELOG_START 0x8F113000 +#define BCM_NS3_MEM_ELOG_LEN 0x00100000 + +/* CRMU Page table memroy */ +#define BCM_NS3_MEM_CRMU_PT_START 0x880000000 +#define BCM_NS3_MEM_CRMU_PT_LEN 0x200000 + +#endif
From: Abhishek Shah abhishek.shah@broadcom.com
Add API to save boot parameters passed from BL31
Use assembly implementation of save_boot_params instead of c function. Because generally ATF does not set up SP_EL2 on exiting. Thus, usage of a C function immediately after exiting with no stack setup done by ATF explicitly, may cause SP_EL2 to be not sane, which in turn causes a crash if this boot was not lucky to get an SP_EL2 in valid range. Replace C implementation with assembly one which does not use stack this early, and let u-boot to set up its stack later.
Signed-off-by: Abhishek Shah abhishek.shah@broadcom.com Signed-off-by: Rajesh Ravi rajesh.ravi@broadcom.com Signed-off-by: Vladimir Olovyannikov vladimir.olovyannikov@broadcom.com Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- arch/arm/cpu/armv8/bcmns3/lowlevel.S | 9 +++++++ arch/arm/include/asm/arch-bcmns3/bl33_info.h | 26 ++++++++++++++++++++ board/broadcom/bcmns3/ns3.c | 10 ++++++++ 3 files changed, 45 insertions(+) create mode 100644 arch/arm/include/asm/arch-bcmns3/bl33_info.h
diff --git a/arch/arm/cpu/armv8/bcmns3/lowlevel.S b/arch/arm/cpu/armv8/bcmns3/lowlevel.S index 202286248e..9d8eb7f117 100644 --- a/arch/arm/cpu/armv8/bcmns3/lowlevel.S +++ b/arch/arm/cpu/armv8/bcmns3/lowlevel.S @@ -88,3 +88,12 @@ ENTRY(__asm_flush_l3_dcache) mov lr, x29 ret ENDPROC(__asm_flush_l3_dcache) + +ENTRY(save_boot_params) +/* + * void set_boot_params(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3) + */ + adr x4, bl33_info + str x0, [x4] + b save_boot_params_ret +ENDPROC(save_boot_params) diff --git a/arch/arm/include/asm/arch-bcmns3/bl33_info.h b/arch/arm/include/asm/arch-bcmns3/bl33_info.h new file mode 100644 index 0000000000..bbc95b0186 --- /dev/null +++ b/arch/arm/include/asm/arch-bcmns3/bl33_info.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Broadcom. + * + */ + +#ifndef BL33_INFO_H +#define BL33_INFO_H +#include <asm/io.h> + +/* Increase version number each time this file is modified */ +#define BL33_INFO_VERSION 1 + +struct chip_info { + unsigned int chip_id; + unsigned int rev_id; +}; + +struct bl33_info { + unsigned int version; + struct chip_info chip; +}; + +extern struct bl33_info *bl33_info; + +#endif diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c index 0b9af6ad9b..f28e34ccc3 100644 --- a/board/broadcom/bcmns3/ns3.c +++ b/board/broadcom/bcmns3/ns3.c @@ -4,6 +4,7 @@ * */
+#include <asm/arch-bcmns3/bl33_info.h> #include <asm/io.h> #include <common.h> #include <asm/armv8/mmu.h> @@ -34,8 +35,17 @@ struct mm_region *mem_map = ns3_mem_map;
DECLARE_GLOBAL_DATA_PTR;
+/* + * Force the bl33_info to the data-section, as .bss will not be valid + * when save_boot_params is invoked. + */ +struct bl33_info *bl33_info __section(".data"); + int board_init(void) { + if (bl33_info->version != BL33_INFO_VERSION) + printf("*** warning: ATF BL31 and u-boot not in sync! ***\n"); + return 0; }
Default "reset" from u-boot to L3 reset. "reset" command with argument will trigger L1 reset.
Signed-off-by: Rajesh Ravi rajesh.ravi@broadcom.com Signed-off-by: Bharat Kumar Reddy Gooty bharat.gooty@broadcom.com Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- board/broadcom/bcmns3/ns3.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c index f28e34ccc3..6687028d19 100644 --- a/board/broadcom/bcmns3/ns3.c +++ b/board/broadcom/bcmns3/ns3.c @@ -69,7 +69,23 @@ int dram_init_banksize(void) return 0; }
-void reset_cpu(ulong addr) +void reset_cpu(ulong level) { - psci_system_reset(); +#define L3_RESET 30 + u32 reset_level, strap_val; + + /* Default reset type is L3 reset */ + if (!level) { + /* + * Encoding: u-boot reset command expects decimal argument + * strap val = 1st decimal digit;reset level = 2nd decimal digit + */ + strap_val = L3_RESET % 10; + level = L3_RESET / 10; + reset_level = level % 10; + psci_system_reset2(reset_level, strap_val); + } else { + /* U-boot cmd "reset" with any arg will trigger L1 reset */ + psci_system_reset(); + } }
Update NS3 GIC LPI address.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- include/dt-bindings/memory/bcm-ns3-mc.h | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/include/dt-bindings/memory/bcm-ns3-mc.h b/include/dt-bindings/memory/bcm-ns3-mc.h index b4f78584a5..d6e7717ba2 100644 --- a/include/dt-bindings/memory/bcm-ns3-mc.h +++ b/include/dt-bindings/memory/bcm-ns3-mc.h @@ -31,4 +31,7 @@ #define BCM_NS3_MEM_CRMU_PT_START 0x880000000 #define BCM_NS3_MEM_CRMU_PT_LEN 0x200000
+#define BCM_NS3_GIC_LPI_BASE 0x8AD70000 +#define BCM_NS3_GIC_LPI_SIZE 0x90000 + #endif
U-boot programs the GIC LPI configuration tables and enables the LPI table.
Signed-off-by: Bharat Kumar Reddy Gooty bharat.gooty@broadcom.com Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- board/broadcom/bcmns3/ns3.c | 12 ++++++++++++ include/configs/bcm_ns3.h | 6 ++++++ 2 files changed, 18 insertions(+)
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c index 6687028d19..7b93c53d9e 100644 --- a/board/broadcom/bcmns3/ns3.c +++ b/board/broadcom/bcmns3/ns3.c @@ -8,7 +8,10 @@ #include <asm/io.h> #include <common.h> #include <asm/armv8/mmu.h> +#include <asm/gic.h> +#include <asm/gic-v3.h> #include <asm/system.h> +#include <dt-bindings/memory/bcm-ns3-mc.h> #include <fdtdec.h>
static struct mm_region ns3_mem_map[] = { @@ -89,3 +92,12 @@ void reset_cpu(ulong level) psci_system_reset(); } } + +#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *fdt, bd_t *bd) +{ + gic_lpi_tables_init(BCM_NS3_GIC_LPI_BASE, MAX_GIC_REDISTRIBUTORS); + + return 0; +} +#endif /* CONFIG_OF_BOARD_SETUP */ diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 02a736456a..a17b9d51c0 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -37,4 +37,10 @@ #define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+/* Generic Interrupt Controller Definitions */ +#define GICD_BASE 0x63C00000 +#define GICR_BASE 0x63E00000 +/* Number of GIC re-distributors */ +#define MAX_GIC_REDISTRIBUTORS 8 + #endif /* __BCM_NS3_H */
Enables the GIC_V3 ITS LPI configuration table and LPI table.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com Signed-off-by: Bharat Kumar Reddy Gooty bharat.gooty@broadcom.com --- configs/bcm_ns3_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 7e51a926f7..040e753f9f 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_GIC_V3_ITS=y CONFIG_TARGET_BCMNS3=y CONFIG_SYS_TEXT_BASE=0xFF000000 CONFIG_ENV_SIZE=0x80000
Add ddr memory definitions.
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- include/dt-bindings/memory/bcm-ns3-mc.h | 30 ++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/memory/bcm-ns3-mc.h b/include/dt-bindings/memory/bcm-ns3-mc.h index d6e7717ba2..d04b842d19 100644 --- a/include/dt-bindings/memory/bcm-ns3-mc.h +++ b/include/dt-bindings/memory/bcm-ns3-mc.h @@ -7,7 +7,8 @@ #define DT_BINDINGS_BCM_NS3_MC_H
/* - * Reserved Memory Map : SHMEM & TZDRAM. + * +--------+----------+ 0x8B000000 + * | NITRO CRASH DUMP | 32MB * +--------+----------+ 0x8D000000 * | SHMEM (NS) | 16 MB * +-------------------+ 0x8E000000 @@ -20,6 +21,10 @@ * +-------------------+ 0x8F100000 */
+#define BCM_NS3_MEM_NITRO_CRASH_START 0x8AE00000 +#define BCM_NS3_MEM_NITRO_CRASH_LEN 0x21fffff +#define BCM_NS3_MEM_NITRO_CRASH_SIZE 0x2200000 + #define BCM_NS3_MEM_SHARE_START 0x8D000000 #define BCM_NS3_MEM_SHARE_LEN 0x020FFFFF
@@ -31,7 +36,30 @@ #define BCM_NS3_MEM_CRMU_PT_START 0x880000000 #define BCM_NS3_MEM_CRMU_PT_LEN 0x200000
+/* default memory starting address and length */ +#define BCM_NS3_MEM_START 0x80000000UL +#define BCM_NS3_MEM_LEN 0x80000000UL +#define BCM_NS3_MEM_END (BCM_NS3_MEM_START + BCM_NS3_MEM_LEN) + +/* memory starting address and length for BANK_1 */ +#define BCM_NS3_BANK_1_MEM_START 0x880000000UL +#define BCM_NS3_BANK_1_MEM_LEN 0x180000000UL + +/* memory layout information */ +#define BCM_NS3_DDR_INFO_BASE 0x8F220000 +#define BCM_NS3_DDR_INFO_RSVD_LEN 0x1000 +#define BCM_NS3_DDR_INFO_LEN 73 +#define BCM_NS3_DDR_INFO_SIG 0x42434d44 +#define BCM_NS3_MAX_NR_BANKS 4 + #define BCM_NS3_GIC_LPI_BASE 0x8AD70000 #define BCM_NS3_GIC_LPI_SIZE 0x90000
+#define BCM_NS3_MEM_RSVE_START BCM_NS3_GIC_LPI_BASE +#define BCM_NS3_MEM_RSVE_END ((BCM_NS3_MEM_ELOG_START + \ + BCM_NS3_MEM_ELOG_LEN) - \ + BCM_NS3_MEM_RSVE_START) + +#define BCM_NS3_CRMU_PGT_START 0x880000000UL +#define BCM_NS3_CRMU_PGT_SIZE 0x100000 #endif
Add both DRAM banks memory information and the corresponding MMU page table mappings.
Signed-off-by: Bharat Kumar Reddy Gooty bharat.gooty@broadcom.com Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- arch/arm/dts/ns3-board.dts | 23 ++++++++++ board/broadcom/bcmns3/ns3.c | 83 +++++++++++++++++++++++++++++++++++-- configs/bcm_ns3_defconfig | 2 + 3 files changed, 105 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts index 54e56879a5..c660e74dc8 100644 --- a/arch/arm/dts/ns3-board.dts +++ b/arch/arm/dts/ns3-board.dts @@ -5,6 +5,29 @@
/dts-v1/;
+#include <dt-bindings/memory/bcm-ns3-mc.h> + +/* + * Single mem reserve region which includes the following: + * Components name Start Addr Size + * ------------------------------------------------ + * GIC LPI tables 0x8AD7_0000 0x0009_0000 + * Nitro FW 0x8AE0_0000 0x0020_0000 + * Nitro Crash dump 0x8B00_0000 0x0200_0000 + * OPTEE OS 0x8D00_0000 0x0200_0000 + * BL31 services 0x8F00_0000 0x0010_0000 + * Tmon 0x8F10_0000 0x0000_1000 + * LPM/reserved 0x8F10_1000 0x0000_1000 + * ATF to Bl33 info 0x8F10_2000 0x0000_1000 + * ATF error logs 0x8F10_3000 0x0001_0000 + * Error log parser 0x8F11_3000 0x0010_0000 + */ + +/memreserve/ BCM_NS3_MEM_RSVE_START BCM_NS3_MEM_RSVE_END; + +/* CRMU page tables */ +/memreserve/ BCM_NS3_CRMU_PGT_START BCM_NS3_CRMU_PGT_SIZE; + #include "ns3.dtsi"
/ { diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c index 7b93c53d9e..514c2050b2 100644 --- a/board/broadcom/bcmns3/ns3.c +++ b/board/broadcom/bcmns3/ns3.c @@ -13,6 +13,9 @@ #include <asm/system.h> #include <dt-bindings/memory/bcm-ns3-mc.h> #include <fdtdec.h> +#include <fdt_support.h> + +#define BANK_OFFSET(bank) ((u64)BCM_NS3_DDR_INFO_BASE + 8 + ((bank) * 16))
static struct mm_region ns3_mem_map[] = { { @@ -23,9 +26,15 @@ static struct mm_region ns3_mem_map[] = { PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { - .virt = 0x80000000UL, - .phys = 0x80000000UL, - .size = 0x80000000UL, + .virt = BCM_NS3_MEM_START, + .phys = BCM_NS3_MEM_START, + .size = BCM_NS3_MEM_LEN, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = BCM_NS3_BANK_1_MEM_START, + .phys = BCM_NS3_BANK_1_MEM_START, + .size = BCM_NS3_BANK_1_MEM_LEN, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE }, { @@ -44,6 +53,72 @@ DECLARE_GLOBAL_DATA_PTR; */ struct bl33_info *bl33_info __section(".data");
+/* + * Run modulo 256 checksum calculation and return the calculated checksum + */ +static u8 checksum_calc(u8 *p, unsigned int len) +{ + unsigned int i; + u8 chksum = 0; + + for (i = 0; i < len; i++) + chksum += p[i]; + + return chksum; +} + +/* + * This function parses the memory layout informaion from a reserved area in + * DDR, and then fix up the FDT before passing it to Linux. + * + * In the case of error, do nothing and the default memory layout in DT will + * be used + */ +static void mem_info_parse_fixup(void *fdt) +{ + u32 *p32, sig, i, nr_banks; + u64 *p64; + u64 start[BCM_NS3_MAX_NR_BANKS]; + u64 len[BCM_NS3_MAX_NR_BANKS]; + + /* validate signature */ + p32 = (u32 *)BCM_NS3_DDR_INFO_BASE; + sig = *p32; + if (sig != BCM_NS3_DDR_INFO_SIG) { + printf("DDR info signature 0x%x invalid\n", sig); + return; + } + + /* run checksum test to validate data */ + if (checksum_calc((u8 *)p32, BCM_NS3_DDR_INFO_LEN) != 0) { + printf("Checksum on DDR info failed\n"); + return; + } + + /* parse information for each bank */ + nr_banks = 0; + for (i = 0; i < BCM_NS3_MAX_NR_BANKS; i++) { + /* skip banks with a length of zero */ + p64 = (u64 *)BANK_OFFSET(i); + if (*(p64 + 1) == 0) + continue; + + start[i] = *p64; + len[i] = *(p64 + 1); + + printf("mem[%u] 0x%llx - 0x%llx\n", i, start[i], + start[i] + len[i] - 1); + nr_banks++; + } + + if (!nr_banks) { + printf("No DDR banks detected\n"); + return; + } + + fdt_fixup_memory_banks(fdt, start, len, nr_banks); +} + int board_init(void) { if (bl33_info->version != BL33_INFO_VERSION) @@ -98,6 +173,8 @@ int ft_board_setup(void *fdt, bd_t *bd) { gic_lpi_tables_init(BCM_NS3_GIC_LPI_BASE, MAX_GIC_REDISTRIBUTORS);
+ mem_info_parse_fixup(fdt); + return 0; } #endif /* CONFIG_OF_BOARD_SETUP */ diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 040e753f9f..9adb44cb51 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_BCMNS3=y CONFIG_SYS_TEXT_BASE=0xFF000000 CONFIG_ENV_SIZE=0x80000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_OF_BOARD_SETUP=y CONFIG_LOGLEVEL=7 CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_U_BOOT_ONLY=y @@ -21,3 +22,4 @@ CONFIG_CLK=y CONFIG_CLK_CCF=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_SPL_OF_LIBFDT=y
From: Bharat Kumar Reddy Gooty bharat.gooty@broadcom.com
By default re-location happens to higher address of DDR, i.e, DDR start + DDR size.
Limit re-location to happen within 16MB memory, start 0xFF00_0000 and end 0x1_0000_0000
Signed-off-by: Bharat Kumar Reddy Gooty bharat.gooty@broadcom.com Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- board/broadcom/bcmns3/ns3.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c index 514c2050b2..51cab1aad3 100644 --- a/board/broadcom/bcmns3/ns3.c +++ b/board/broadcom/bcmns3/ns3.c @@ -121,6 +121,11 @@ static void mem_info_parse_fixup(void *fdt)
int board_init(void) { + /* Setup memory using "memory" node from DTB */ + if (fdtdec_setup_mem_size_base() != 0) + return -EINVAL; + fdtdec_setup_memory_banksize(); + if (bl33_info->version != BL33_INFO_VERSION) printf("*** warning: ATF BL31 and u-boot not in sync! ***\n");
@@ -134,19 +139,30 @@ int board_late_init(void)
int dram_init(void) { - if (fdtdec_setup_mem_size_base() != 0) - return -EINVAL; + /* + * Mark ram base as the last 16MB of 2GB DDR, which is 0xFF00_0000. + * So that relocation happens with in the last 16MB memory. + */ + gd->ram_base = (phys_size_t)(BCM_NS3_MEM_END - SZ_16M); + gd->ram_size = (unsigned long)SZ_16M;
return 0; }
int dram_init_banksize(void) { - fdtdec_setup_memory_banksize(); + gd->bd->bi_dram[0].start = (BCM_NS3_MEM_END - SZ_16M); + gd->bd->bi_dram[0].size = SZ_16M;
return 0; }
+/* Limit RAM used by U-Boot to the DDR first bank End region */ +ulong board_get_usable_ram_top(ulong total_size) +{ + return BCM_NS3_MEM_END; +} + void reset_cpu(ulong level) { #define L3_RESET 30
From: Bharat Gooty bharat.gooty@broadcom.com
Add env variables and commands for booting Linux.
Signed-off-by: Bharat Gooty bharat.gooty@broadcom.com Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- include/configs/bcm_ns3.h | 366 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 366 insertions(+)
diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index a17b9d51c0..5e135ec319 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -43,4 +43,370 @@ /* Number of GIC re-distributors */ #define MAX_GIC_REDISTRIBUTORS 8
+/* + * Increase max uncompressed/gunzip size, keeping size same as EMMC linux + * partition. + */ +#define CONFIG_SYS_BOOTM_LEN 0x01800000 + +/* Env configuration */ +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 0 + +/* Access eMMC Boot_1 and Boot_2 partitions */ +#define CONFIG_SUPPORT_EMMC_BOOT + +/* enable 64-bit PCI resources */ +#define CONFIG_SYS_PCI_64BIT 1 + +#define CONSOLE_ARGS "console_args=console=ttyS0,115200n8\0" +#define MAX_CPUS "max_cpus=maxcpus=8\0" +#define OS_LOG_LEVEL "log_level=loglevel=7\0" +#define EXTRA_ARGS "extra_args=earlycon=uart8250,mmio32,0x68A10000 " \ + "earlyelog=" __stringify(ELOG_AP_UART_LOG_BASE) ",0x10000 " \ + "crashkernel=512M reboot=w\0" + +#define PCIE_ARGS "pcie_args=pci=pcie_bus_safe pcie_ports=native vfio_pci.disable_idle_d3=1\0" + +#ifdef CONFIG_BCM_SF2_ETH +#define ETH_ADDR "ethaddr=00:0A:F7:95:65:A4\0" +#define NET_ARGS "bgmac_platform.ethaddr=${ethaddr} " \ + "ip=${ipaddr}::${gatewayip}:${netmask}::${ethif}:off" +#else +#define ETH_ADDR +#define NET_ARGS +#endif + +#define RESERVED_MEM "reserved_mem=memmap=0xff000000$0x1000000\0" + +#define BASE_ARGS "${console_args} ${extra_args} ${pcie_args}" \ + " ${max_cpus} ${log_level} ${reserved_mem}" +#define SETBOOTARGS "setbootargs=setenv bootargs " BASE_ARGS " " NET_ARGS "\0" + +#define UPDATEME_FLASH_PARAMS "bcm_compat_level=4\0" \ + "bcm_need_recovery_rootfs=0\0" \ + "bcm_bl_flash_pending_rfs_imgs=0\0" + +#define KERNEL_LOADADDR_CFG \ + "fit_image_loadaddr=0x90000000\0" \ + "dtb_loadaddr=0x82000000\0" + +#define INITRD_ARGS "initrd_args=root=/dev/ram rw\0" +#define INITRD_LOADADDR "initrd_loadaddr=0x92000000\0" +#define INITRD_IMAGE "initrd_image=rootfs-lake-bcm958742t.cpio.gz\0" +#define MMC_DEV "sd_device_number=0\0" +#define EXEC_STATE "exec_state=normal\0" + +#define EXT4RD_ARGS "ext4rd_args="\ + "root=/dev/mmcblk${sd_device_number}p${gpt_partition_entry} rw rootwait\0" + +#define WDT_CNTRL "wdt_enable=1\0" \ + "wdt_timeout_sec=0\0" + +#define ELOG_SETUP \ + "mbox0_addr=0x66424024\0"\ + "elog_setup="\ + "if logsetup -s ${mbox0_addr}; then "\ + "else "\ + "echo ELOG is not supported by this version of the MCU patch.;"\ + "exit;"\ + "fi;"\ + "if logsetup -c ${mbox0_addr}; then "\ + "echo ELOG is ready;"\ + "else "\ + "echo ELOG is supported, but is not set up.;"\ + "echo Getting setup file from the server ${serverip}...;"\ + "if tftp ${tftp_dir}elog_src.txt; then "\ + "echo Setting up ELOG. Please wait...;"\ + "if logsetup ${loadaddr} ${mbox0_addr} ${filesize}; "\ + "then "\ + "else "\ + "echo [logsetup] ERROR.;"\ + "fi;"\ + "if logsetup -c ${mbox0_addr}; then "\ + "echo ELOG is READY.;"\ + "else "\ + "echo ELOG is NOT SET UP.;"\ + "fi;"\ + "else "\ + "echo ELOG setup file is not available on the server.;"\ + "fi;"\ + "fi \0" + +/* eMMC partition for FIT images */ +#define FIT_MMC_PARTITION \ + "fit_partitions=" \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=env,size=512K,uuid=${uuid_gpt_env};" \ + "name=Image_rsa.img,size=24MiB,uuid=${uuid_gpt_linux};" \ + "name=Image1_rsa.img,size=24MiB,uuid=${uuid_gpt_linux1};" \ + "name=Image2_rsa.img,size=24MiB,uuid=${uuid_gpt_linux2};" \ + "name=nitro,size=8MiB,uuid=${uuid_gpt_nitro};" \ + "name=recovery,size=940MiB,uuid=${uuid_gpt_recovery};" \ + "name=rootfs,size=-,uuid=${uuid_gpt_prootfs}\0" + +/* QSPI layout + * |---------------------------|->0x000000 + * | | + * | | + * | fip.bin | + * | 2MB | + * | | + * ~ ~ + * ~ ~ + * | | + * | | + * | | + * |---------------------------|->0x200000 + * | | + * | | + * | | + * | fip.bin (Mirror) | + * | 2MB | + * ~ ~ + * ~ ~ + * | | + * | | + * | | + * |---------------------------|->0x400000 + * | Nitro_itb | + * | + | + * | Nitro NS3 Config | + * | + | + * | Nitro NS3Z Config | + * | 1.5M | + * | | + * ~ ~ + * ~ ~ + * | | + * |---------------------------|->0x580000 + * | Nitro_itb | + * | + | + * | Nitro NS3 Config | + * | + | + * | Nitro NS3Z Config | + * | 1.5M | + * | (Mirror) | + * ~ ~ + * ~ ~ + * | | + * |---------------------------|->0x700000 + * | Nitro NS3 bspd Config | + * | 64KB | + * ~ ~ + * ~ ~ + * | | + * |---------------------------|->0x710000 + * | Nitro NS3 bspd Config | + * | 64KB | + * ~ (Mirror) ~ + * ~ ~ + * | | + * |---------------------------|->0x720000 + * | SHMOO | + * | 64KB | + * | | + * ~ ~ + * ~ ~ + * |---------------------------|->0x730000 + * | Meta Data | + * | 832KB | + * | | + * ~ ~ + * ~ ~ + * | | + * |---------------------------| + */ + +#define QSPI_FLASH_NITRO_PARAMS \ + "spi_nitro_img_bin_start=0x400000\0" \ + "spi_nitro_img_bin_mirror_start=0x580000\0" \ + "spi_nitro_bspd_cfg_start=0x700000\0" \ + "spi_nitro_bspd_mirror_cfg_start=0x710000\0" \ + +#define QSPI_ACCESS_ENABLE \ + "qspi_access_en=" \ + "mw 0x68a403e8 1;" \ + "mw 0x68a403ec 1;" \ + "mw 0x68a403f0 1;" \ + "mw 0x68a403f4 1;" \ + "mw 0x68a403f8 1;" \ + "mw 0x68a403fc 1 \0" + +#define FUNC_QSPI_PROBE \ + "func_qspi_probe="\ + "if run qspi_access_en; then "\ + "else "\ + "echo ${errstr} run qspi_access_en ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if sf probe 0; then "\ + "else "\ + "echo echo ${errstr} sf probe command ** FAILED **;"\ + "exit;"\ + "fi \0" + +#define NITRO_FW_IMAGES \ + "nitro_bin=nitro.img\0" \ + "nitro_bspd_cfg=nitro_fb_bspd_config.bin\0" + +#define FASTBOOT_NITRO_SETUP \ + "nitro_fastboot_type=1\0" \ + "nitro_fastboot_secure=1\0" \ + "nitro_fastboot_img_buffer=0\0" \ + "nitro_fit_img_loc=0x90000000\0" + +#define FASTBOOT_SETUP \ + "fastboot_nitro_setup=" \ + "setenv errstr fastboot_setup;" \ + "run func_qspi_probe;" \ + /* first load header only */ \ + "if sf read ${nitro_fit_img_loc} "\ + "${spi_nitro_img_bin_start} 0x18; then "\ + "else "\ + "echo [fastboot_nitro_setup] sf read "\ + "${spi_nitro_img_bin_start} ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if spi_nitro_images_addr ${nitro_fit_img_loc} "\ + "${spi_nitro_img_bin_start}; then "\ + "else "\ + "echo [fastboot_nitro_setup] spi_nitro_images_addr "\ + "** FAILED **;"\ + "exit;"\ + "fi \0" + +#define CHECK_CHIMP_HS\ + "check_chimp_hs=chimp_hs"\ + "\0" + +#define FASTBOOT_NITRO "fastboot_nitro=chimp_ld_secure\0" + +#define FIT_IMAGE "fit_image=Image_rsa.img\0" +#define BOOTCMD_MMC_FIT \ + "bootcmd_mmc_fit="\ + "mmc dev ${sd_device_number};"\ + "if test $exec_state = normal; then " \ + "setenv use_rootfs rootfs;"\ + "else " \ + "setenv use_rootfs recovery;"\ + "fi;" \ + "echo used filesystem :${use_rootfs};"\ + "gpt setenv mmc ${sd_device_number} ${use_rootfs};"\ + "setenv bootargs_fs ${setbootargs} ${ext4rd_args}; run bootargs_fs;"\ + "gpt setenv mmc ${sd_device_number} ${fit_image};"\ + "mmc read ${fit_image_loadaddr} ${gpt_partition_addr} "\ + "${gpt_partition_size};"\ + "bootm ${fit_image_loadaddr}\0" + +#define BOOTCMD_MMC_FITS \ + "bootcmd_mmc_fits="\ + "setenv mmc_fit0 " \ + "'setenv fit_image Image_rsa.img; run bootcmd_mmc_fit';"\ + "setenv mmc_fit1 " \ + "'setenv fit_image Image1_rsa.img; run bootcmd_mmc_fit';"\ + "setenv mmc_fit2 " \ + "'setenv fit_image Image2_rsa.img; run bootcmd_mmc_fit';"\ + "run mmc_fit0 || run mmc_fit1 || run mmc_fit2\0" + +#define USBDEV "usbdev=0\0" +#define BOOTCMD_USB\ + "bootcmd_usb="\ + "setenv usb_image_loadaddr 90000000;"\ + "setenv fit_image Image_rsa.img;"\ + "setenv bootargs_fs ${setbootargs} ${initrd_args}; run bootargs_fs;"\ + "if usb dev ${usbdev}; && usb start; then "\ + "echo Booting from USB...;"\ + "fatload usb ${usbdev} ${usb_image_loadaddr} ${fit_image};"\ + "fatload usb ${usbdev} ${initrd_loadaddr} ${initrd_image};"\ + "bootm ${usb_image_loadaddr} ${initrd_loadaddr}:${filesize};"\ + "fi;"\ + "\0" + +#define START_PCI\ + "start_pci=pci e "\ + "\0" + +#define BNXT_LOAD\ + "bnxt_load=bnxt 0 probe "\ + "\0" + +#define BOOTCMD_PXE\ + "bootcmd_pxe="\ + "run check_chimp_hs && "\ + "run start_pci && "\ + "run bnxt_load;"\ + "setenv ethact bnxt_eth0;"\ + "setenv autoload no;"\ + "setenv bootargs_fs ${setbootargs} ${initrd_args}; run bootargs_fs;"\ + "if dhcp; then "\ + "setenv pxefile_addr_r ${loadaddr};"\ + "if pxe get; then "\ + "setenv ramdisk_addr_r ${initrd_loadaddr};"\ + "setenv kernel_addr_r ${fit_image_loadaddr};"\ + "pxe boot; "\ + "fi;"\ + "fi;"\ + "\0" + +#define FLASH_PENDING_RFS_IMGS \ + "flash_pending_rfs_imgs=" \ + "if test $bcm_bl_flash_pending_rfs_imgs = 1; then " \ + "if test $bl_flash_pending_rfs_imgs = rootfs; then " \ + "dhcp;" \ + "run mmc_flash_rootfs;" \ + "fi;" \ + "if test $bl_flash_pending_rfs_imgs = recovery; then " \ + "dhcp;" \ + "run mmc_flash_recovery;" \ + "fi;" \ + "setenv bl_flash_pending_rfs_imgs;" \ + "fi; \0" + +#define CONFIG_BOOTCOMMAND "run flash_pending_rfs_imgs;" \ + "run fastboot_nitro && "\ + "run bootcmd_mmc_fits || "\ + "run bootcmd_usb || "\ + "run bootcmd_pxe" + +#define ARCH_ENV_SETTINGS \ + CONSOLE_ARGS \ + MAX_CPUS \ + OS_LOG_LEVEL \ + EXTRA_ARGS \ + PCIE_ARGS \ + ETH_ADDR \ + RESERVED_MEM \ + SETBOOTARGS \ + UPDATEME_FLASH_PARAMS \ + KERNEL_LOADADDR_CFG\ + INITRD_ARGS \ + INITRD_LOADADDR \ + INITRD_IMAGE \ + MMC_DEV \ + EXEC_STATE \ + EXT4RD_ARGS \ + WDT_CNTRL \ + ELOG_SETUP \ + FIT_MMC_PARTITION \ + QSPI_FLASH_NITRO_PARAMS \ + QSPI_ACCESS_ENABLE \ + FUNC_QSPI_PROBE \ + NITRO_FW_IMAGES \ + FASTBOOT_NITRO_SETUP \ + FASTBOOT_SETUP \ + CHECK_CHIMP_HS \ + FASTBOOT_NITRO \ + FIT_IMAGE \ + BOOTCMD_MMC_FIT \ + BOOTCMD_MMC_FITS \ + USBDEV \ + BOOTCMD_USB \ + START_PCI \ + BNXT_LOAD \ + BOOTCMD_PXE \ + FLASH_PENDING_RFS_IMGS + +#define CONFIG_EXTRA_ENV_SETTINGS \ + ARCH_ENV_SETTINGS #endif /* __BCM_NS3_H */
From: Bharat Gooty bharat.gooty@broadcom.com
Add support for flashing images into QSPI and eMMC.
Signed-off-by: Bharat Gooty bharat.gooty@broadcom.com Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- include/configs/bcm_ns3.h | 491 +++++++++++++++++++++++++++++++++++++- 1 file changed, 490 insertions(+), 1 deletion(-)
diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 5e135ec319..d2d140a7df 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -369,6 +369,483 @@ "run bootcmd_usb || "\ "run bootcmd_pxe"
+/* Flashing commands */ +#define TFTP_QSPI_PARAM \ + "fip_qspi_addr=0x0\0"\ + "fip_qspi_mirror_addr=0x200000\0"\ + "loadaddr=0x90000000\0"\ + "tftpblocksize=1468\0"\ + "qspi_flash_fip=fip\0"\ + +/* Flash fit_GPT partition to eMMC */ +#define MMC_FLASH_FIT_GPT \ + "mmc_flash_gpt="\ + "if mmc dev ${sd_device_number}; then "\ + "else "\ + "echo [mmc_flash_gpt] mmc dev ${sd_device_number} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if gpt write mmc ${sd_device_number} ${fit_partitions}; then "\ + "else "\ + "echo [mmc_flash_gpt] gpt write ${fit_partitions} "\ + "** FAILED **;"\ + "exit;"\ + "fi \0" + +#define MMC_FLASH_IMAGE_RSA \ + "mmc_flash_image_rsa="\ + "if mmc dev ${sd_device_number}; then "\ + "else "\ + "echo [mmc_flash_image_rsa] mmc dev ${sd_device_number} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if gpt setenv mmc ${sd_device_number} ${fit_image}; then "\ + "else "\ + "echo [mmc_flash_image_rsa] gpt setenv ${fit_image} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if tftp ${loadaddr} ${tftp_dir}${fit_image}; then "\ + "if test ${fit_image} = Image_rsa.img; then "\ + "if setenv tftp_fit_image yes; then "\ + "else "\ + "echo [mmc_flash_image_rsa] "\ + "setenv tftp_fit_image to yes"\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "fi;"\ + "else "\ + "if test ${fit_image} = Image_rsa.img; then "\ + "echo [mmc_flash_image_rsa] tftp "\ + "${tftp_dir}${fit_image} ** FAILED **;"\ + "else "\ + "if test ${tftp_fit_image} = yes; then "\ + "if mmc write ${loadaddr} "\ + "${gpt_partition_addr} "\ + "${fileblocks}; then "\ + "else "\ + "echo "\ + "[mmc_flash_image_rsa] "\ + "mmc write "\ + "${gpt_partition_addr} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "else "\ + "echo [mmc_flash_image_rsa] tftp "\ + "${tftp_dir}${fit_image} "\ + "** FAILED **;"\ + "fi;"\ + "fi;"\ + "exit;"\ + "fi;"\ + "if math add filesize filesize 1FF; then "\ + "else "\ + "echo [mmc_flash_image_rsa] math add command ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if math div fileblocks filesize 200; then "\ + "else "\ + "echo [mmc_flash_image_rsa] math div command ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if mmc write ${loadaddr} ${gpt_partition_addr} ${fileblocks}; then "\ + "else "\ + "echo [mmc_flash_image_rsa] mmc write ${gpt_partition_addr} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if setenv image_sz_blk_cnt ${fileblocks}; then "\ + "else "\ + "echo [mmc_flash_image_rsa] setenv image_sz_blk_cnt ** "\ + "FAILED **;"\ + "exit;"\ + "fi;"\ + "if saveenv; then "\ + "else "\ + "echo [mmc_flash_image_rsa] saveenv command ** FAILED **;"\ + "exit;"\ + "fi \0" + +#define MMC_FLASH_RECOVERY \ + "mmc_flash_recovery="\ + "if mmc dev ${sd_device_number}; then "\ + "else "\ + "echo [mmc_flash_recovery] mmc dev ${sd_device_number} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if gpt setenv mmc ${sd_device_number} recovery; then "\ + "else "\ + "echo [mmc_flash_recovery] gpt setenv recovery ** FAILED **;"\ + "exit;"\ + "fi;"\ + "setenv index 1;"\ + "while tftp ${loadaddr} "\ + "${tftp_dir}${gpt_partition_name}/chunk_00${index}; do "\ + "if math add filesize filesize 1FF; then "\ + "else "\ + "echo [mmc_flash_recovery] math add command "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if math div fileblocks filesize 200; then "\ + "else "\ + "echo [mmc_flash_recovery] math div command "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if mmc write ${loadaddr} ${gpt_partition_addr} "\ + "${fileblocks}; then "\ + "else "\ + "echo [mmc_flash_recovery] mmc write "\ + "${gpt_partition_addr} ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if math add index index 1; then "\ + "else "\ + "echo [mmc_flash_recovery] math add command "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if math add gpt_partition_addr gpt_partition_addr"\ + " ${fileblocks}; then "\ + "else "\ + "echo [mmc_flash_recovery] math add command"\ + " ** FAILED **;"\ + "exit;"\ + "fi;"\ + "done;"\ + "if itest ${index} -ne 1; then "\ + "else "\ + "echo [mmc_flash_recovery] "\ + "${tftp_dir}${gpt_partition_name}/chunk_00${index} file "\ + "not found ** FAILED **;"\ + "exit;"\ + "fi \0" + +#define MMC_FLASH_ROOTFS \ + "mmc_flash_rootfs="\ + "if mmc dev ${sd_device_number}; then "\ + "else "\ + "echo [mmc_flash_rootfs] mmc dev ${sd_device_number} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if gpt setenv mmc ${sd_device_number} rootfs; then "\ + "else "\ + "echo [mmc_flash_rootfs] gpt setenv rootfs ** FAILED **;"\ + "exit;"\ + "fi;"\ + "setenv index 1;"\ + "while tftp ${loadaddr} "\ + "${tftp_dir}${gpt_partition_name}/chunk_00${index}; do "\ + "if math add filesize filesize 1FF; then "\ + "else "\ + "echo [mmc_flash_rootfs] math add command "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if math div fileblocks filesize 200; then "\ + "else "\ + "echo [mmc_flash_rootfs] math div command "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if mmc write ${loadaddr} ${gpt_partition_addr} "\ + "${fileblocks}; then "\ + "else "\ + "echo [mmc_flash_rootfs] mmc write "\ + "${gpt_partition_addr} ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if math add index index 1; then "\ + "else "\ + "echo [mmc_flash_rootfs] math add command "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if math add gpt_partition_addr gpt_partition_addr"\ + " ${fileblocks}; then "\ + "else "\ + "echo [mmc_flash_rootfs] math add command"\ + " ** FAILED **;"\ + "exit;"\ + "fi;"\ + "done;"\ + "if itest ${index} -ne 1; then "\ + "else "\ + "echo [mmc_flash_rootfs] "\ + "${tftp_dir}${gpt_partition_name}/chunk_00${index} file "\ + "not found ** FAILED **;"\ + "exit;"\ + "fi \0" + +/* + * For individual flash commands like mmc_flash_gpt, it is not + * necessary to check for errors. + * If any of its intermediate commands fails, then next commands + * will not execute. Script will exit from the failure command. + * For uniformity, checking for mmc_flash_gpt, mmc_flash_image_rsa + * mmc_flash_nitro and mmc_flash_rootfs + */ +#define MMC_FLASH \ + "flash_mmc="\ + "if run mmc_flash_gpt; then "\ + "else "\ + "echo [flash_mmc] run mmc_flash_gpt ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if setenv tftp_fit_image no; then "\ + "else "\ + "echo [flash_mmc] setenv tftp_fit_image to no "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if setenv fit_image Image_rsa.img; then "\ + "else "\ + "echo [flash_mmc] setenv fit_image to Image_rsa.img "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if run mmc_flash_image_rsa; then "\ + "else "\ + "echo [flash_mmc] run mmc_flash_image_rsa ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if setenv fit_image Image1_rsa.img; then "\ + "else "\ + "echo [flash_mmc] setenv fit_image to Image1_rsa.img "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if run mmc_flash_image_rsa; then "\ + "else "\ + "echo [flash_mmc] run mmc_flash_image_rsa "\ + "for Image1_rsa.img ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if setenv fit_image Image2_rsa.img; then "\ + "else "\ + "echo [flash_mmc] setenv fit_image to Image2_rsa.img "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if run mmc_flash_image_rsa; then "\ + "else "\ + "echo [flash_mmc] run mmc_flash_image_rsa "\ + "for Image2_rsa.img ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if run mmc_flash_recovery; then "\ + "else "\ + "echo [flash_mmc] run mmc_flash_recovery ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if run mmc_flash_rootfs; then "\ + "else "\ + "echo [flash_mmc] run mmc_flash_rootfs ** FAILED **;"\ + "exit;"\ + "fi \0" + +#define FUNC_ALIGN_QSPI_ERASE_BLOCK_SIZE \ + "align_erase_blk_size=" \ + "setenv fl_write_size 0;" \ + "if math add fl_write_size filesize FFFF; then "\ + "else "\ + "echo ${errstr} math add command ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if math div fl_write_size fl_write_size 10000; then "\ + "else "\ + "echo ${errstr} math div command ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if math mul fl_write_size fl_write_size 10000; then "\ + "else "\ + "echo ${errstr} math mul command ** FAILED **;"\ + "exit;"\ + "fi \0" + +#define QSPI_FLASH_FIP \ + "flash_fip="\ + "if run qspi_access_en; then "\ + "else "\ + "echo [flash_fip] run qspi_access_en ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if tftp ${loadaddr} ${tftp_dir}fip.bin; then "\ + "else "\ + "echo [flash_fip] tftp ${tftp_dir}fip.bin "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if math add tmpsize filesize FFFF; then "\ + "else "\ + "echo [flash_fip] math add command ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if math div tmpsize tmpsize 10000; then "\ + "else "\ + "echo [flash_fip] math div command ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if math mul tmpsize tmpsize 10000; then "\ + "else "\ + "echo [flash_fip] math mul command ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if sf probe 0; then "\ + "else "\ + "echo [flash_fip] sf probe command ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if sf erase ${fip_qspi_addr} ${tmpsize}; then "\ + "else "\ + "echo [flash_fip] sf erase ${fip_qspi_addr} ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if sf write ${loadaddr} ${fip_qspi_addr} ${filesize}; then "\ + "else "\ + "echo [flash_fip] sf write ${fip_qspi_addr} ** FAILED **;"\ + "exit;"\ + "fi;"\ + /* Flash mirror FIP image */ \ + "if sf erase ${fip_qspi_mirror_addr} ${tmpsize}; then "\ + "else "\ + "echo [flash_fip] sf erase ${fip_qspi_mirror_addr} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if sf write ${loadaddr} ${fip_qspi_mirror_addr} ${filesize}; then "\ + "else "\ + "echo [flash_fip] sf write ${fip_qspi_mirror_addr} "\ + "** FAILED **;"\ + "exit;"\ + "fi \0" + +#define QSPI_FLASH_NITRO \ + "flash_nitro="\ + "run func_qspi_probe; "\ + "if tftp ${loadaddr} ${tftp_dir}${nitro_bin}; then "\ + "else "\ + "echo [flash_nitro] tftp ${tftp_dir}${nitro_bin} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "setenv errstr flash_nitro;" \ + "run align_erase_blk_size;" \ + /* Flash Nitro fw fit + configuration */ \ + "if sf erase ${spi_nitro_img_bin_start} ${fl_write_size}; then "\ + "else "\ + "echo [flash_nitro] sf erase ${spi_nitro_img_bin_start} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if sf write ${loadaddr} ${spi_nitro_img_bin_start}" \ + " ${fl_write_size}; then "\ + "else "\ + "echo [flash_nitro] sf write ${spi_nitro_bin_start} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + /* Mirror of Flash Nitro fw fit + configuration */ \ + "if sf erase ${spi_nitro_img_bin_mirror_start} ${fl_write_size}; then "\ + "else "\ + "echo [flash_nitro] sf erase "\ + "${spi_nitro_img_bin_mirror_start} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if sf write ${loadaddr} ${spi_nitro_img_bin_mirror_start}" \ + " ${fl_write_size}; then "\ + "else "\ + "echo [flash_nitro] sf write "\ + "${spi_nitro_img_bin_mirror_start} "\ + "** FAILED **;"\ + "exit;"\ + "fi \0" + +#define QSPI_FLASH_NITRO_BSPD_CONFIG \ + "flash_nitro_bspd_config="\ + "run func_qspi_probe; "\ + /* Flash BSPD configuration */ \ + "if tftp ${loadaddr} ${tftp_dir}${nitro_bspd_cfg}; then "\ + "setenv bspd_cfg_avialable 1; "\ + "setenv errstr flash_nitro_bspd_config; "\ + "run align_erase_blk_size;" \ + "if sf erase ${spi_nitro_bspd_cfg_start} "\ + "${fl_write_size}; then "\ + "else "\ + "echo [flash_nitro] sf erase "\ + "${spi_nitro_bspd_cfg_start} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if sf write ${loadaddr} ${spi_nitro_bspd_cfg_start} "\ + "${fl_write_size}; then "\ + "else "\ + "echo [flash_nitro] sf write "\ + "${spi_nitro_bspd_cfg_start} "\ + "** FAILED **;"\ + "exit;"\ + "fi;" \ + /* Flash BSPD mirror configuration */ \ + "if sf erase ${spi_nitro_bspd_mirror_cfg_start} "\ + "${fl_write_size}; then "\ + "else "\ + "echo [flash_nitro] sf erase "\ + "${spi_nitro_bspd_mirror_cfg_start} "\ + "** FAILED **;"\ + "exit;"\ + "fi;"\ + "if sf write ${loadaddr} ${spi_nitro_bspd_mirror_cfg_start} "\ + "${fl_write_size}; then "\ + "else "\ + "echo [flash_nitro] sf write "\ + "${spi_nitro_bspd_mirror_cfg_start} "\ + "** FAILED **;"\ + "exit;"\ + "fi;" \ + "else "\ + "echo [flash_nitro] tftp ${tftp_dir}${nitro_bspd_cfg} "\ + "** Skip flashing bspd config file **;"\ + "fi \0" + +#define QSPI_FLASH \ + "flash_qspi="\ + "if run qspi_access_en; then "\ + "else "\ + "echo [flash_qspi] run qspi_access_en ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if run flash_fip; then "\ + "else "\ + "echo [flash_qspi] run flash_fip ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if run flash_nitro; then "\ + "else "\ + "echo [flash_qspi] run flash_nitro ** FAILED **;"\ + "exit;"\ + "fi \0" + +#define FLASH_IMAGES \ + "flash_images=" \ + "if run flash_qspi; then "\ + "else "\ + "echo [flash_images] run flash_qspi ** FAILED **;"\ + "exit;"\ + "fi;"\ + "if run flash_mmc; then "\ + "else "\ + "echo [flash_images] run flash_mmc ** FAILED **;"\ + "exit;"\ + "fi \0" + #define ARCH_ENV_SETTINGS \ CONSOLE_ARGS \ MAX_CPUS \ @@ -405,7 +882,19 @@ START_PCI \ BNXT_LOAD \ BOOTCMD_PXE \ - FLASH_PENDING_RFS_IMGS + FLASH_PENDING_RFS_IMGS \ + TFTP_QSPI_PARAM \ + MMC_FLASH_FIT_GPT \ + MMC_FLASH_IMAGE_RSA \ + MMC_FLASH_RECOVERY \ + MMC_FLASH_ROOTFS \ + MMC_FLASH \ + FUNC_ALIGN_QSPI_ERASE_BLOCK_SIZE \ + QSPI_FLASH_FIP \ + QSPI_FLASH_NITRO \ + QSPI_FLASH_NITRO_BSPD_CONFIG \ + QSPI_FLASH \ + FLASH_IMAGES
#define CONFIG_EXTRA_ENV_SETTINGS \ ARCH_ENV_SETTINGS
Update MAINTAINERS for broadcom ns3 platform (TARGET_NS3).
Signed-off-by: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com --- MAINTAINERS | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS index 66f0b07263..507cd1e0cf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11,7 +11,7 @@ Descriptions of section entries: Type is one of: git, hg, quilt, stgit, topgit S: Status, one of the following: Supported: Someone is actually paid to look after this. - Maintained: Someone actually looks after it. + Mne actually looks after it. Orphan: No current maintainer [but maybe you could take the role as you write your new code]. F: Files and directories with wildcard patterns. @@ -908,6 +908,21 @@ S: Maintained F: drivers/spmi/ F: include/spmi/
+TARGET_BCMNS3 +M: Bharat Gooty bharat.gooty@broadcom.com +M: Rayagonda Kokatanur rayagonda.kokatanur@broadcom.com +S: Maintained +F: board/broadcom/bcmns3/ +F: configs/bcm_ns3_defconfig +F: include/configs/bcm_ns3.h +F: include/dt-bindings/memory/bcm-ns3-mc.h +F: arch/arm/Kconfig +F: arch/arm/dts/ns3-board.dts +F: arch/arm/dts/ns3-clock.dtsi +F: arch/arm/dts/ns3.dtsi +F: arch/arm/cpu/armv8/bcmns3 +F: arch/arm/include/asm/arch-bcmns3/ + TDA19988 HDMI ENCODER M: Liviu Dudau liviu.dudau@foss.arm.com S: Maintained
participants (1)
-
Rayagonda Kokatanur