[U-Boot] [PATCH 1/3] tegra2: Fix conflicting pinmux for UARTA
Tegra appears to boot with function UARTA pre-selected on mux group SDB. If two mux groups are both set to the same function, it's unclear which group's pins drive the RX signals into the HW module. For UARTA, SDB certainly overrides group IRTX in practice. To solve this, configure some alternative function on SDB to avoid the conflict. Also, tri-state the group to avoid driving any signal onto it until we know what's connected.
Signed-off-by: Stephen Warren swarren@nvidia.com --- arch/arm/cpu/armv7/tegra2/funcmux.c | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c b/arch/arm/cpu/armv7/tegra2/funcmux.c index 0878f51..140f8a7 100644 --- a/arch/arm/cpu/armv7/tegra2/funcmux.c +++ b/arch/arm/cpu/armv7/tegra2/funcmux.c @@ -37,6 +37,18 @@ int funcmux_select(enum periph_id id, int config) pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA); pinmux_tristate_disable(PINGRP_IRRX); pinmux_tristate_disable(PINGRP_IRTX); + /* + * Tegra appears to boot with function UARTA pre-selected on + * mux group SDB. If two mux groups are both set to the same + * function, it's unclear which group's pins drive the RX + * signals into the HW module. For UARTA, SDB certainly + * overrides group IRTX in practice. To solve this, configure + * some alternative function on SDB to avoid the conflict. Also, + * tri-state the group to avoid driving any signal onto it until + * we know what's connected. + */ + pinmux_tristate_enable(PINGRP_SDB); + pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3); break;
case PERIPH_ID_UART2:
A value of 0 in the odmdata RAM size field means default, which is 512MB not 1GB. Fix this. For reference, see:
http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=blob;%5C f=arch/arm/mach-tegra/odm_kit/query/harmony/tegra_devkit_custopt.h;\ h=1ec7010911454f19a5018952fd245785a62c59ad;\ hb=0e52d7fe25b11a656c376a37890be219470661fb
v2: New patch
Signed-off-by: Stephen Warren swarren@nvidia.com --- arch/arm/cpu/armv7/tegra2/board.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c index ea06570..404d34c 100644 --- a/arch/arm/cpu/armv7/tegra2/board.c +++ b/arch/arm/cpu/armv7/tegra2/board.c @@ -58,9 +58,9 @@ unsigned int query_sdram_size(void) case 1: return 0x10000000; /* 256 MB */ case 2: + default: return 0x20000000; /* 512 MB */ case 3: - default: return 0x40000000; /* 1GB */ } }
On Fri, Jan 6, 2012 at 2:14 PM, Stephen Warren swarren@nvidia.com wrote:
A value of 0 in the odmdata RAM size field means default, which is 512MB not 1GB. Fix this. For reference, see:
http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=blob;%5C f=arch/arm/mach-tegra/odm_kit/query/harmony/tegra_devkit_custopt.h;\ h=1ec7010911454f19a5018952fd245785a62c59ad;\ hb=0e52d7fe25b11a656c376a37890be219470661fb
v2: New patch
Signed-off-by: Stephen Warren swarren@nvidia.com
Tested on a Seaboard with 1GB RAM.
Acked-by: Simon Glass sjg@chromium.org Tested-by: Simon Glass sjg@chromium.org
arch/arm/cpu/armv7/tegra2/board.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c index ea06570..404d34c 100644 --- a/arch/arm/cpu/armv7/tegra2/board.c +++ b/arch/arm/cpu/armv7/tegra2/board.c @@ -58,9 +58,9 @@ unsigned int query_sdram_size(void) case 1: return 0x10000000; /* 256 MB */ case 2:
- default:
return 0x20000000; /* 512 MB */ case 3:
- default:
return 0x40000000; /* 1GB */ } } -- 1.7.0.4
The Toshiba AC100 (Compal code-name Paz00, aka Dynabook AZ) is a netbook derived from the NVIDIA Tegra Harmony reference board. It ships with Android, but is often repurposed to run Linux. This patch adds just enough support to get a U-Boot serial console, and the ability access built-in eMMC and the external SD slot.
v2: * Rebased on latest HEAD, incorporated changes made to other board files. * Moved board files from board/nvidia to board/compal. * Switched to correct odmdata value. This required add the previous patch to fix U-Boot's interpretation of the odmdata RAM size field. * Removed nvmem= from default Linux kernel command-line; no drivers use the reserved memory yet, so there's no point reserving it.
Signed-off-by: Stephen Warren swarren@nvidia.com --- MAINTAINERS | 1 + board/compal/paz00/Makefile | 41 ++++++++++++++++++++++ board/compal/paz00/paz00.c | 81 +++++++++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/paz00.h | 51 +++++++++++++++++++++++++++ 5 files changed, 175 insertions(+), 0 deletions(-) create mode 100644 board/compal/paz00/Makefile create mode 100644 board/compal/paz00/paz00.c create mode 100644 include/configs/paz00.h
diff --git a/MAINTAINERS b/MAINTAINERS index 4bf12b5..9c796e2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -891,6 +891,7 @@ Tom Warren twarren@nvidia.com Stephen Warren swarren@nvidia.com
ventana Tegra2 (ARM7 & A9 Dual Core) + paz00 Tegra2 (ARM7 & A9 Dual Core)
Thomas Weber weber@corscience.de
diff --git a/board/compal/paz00/Makefile b/board/compal/paz00/Makefile new file mode 100644 index 0000000..488e381 --- /dev/null +++ b/board/compal/paz00/Makefile @@ -0,0 +1,41 @@ +# +# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms and conditions of the GNU General Public License, +# version 2, as published by the Free Software Foundation. +# +# This program is distributed in the hope it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# + +include $(TOPDIR)/config.mk + +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../../nvidia/common) +endif + +LIB = $(obj)lib$(BOARD).o + +COBJS := $(BOARD).o +COBJS += ../../nvidia/common/board.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c new file mode 100644 index 0000000..3b48917 --- /dev/null +++ b/board/compal/paz00/paz00.c @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/tegra2.h> +#include <asm/arch/pinmux.h> +#include <asm/arch/mmc.h> +#include <asm/gpio.h> +#ifdef CONFIG_TEGRA2_MMC +#include <mmc.h> +#endif + +/* + * Routine: gpio_config_uart + * Description: Does nothing on Paz00 - no conflict w/SPI. + */ +void gpio_config_uart(void) +{ +} + +#ifdef CONFIG_TEGRA2_MMC +/* + * Routine: pin_mux_mmc + * Description: setup the pin muxes/tristate values for the SDMMC(s) + */ +static void pin_mux_mmc(void) +{ + /* SDMMC4: config 3, x8 on 2nd set of pins */ + pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); + pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4); + pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4); + + pinmux_tristate_disable(PINGRP_ATB); + pinmux_tristate_disable(PINGRP_GMA); + pinmux_tristate_disable(PINGRP_GME); + + /* SDMMC1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */ + pinmux_set_func(PINGRP_SDMMC1, PMUX_FUNC_SDIO1); + + pinmux_tristate_disable(PINGRP_SDMMC1); + + /* For power GPIO PV1 */ + pinmux_tristate_disable(PINGRP_UAC); + /* For CD GPIO PI5 */ + pinmux_tristate_disable(PINGRP_ATC); +} + +/* this is a weak define that we are overriding */ +int board_mmc_init(bd_t *bd) +{ + debug("board_mmc_init called\n"); + + /* Enable muxes, etc. for SDMMC controllers */ + pin_mux_mmc(); + + debug("board_mmc_init: init eMMC\n"); + /* init dev 0, eMMC chip, with 4-bit bus */ + /* The board has an 8-bit bus, but 8-bit doesn't work yet */ + tegra2_mmc_init(0, 4, -1, -1); + + debug("board_mmc_init: init SD slot\n"); + /* init dev 3, SD slot, with 4-bit bus */ + tegra2_mmc_init(3, 4, GPIO_PV1, GPIO_PI5); + + return 0; +} +#endif diff --git a/boards.cfg b/boards.cfg index 0b32532..8a0343a 100644 --- a/boards.cfg +++ b/boards.cfg @@ -247,6 +247,7 @@ colibri_pxa270 arm pxa - toradex jornada arm sa1100 plutux arm armv7 plutux avionic-design tegra2 medcom arm armv7 medcom avionic-design tegra2 +paz00 arm armv7 paz00 compal tegra2 atngw100 avr32 at32ap - atmel at32ap700x atstk1002 avr32 at32ap atstk1000 atmel at32ap700x atstk1003 avr32 at32ap atstk1000 atmel at32ap700x diff --git a/include/configs/paz00.h b/include/configs/paz00.h new file mode 100644 index 0000000..f53f20e --- /dev/null +++ b/include/configs/paz00.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2010,2011, NVIDIA CORPORATION. All rights reserved. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/sizes.h> +#include "tegra2-common.h" + +/* High-level configuration options */ +#define TEGRA2_SYSMEM "mem=512M@0M" +#define V_PROMPT "Tegra2 (Paz00) MOD # " +#define CONFIG_TEGRA2_BOARD_STRING "Compal Paz00" + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA2_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE + +#define CONFIG_MACH_TYPE MACH_TYPE_PAZ00 +#define CONFIG_SYS_BOARD_ODMDATA 0x800c0085 /* lp1, 512MB */ + +#define CONFIG_BOARD_EARLY_INIT_F + +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA2_MMC +#define CONFIG_CMD_MMC + +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT + +/* Environment not stored */ +#define CONFIG_ENV_IS_NOWHERE +#endif /* __CONFIG_H */
Hi Stephen,
On Fri, Jan 6, 2012 at 2:14 PM, Stephen Warren swarren@nvidia.com wrote:
The Toshiba AC100 (Compal code-name Paz00, aka Dynabook AZ) is a netbook derived from the NVIDIA Tegra Harmony reference board. It ships with Android, but is often repurposed to run Linux. This patch adds just enough support to get a U-Boot serial console, and the ability access built-in eMMC and the external SD slot.
v2:
- Rebased on latest HEAD, incorporated changes made to other board files.
- Moved board files from board/nvidia to board/compal.
- Switched to correct odmdata value. This required add the previous patch
to fix U-Boot's interpretation of the odmdata RAM size field.
- Removed nvmem= from default Linux kernel command-line; no drivers use the
reserved memory yet, so there's no point reserving it.
Signed-off-by: Stephen Warren swarren@nvidia.com
MAINTAINERS | 1 + board/compal/paz00/Makefile | 41 ++++++++++++++++++++++ board/compal/paz00/paz00.c | 81 +++++++++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/paz00.h | 51 +++++++++++++++++++++++++++ 5 files changed, 175 insertions(+), 0 deletions(-) create mode 100644 board/compal/paz00/Makefile create mode 100644 board/compal/paz00/paz00.c create mode 100644 include/configs/paz00.h
diff --git a/MAINTAINERS b/MAINTAINERS index 4bf12b5..9c796e2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -891,6 +891,7 @@ Tom Warren twarren@nvidia.com Stephen Warren swarren@nvidia.com
ventana Tegra2 (ARM7 & A9 Dual Core)
- paz00 Tegra2 (ARM7 & A9 Dual Core)
Thomas Weber weber@corscience.de
diff --git a/board/compal/paz00/Makefile b/board/compal/paz00/Makefile new file mode 100644 index 0000000..488e381 --- /dev/null +++ b/board/compal/paz00/Makefile @@ -0,0 +1,41 @@ +# +# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms and conditions of the GNU General Public License, +# version 2, as published by the Free Software Foundation. +# +# This program is distributed in the hope it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +#
+include $(TOPDIR)/config.mk
+ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../../nvidia/common) +endif
+LIB = $(obj)lib$(BOARD).o
+COBJS := $(BOARD).o +COBJS += ../../nvidia/common/board.o
I think you can drop this as the top-level Makefile should bring in the library from that directory.
+SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS))
+$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c new file mode 100644 index 0000000..3b48917 --- /dev/null +++ b/board/compal/paz00/paz00.c @@ -0,0 +1,81 @@ +/*
- Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or modify it
- under the terms and conditions of the GNU General Public License,
- version 2, as published by the Free Software Foundation.
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details.
- */
+#include <common.h> +#include <asm/io.h> +#include <asm/arch/tegra2.h> +#include <asm/arch/pinmux.h> +#include <asm/arch/mmc.h> +#include <asm/gpio.h> +#ifdef CONFIG_TEGRA2_MMC +#include <mmc.h> +#endif
+/*
- Routine: gpio_config_uart
- Description: Does nothing on Paz00 - no conflict w/SPI.
- */
+void gpio_config_uart(void) +{ +}
+#ifdef CONFIG_TEGRA2_MMC +/*
- Routine: pin_mux_mmc
- Description: setup the pin muxes/tristate values for the SDMMC(s)
- */
+static void pin_mux_mmc(void) +{
- /* SDMMC4: config 3, x8 on 2nd set of pins */
- pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
- pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
- pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
- pinmux_tristate_disable(PINGRP_ATB);
- pinmux_tristate_disable(PINGRP_GMA);
- pinmux_tristate_disable(PINGRP_GME);
- /* SDMMC1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */
- pinmux_set_func(PINGRP_SDMMC1, PMUX_FUNC_SDIO1);
- pinmux_tristate_disable(PINGRP_SDMMC1);
- /* For power GPIO PV1 */
- pinmux_tristate_disable(PINGRP_UAC);
- /* For CD GPIO PI5 */
- pinmux_tristate_disable(PINGRP_ATC);
+}
Gosh, we are seeing a lot of duplication in this area - I will come up with a patch to move this into funcmux.
+/* this is a weak define that we are overriding */ +int board_mmc_init(bd_t *bd) +{
- debug("board_mmc_init called\n");
- /* Enable muxes, etc. for SDMMC controllers */
- pin_mux_mmc();
- debug("board_mmc_init: init eMMC\n");
- /* init dev 0, eMMC chip, with 4-bit bus */
- /* The board has an 8-bit bus, but 8-bit doesn't work yet */
- tegra2_mmc_init(0, 4, -1, -1);
Yes - I will see if I can do a patch to enable 8-bit.
- debug("board_mmc_init: init SD slot\n");
- /* init dev 3, SD slot, with 4-bit bus */
- tegra2_mmc_init(3, 4, GPIO_PV1, GPIO_PI5);
- return 0;
+} +#endif diff --git a/boards.cfg b/boards.cfg index 0b32532..8a0343a 100644 --- a/boards.cfg +++ b/boards.cfg @@ -247,6 +247,7 @@ colibri_pxa270 arm pxa - toradex jornada arm sa1100 plutux arm armv7 plutux avionic-design tegra2 medcom arm armv7 medcom avionic-design tegra2 +paz00 arm armv7 paz00 compal tegra2 atngw100 avr32 at32ap - atmel at32ap700x atstk1002 avr32 at32ap atstk1000 atmel at32ap700x atstk1003 avr32 at32ap atstk1000 atmel at32ap700x diff --git a/include/configs/paz00.h b/include/configs/paz00.h new file mode 100644 index 0000000..f53f20e --- /dev/null +++ b/include/configs/paz00.h @@ -0,0 +1,51 @@ +/*
- Copyright (c) 2010,2011, NVIDIA CORPORATION. All rights reserved.
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or modify it
- under the terms and conditions of the GNU General Public License,
- version 2, as published by the Free Software Foundation.
- This program is distributed in the hope it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details.
- */
+#ifndef __CONFIG_H +#define __CONFIG_H
+#include <asm/sizes.h> +#include "tegra2-common.h"
+/* High-level configuration options */ +#define TEGRA2_SYSMEM "mem=512M@0M" +#define V_PROMPT "Tegra2 (Paz00) MOD # " +#define CONFIG_TEGRA2_BOARD_STRING "Compal Paz00"
+/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA2_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
+#define CONFIG_MACH_TYPE MACH_TYPE_PAZ00 +#define CONFIG_SYS_BOARD_ODMDATA 0x800c0085 /* lp1, 512MB */
+#define CONFIG_BOARD_EARLY_INIT_F
+/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA2_MMC +#define CONFIG_CMD_MMC
+#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT
+/* Environment not stored */ +#define CONFIG_ENV_IS_NOWHERE
+#endif /* __CONFIG_H */
1.7.0.4
Regards, Simon
On 01/09/2012 12:55 PM, Simon Glass wrote:
On Fri, Jan 6, 2012 at 2:14 PM, Stephen Warren swarren@nvidia.com wrote:
The Toshiba AC100 (Compal code-name Paz00, aka Dynabook AZ) is a netbook derived from the NVIDIA Tegra Harmony reference board. It ships with Android, but is often repurposed to run Linux. This patch adds just enough support to get a U-Boot serial console, and the ability access built-in eMMC and the external SD slot.
...
diff --git a/board/compal/paz00/Makefile b/board/compal/paz00/Makefile
...
+COBJS := $(BOARD).o +COBJS += ../../nvidia/common/board.o
I think you can drop this as the top-level Makefile should bring in the library from that directory.
I did try that initially, and it doesn't work. I didn't investigate very far at all, but I assume it's because the common library is for vendor NVIDIA, but this board is for vendor compal, and so the common library doesn't get pulled in? Does that make sense, or should I investigate further?
Hi Stephen,
On Mon, Jan 9, 2012 at 12:00 PM, Stephen Warren swarren@nvidia.com wrote:
On 01/09/2012 12:55 PM, Simon Glass wrote:
On Fri, Jan 6, 2012 at 2:14 PM, Stephen Warren swarren@nvidia.com wrote:
The Toshiba AC100 (Compal code-name Paz00, aka Dynabook AZ) is a netbook derived from the NVIDIA Tegra Harmony reference board. It ships with Android, but is often repurposed to run Linux. This patch adds just enough support to get a U-Boot serial console, and the ability access built-in eMMC and the external SD slot.
...
diff --git a/board/compal/paz00/Makefile b/board/compal/paz00/Makefile
...
+COBJS := $(BOARD).o +COBJS += ../../nvidia/common/board.o
I think you can drop this as the top-level Makefile should bring in the library from that directory.
I did try that initially, and it doesn't work. I didn't investigate very far at all, but I assume it's because the common library is for vendor NVIDIA, but this board is for vendor compal, and so the common library doesn't get pulled in? Does that make sense, or should I investigate further?
Sorry, of course you are using a different vendor.
It seems a bit dodgy to include a board file from a different vendor. Sad as it is, perhaps the right thing to do is to copy the code from that file?
We should perhaps look at moving some of it into arch, as we have done previously.
Regards, Simon
-- nvpublic
On 01/09/2012 01:04 PM, Simon Glass wrote:
Hi Stephen,
On Mon, Jan 9, 2012 at 12:00 PM, Stephen Warren swarren@nvidia.com wrote:
On 01/09/2012 12:55 PM, Simon Glass wrote:
On Fri, Jan 6, 2012 at 2:14 PM, Stephen Warren swarren@nvidia.com wrote:
The Toshiba AC100 (Compal code-name Paz00, aka Dynabook AZ) is a netbook derived from the NVIDIA Tegra Harmony reference board. It ships with Android, but is often repurposed to run Linux. This patch adds just enough support to get a U-Boot serial console, and the ability access built-in eMMC and the external SD slot.
...
diff --git a/board/compal/paz00/Makefile b/board/compal/paz00/Makefile
...
+COBJS := $(BOARD).o +COBJS += ../../nvidia/common/board.o
I think you can drop this as the top-level Makefile should bring in the library from that directory.
I did try that initially, and it doesn't work. I didn't investigate very far at all, but I assume it's because the common library is for vendor NVIDIA, but this board is for vendor compal, and so the common library doesn't get pulled in? Does that make sense, or should I investigate further?
Sorry, of course you are using a different vendor.
It seems a bit dodgy to include a board file from a different vendor. Sad as it is, perhaps the right thing to do is to copy the code from that file?
I think that's what Thierry did with the Avionics Design boards. But to me it seemed the lack of cleanliness of pulling in an existing file from outside the vendor tree was less than that of cut/pasting the code.
With my patch, any issues should still show up with "MAKEALL -s tegra2" at build-/change-time, whereas if I cut/paste the code, the Compal vendor might not pick up any bug fixes etc. to the shared code until after someone had actually tested on the PAZ00 board, which will probably happen a lot less frequently.
Given that, do you think this change is reasonable?
We should perhaps look at moving some of it into arch, as we have done previously.
Yes, that's probably the best long-term solution. I don't actually recall exactly which parts of that common code the PAZ00 code relies on right now; it might be an easy change.
Hi Stephen,
On Mon, Jan 9, 2012 at 12:10 PM, Stephen Warren swarren@nvidia.com wrote:
On 01/09/2012 01:04 PM, Simon Glass wrote:
Hi Stephen,
On Mon, Jan 9, 2012 at 12:00 PM, Stephen Warren swarren@nvidia.com wrote:
On 01/09/2012 12:55 PM, Simon Glass wrote:
On Fri, Jan 6, 2012 at 2:14 PM, Stephen Warren swarren@nvidia.com wrote:
The Toshiba AC100 (Compal code-name Paz00, aka Dynabook AZ) is a netbook derived from the NVIDIA Tegra Harmony reference board. It ships with Android, but is often repurposed to run Linux. This patch adds just enough support to get a U-Boot serial console, and the ability access built-in eMMC and the external SD slot.
...
diff --git a/board/compal/paz00/Makefile b/board/compal/paz00/Makefile
...
+COBJS := $(BOARD).o +COBJS += ../../nvidia/common/board.o
I think you can drop this as the top-level Makefile should bring in the library from that directory.
I did try that initially, and it doesn't work. I didn't investigate very far at all, but I assume it's because the common library is for vendor NVIDIA, but this board is for vendor compal, and so the common library doesn't get pulled in? Does that make sense, or should I investigate further?
Sorry, of course you are using a different vendor.
It seems a bit dodgy to include a board file from a different vendor. Sad as it is, perhaps the right thing to do is to copy the code from that file?
I think that's what Thierry did with the Avionics Design boards. But to me it seemed the lack of cleanliness of pulling in an existing file from outside the vendor tree was less than that of cut/pasting the code.
With my patch, any issues should still show up with "MAKEALL -s tegra2" at build-/change-time, whereas if I cut/paste the code, the Compal vendor might not pick up any bug fixes etc. to the shared code until after someone had actually tested on the PAZ00 board, which will probably happen a lot less frequently.
Given that, do you think this change is reasonable?
We should perhaps look at moving some of it into arch, as we have done previously.
Yes, that's probably the best long-term solution. I don't actually recall exactly which parts of that common code the PAZ00 code relies on right now; it might be an easy change.
It's not that hard (each of the two functions has <10 LOC), but I agree with your reasoning, and this is fine with me until we address it.
Acked-by: Simon Glass sjg@chromium.org
-- nvpublic
Regards, Simon
On 01/09/2012 12:55 PM, Simon Glass wrote: ...
debug("board_mmc_init: init eMMC\n");/* init dev 0, eMMC chip, with 4-bit bus *//* The board has an 8-bit bus, but 8-bit doesn't work yet */tegra2_mmc_init(0, 4, -1, -1);Yes - I will see if I can do a patch to enable 8-bit.
BTW, I briefly looked at this quite a while back when I first started looking at U-Boot. I filed an internal bug to investigate this further at some later time. The notes are below:
MMC devices can have a 1-, 4-, or 8-bit data bus. Support for 8-bit data buses is currently not fully implemented in mainline(Denx) U-Boot. This is mostly an issue with the MMC core, and not Tegra-specific. The following potential issues exist:
1)
drivers/mmc/tegra2_mmc.c:tegra2_mmc_init() contains:
if (bus_width == 8) mmc->host_caps = MMC_MODE_8BIT; else mmc->host_caps = MMC_MODE_4BIT;
I /think/ this should be rewritten as:
if (bus_width == 8) mmc->host_caps = MMC_MODE_8BIT; if (bus_width >= 4) mmc->host_caps = MMC_MODE_4BIT;
... thus allowing both caps to be set at once.
2)
drivers/mmc/mmc.c:mmc_change_freq() contains the following for v4 cards:
mmc->card_caps |= MMC_MODE_4BIT;
Nothing ever performs:
mmc->card_caps |= MMC_MODE_8BIT;
... so 8-bit mode can never be active.
I note that ChromeOS's U-Boot replaces the above code with:
if(mmc->host_caps & MMC_MODE_8BIT) mmc->card_caps |= MMC_MODE_8BIT; else mmc->card_caps |= MMC_MODE_4BIT;
which implies that the 8-bit and 4-bit mode flags are meant to be mutually exclusive, which seems a little odd; our controller could do either just fine...
3)
drivers/mmc/mmc.c:mmc_startup() contains:
if (mmc->card_caps & MMC_MODE_4BIT) { // setup for 4-bit mode } else if (mmc->card_caps & MMC_MODE_8BIT) { // setup for 8-bit mode }
which oddly checks for 4-bit mode first, so if both 4- and 8-bit mode are allowed, 4-bit wins.
4)
If you look at the Linux kernel MMC driver, there's a lot more to selecting between 1-, 4-, and 8-bit mode. Specifically:
a) You're supposed to try 8-bit mode, test it and see if it works. If that fails, fall back to trying 4-bit mode, then fall back to 1-bit mode. U-Boot currently just picks one, doesn't fully test it, and if it fails, you're done.
b) You're supposed to test the card works correctly after selecting a bus width using a special bus-width test command.
c) The Linux kernel at least also executes commands to switch the card between various power modes that the card reports it needs for different bus speeds and widths. I don't think U-Boot does this anywhere.
(a) and (b) are also supported by the following document from the MMC association:
http://read.pudn.com/downloads153/doc/project/671834/MMC SD/AN_MMCA050419.pdf
I hacked a fix for (1), (2), and (3) above and tested Seaboard's internal eMMC. While data transfer appeared to still operated correctly, I didn't observe any difference in transfer speed. I don't know if this is due to (4) above, or some other issue. However, I did observe a nearly 2x speedup going from 4- to 8-bit mode when running the Linux kernel.
So, quite a lot of further investigation/work needed here.
HI Stephen,
On Mon, Jan 9, 2012 at 12:04 PM, Stephen Warren swarren@nvidia.com wrote:
On 01/09/2012 12:55 PM, Simon Glass wrote: ...
- debug("board_mmc_init: init eMMC\n");
- /* init dev 0, eMMC chip, with 4-bit bus */
- /* The board has an 8-bit bus, but 8-bit doesn't work yet */
- tegra2_mmc_init(0, 4, -1, -1);
Yes - I will see if I can do a patch to enable 8-bit.
BTW, I briefly looked at this quite a while back when I first started looking at U-Boot. I filed an internal bug to investigate this further at some later time. The notes are below:
I committed a few patches to our tree a week or two ago - got a reduction from about 120ms to 70ms in kernel load time. Will see what I can do.
Thank you for the notes.
MMC devices can have a 1-, 4-, or 8-bit data bus. Support for 8-bit data buses is currently not fully implemented in mainline(Denx) U-Boot. This is mostly an issue with the MMC core, and not Tegra-specific. The following potential issues exist:
drivers/mmc/tegra2_mmc.c:tegra2_mmc_init() contains:
if (bus_width == 8) mmc->host_caps = MMC_MODE_8BIT; else mmc->host_caps = MMC_MODE_4BIT;
I /think/ this should be rewritten as:
if (bus_width == 8) mmc->host_caps = MMC_MODE_8BIT; if (bus_width >= 4) mmc->host_caps = MMC_MODE_4BIT;
... thus allowing both caps to be set at once.
drivers/mmc/mmc.c:mmc_change_freq() contains the following for v4 cards:
mmc->card_caps |= MMC_MODE_4BIT;
Nothing ever performs:
mmc->card_caps |= MMC_MODE_8BIT;
... so 8-bit mode can never be active.
I note that ChromeOS's U-Boot replaces the above code with:
if(mmc->host_caps & MMC_MODE_8BIT) mmc->card_caps |= MMC_MODE_8BIT; else mmc->card_caps |= MMC_MODE_4BIT;
which implies that the 8-bit and 4-bit mode flags are meant to be mutually exclusive, which seems a little odd; our controller could do either just fine...
drivers/mmc/mmc.c:mmc_startup() contains:
if (mmc->card_caps & MMC_MODE_4BIT) { // setup for 4-bit mode } else if (mmc->card_caps & MMC_MODE_8BIT) { // setup for 8-bit mode }
which oddly checks for 4-bit mode first, so if both 4- and 8-bit mode are allowed, 4-bit wins.
If you look at the Linux kernel MMC driver, there's a lot more to selecting between 1-, 4-, and 8-bit mode. Specifically:
a) You're supposed to try 8-bit mode, test it and see if it works. If that fails, fall back to trying 4-bit mode, then fall back to 1-bit mode. U-Boot currently just picks one, doesn't fully test it, and if it fails, you're done.
b) You're supposed to test the card works correctly after selecting a bus width using a special bus-width test command.
c) The Linux kernel at least also executes commands to switch the card between various power modes that the card reports it needs for different bus speeds and widths. I don't think U-Boot does this anywhere.
(a) and (b) are also supported by the following document from the MMC association:
http://read.pudn.com/downloads153/doc/project/671834/MMC SD/AN_MMCA050419.pdf
I hacked a fix for (1), (2), and (3) above and tested Seaboard's internal eMMC. While data transfer appeared to still operated correctly, I didn't observe any difference in transfer speed. I don't know if this is due to (4) above, or some other issue. However, I did observe a nearly 2x speedup going from 4- to 8-bit mode when running the Linux kernel.
So, quite a lot of further investigation/work needed here.
-- nvpublic
Regards, Simon
On Fri, Jan 6, 2012 at 2:14 PM, Stephen Warren swarren@nvidia.com wrote:
Tegra appears to boot with function UARTA pre-selected on mux group SDB. If two mux groups are both set to the same function, it's unclear which group's pins drive the RX signals into the HW module. For UARTA, SDB certainly overrides group IRTX in practice. To solve this, configure some alternative function on SDB to avoid the conflict. Also, tri-state the group to avoid driving any signal onto it until we know what's connected.
Signed-off-by: Stephen Warren swarren@nvidia.com
Tested on Seaboard.
Acked-by: Simon Glass sjg@chromium.org Tested-by: Simon Glass sjg@chromium.org
arch/arm/cpu/armv7/tegra2/funcmux.c | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c b/arch/arm/cpu/armv7/tegra2/funcmux.c index 0878f51..140f8a7 100644 --- a/arch/arm/cpu/armv7/tegra2/funcmux.c +++ b/arch/arm/cpu/armv7/tegra2/funcmux.c @@ -37,6 +37,18 @@ int funcmux_select(enum periph_id id, int config) pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA); pinmux_tristate_disable(PINGRP_IRRX); pinmux_tristate_disable(PINGRP_IRTX);
- /*
- * Tegra appears to boot with function UARTA pre-selected on
- * mux group SDB. If two mux groups are both set to the same
- * function, it's unclear which group's pins drive the RX
- * signals into the HW module. For UARTA, SDB certainly
- * overrides group IRTX in practice. To solve this, configure
- * some alternative function on SDB to avoid the conflict. Also,
- * tri-state the group to avoid driving any signal onto it until
- * we know what's connected.
- */
- pinmux_tristate_enable(PINGRP_SDB);
- pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
break;
case PERIPH_ID_UART2:
1.7.0.4
participants (2)
-
Simon Glass -
Stephen Warren