On 2/24/2024 5:53 AM, Jonathan Humphreys wrote:

Set config values to enable OSPI functionality.

Signed-off-by: Jonathan Humphreys j-humphreys@ti.com

configs/j721e_evm_a72_defconfig | 7 +++++++ configs/j721e_evm_r5_defconfig | 6 ++++++ 2 files changed, 13 insertions(+)

diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 74af5bebb5..1b39dd7c86 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -10,6 +10,7 @@ CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J721E_A72_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 +CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y @@ -142,7 +143,13 @@ CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HX_T=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y CONFIG_MULTIPLEXER=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index bc4f35cce1..59c0c4135c 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -10,6 +10,7 @@ CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_J721E_R5_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf59f0 +CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y @@ -128,7 +129,12 @@ CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HX_T=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y

Reviewed-by: Udit Kumar u-kumar1@ti.com

CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set CONFIG_SPL_PINCTRL=y

Thanks For fixing this

On 2/24/2024 5:53 AM, Jonathan Humphreys wrote:

Add boot ROM XSPI bootmode, and set to BOOT_DEVICE_SPI if detected.

Signed-off-by: Jonathan Humphreys j-humphreys@ti.com

arch/arm/mach-k3/include/mach/j721e_spl.h | 5 +++-- arch/arm/mach-k3/j721e_init.c | 3 ++- 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-k3/include/mach/j721e_spl.h b/arch/arm/mach-k3/include/mach/j721e_spl.h index ed3d7333bd..aaee653537 100644 --- a/arch/arm/mach-k3/include/mach/j721e_spl.h +++ b/arch/arm/mach-k3/include/mach/j721e_spl.h @@ -24,8 +24,9 @@ #define BOOT_DEVICE_UFS 0x13 #define BOOT_DEVIE_GPMC 0x14 #define BOOT_DEVICE_PCIE 0x15 -#define BOOT_DEVICE_MMC2_2 0x16 -#define BOOT_DEVICE_RAM 0x17 +#define BOOT_DEVICE_XSPI 0x16 +#define BOOT_DEVICE_RAM 0x17 +#define BOOT_DEVICE_MMC2_2 0xFF /* Invalid value */

/* Backup boot modes with MCU Only = 0 */ #define BACKUP_BOOT_DEVICE_RAM 0x0 diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index c2976c4ea0..7ee9b75de4 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -346,7 +346,8 @@ static u32 __get_primary_bootmedia(u32 main_devstat, u32 wkup_devstat) bootmode |= (main_devstat & MAIN_DEVSTAT_BOOT_MODE_B_MASK) << BOOT_MODE_B_SHIFT;

• if (bootmode == BOOT_DEVICE_OSPI || bootmode == BOOT_DEVICE_QSPI)

• if (bootmode == BOOT_DEVICE_OSPI || bootmode == BOOT_DEVICE_QSPI ||

•    bootmode == BOOT_DEVICE_XSPI)
  

  bootmode = BOOT_DEVICE_SPI;

Reviewed-by: Udit Kumar u-kumar1@ti.com

if (bootmode == BOOT_DEVICE_MMC2) {

Thanks Jon

On 2/24/2024 5:53 AM, Jonathan Humphreys wrote:

The phy calibration pattern partition isn't needed as the Cadence driver isn't calibrating the phys.

Please do mention Fixes tag here

58d61fb5a77e ("arm: dts: k3-j721e-sk: Add initial A72 specific dts support")

Signed-off-by: Jonathan Humphreys j-humphreys@ti.com

arch/arm/dts/k3-j721e-sk-u-boot.dtsi | 4 ---- 1 file changed, 4 deletions(-)

diff --git a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi index 479b7bcd6f..20b76a84ff 100644 --- a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi @@ -157,9 +157,5 @@

flash@0 { bootph-all;

• partition@3fc0000 {
  

• 	bootph-all;
  

• };
  

  };

This Patch LTGM,

+ Neha

For further cleanup, we should not have these ospi nodes in u-boot dts file.

should be in board dts (k3-j721e-sk.dts) with right bootph properties ,

and comes via kernel DT.

};

"Kumar, Udit" u-kumar1@ti.com writes:

Thanks Jon

On 2/24/2024 5:53 AM, Jonathan Humphreys wrote:

...

The phy calibration pattern partition isn't needed as the Cadence driver isn't calibrating the phys.

Please do mention Fixes tag here

58d61fb5a77e ("arm: dts: k3-j721e-sk: Add initial A72 specific dts support")

I put the fixes tag on the cover letter. Is there a 'correct' way - to add to the cover letter or the individual patches?

In the case of this particular patch, I don't think the fixes tag is appropriate as this isn't changing any observable behavior, it is a clean up.

Jon

...

Signed-off-by: Jonathan Humphreys j-humphreys@ti.com

arch/arm/dts/k3-j721e-sk-u-boot.dtsi | 4 ---- 1 file changed, 4 deletions(-)

diff --git a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi index 479b7bcd6f..20b76a84ff 100644 --- a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi @@ -157,9 +157,5 @@

flash@0 { bootph-all;

• partition@3fc0000 {
  

• 	bootph-all;
  

• };
  

  };

This Patch LTGM,

• Neha

For further cleanup, we should not have these ospi nodes in u-boot dts file.

should be in board dts (k3-j721e-sk.dts) with right bootph properties ,

and comes via kernel DT.

...

};