[U-Boot] [PATCH 10/11 v3] armv7: Adding cpu specific cache managmenent
From: "Mathieu J. Poirier" mathieu.poirier@linaro.org
Some CPU (i.e u8500) need more cache management before launching the Linux kernel.
Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org Signed-off-by: John Rigby john.rigby@linaro.org --- Changes for v2: - Moved from __attribute__(...) to __weak. changes for v3: - Choosing more explicit name for extra cache management routine. --- arch/arm/cpu/armv7/cpu.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c index c6fa8ef..f01989f 100644 --- a/arch/arm/cpu/armv7/cpu.c +++ b/arch/arm/cpu/armv7/cpu.c @@ -36,6 +36,7 @@ #include <asm/system.h> #include <asm/cache.h> #include <asm/armv7.h> +#include <linux/compiler.h>
void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3) { @@ -44,6 +45,8 @@ void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3) void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) __attribute__((weak, alias("save_boot_params_default")));
+void __weak cpu_cache_initialization(void){} + int cleanup_before_linux(void) { /* @@ -81,5 +84,10 @@ int cleanup_before_linux(void) */ invalidate_dcache_all();
+ /* + * Some CPU need more cache attention before starting the kernel. + */ + cpu_cache_initialization(); + return 0; }
From: "Mathieu J. Poirier" mathieu.poirier@linaro.org
Following ARM's reference manuel for initializing the cache - the kernel won't boot otherwise.
Signed-off-by: Mathieu Poirier mathieu.poirier@linaro.org Signed-off-by: John Rigby john.rigby@linaro.org --- Changes for v2: - Correcting cache maintenance register address. - Invalidating all 16 bits in cache maintenance register. - Polling cache maintenance register for cleared bits. - Added comments to the code. - Re-worked commit description. --- arch/arm/cpu/armv7/u8500/cpu.c | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/u8500/cpu.c b/arch/arm/cpu/armv7/u8500/cpu.c index 02bb332..50d5a83 100644 --- a/arch/arm/cpu/armv7/u8500/cpu.c +++ b/arch/arm/cpu/armv7/u8500/cpu.c @@ -73,6 +73,22 @@ static unsigned int read_asicid(void) return readl(address); }
+void cpu_cache_initialization(void) +{ + /* invalidate all cache entries */ + *((volatile unsigned int *)(0xA041277C)) = 0xFFFF; + + /* ways are set to '0' when they are totally + * cleaned and invalidated + */ + while (*((volatile unsigned int *)(0xA041277C)) & 0xFF) + ; + + /* Invalidate register 9 D and I lockdown */ + *((volatile unsigned int *)(0xA0412900)) = 0xFF; + *((volatile unsigned int *)(0xA0412904)) = 0xFF; +} + #ifdef CONFIG_ARCH_CPU_INIT /* * SOC specific cpu init
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