[PATCH 01/12] clk: renesas: Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.6.3
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Add ZG clock macro into rcar-gen3-cpg.h to cover the new clock type .
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- drivers/clk/renesas/r8a7796-cpg-mssr.c | 3 +++ drivers/clk/renesas/rcar-gen3-cpg.h | 1 + 2 files changed, 4 insertions(+)
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index ea1f6d69062..d741d547ec8 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -80,6 +80,7 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { /* Core Clock Outputs */ DEF_GEN3_Z("z", R8A7796_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0, 2, 8), DEF_GEN3_Z("z2", R8A7796_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0), + DEF_GEN3_Z("zg", R8A7796_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24), DEF_FIXED("ztr", R8A7796_CLK_ZTR, CLK_PLL1_DIV2, 6, 1), DEF_FIXED("ztrd2", R8A7796_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1), DEF_FIXED("zt", R8A7796_CLK_ZT, CLK_PLL1_DIV2, 4, 1), @@ -129,6 +130,7 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { };
static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = { + DEF_MOD("3dge", 112, R8A7796_CLK_ZG), DEF_MOD("fdp1-0", 119, R8A7796_CLK_S0D1), DEF_MOD("tmu4", 121, R8A7796_CLK_S0D6), DEF_MOD("tmu3", 122, R8A7796_CLK_S3D2), @@ -235,6 +237,7 @@ static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = { DEF_MOD("rpc-if", 917, R8A7796_CLK_RPCD2), DEF_MOD("i2c6", 918, R8A7796_CLK_S0D6), DEF_MOD("i2c5", 919, R8A7796_CLK_S0D6), + DEF_MOD("adg", 922, R8A7796_CLK_S0D4), DEF_MOD("i2c-dvfs", 926, R8A7796_CLK_CP), DEF_MOD("i2c4", 927, R8A7796_CLK_S0D6), DEF_MOD("i2c3", 928, R8A7796_CLK_S0D6), diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h index 06318c81acd..370f26c4f0f 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.h +++ b/drivers/clk/renesas/rcar-gen3-cpg.h @@ -24,6 +24,7 @@ enum rcar_gen3_clk_types { CLK_TYPE_GEN3_R, CLK_TYPE_GEN3_MDSEL, /* Select parent/divider using mode pin */ CLK_TYPE_GEN3_Z, + CLK_TYPE_GEN3_ZG, CLK_TYPE_GEN3_OSC, /* OSC EXTAL predivider and fixed divider */ CLK_TYPE_GEN3_RCKSEL, /* Select parent/divider using RCKCR.CKSEL */ CLK_TYPE_GEN3_RPCSRC,
Synchronize R-Car R8A77965 M3-N clock tables with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- drivers/clk/renesas/r8a77965-cpg-mssr.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c index 8a5c1525ece..cf4503803d0 100644 --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c @@ -76,6 +76,7 @@ static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
/* Core Clock Outputs */ DEF_GEN3_Z("z", R8A77965_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0, 2, 8), + DEF_GEN3_Z("zg", R8A77965_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24), DEF_FIXED("ztr", R8A77965_CLK_ZTR, CLK_PLL1_DIV2, 6, 1), DEF_FIXED("ztrd2", R8A77965_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1), DEF_FIXED("zt", R8A77965_CLK_ZT, CLK_PLL1_DIV2, 4, 1), @@ -125,6 +126,7 @@ static const struct cpg_core_clk r8a77965_core_clks[] __initconst = { };
static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { + DEF_MOD("3dge", 112, R8A77965_CLK_ZG), DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1), DEF_MOD("tmu4", 121, R8A77965_CLK_S0D6), DEF_MOD("tmu3", 122, R8A77965_CLK_S3D2), @@ -236,6 +238,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { DEF_MOD("rpc-if", 917, R8A77965_CLK_RPCD2), DEF_MOD("i2c6", 918, R8A77965_CLK_S0D6), DEF_MOD("i2c5", 919, R8A77965_CLK_S0D6), + DEF_MOD("adg", 922, R8A77965_CLK_S0D4), DEF_MOD("i2c-dvfs", 926, R8A77965_CLK_CP), DEF_MOD("i2c4", 927, R8A77965_CLK_S0D6), DEF_MOD("i2c3", 928, R8A77965_CLK_S0D6),
Synchronize R-Car R8A77990 E3 clock tables with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- drivers/clk/renesas/r8a77990-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c index e5710b05933..87b06666c8b 100644 --- a/drivers/clk/renesas/r8a77990-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c @@ -224,6 +224,7 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] __initconst = { DEF_MOD("rpc-if", 917, R8A77990_CLK_RPCD2), DEF_MOD("i2c6", 918, R8A77990_CLK_S3D2), DEF_MOD("i2c5", 919, R8A77990_CLK_S3D2), + DEF_MOD("adg", 922, R8A77990_CLK_ZA2), DEF_MOD("i2c-dvfs", 926, R8A77990_CLK_CP), DEF_MOD("i2c4", 927, R8A77990_CLK_S3D2), DEF_MOD("i2c3", 928, R8A77990_CLK_S3D2),
Synchronize R-Car R8A77995 D3 clock tables with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- drivers/clk/renesas/r8a77995-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c index 0ef1c1d8143..dd2c9483292 100644 --- a/drivers/clk/renesas/r8a77995-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c @@ -181,6 +181,7 @@ static const struct mssr_mod_clk r8a77995_mod_clks[] __initconst = { DEF_MOD("can-if1", 915, R8A77995_CLK_S3D4), DEF_MOD("can-if0", 916, R8A77995_CLK_S3D4), DEF_MOD("rpc-if", 917, R8A77995_CLK_RPCD2), + DEF_MOD("adg", 922, R8A77995_CLK_ZA2), DEF_MOD("i2c3", 928, R8A77995_CLK_S3D2), DEF_MOD("i2c2", 929, R8A77995_CLK_S3D2), DEF_MOD("i2c1", 930, R8A77995_CLK_S3D2),
Synchronize RZ R8A774A1 RZ/G2M clock tables with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- drivers/clk/renesas/r8a774a1-cpg-mssr.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c b/drivers/clk/renesas/r8a774a1-cpg-mssr.c index 6280061af89..6f94906cc99 100644 --- a/drivers/clk/renesas/r8a774a1-cpg-mssr.c +++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c @@ -75,6 +75,7 @@ static const struct cpg_core_clk r8a774a1_core_clks[] __initconst = { /* Core Clock Outputs */ DEF_GEN3_Z("z", R8A774A1_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0, 2, 8), DEF_GEN3_Z("z2", R8A774A1_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0), + DEF_GEN3_Z("zg", R8A774A1_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24), DEF_FIXED("ztr", R8A774A1_CLK_ZTR, CLK_PLL1_DIV2, 6, 1), DEF_FIXED("ztrd2", R8A774A1_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1), DEF_FIXED("zt", R8A774A1_CLK_ZT, CLK_PLL1_DIV2, 4, 1), @@ -122,6 +123,7 @@ static const struct cpg_core_clk r8a774a1_core_clks[] __initconst = { };
static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = { + DEF_MOD("3dge", 112, R8A774A1_CLK_ZG), DEF_MOD("tmu4", 121, R8A774A1_CLK_S0D6), DEF_MOD("tmu3", 122, R8A774A1_CLK_S3D2), DEF_MOD("tmu2", 123, R8A774A1_CLK_S3D2), @@ -212,6 +214,7 @@ static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = { DEF_MOD("rpc-if", 917, R8A774A1_CLK_RPCD2), DEF_MOD("i2c6", 918, R8A774A1_CLK_S0D6), DEF_MOD("i2c5", 919, R8A774A1_CLK_S0D6), + DEF_MOD("adg", 922, R8A774A1_CLK_S0D4), DEF_MOD("iic-pmic", 926, R8A774A1_CLK_CP), DEF_MOD("i2c4", 927, R8A774A1_CLK_S0D6), DEF_MOD("i2c3", 928, R8A774A1_CLK_S0D6),
Synchronize RZ R8A774B1 RZ/G2N clock tables with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- drivers/clk/renesas/r8a774b1-cpg-mssr.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/clk/renesas/r8a774b1-cpg-mssr.c b/drivers/clk/renesas/r8a774b1-cpg-mssr.c index 60f4f1da519..1a794980319 100644 --- a/drivers/clk/renesas/r8a774b1-cpg-mssr.c +++ b/drivers/clk/renesas/r8a774b1-cpg-mssr.c @@ -72,6 +72,7 @@ static const struct cpg_core_clk r8a774b1_core_clks[] __initconst = {
/* Core Clock Outputs */ DEF_GEN3_Z("z", R8A774B1_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0, 2, 8), + DEF_GEN3_Z("zg", R8A774B1_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24), DEF_FIXED("ztr", R8A774B1_CLK_ZTR, CLK_PLL1_DIV2, 6, 1), DEF_FIXED("ztrd2", R8A774B1_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1), DEF_FIXED("zt", R8A774B1_CLK_ZT, CLK_PLL1_DIV2, 4, 1), @@ -119,6 +120,7 @@ static const struct cpg_core_clk r8a774b1_core_clks[] __initconst = { };
static const struct mssr_mod_clk r8a774b1_mod_clks[] __initconst = { + DEF_MOD("3dge", 112, R8A774B1_CLK_ZG), DEF_MOD("tmu4", 121, R8A774B1_CLK_S0D6), DEF_MOD("tmu3", 122, R8A774B1_CLK_S3D2), DEF_MOD("tmu2", 123, R8A774B1_CLK_S3D2), @@ -208,6 +210,7 @@ static const struct mssr_mod_clk r8a774b1_mod_clks[] __initconst = { DEF_MOD("rpc-if", 917, R8A774B1_CLK_RPCD2), DEF_MOD("i2c6", 918, R8A774B1_CLK_S0D6), DEF_MOD("i2c5", 919, R8A774B1_CLK_S0D6), + DEF_MOD("adg", 922, R8A774B1_CLK_S0D4), DEF_MOD("iic-pmic", 926, R8A774B1_CLK_CP), DEF_MOD("i2c4", 927, R8A774B1_CLK_S0D6), DEF_MOD("i2c3", 928, R8A774B1_CLK_S0D6),
Synchronize RZ R8A774C0 RZ/G2E clock tables with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- drivers/clk/renesas/r8a774c0-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a774c0-cpg-mssr.c b/drivers/clk/renesas/r8a774c0-cpg-mssr.c index 4768ceb0fa6..ec8ce6ad7d6 100644 --- a/drivers/clk/renesas/r8a774c0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a774c0-cpg-mssr.c @@ -211,6 +211,7 @@ static const struct mssr_mod_clk r8a774c0_mod_clks[] __initconst = { DEF_MOD("rpc-if", 917, R8A774C0_CLK_RPCD2), DEF_MOD("i2c6", 918, R8A774C0_CLK_S3D2), DEF_MOD("i2c5", 919, R8A774C0_CLK_S3D2), + DEF_MOD("adg", 922, R8A774C0_CLK_ZA2), DEF_MOD("iic-pmic", 926, R8A774C0_CLK_CP), DEF_MOD("i2c4", 927, R8A774C0_CLK_S3D2), DEF_MOD("i2c3", 928, R8A774C0_CLK_S3D2),
Synchronize RZ R8A774E1 RZ/G2H clock tables with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- drivers/clk/renesas/r8a774e1-cpg-mssr.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/renesas/r8a774e1-cpg-mssr.c b/drivers/clk/renesas/r8a774e1-cpg-mssr.c index 28d8a8832ae..6a8fe92b975 100644 --- a/drivers/clk/renesas/r8a774e1-cpg-mssr.c +++ b/drivers/clk/renesas/r8a774e1-cpg-mssr.c @@ -76,6 +76,7 @@ static const struct cpg_core_clk r8a774e1_core_clks[] __initconst = { /* Core Clock Outputs */ DEF_GEN3_Z("z", R8A774E1_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0, 2, 8), DEF_GEN3_Z("z2", R8A774E1_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0), + DEF_GEN3_Z("zg", R8A774E1_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24), DEF_FIXED("ztr", R8A774E1_CLK_ZTR, CLK_PLL1_DIV2, 6, 1), DEF_FIXED("ztrd2", R8A774E1_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1), DEF_FIXED("zt", R8A774E1_CLK_ZT, CLK_PLL1_DIV2, 4, 1), @@ -124,6 +125,7 @@ static const struct cpg_core_clk r8a774e1_core_clks[] __initconst = { };
static const struct mssr_mod_clk r8a774e1_mod_clks[] __initconst = { + DEF_MOD("3dge", 112, R8A774E1_CLK_ZG), DEF_MOD("fdp1-1", 118, R8A774E1_CLK_S0D1), DEF_MOD("fdp1-0", 119, R8A774E1_CLK_S0D1), DEF_MOD("tmu4", 121, R8A774E1_CLK_S0D6), @@ -221,7 +223,7 @@ static const struct mssr_mod_clk r8a774e1_mod_clks[] __initconst = { DEF_MOD("rpc-if", 917, R8A774E1_CLK_RPCD2), DEF_MOD("i2c6", 918, R8A774E1_CLK_S0D6), DEF_MOD("i2c5", 919, R8A774E1_CLK_S0D6), - DEF_MOD("adg", 922, R8A774E1_CLK_S0D1), + DEF_MOD("adg", 922, R8A774E1_CLK_S0D4), DEF_MOD("iic-pmic", 926, R8A774E1_CLK_CP), DEF_MOD("i2c4", 927, R8A774E1_CLK_S0D6), DEF_MOD("i2c3", 928, R8A774E1_CLK_S0D6),
Synchronize R-Car R8A7792 V2H DTs with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- arch/arm/dts/r8a7792-blanche.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/r8a7792-blanche.dts b/arch/arm/dts/r8a7792-blanche.dts index c66de9dd12d..6a83923aa46 100644 --- a/arch/arm/dts/r8a7792-blanche.dts +++ b/arch/arm/dts/r8a7792-blanche.dts @@ -239,7 +239,7 @@ };
keyboard_pins: keyboard { - pins = "GP_3_10", "GP_3_11", "GP_3_12", "GP_3_15", "GP_11_02"; + pins = "GP_3_10", "GP_3_11", "GP_3_12", "GP_3_15", "GP_11_2"; bias-pull-up; };
Synchronize R-Car R8A77970 V3M DTs with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- arch/arm/dts/r8a77970-v3msk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/r8a77970-v3msk.dts b/arch/arm/dts/r8a77970-v3msk.dts index c2b65f8de54..e36999e91af 100644 --- a/arch/arm/dts/r8a77970-v3msk.dts +++ b/arch/arm/dts/r8a77970-v3msk.dts @@ -145,7 +145,7 @@ status = "okay"; clock-frequency = <400000>;
- hdmi@39{ + hdmi@39 { compatible = "adi,adv7511w"; #sound-dai-cells = <0>; reg = <0x39>;
Synchronize R-Car R8A77990 E3 DTs with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- arch/arm/dts/r8a77990.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi index 1be0b99c15e..4c545eff9b4 100644 --- a/arch/arm/dts/r8a77990.dtsi +++ b/arch/arm/dts/r8a77990.dtsi @@ -76,7 +76,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; dynamic-power-coefficient = <277>; - clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; + clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; };
@@ -88,7 +88,7 @@ next-level-cache = <&L2_CA53>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; - clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; + clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; };
Synchronize R-Car R8A779F0 S4 DTs with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .
Signed-off-by: Marek Vasut marek.vasut+renesas@mailbox.org --- arch/arm/dts/r8a779f0-spider-cpu.dtsi | 22 +++++++++++++++++++++- arch/arm/dts/r8a779f0-spider.dts | 2 +- arch/arm/dts/r8a779f0.dtsi | 17 ++++++++++++++++- 3 files changed, 38 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/r8a779f0-spider-cpu.dtsi b/arch/arm/dts/r8a779f0-spider-cpu.dtsi index dd8e0e15952..5cbde8e8fcd 100644 --- a/arch/arm/dts/r8a779f0-spider-cpu.dtsi +++ b/arch/arm/dts/r8a779f0-spider-cpu.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or MIT) +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Device Tree Source for the Spider CPU board * @@ -6,6 +6,8 @@ */
#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> + #include "r8a779f0.dtsi"
/ { @@ -22,6 +24,24 @@ stdout-path = "serial0:1843200n8"; };
+ leds { + compatible = "gpio-leds"; + + led-7 { + gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <7>; + }; + + led-8 { + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <8>; + }; + }; + memory@48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ diff --git a/arch/arm/dts/r8a779f0-spider.dts b/arch/arm/dts/r8a779f0-spider.dts index 7aac3f4d319..f139cc4feb3 100644 --- a/arch/arm/dts/r8a779f0-spider.dts +++ b/arch/arm/dts/r8a779f0-spider.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or MIT) +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Device Tree Source for the Spider CPU and BreakOut boards * diff --git a/arch/arm/dts/r8a779f0.dtsi b/arch/arm/dts/r8a779f0.dtsi index 1d5426e6293..ecdd5a523fa 100644 --- a/arch/arm/dts/r8a779f0.dtsi +++ b/arch/arm/dts/r8a779f0.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0 or MIT) +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Device Tree Source for the R-Car S4-8 (R8A779F0) SoC * @@ -466,6 +466,21 @@ #thermal-sensor-cells = <1>; };
+ intc_ex: interrupt-controller@e61c0000 { + compatible = "renesas,intc-ex-r8a779f0", "renesas,irqc"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0 0xe61c0000 0 0x200>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_CORE R8A779F0_CLK_CL16M>; + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; + }; + tmu0: timer@e61e0000 { compatible = "renesas,tmu-r8a779f0", "renesas,tmu"; reg = <0 0xe61e0000 0 0x30>;
participants (1)
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Marek Vasut