[PATCH 01/20] Convert CONFIG_USB_OHCI_NEW et al to Kconfig
This converts the following to Kconfig: CONFIG_SYS_OHCI_SWAP_REG_ACCESS CONFIG_SYS_USB_OHCI_CPU_INIT CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS CONFIG_SYS_USB_OHCI_SLOT_NAME CONFIG_USB_ATMEL CONFIG_USB_ATMEL_CLK_SEL_PLLB CONFIG_USB_ATMEL_CLK_SEL_UPLL CONFIG_USB_OHCI_LPC32XX CONFIG_USB_OHCI_NEW
Signed-off-by: Tom Rini trini@konsulko.com --- arch/arm/include/asm/arch-lpc32xx/config.h | 4 -- configs/at91sam9260ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9260ek_dataflash_cs1_defconfig | 3 ++ configs/at91sam9260ek_nandflash_defconfig | 3 ++ configs/at91sam9261ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9261ek_dataflash_cs3_defconfig | 3 ++ configs/at91sam9261ek_nandflash_defconfig | 3 ++ configs/at91sam9263ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9263ek_dataflash_defconfig | 3 ++ configs/at91sam9263ek_nandflash_defconfig | 3 ++ configs/at91sam9263ek_norflash_boot_defconfig | 3 ++ configs/at91sam9263ek_norflash_defconfig | 3 ++ configs/at91sam9g10ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9g10ek_dataflash_cs3_defconfig | 3 ++ configs/at91sam9g10ek_nandflash_defconfig | 3 ++ configs/at91sam9g20ek_2mmc_defconfig | 3 ++ .../at91sam9g20ek_2mmc_nandflash_defconfig | 3 ++ configs/at91sam9g20ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9g20ek_dataflash_cs1_defconfig | 3 ++ configs/at91sam9g20ek_nandflash_defconfig | 3 ++ configs/at91sam9xeek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9xeek_dataflash_cs1_defconfig | 3 ++ configs/at91sam9xeek_nandflash_defconfig | 3 ++ configs/axs103_defconfig | 1 + configs/chromebook_bob_defconfig | 1 + configs/chromebook_kevin_defconfig | 1 + configs/comtrend_ar5315u_ram_defconfig | 2 + configs/comtrend_ar5387un_ram_defconfig | 2 + configs/comtrend_ct5361_ram_defconfig | 2 + configs/comtrend_vr3032u_ram_defconfig | 2 + configs/comtrend_wap5813n_ram_defconfig | 2 + configs/da850evm_defconfig | 1 + configs/da850evm_direct_nor_defconfig | 1 + configs/da850evm_nand_defconfig | 1 + configs/devkit3250_defconfig | 3 ++ configs/elgin-rv1108_defconfig | 1 + configs/evb-rk3128_defconfig | 1 + configs/evb-rk3328_defconfig | 1 + configs/evb-rv1108_defconfig | 1 + configs/hsdk_4xd_defconfig | 1 + configs/hsdk_defconfig | 1 + configs/huawei_hg556a_ram_defconfig | 2 + configs/khadas-edge-captain-rk3399_defconfig | 1 + configs/khadas-edge-rk3399_defconfig | 1 + configs/khadas-edge-v-rk3399_defconfig | 1 + configs/nanopi-r2s-rk3328_defconfig | 1 + configs/netgear_dgnd3700v2_ram_defconfig | 2 + configs/omapl138_lcdk_defconfig | 1 + configs/pinebook-pro-rk3399_defconfig | 1 + configs/pm9261_defconfig | 3 ++ configs/pm9263_defconfig | 3 ++ configs/roc-cc-rk3328_defconfig | 1 + configs/rock-pi-e-rk3328_defconfig | 1 + configs/rock64-rk3328_defconfig | 1 + configs/rock960-rk3399_defconfig | 1 + configs/rockpro64-rk3399_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 3 ++ configs/sama5d3_xplained_nandflash_defconfig | 3 ++ configs/sfr_nb4-ser_ram_defconfig | 2 + configs/smartweb_defconfig | 2 + configs/socrates_defconfig | 2 + configs/stih410-b2260_defconfig | 1 + configs/taurus_defconfig | 2 + configs/vexpress_aemv8a_juno_defconfig | 1 + drivers/usb/host/Kconfig | 44 +++++++++++++++++++ drivers/usb/host/ohci-at91.c | 5 --- drivers/usb/host/ohci-generic.c | 4 -- drivers/usb/host/ohci.h | 2 +- include/configs/at91sam9260ek.h | 6 --- include/configs/at91sam9261ek.h | 10 ----- include/configs/at91sam9263ek.h | 6 --- include/configs/at91sam9n12ek.h | 6 --- include/configs/at91sam9x5ek.h | 6 --- include/configs/axs10x.h | 2 - include/configs/bmips_bcm6318.h | 7 --- include/configs/bmips_bcm63268.h | 7 --- include/configs/bmips_bcm6328.h | 7 --- include/configs/bmips_bcm6348.h | 7 --- include/configs/bmips_bcm6358.h | 7 --- include/configs/bmips_bcm6362.h | 7 --- include/configs/bmips_bcm6368.h | 7 --- include/configs/da850evm.h | 4 -- include/configs/devkit3250.h | 1 - include/configs/ethernut5.h | 6 --- include/configs/evb_rk3399.h | 3 -- include/configs/gru.h | 3 -- include/configs/hsdk-4xd.h | 6 --- include/configs/hsdk.h | 6 --- include/configs/omapl138_lcdk.h | 6 --- include/configs/pinebook-pro-rk3399.h | 3 -- include/configs/pm9261.h | 6 --- include/configs/pm9263.h | 6 --- include/configs/rk3128_common.h | 3 -- include/configs/rk3328_common.h | 4 -- include/configs/rock960_rk3399.h | 3 -- include/configs/rockpro64_rk3399.h | 3 -- include/configs/rv1108_common.h | 2 - include/configs/sama5d3_xplained.h | 6 --- include/configs/sama5d3xek.h | 5 --- include/configs/smartweb.h | 6 --- include/configs/snapper9260.h | 6 --- include/configs/socrates.h | 4 -- include/configs/stih410-b2260.h | 2 - include/configs/sunxi-common.h | 5 --- include/configs/taurus.h | 6 --- include/configs/usb_a9263.h | 5 --- include/configs/vexpress_aemv8.h | 5 --- 107 files changed, 173 insertions(+), 214 deletions(-)
diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h index 653792c610cb..32d68cbeb81a 100644 --- a/arch/arm/include/asm/arch-lpc32xx/config.h +++ b/arch/arm/include/asm/arch-lpc32xx/config.h @@ -52,11 +52,7 @@
/* USB OHCI */ #if defined(CONFIG_USB_OHCI_LPC32XX) -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE USB_BASE -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "lpc32xx-ohci" #endif
#endif /* _LPC32XX_CONFIG_H */ diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index 9947d1d4c670..62b467ea3097 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index 8e54f1b13358..a5ccce1eae25 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 1badceeb2c1f..d3706d158b7d 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -63,3 +63,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 8b2f27a406ea..d479d76c79ec 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -65,4 +65,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index e5350cfd6fe6..96c44e9a1628 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -65,4 +65,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index 3557c4e57a67..16de51951191 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -63,4 +63,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index aa69b0f97a07..e73ff8861bed 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -68,4 +68,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index aa69b0f97a07..e73ff8861bed 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -68,4 +68,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index f88ea5cc3dc3..184431640e66 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -66,4 +66,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index b93eeaa2143c..7b975813928c 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -68,4 +68,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index eb2e13ccc09f..2c354f3b5b51 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -69,4 +69,7 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 818e630ea2c5..ee4de9b67d67 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -62,3 +62,6 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 118d778d4cfa..4a47ad128655 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -62,3 +62,6 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index bf667606a2a9..0e3d0b13140c 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -60,3 +60,6 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index d175575f7917..add019c10afd 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -66,3 +66,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index 2ea5bbd03407..72a21c3da94d 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index 304ee157bb7a..03b029cee8d9 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index a93ae955a57b..1ae1b28feefd 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index 4c51e7a3355a..77ad4b9fda2d 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -63,3 +63,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index 9947d1d4c670..62b467ea3097 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 8e54f1b13358..a5ccce1eae25 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -65,3 +65,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index 1badceeb2c1f..d3706d158b7d 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -63,3 +63,6 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9260" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index 64407655767f..0d1764958224 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -62,5 +62,6 @@ CONFIG_DESIGNWARE_SPI=y CONFIG_USB=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_STORAGE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 84fe5be19d56..938bc28a1d27 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -102,6 +102,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_DWC3=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index 669d6f570b9e..6f88002f968c 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -103,6 +103,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_DWC3=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index 170b766089d0..36eab571eafe 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -72,3 +72,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index 599fda481aa8..68969c041386 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -73,3 +73,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index b1ad57b5a56c..cb2caf454350 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -67,4 +67,6 @@ CONFIG_BCM6345_SERIAL=y CONFIG_USB=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y CONFIG_WDT_BCM6345=y diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index d07895de9b82..138d3c84bac7 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -72,3 +72,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index ca370e66a346..b7174ff5ee34 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -69,3 +69,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index de2d709a7a22..d7348298587f 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -110,6 +110,7 @@ CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_DA8XX=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15 CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_DA8XX=y CONFIG_USB_MUSB_PIO_ONLY=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 88ef772d9d50..8f6b8b9702f4 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -88,6 +88,7 @@ CONFIG_DAVINCI_SPI=y CONFIG_USB=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_DA8XX=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15 CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_DA8XX=y CONFIG_USB_MUSB_PIO_ONLY=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 052ef3070334..95b41ef32b14 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -113,6 +113,7 @@ CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_DA8XX=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15 CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_DA8XX=y CONFIG_USB_MUSB_PIO_ONLY=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index a0b7a2e2d36c..eae073d76ea6 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -86,4 +86,7 @@ CONFIG_CONS_INDEX=5 CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="lpc32xx-ohci" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 +CONFIG_USB_OHCI_LPC32XX=y CONFIG_OF_LIBFDT=y diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index 2f595be1c24a..263fe3b7c8d1 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -55,6 +55,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_PRODUCT_NUM=0x110a diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index e0fb3f62b45c..ac38d5e78852 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -51,6 +51,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 4d6d235cb125..c81437300c74 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -99,6 +99,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_GADGET is not set diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index dbca68fcf300..65b76c6b36d4 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -49,6 +49,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_PRODUCT_NUM=0x110a diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index 85844f7ec882..1d78c17d13b0 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -68,6 +68,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_STORAGE=y CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_PANIC_HANG=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index a714d28134bf..f9823af34d4d 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -67,6 +67,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_STORAGE=y CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_PANIC_HANG=y diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index 1c43ae262d81..2b5a58714102 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -69,3 +69,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index e9618e3e207a..9a0171e4a8a4 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -65,6 +65,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index 252a02b579e1..27f119931fb4 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -64,6 +64,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 731fbfcab264..de2b625120aa 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -65,6 +65,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index 41793ca7e486..15c2e1698c20 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -102,6 +102,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_GADGET is not set diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index bbfa9e13fa3c..73de5ed15b15 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -68,3 +68,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index b45f6d8564e9..28f4f95c95bd 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -105,6 +105,7 @@ CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_DA8XX=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15 CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_DA8XX=y CONFIG_USB_MUSB_PIO_ONLY=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index 121182c55d74..af473f913672 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -90,6 +90,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index c22076250bc7..6922380b0093 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -61,6 +61,9 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9261" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP32 is not set CONFIG_ATMEL_LCD=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 1406e7f1aa4d..2b4a844d804b 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -65,6 +65,9 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_SLOT_NAME="at91sam9263" +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP32 is not set CONFIG_ATMEL_LCD=y diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index ab25abc1a031..43b90c7879b7 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -108,6 +108,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_GADGET is not set diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index 1d51a267b93a..7d95e171f7f4 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -109,6 +109,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_GADGET is not set diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 640fe558d414..bc333a5e2a6a 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -106,6 +106,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 CONFIG_USB_DWC2=y CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_GADGET is not set diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index 78e50dbfbcb7..bb5b2143691d 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -74,6 +74,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_DWC3=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 4d2a5b32e31c..ef28fe6a937a 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -87,6 +87,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 848326051239..486e2190b2b3 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -104,6 +104,9 @@ CONFIG_ATMEL_PIT_TIMER=y CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y +CONFIG_USB_ATMEL_CLK_SEL_UPLL=y CONFIG_USB_STORAGE=y CONFIG_W1=y CONFIG_W1_GPIO=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index f12c5d791724..184ff5ff7248 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -107,6 +107,9 @@ CONFIG_ATMEL_PIT_TIMER=y CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y +CONFIG_USB_ATMEL_CLK_SEL_UPLL=y CONFIG_USB_STORAGE=y CONFIG_W1=y CONFIG_W1_GPIO=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 6f261882faae..df008b797f86 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -71,3 +71,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 4e05f71bf3af..84337e49e6c9 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -92,6 +92,8 @@ CONFIG_MACB=y CONFIG_RMII=y CONFIG_ATMEL_USART=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" CONFIG_USB_GADGET_VENDOR_NUM=0x0908 diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 28ea447ec55f..621573653785 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -96,4 +96,6 @@ CONFIG_USB=y # CONFIG_USB_EHCI_HCD is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_PCI=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=15 +CONFIG_SYS_OHCI_SWAP_REG_ACCESS=y CONFIG_USB_STORAGE=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index 198a0c7f9e5f..cb8c73afd474 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -58,6 +58,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 CONFIG_USB_DWC3=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index cf538d0f5f5f..3d61c7b57b59 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -110,6 +110,8 @@ CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_ATMEL_USART=y CONFIG_USB=y # CONFIG_SPL_DM_USB is not set +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 +CONFIG_USB_ATMEL=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" CONFIG_USB_GADGET_VENDOR_NUM=0x0908 diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index ba8883dced55..792bcf1eb5d4 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -35,3 +35,4 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_PCI=y CONFIG_USB=y +CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 0b82c2fdaf71..31ae9f74e7ac 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -297,10 +297,17 @@ config USB_EHCI_TXFIFO_THRESH
endif # USB_EHCI_HCD
+config USB_OHCI_NEW + bool + +config SYS_USB_OHCI_CPU_INIT + bool + config USB_OHCI_HCD bool "OHCI HCD (USB 1.1) support" depends on DM && OF_CONTROL select USB_HOST + select USB_OHCI_NEW ---help--- The Open Host Controller Interface (OHCI) is a standard for accessing USB 1.1 host controller hardware. It does more in hardware than Intel's @@ -332,6 +339,19 @@ config USB_OHCI_DA8XX
endif # USB_OHCI_HCD
+config SYS_USB_OHCI_SLOT_NAME + string "Display name for the OHCI controller" + depends on USB_OHCI_NEW && !DM_USB + +config SYS_USB_OHCI_MAX_ROOT_PORTS + int "Maximal number of ports of the root hub" + depends on USB_OHCI_NEW + default 1 if ARCH_SUNXI + +config SYS_OHCI_SWAP_REG_ACCESS + bool "Perform byte swapping on OHCI controller register accesses" + depends on USB_OHCI_NEW + config USB_UHCI_HCD bool "UHCI HCD (most Intel and VIA) support" select USB_HOST @@ -381,6 +401,30 @@ config USB_R8A66597_HCD This enables support for the on-chip Renesas R8A66597 USB 2.0 controller, present in various RZ and SH SoCs.
+config USB_ATMEL + bool "AT91 OHCI USB support" + depends on ARCH_AT91 + select SYS_USB_OHCI_CPU_INIT + select USB_OHCI_NEW + +choice + prompt "Clock for OHCI" + depends on USB_ATMEL + +config USB_ATMEL_CLK_SEL_PLLB + bool "PLLB" + +config USB_ATMEL_CLK_SEL_UPLL + bool "UPLL" + +endchoice + +config USB_OHCI_LPC32XX + bool "LPC32xx USB OHCI support" + depends on ARCH_LPC32XX + select SYS_USB_OHCI_CPU_INIT + select USB_OHCI_NEW + config USB_MAX_CONTROLLER_COUNT int "Maximum number of USB host controllers" depends on USB_EHCI_FSL || USB_XHCI_FSL || \ diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 8ceabaf45c1b..9b955c1bd678 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -5,9 +5,6 @@ */
#include <common.h> - -#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) - #include <asm/arch/clk.h>
int usb_cpu_init(void) @@ -65,5 +62,3 @@ int usb_cpu_init_fail(void) { return usb_cpu_stop(); } - -#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */ diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c index 163f0ef17b11..5d23058aaf6a 100644 --- a/drivers/usb/host/ohci-generic.c +++ b/drivers/usb/host/ohci-generic.c @@ -14,10 +14,6 @@ #include <reset.h> #include "ohci.h"
-#if !defined(CONFIG_USB_OHCI_NEW) -# error "Generic OHCI driver requires CONFIG_USB_OHCI_NEW" -#endif - struct generic_ohci { ohci_t ohci; struct clk *clocks; /* clock list */ diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h index a38cd25eb85f..7699f2e6b15a 100644 --- a/drivers/usb/host/ohci.h +++ b/drivers/usb/host/ohci.h @@ -151,7 +151,7 @@ struct ohci_hcca { * Maximum number of root hub ports. */ #ifndef CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS -# error "CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS undefined!" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #endif
/* diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 2c4f229d3476..ef9335c523f4 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -53,12 +53,6 @@ #endif
/* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#endif diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 563fff531d11..12726c10bd6d 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -51,16 +51,6 @@ #define CONFIG_DM9000_NO_SROM
/* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ -#ifdef CONFIG_AT91SAM9G10EK -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10" -#else -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" -#endif -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#endif diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index c100a411b2dc..9497f055035d 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -173,12 +173,6 @@ #endif
/* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#endif diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 29affe7b5cd6..4fac0aad42c5 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -41,13 +41,7 @@
/* USB host */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 #endif
/* SPL */ diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 6857f2e3c4a2..758a91cdaa97 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -41,13 +41,7 @@ /* USB */ #ifdef CONFIG_CMD_USB #ifndef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_UPLL -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 #endif #endif
diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 7e25846e401d..3e98ce09c720 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -39,8 +39,6 @@ /* * USB 1.1 configuration */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
/* * Environment settings diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h index ad7781bd3a27..55c1d439d58b 100644 --- a/include/configs/bmips_bcm6318.h +++ b/include/configs/bmips_bcm6318.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000
-/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */
#if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h index 0901f6e88ac4..f046b7e6622f 100644 --- a/include/configs/bmips_bcm63268.h +++ b/include/configs/bmips_bcm63268.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000
-/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */
#if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/bmips_bcm6328.h b/include/configs/bmips_bcm6328.h index 3f45f1f2550f..7e488072edc0 100644 --- a/include/configs/bmips_bcm6328.h +++ b/include/configs/bmips_bcm6328.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000
-/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */
#if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h index af1c3673fbb9..f704fe26ca0d 100644 --- a/include/configs/bmips_bcm6348.h +++ b/include/configs/bmips_bcm6348.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000
-/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */
#if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h index c15218fc9cb5..9aaa694cad91 100644 --- a/include/configs/bmips_bcm6358.h +++ b/include/configs/bmips_bcm6358.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000
-/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */
#if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h index 0c94b2c52543..34e542544cb8 100644 --- a/include/configs/bmips_bcm6362.h +++ b/include/configs/bmips_bcm6362.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000
-/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */
#if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h index 6486b7e61107..0319124a0edd 100644 --- a/include/configs/bmips_bcm6368.h +++ b/include/configs/bmips_bcm6368.h @@ -14,13 +14,6 @@ /* RAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000
-/* USB */ -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#if defined(CONFIG_USB_OHCI_HCD) -#define CONFIG_USB_OHCI_NEW -#endif /* CONFIG_USB_OHCI_HCD */ - /* U-Boot */
#if defined(CONFIG_BMIPS_BOOT_RAM) diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 1f6ac8d28adf..3db97205dab8 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -170,10 +170,6 @@ "console=ttyS2,115200n8\0" \ "hwconfig=dsp:wake=yes"
-/* USB Configs */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 - #ifdef CONFIG_SPL_BUILD /* defines for SPL */
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index e101d1f60048..328e4958f86a 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -55,7 +55,6 @@ /* * USB */ -#define CONFIG_USB_OHCI_LPC32XX #define CONFIG_USB_ISP1301_I2C_ADDR 0x2d
/* diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 2126731ccfc9..529b9837318f 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -61,13 +61,7 @@
/* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "host" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif
/* RTC */ diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h index 492b7b4df128..b7e850370b31 100644 --- a/include/configs/evb_rk3399.h +++ b/include/configs/evb_rk3399.h @@ -15,7 +15,4 @@
#define SDRAM_BANK_SIZE (2UL << 30)
-#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 - #endif diff --git a/include/configs/gru.h b/include/configs/gru.h index b1084bb21d4d..be2dc79968c0 100644 --- a/include/configs/gru.h +++ b/include/configs/gru.h @@ -13,7 +13,4 @@
#include <configs/rk3399_common.h>
-#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 - #endif diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index 7785bab7147b..03ca9281c829 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -38,12 +38,6 @@ * Ethernet PHY configuration */
-/* - * USB 1.1 configuration - */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 - /* * Environment settings */ diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index 6dd69ca38b42..0b8ac78e2794 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -37,12 +37,6 @@ * Ethernet PHY configuration */
-/* - * USB 1.1 configuration - */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 - /* * Environment settings */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index a344a46a3e66..c9f5004117f2 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -137,12 +137,6 @@ * U-Boot general configuration */
-/* - * USB Configs - */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 - /* * Linux Information */ diff --git a/include/configs/pinebook-pro-rk3399.h b/include/configs/pinebook-pro-rk3399.h index d478b19917df..241dc39be008 100644 --- a/include/configs/pinebook-pro-rk3399.h +++ b/include/configs/pinebook-pro-rk3399.h @@ -16,7 +16,4 @@
#define SDRAM_BANK_SIZE (2UL << 30)
-#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 - #endif diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index bc15cdb44602..7374514698f9 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -152,13 +152,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 256
/* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_EXTRA_ENV_SETTINGS \ "partition=nand0,0\0" \ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index a0eed66b5ff1..7a6d817926c7 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -175,13 +175,7 @@ AT91_MATRIX_SCFG_SLOT_CYCLE(255))
/* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_EXTRA_ENV_SETTINGS \ "partition=nand0,0\0" \ diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index f3e0eefb9a21..d5a4ca26b048 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -19,9 +19,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_MAX_SIZE 0x80000000
-#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 - /* usb mass storage */
#define ENV_MEM_LAYOUT_SETTINGS \ diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 90183579202d..165b78ff3309 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -30,8 +30,4 @@ "partitions=" PARTS_DEFAULT \ BOOTENV
-/* rockchip ohci host driver */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 - #endif diff --git a/include/configs/rock960_rk3399.h b/include/configs/rock960_rk3399.h index 2edad710284f..6099d2fa55a6 100644 --- a/include/configs/rock960_rk3399.h +++ b/include/configs/rock960_rk3399.h @@ -14,7 +14,4 @@ #include <configs/rk3399_common.h>
#define SDRAM_BANK_SIZE (2UL << 30) - -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif diff --git a/include/configs/rockpro64_rk3399.h b/include/configs/rockpro64_rk3399.h index 903e9df527c1..9195b9b99e41 100644 --- a/include/configs/rockpro64_rk3399.h +++ b/include/configs/rockpro64_rk3399.h @@ -14,7 +14,4 @@ #include <configs/rk3399_common.h>
#define SDRAM_BANK_SIZE (2UL << 30) - -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index d8de9c25df2b..83c3167f38dc 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x60000000
/* rockchip ohci host driver */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
#define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x60000000\0" \ diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index a10057452fe4..22839d544a50 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -39,13 +39,7 @@
/* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_UPLL -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00600000 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif
/* SPL */ diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index f61b6e0dabc7..dc89148a0450 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -52,12 +52,7 @@
/* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_ATMEL_CLK_SEL_UPLL -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 #endif
/* SPL */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 215c31bca410..65bc3c672eed 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -67,13 +67,7 @@ #define CONFIG_USART_ID ATMEL_ID_SYS
/* USB configuration */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
/* USB DFU support */
diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 6ff21b921687..2b7afb5d25e5 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -38,13 +38,7 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
/* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
/* GPIOs and IO expander */ #define CONFIG_PCA953X diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 6a78cb1f2648..db2826813261 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -223,10 +223,6 @@ /* pass open firmware flat tree */
/* USB support */ -#define CONFIG_USB_OHCI_NEW 1 #define CONFIG_PCI_OHCI 1 -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "ohci_pci" -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS 1
#endif /* __CONFIG_H */ diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index a425dad69214..1b8d38f4b52a 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -43,8 +43,6 @@ /* Extra Commands */
/* USB Configs */ -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
/* NET Configs */
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index d52552c5fe76..2bf4e58cddf7 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -120,11 +120,6 @@
/* Ethernet support */
-#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 -#endif - #ifdef CONFIG_ARM64 /* * Boards seem to come with at least 512MB of DRAM. diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 798d72d8e26b..ab2dc3d7146b 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -65,13 +65,7 @@
/* USB */ #if defined(CONFIG_BOARD_TAURUS) -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
/* USB DFU support */
diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index e432b04e9f5a..8cb8c609d052 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -45,12 +45,7 @@
/* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_ATMEL -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #endif
/* bootstrap + u-boot + env + linux in dataflash on CS0 */ diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 14b92c095a0d..e864b3fee6ae 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -274,11 +274,6 @@ /* Store environment at top of flash */ #endif
-#ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 -#endif - #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ #define FLASH_MAX_SECTOR_SIZE 0x00040000
At this point, the only user of ohci-hcd that also uses PCI is using DM, so we can drop CONFIG_PCI_OHCI* usage. No platforms set either of CONFIG_SYS_USB_OHCI_BOARD_INIT or CONFIG_SYS_USB_OHCI_CPU_INIT so those hooks can be removed as well.
Signed-off-by: Tom Rini trini@konsulko.com --- doc/README.generic_usb_ohci | 30 ------------ drivers/usb/host/ohci-hcd.c | 93 ------------------------------------- include/configs/socrates.h | 3 -- 3 files changed, 126 deletions(-)
diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci index 65b0896c7fd2..a7da4bcb836e 100644 --- a/doc/README.generic_usb_ohci +++ b/doc/README.generic_usb_ohci @@ -11,18 +11,6 @@ Configuration options
CONFIG_USB_OHCI_NEW: enable the new OHCI driver
- CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks: - - - extern int board_usb_init(void); - - extern int usb_board_stop(void); - - extern int usb_cpu_init_fail(void); - - CONFIG_SYS_USB_OHCI_CPU_INIT: call the cpu dependant hooks: - - - extern int usb_cpu_init(void); - - extern int usb_cpu_stop(void); - - extern int usb_cpu_init_fail(void); - CONFIG_SYS_USB_OHCI_REGS_BASE: defines the base address of the OHCI registers
@@ -43,21 +31,3 @@ config option
needs to be defined.
- -PCI Controllers ----------------- - -You'll need to define - - CONFIG_PCI_OHCI - -If you have several USB PCI controllers, define - - CONFIG_PCI_OHCI_DEVNO: number of the OHCI device in PCI list - -If undefined, the first instance found in PCI space will be used. - -PCI Controllers need to do byte swapping on register accesses, so they -should to define: - - CONFIG_SYS_OHCI_SWAP_REG_ACCESS diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index fedf0db9c7e4..9acef5ee4f84 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -35,13 +35,6 @@ #include <asm/cache.h> #include <linux/delay.h>
-#if defined(CONFIG_PCI_OHCI) -# include <pci.h> -#if !defined(CONFIG_PCI_OHCI_DEVNO) -#define CONFIG_PCI_OHCI_DEVNO 0 -#endif -#endif - #include <malloc.h> #include <memalign.h> #include <usb.h> @@ -53,7 +46,6 @@ #endif
#if defined(CONFIG_CPU_ARM920T) || \ - defined(CONFIG_PCI_OHCI) || \ defined(CONFIG_PCI) || \ defined(CONFIG_SYS_OHCI_USE_NPS) # define OHCI_USE_NPS /* force NoPowerSwitching mode */ @@ -68,26 +60,6 @@ #define OHCI_CONTROL_INIT \ (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
-#if !CONFIG_IS_ENABLED(DM_USB) -#ifdef CONFIG_PCI_OHCI -static struct pci_device_id ohci_pci_ids[] = { - {0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */ - {0x1033, 0x0035}, /* NEC PCI OHCI module ids */ - {0x1131, 0x1561}, /* Philips 1561 PCI OHCI module ids */ - /* Please add supported PCI OHCI controller ids here */ - {0, 0} -}; -#endif -#endif - -#ifdef CONFIG_PCI_EHCI_DEVNO -static struct pci_device_id ehci_pci_ids[] = { - {0x1131, 0x1562}, /* Philips 1562 PCI EHCI module ids */ - /* Please add supported PCI EHCI controller ids here */ - {0, 0} -}; -#endif - #ifdef DEBUG #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg) #else @@ -2007,21 +1979,6 @@ static char ohci_inited = 0;
int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) { -#ifdef CONFIG_PCI_OHCI - pci_dev_t pdev; -#endif - -#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT - /* cpu dependant init */ - if (usb_cpu_init()) - return -1; -#endif - -#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT - /* board dependant init */ - if (board_usb_init(index, USB_INIT_HOST)) - return -1; -#endif memset(&gohci, 0, sizeof(ohci_t));
/* align the storage */ @@ -2036,28 +1993,7 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) gohci.disabled = 1; gohci.sleeping = 0; gohci.irq = -1; -#ifdef CONFIG_PCI_OHCI - pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO); - - if (pdev != -1) { - u16 vid, did; - u32 base; - pci_read_config_word(pdev, PCI_VENDOR_ID, &vid); - pci_read_config_word(pdev, PCI_DEVICE_ID, &did); - printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n", - vid, did, (pdev >> 16) & 0xff, - (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7); - pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base); - printf("OHCI regs address 0x%08x\n", base); - gohci.regs = (struct ohci_regs *)base; - } else { - printf("%s: OHCI devnr: %d not found\n", __func__, - CONFIG_PCI_OHCI_DEVNO); - return -1; - } -#else gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE; -#endif
gohci.flags = 0; gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME; @@ -2065,15 +2001,6 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) if (hc_reset (&gohci) < 0) { hc_release_ohci (&gohci); err ("can't reset usb-%s", gohci.slot_name); -#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT - /* board dependant cleanup */ - board_usb_cleanup(index, USB_INIT_HOST); -#endif - -#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT - /* cpu dependant cleanup */ - usb_cpu_init_fail(); -#endif return -1; }
@@ -2081,15 +2008,6 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) err("can't start usb-%s", gohci.slot_name); hc_release_ohci(&gohci); /* Initialization failed */ -#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT - /* board dependant cleanup */ - usb_board_stop(); -#endif - -#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT - /* cpu dependant cleanup */ - usb_cpu_stop(); -#endif return -1; }
@@ -2112,17 +2030,6 @@ int usb_lowlevel_stop(int index) /* call hc_release_ohci() here ? */ hc_reset(&gohci);
-#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT - /* board dependant cleanup */ - if (usb_board_stop()) - return -1; -#endif - -#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT - /* cpu dependant cleanup */ - if (usb_cpu_stop()) - return -1; -#endif /* This driver is no longer initialised. It needs a new low-level * init (board/cpu) before it can be used again. */ ohci_inited = 0; diff --git a/include/configs/socrates.h b/include/configs/socrates.h index db2826813261..5dc8d8559882 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -222,7 +222,4 @@
/* pass open firmware flat tree */
-/* USB support */ -#define CONFIG_PCI_OHCI 1 - #endif /* __CONFIG_H */
On platforms that use CONFIG_USB_OHCI_NEW we do not need to set CONFIG_SYS_USB_OHCI_REGS_BASE nor CONFIG_SYS_USB_OHCI_SLOT_NAME. Drop these from platforms that we can.
Signed-off-by: Tom Rini trini@konsulko.com --- include/configs/at91sam9n12ek.h | 5 ----- include/configs/at91sam9x5ek.h | 7 ------- include/configs/ethernut5.h | 5 ----- include/configs/sama5d3_xplained.h | 5 ----- include/configs/sama5d3xek.h | 5 ----- include/configs/smartweb.h | 3 --- include/configs/snapper9260.h | 3 --- include/configs/taurus.h | 3 --- include/configs/usb_a9263.h | 5 ----- 9 files changed, 41 deletions(-)
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 4fac0aad42c5..4d492988eba7 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -39,11 +39,6 @@ "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
-/* USB host */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#endif - /* SPL */
#define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 758a91cdaa97..0e7665843dba 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -38,13 +38,6 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 #endif
-/* USB */ -#ifdef CONFIG_CMD_USB -#ifndef CONFIG_USB_EHCI_HCD -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#endif -#endif - /* SPL */
#define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 529b9837318f..88a702f1af27 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -59,11 +59,6 @@ #define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8 #endif
-/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 -#endif - /* RTC */ #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP) #define CONFIG_SYS_I2C_RTC_ADDR 0x51 diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 22839d544a50..fad65cb11234 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -37,11 +37,6 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #endif
-/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00600000 -#endif - /* SPL */
/* size of u-boot.bin to load */ diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index dc89148a0450..7bc3f91e77a8 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -50,11 +50,6 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #endif
-/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#endif - /* SPL */
#define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 65bc3c672eed..1a3ac817fbfc 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -66,9 +66,6 @@ #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS
-/* USB configuration */ -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE - /* USB DFU support */
#define CONFIG_USB_GADGET_AT91 diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 2b7afb5d25e5..7adb349f9a54 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -37,9 +37,6 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
-/* USB */ -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE - /* GPIOs and IO expander */ #define CONFIG_PCA953X #define CONFIG_SYS_I2C_PCA953X_ADDR 0x28 diff --git a/include/configs/taurus.h b/include/configs/taurus.h index ab2dc3d7146b..4758e23f5572 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -63,10 +63,7 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 #endif
-/* USB */ #if defined(CONFIG_BOARD_TAURUS) -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 - /* USB DFU support */
#define CONFIG_USB_GADGET_AT91 diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index 8cb8c609d052..e0dde1cc8365 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -43,11 +43,6 @@ #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) #endif
-/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 -#endif - /* bootstrap + u-boot + env + linux in dataflash on CS0 */ #define CONFIG_EXTRA_ENV_SETTINGS \
All of these symbols are not referenced anywhere else in the code, so remove them.
Cc: Peng Fan peng.fan@nxp.com Signed-off-by: Tom Rini trini@konsulko.com --- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 4 ---- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 - arch/arm/include/asm/arch-ls102xa/config.h | 6 +----- include/configs/MPC837XERDB.h | 1 - include/configs/ids8313.h | 1 - include/configs/mx6ullevk.h | 6 ------ 6 files changed, 1 insertion(+), 18 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 4b0f554e3363..f2dbcdc8164f 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -13,10 +13,8 @@
#define CONFIG_SYS_DCSRBAR 0x20000000 #define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x00140000) -#define CONFIG_SYS_DCSR_COP_CCP_ADDR (CONFIG_SYS_DCSRBAR + 0x02008040)
#define CONFIG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000) -#define CONFIG_SYS_GIC400_ADDR (CONFIG_SYS_IMMR + 0x00400000) #define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x00530000) #define SYS_FSL_QSPI_ADDR (CONFIG_SYS_IMMR + 0x00550000) #define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x00560000) @@ -26,9 +24,7 @@ #define CONFIG_SYS_FSL_SCFG_ADDR (CONFIG_SYS_IMMR + 0x00570000) #define CONFIG_SYS_FSL_BMAN_ADDR (CONFIG_SYS_IMMR + 0x00890000) #define CONFIG_SYS_FSL_QMAN_ADDR (CONFIG_SYS_IMMR + 0x00880000) -#define CONFIG_SYS_FSL_FMAN_ADDR (CONFIG_SYS_IMMR + 0x00a00000) #define CONFIG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea0000) -#define CONFIG_SYS_FSL_DCFG_ADDR (CONFIG_SYS_IMMR + 0x00ee0000) #define CONFIG_SYS_FSL_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000) #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011c0600) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 304cd7980a66..570397b3c04c 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -52,7 +52,6 @@ #define CONFIG_SYS_FSL_DCSR_DDR_ADDR 0x70012c000ULL #define CONFIG_SYS_FSL_DCSR_DDR2_ADDR 0x70012d000ULL #define CONFIG_SYS_FSL_DCSR_DDR3_ADDR 0x700132000ULL -#define CONFIG_SYS_FSL_DCSR_DDR4_ADDR 0x700133000ULL
#define I2C1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01000000) #define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01010000) diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 796e2b218e56..e5f61ea4a6ee 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -32,14 +32,11 @@ #define CONFIG_SYS_FSL_RCPM_ADDR (CONFIG_SYS_IMMR + 0x00ee2000) #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011d0500) -#define CONFIG_SYS_DCU_ADDR (CONFIG_SYS_IMMR + 0x01ce0000) #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000)
#define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000 #define CONFIG_SYS_FSL_JR0_OFFSET 0x00710000 #define CONFIG_SYS_TSEC1_OFFSET 0x01d10000 -#define CONFIG_SYS_TSEC2_OFFSET 0x01d50000 -#define CONFIG_SYS_TSEC3_OFFSET 0x01d90000 #define CONFIG_SYS_MDIO1_OFFSET 0x01d24000
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) @@ -79,8 +76,7 @@ #define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x02200000) #ifdef CONFIG_DDR_SPD #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_LS1_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) -#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS1_DDR_BLOCK1_SIZE +#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30) #endif
#define CONFIG_SYS_FSL_IFC_BE diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 3e4d66874df4..8517b0330f52 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -227,7 +227,6 @@
#ifdef CONFIG_TSEC2 #define CONFIG_TSEC2_NAME "TSEC1" -#define CONFIG_SYS_TSEC2_OFFSET 0x25000 #define TSEC2_PHY_ADDR 0x1c #define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) #define TSEC2_PHYIDX 0 diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index e0994d12baf4..a8bb2090ec4a 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -164,7 +164,6 @@
#ifdef CONFIG_TSEC2 #define CONFIG_TSEC2_NAME "TSEC1" -#define CONFIG_SYS_TSEC2_OFFSET 0x25000 #define TSEC2_PHY_ADDR 0x3 #define TSEC2_FLAGS TSEC_GIGABIT #define TSEC2_PHYIDX 0 diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index db09db44d53c..00cc547b900c 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -21,14 +21,8 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR - -/* NAND pin conflicts with usdhc2 */ -#ifdef CONFIG_SYS_USE_NAND -#define CONFIG_SYS_FSL_USDHC_NUM 1 -#else #define CONFIG_SYS_FSL_USDHC_NUM 2 #endif -#endif
#define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \
This converts the following to Kconfig: CONFIG_SYS_UNIFY_CACHE
Signed-off-by: Tom Rini trini@konsulko.com --- configs/M53017EVB_defconfig | 1 + configs/M5329AFEE_defconfig | 1 + configs/M5329BFEE_defconfig | 1 + configs/M5373EVB_defconfig | 1 + drivers/net/Kconfig | 4 ++++ include/configs/M53017EVB.h | 2 -- include/configs/M5329EVB.h | 2 -- include/configs/M5373EVB.h | 2 -- include/configs/astro_mcf5373l.h | 2 -- 9 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 901a15d5061a..cec2520bdd78 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y +CONFIG_SYS_UNIFY_CACHE=y CONFIG_MII=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 0bce9d8f4229..9d55d5058e57 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y +CONFIG_SYS_UNIFY_CACHE=y CONFIG_MII=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index efc7733b44c2..bd0cbddfb89c 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y +CONFIG_SYS_UNIFY_CACHE=y CONFIG_MII=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 920a86fa9aa7..0a159eb170e2 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y +CONFIG_SYS_UNIFY_CACHE=y CONFIG_MII=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 40b5c8274e9e..cb891f5dbede 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -409,6 +409,10 @@ config MCFFEC This driver supports the network interface units in the ColdFire family.
+config SYS_UNIFY_CACHE + depends on MCFFEC + bool "Invalidate icache during ethernet operations" + config FSLDMAFEC bool "ColdFire DMA Ethernet Support" depends on DM_ETH diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index b38260ed09aa..fd6aee127d87 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -22,8 +22,6 @@
#define CONFIG_WATCHDOG_TIMEOUT 5000
-#define CONFIG_SYS_UNIFY_CACHE - #ifdef CONFIG_MCFFEC # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_TX_ETH_BUFFER 8 diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index c65f26cc091d..b7ccdd08ac4f 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -22,8 +22,6 @@
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
-#define CONFIG_SYS_UNIFY_CACHE - #ifdef CONFIG_MCFFEC # define CONFIG_SYS_DISCOVER_PHY /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 7e45d3587979..06ee0748b930 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -24,8 +24,6 @@
#define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */
-#define CONFIG_SYS_UNIFY_CACHE - #ifdef CONFIG_MCFFEC # define CONFIG_SYS_DISCOVER_PHY /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 18e06076a4ab..a8265e961a26 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -65,8 +65,6 @@ #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000 #define CONFIG_SYS_CORE_SRAM 0x80000000
-#define CONFIG_SYS_UNIFY_CACHE - /* * Define baudrate for UART1 (console output, tftp, ...) * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
This converts the following to Kconfig: CONFIG_SYS_DISCOVER_PHY
Signed-off-by: Tom Rini trini@konsulko.com --- drivers/net/Kconfig | 5 +++++ drivers/net/fsl_mcdmafec.c | 8 -------- drivers/net/mcffec.c | 8 -------- include/configs/M5208EVBE.h | 9 --------- include/configs/M5235EVB.h | 9 --------- include/configs/M5272C3.h | 9 --------- include/configs/M5275EVB.h | 9 --------- include/configs/M5282EVB.h | 9 --------- include/configs/M53017EVB.h | 7 ------- include/configs/M5329EVB.h | 9 --------- include/configs/M5373EVB.h | 9 --------- include/configs/MCR3000.h | 1 - include/configs/cobra5272.h | 10 ---------- include/configs/eb_cpu5282.h | 1 - include/configs/stmark2.h | 8 -------- 15 files changed, 5 insertions(+), 106 deletions(-)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index cb891f5dbede..b671e72580e2 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -400,11 +400,14 @@ config FTGMAC100 offers high-priority transmit queue for QoS and CoS applications.
+config SYS_DISCOVER_PHY + bool
config MCFFEC bool "ColdFire Ethernet Support" depends on DM_ETH select PHYLIB + select SYS_DISCOVER_PHY help This driver supports the network interface units in the ColdFire family. @@ -417,6 +420,7 @@ config FSLDMAFEC bool "ColdFire DMA Ethernet Support" depends on DM_ETH select PHYLIB + select SYS_DISCOVER_PHY help This driver supports the network interface units in the ColdFire family. @@ -732,6 +736,7 @@ config MPC8XX_FEC bool "Fast Ethernet Controller on MPC8XX" depends on MPC8xx select MII + select SYS_DISCOVER_PHY help This driver implements support for the Fast Ethernet Controller on MPC8XX diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c index e103f79305e7..6825f9e27c06 100644 --- a/drivers/net/fsl_mcdmafec.c +++ b/drivers/net/fsl_mcdmafec.c @@ -243,16 +243,8 @@ static int fec_init(struct udevice *dev) fecpin_setclear(info, 1); fec_halt(dev);
-#if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \ - defined (CONFIG_SYS_DISCOVER_PHY) - mii_init(); set_fec_duplex_speed(fecp, info->dup_spd); -#else -#ifndef CONFIG_SYS_DISCOVER_PHY - set_fec_duplex_speed(fecp, (FECDUPLEX << 16) | FECSPEED); -#endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ -#endif /* CONFIG_CMD_MII || CONFIG_MII */
/* We use strictly polling mode only */ fecp->eimr = 0; diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index cef9eecac214..4dd848932b96 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -278,17 +278,9 @@ int mcffec_init(struct udevice *dev) fecpin_setclear(info, 1); fec_reset(info);
-#if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \ - defined (CONFIG_SYS_DISCOVER_PHY) - mii_init();
set_fec_duplex_speed(fecp, info->dup_spd); -#else -#ifndef CONFIG_SYS_DISCOVER_PHY - set_fec_duplex_speed(fecp, (FECDUPLEX << 16) | FECSPEED); -#endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ -#endif /* CONFIG_CMD_MII || CONFIG_MII */
/* We use strictly polling mode only */ fecp->eimr = 0; diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index fec73ba3426a..14b35d7ef507 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -17,15 +17,6 @@
#define CONFIG_WATCHDOG_TIMEOUT 5000
-#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - /* I2C */
#ifdef CONFIG_MCFFEC diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index ea89b03c66e3..762d1dd94b1c 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -22,15 +22,6 @@
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
-#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - /* I2C */ #define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi) #define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 4a2b37653e08..2fa1e4356e3e 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -31,15 +31,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text);
-#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - #ifdef CONFIG_MCFFEC # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 5e6d0856246e..4f6fc6d8cb9f 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -33,15 +33,6 @@
/* Available command configuration */
-#ifdef CONFIG_MCFFEC -#define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -#ifndef CONFIG_SYS_DISCOVER_PHY -#define FECDUPLEX FULL -#define FECSPEED _100BASET -#endif -#endif - /* I2C */ #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c) #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0) diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index bb6fbac68769..9f06f41ce11b 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -29,15 +29,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text*);
-#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - #ifdef CONFIG_MCFFEC # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index fd6aee127d87..90b0d41078ad 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -23,15 +23,8 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000
#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_TX_ETH_BUFFER 8 # define CONFIG_SYS_FEC_BUF_USE_SRAM - -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ #endif
#define CONFIG_SYS_RTC_CNT (0x8000) diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index b7ccdd08ac4f..6eaa660e11fb 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -22,15 +22,6 @@
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
-#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - /* I2C */
#ifdef CONFIG_MCFFEC diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 06ee0748b930..2e3988f6c723 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -24,15 +24,6 @@
#define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */
-#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - /* I2C */
#ifdef CONFIG_MCFFEC diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 01b33c77a88e..41ab86085083 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -86,7 +86,6 @@ /* environment is in FLASH */
/* Ethernet configuration part */ -#define CONFIG_SYS_DISCOVER_PHY 1
/* NAND configuration part */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index c926e6ac8ca2..dd7b6c08730c 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -85,15 +85,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text);
-#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - /* *----------------------------------------------------------------------------- * Define user parameters that have to be customized most likely @@ -157,7 +148,6 @@ enter a valid image address in flash */ * --- */
-#define CONFIG_SYS_DISCOVER_PHY #define CONFIG_SYS_ENET_BD_BASE 0x780000
/*----------------------------------------------------------------------- diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 615715750816..6e444c478922 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -47,7 +47,6 @@ *----------------------------------------------------------------------*/
#ifdef CONFIG_MCFFEC -#define CONFIG_SYS_DISCOVER_PHY #define CONFIG_OVERWRITE_ETHADDR_ONCE #endif
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 797d9bbb4af1..d8a334868f31 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -106,12 +106,4 @@ #define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 12)
-#ifdef CONFIG_MCFFEC -#define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -#ifndef CONFIG_SYS_DISCOVER_PHY -#define FECDUPLEX FULL -#define FECSPEED _100BASET -#endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif #endif /* __STMARK2_CONFIG_H */
This converts the following to Kconfig: CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
Signed-off-by: Tom Rini trini@konsulko.com --- arch/arm/mach-omap2/Kconfig | 21 +++++++++++++++++++++ include/configs/ti_omap4_common.h | 11 ----------- include/configs/ti_omap5_common.h | 11 ----------- 3 files changed, 21 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 51d1db4a87b0..fa4104747673 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -169,6 +169,27 @@ config TI_SECURE_EMIF_PROTECTED_REGION_SIZE using hardware memory firewalls. This value must be smaller than the TI_SECURE_EMIF_TOTAL_REGION_SIZE value.
+config SYS_AUTOMATIC_SDRAM_DETECTION + bool + +choice + depends on OMAP44XX || OMAP54XX + prompt "Static or dynamic DDR timing calculations" + default SYS_EMIF_PRECALCULATED_TIMING_REGS + help + For the DDR timing information we can either dynamically determine + the timings to use or use pre-determined timings (based on using the + dynamic method). Default to the static timing information. + +config SYS_EMIF_PRECALCULATED_TIMING_REGS + bool "Use precalcualted timing values" + +config SYS_DEFAULT_LPDDR2_TIMINGS + bool "Use default LPDDR2 timing values" + select SYS_AUTOMATIC_SDRAM_DETECTION + +endchoice + source "arch/arm/mach-omap2/omap3/Kconfig"
source "arch/arm/mach-omap2/omap4/Kconfig" diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index fcf282bc4c18..3d78972bfebb 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -23,17 +23,6 @@ /* Use General purpose timer 1 */ #define CONFIG_SYS_TIMERBASE GPT2_BASE
-/* - * For the DDR timing information we can either dynamically determine - * the timings to use or use pre-determined timings (based on using the - * dynamic method. Default to the static timing infomation. - */ -#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -#endif - #include <configs/ti_armv7_omap.h>
/* diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index f7f17d0f502c..a9d4cf905f8b 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -19,17 +19,6 @@ /* Use General purpose timer 1 */ #define CONFIG_SYS_TIMERBASE GPT2_BASE
-/* - * For the DDR timing information we can either dynamically determine - * the timings to use or use pre-determined timings (based on using the - * dynamic method. Default to the static timing infomation. - */ -#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -#endif - #define CONFIG_PALMAS_POWER
#include <linux/stringify.h>
This converts the following to Kconfig: CONFIG_PALMAS_POWER
Signed-off-by: Tom Rini trini@konsulko.com --- configs/am57xx_evm_defconfig | 1 + configs/am57xx_hs_evm_defconfig | 1 + configs/am57xx_hs_evm_usb_defconfig | 1 + configs/dra7xx_evm_defconfig | 1 + configs/dra7xx_hs_evm_defconfig | 1 + configs/dra7xx_hs_evm_usb_defconfig | 1 + configs/omap5_uevm_defconfig | 1 + drivers/power/Kconfig | 4 ++++ include/configs/ti_omap5_common.h | 2 -- 9 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index d82c66572cce..a077ef8ae24b 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -107,6 +107,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PALMAS=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 332091773015..e22c11d9807d 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -97,6 +97,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PALMAS=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 014a3830df7e..fc1bc01c0629 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -106,6 +106,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PALMAS=y +CONFIG_PALMAS_POWER=y CONFIG_SCSI_AHCI_PLAT=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index aae84dc6adef..bd3ce11b79ff 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -130,6 +130,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_PALMAS=y CONFIG_DM_REGULATOR_LP873X=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 51ffd2779c13..63b8f2b6fe77 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -124,6 +124,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_PALMAS=y CONFIG_DM_REGULATOR_LP873X=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 34dcdede9233..cd4b8bbce0a9 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -113,6 +113,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_PALMAS=y CONFIG_DM_REGULATOR_LP873X=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 73d742ea1d2b..912dd91259c1 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OMAP_HS=y CONFIG_DM_ETH=y +CONFIG_PALMAS_POWER=y CONFIG_SCSI=y CONFIG_SCSI_AHCI_PLAT=y CONFIG_CONS_INDEX=3 diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 0af53a6c67fe..bc47cf144dd0 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -426,6 +426,10 @@ config POWER_MT6323 This adds poweroff driver for mt6323 this pmic is used on mt7623 / Bananapi R2
+config PALMAS_POWER + bool "Palmas power support" + depends on OMAP54XX + config POWER_I2C bool "I2C-based power control for legacy power" depends on POWER_LEGACY diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index a9d4cf905f8b..24bbf9e7c2c6 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -19,8 +19,6 @@ /* Use General purpose timer 1 */ #define CONFIG_SYS_TIMERBASE GPT2_BASE
-#define CONFIG_PALMAS_POWER - #include <linux/stringify.h>
#include <asm/arch/cpu.h>
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini trini@konsulko.com --- configs/devkit8000_defconfig | 4 +- configs/evb-ast2600_defconfig | 2 +- configs/imx8mn_evk_defconfig | 3 -- scripts/config_whitelist.txt | 81 ----------------------------------- 4 files changed, 2 insertions(+), 88 deletions(-)
diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index a5e9f614df18..ac3079447868 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -69,11 +69,9 @@ CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_OF_TRANSLATE=y -CONFIG_SYS_I2C_LEGACY=y -CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y -CONFIG_DM_I2C=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_NAND_OMAP_ECCSCHEME_HAM1_CODE_HW=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index a91a53da4fc2..5c4d8426607c 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -1,7 +1,6 @@ CONFIG_ARM=y CONFIG_SYS_DCACHE_OFF=y CONFIG_SPL_SYS_THUMB_BUILD=y -CONFIG_SPL_LDSCRIPT="arch/arm/mach-aspeed/ast2600/u-boot-spl.lds" CONFIG_ARCH_ASPEED=y CONFIG_SYS_TEXT_BASE=0x80000000 CONFIG_SYS_MALLOC_LEN=0x2000000 @@ -11,6 +10,7 @@ CONFIG_TARGET_EVB_AST2600=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL_LDSCRIPT="arch/arm/mach-aspeed/ast2600/u-boot-spl.lds" CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ast2600-evb" diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 70d3d83e9a5d..6390a274e509 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -59,9 +59,6 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index f04b58e3459f..2b792a90692d 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -22,7 +22,6 @@ CONFIG_ENV_SETTINGS_V1 CONFIG_ENV_SETTINGS_V2 CONFIG_ENV_SROM_BANK CONFIG_ENV_TOTAL_SIZE -CONFIG_ESDHC_HC_BLK_ADDR CONFIG_ET1100_BASE CONFIG_ETHBASE CONFIG_EXTRA_ENV_SETTINGS @@ -46,7 +45,6 @@ CONFIG_FSL_CPLD CONFIG_FSL_DEVICE_DISABLE CONFIG_FSL_DSPI1 CONFIG_FSL_ESDHC_PIN_MUX -CONFIG_FSL_FIXED_MMC_LOCATION CONFIG_FSL_FM_10GEC_REGULAR_NOTATION CONFIG_FSL_IIM CONFIG_FSL_ISBC_KEY_EXT @@ -244,9 +242,6 @@ CONFIG_IRAM_BASE CONFIG_IRAM_END CONFIG_IRAM_SIZE CONFIG_IRAM_TOP -CONFIG_KIRKWOOD_EGIGA_INIT -CONFIG_KIRKWOOD_PCIE_INIT -CONFIG_KIRKWOOD_RGMII_PAD_1V8 CONFIG_KM_BOARD_EXTRA_ENV CONFIG_KM_DEF_ARCH CONFIG_KM_DEF_BOOT_ARGS_CPU @@ -258,7 +253,6 @@ CONFIG_KM_DEF_ENV_CONSTANTS CONFIG_KM_DEF_ENV_CPU CONFIG_KM_DEF_ENV_FLASH_BOOT CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI -CONFIG_KM_DISABLE_PCIE CONFIG_KM_ECC_MODE CONFIG_KM_NEW_ENV CONFIG_KM_ROOTFSSIZE @@ -279,7 +273,6 @@ CONFIG_KSNET_SERDES_SGMII2_BASE CONFIG_KSNET_SERDES_SGMII_BASE CONFIG_L1_INIT_RAM CONFIG_L2_CACHE -CONFIG_LAYERSCAPE_NS_ACCESS CONFIG_LCD_ALIGNMENT CONFIG_LCD_MENU CONFIG_LD9040 @@ -356,32 +349,9 @@ CONFIG_NUM_DSP_CPUS CONFIG_ODROID_REV_AIN CONFIG_OTHBOOTARGS CONFIG_OVERWRITE_ETHADDR_ONCE -CONFIG_PALMAS_POWER CONFIG_PCA953X -CONFIG_PCI1 -CONFIG_PCI2 -CONFIG_PCIE1 -CONFIG_PCIE2 -CONFIG_PCIE3 -CONFIG_PCIE4 -CONFIG_PCIE_IMX CONFIG_PCIE_IMX_PERST_GPIO CONFIG_PCIE_IMX_POWER_GPIO -CONFIG_PCI_CLK_FREQ -CONFIG_PCI_CONFIG_HOST_BRIDGE -CONFIG_PCI_GT64120 -CONFIG_PCI_IO_BUS -CONFIG_PCI_IO_PHYS -CONFIG_PCI_IO_SIZE -CONFIG_PCI_MEM_BUS -CONFIG_PCI_MEM_PHYS -CONFIG_PCI_MEM_SIZE -CONFIG_PCI_MSC01 -CONFIG_PCI_OHCI -CONFIG_PCI_PREF_BUS -CONFIG_PCI_PREF_PHYS -CONFIG_PCI_PREF_SIZE -CONFIG_PCI_SCAN_SHOW CONFIG_PEN_ADDR_BIG_ENDIAN CONFIG_PHY_BASE_ADR CONFIG_PHY_ET1011C_TX_CLK_FIX @@ -452,7 +422,6 @@ CONFIG_SERVERIP CONFIG_SETUP_INITRD_TAG CONFIG_SET_DFU_ALT_BUF_LEN CONFIG_SH73A0 -CONFIG_SH7751_PCI CONFIG_SH_ETHER_ALIGNE_SIZE CONFIG_SH_ETHER_BASE_ADDR CONFIG_SH_ETHER_CACHE_INVALIDATE @@ -512,7 +481,6 @@ CONFIG_SYS_AT91_MAIN_CLOCK CONFIG_SYS_AT91_PLLA CONFIG_SYS_AT91_PLLB CONFIG_SYS_AT91_SLOW_CLOCK -CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION CONFIG_SYS_AUXCORE_BOOTDATA CONFIG_SYS_BAUDRATE_TABLE CONFIG_SYS_BFTIC3_BASE @@ -648,10 +616,8 @@ CONFIG_SYS_DAVINCI_I2C_SPEED2 CONFIG_SYS_DCACHE_INV CONFIG_SYS_DCSRBAR CONFIG_SYS_DCSRBAR_PHYS -CONFIG_SYS_DCSR_COP_CCP_ADDR CONFIG_SYS_DCSR_DCFG_ADDR CONFIG_SYS_DCSR_DCFG_OFFSET -CONFIG_SYS_DCU_ADDR CONFIG_SYS_DDRCDR CONFIG_SYS_DDRCDR_VALUE CONFIG_SYS_DDRUA @@ -718,10 +684,8 @@ CONFIG_SYS_DDR_ZQ_CONTROL CONFIG_SYS_DEBUG CONFIG_SYS_DEBUG_SERVER_FW_ADDR CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR -CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS CONFIG_SYS_DIALOG_PMIC_I2C_ADDR CONFIG_SYS_DIRECT_FLASH_TFTP -CONFIG_SYS_DISCOVER_PHY CONFIG_SYS_DPAA_DCE CONFIG_SYS_DPAA_FMAN CONFIG_SYS_DPAA_PME @@ -736,7 +700,6 @@ CONFIG_SYS_DV_NOR_BOOT_CFG CONFIG_SYS_EEPROM_BUS_NUM CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE CONFIG_SYS_EEPROM_WREN -CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS CONFIG_SYS_ENET_BD_BASE CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_ETHOC_BASE @@ -850,10 +813,8 @@ CONFIG_SYS_FSL_CPC CONFIG_SYS_FSL_CPC_ADDR CONFIG_SYS_FSL_CPC_OFFSET CONFIG_SYS_FSL_CSU_ADDR -CONFIG_SYS_FSL_DCFG_ADDR CONFIG_SYS_FSL_DCSR_DDR2_ADDR CONFIG_SYS_FSL_DCSR_DDR3_ADDR -CONFIG_SYS_FSL_DCSR_DDR4_ADDR CONFIG_SYS_FSL_DCSR_DDR_ADDR CONFIG_SYS_FSL_DDR2_ADDR CONFIG_SYS_FSL_DDR3_ADDR @@ -899,7 +860,6 @@ CONFIG_SYS_FSL_FM2_RX2_1G_OFFSET CONFIG_SYS_FSL_FM2_RX3_1G_OFFSET CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET -CONFIG_SYS_FSL_FMAN_ADDR CONFIG_SYS_FSL_GUTS_ADDR CONFIG_SYS_FSL_IFC_BE CONFIG_SYS_FSL_IFC_LE @@ -916,7 +876,6 @@ CONFIG_SYS_FSL_OCRAM_SIZE CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS CONFIG_SYS_FSL_PAMU_OFFSET CONFIG_SYS_FSL_PCIE_COMPAT -CONFIG_SYS_FSL_PCI_VER_3_X CONFIG_SYS_FSL_PEX_LUT_BE CONFIG_SYS_FSL_PEX_LUT_LE CONFIG_SYS_FSL_PMIC_I2C_ADDR @@ -966,7 +925,6 @@ CONFIG_SYS_FSL_WDOG_BE CONFIG_SYS_FSL_WRIOP1_ADDR CONFIG_SYS_FSL_WRIOP1_MDIO1 CONFIG_SYS_FSL_WRIOP1_MDIO2 -CONFIG_SYS_GIC400_ADDR CONFIG_SYS_GP1DIR CONFIG_SYS_GP1ODR CONFIG_SYS_GP2DIR @@ -1059,7 +1017,6 @@ CONFIG_SYS_LOADS_BAUD_CHANGE CONFIG_SYS_LOW CONFIG_SYS_LOWMEM_BASE CONFIG_SYS_LPAE_SDRAM_BASE -CONFIG_SYS_LS1_DDR_BLOCK1_SIZE CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS CONFIG_SYS_LS_MC_DPC_MAX_LENGTH @@ -1253,7 +1210,6 @@ CONFIG_SYS_NUM_I2C_BUSES CONFIG_SYS_NVRAM_BASE_ADDR CONFIG_SYS_NVRAM_SIZE CONFIG_SYS_OBIR -CONFIG_SYS_OHCI_SWAP_REG_ACCESS CONFIG_SYS_OMAP_ABE_SYSCK CONFIG_SYS_ONENAND_BASE CONFIG_SYS_ONENAND_BLOCK_SIZE @@ -1291,31 +1247,21 @@ CONFIG_SYS_PCI1_MEM_VIRT CONFIG_SYS_PCI2_ADDR CONFIG_SYS_PCIE CONFIG_SYS_PCIE1_ADDR -CONFIG_SYS_PCIE1_BASE CONFIG_SYS_PCIE1_CFG_BASE CONFIG_SYS_PCIE1_CFG_SIZE -CONFIG_SYS_PCIE1_IO_BASE CONFIG_SYS_PCIE1_IO_PHYS -CONFIG_SYS_PCIE1_IO_SIZE CONFIG_SYS_PCIE1_IO_VIRT -CONFIG_SYS_PCIE1_MEM_BASE CONFIG_SYS_PCIE1_MEM_PHYS -CONFIG_SYS_PCIE1_MEM_SIZE CONFIG_SYS_PCIE1_MEM_VIRT CONFIG_SYS_PCIE1_PHYS_ADDR CONFIG_SYS_PCIE1_PHYS_BASE CONFIG_SYS_PCIE1_VIRT_ADDR CONFIG_SYS_PCIE2_ADDR -CONFIG_SYS_PCIE2_BASE CONFIG_SYS_PCIE2_CFG_BASE CONFIG_SYS_PCIE2_CFG_SIZE -CONFIG_SYS_PCIE2_IO_BASE CONFIG_SYS_PCIE2_IO_PHYS -CONFIG_SYS_PCIE2_IO_SIZE CONFIG_SYS_PCIE2_IO_VIRT -CONFIG_SYS_PCIE2_MEM_BASE CONFIG_SYS_PCIE2_MEM_PHYS -CONFIG_SYS_PCIE2_MEM_SIZE CONFIG_SYS_PCIE2_MEM_VIRT CONFIG_SYS_PCIE2_PHYS_ADDR CONFIG_SYS_PCIE2_PHYS_BASE @@ -1335,20 +1281,6 @@ CONFIG_SYS_PCIE4_MEM_PHYS CONFIG_SYS_PCIE4_MEM_VIRT CONFIG_SYS_PCIE4_PHYS_ADDR CONFIG_SYS_PCIE_MMAP_SIZE -CONFIG_SYS_PCI_IO_BASE -CONFIG_SYS_PCI_IO_PHYS -CONFIG_SYS_PCI_IO_SIZE -CONFIG_SYS_PCI_MAP_END -CONFIG_SYS_PCI_MAP_START -CONFIG_SYS_PCI_MEM_BASE -CONFIG_SYS_PCI_MEM_PHYS -CONFIG_SYS_PCI_MEM_SIZE -CONFIG_SYS_PCI_MMIO_BASE -CONFIG_SYS_PCI_MMIO_PHYS -CONFIG_SYS_PCI_MMIO_SIZE -CONFIG_SYS_PCI_SLV_MEM_BUS -CONFIG_SYS_PCI_SLV_MEM_LOCAL -CONFIG_SYS_PCI_SLV_MEM_SIZE CONFIG_SYS_PDCNT CONFIG_SYS_PEHLPAR CONFIG_SYS_PIOC_PDR_VAL @@ -1506,8 +1438,6 @@ CONFIG_SYS_TIMER_COUNTS_DOWN CONFIG_SYS_TIMER_RATE CONFIG_SYS_TMPVIRT CONFIG_SYS_TSEC1_OFFSET -CONFIG_SYS_TSEC2_OFFSET -CONFIG_SYS_TSEC3_OFFSET CONFIG_SYS_TX_ETH_BUFFER CONFIG_SYS_UART2_ALT3_GPIO CONFIG_SYS_UART_PORT @@ -1521,13 +1451,7 @@ CONFIG_SYS_UEC2_PHY_ADDR CONFIG_SYS_UEC2_RX_CLK CONFIG_SYS_UEC2_TX_CLK CONFIG_SYS_UEC2_UCC_NUM -CONFIG_SYS_UNIFY_CACHE -CONFIG_SYS_USB_OHCI_BOARD_INIT -CONFIG_SYS_USB_OHCI_CPU_INIT -CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS CONFIG_SYS_USB_OHCI_REGS_BASE -CONFIG_SYS_USB_OHCI_SLOT_NAME -CONFIG_SYS_USE_NAND CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT @@ -1604,17 +1528,12 @@ CONFIG_USBD_PRODUCTID_GSERIAL CONFIG_USBD_PRODUCT_NAME CONFIG_USBD_VENDORID CONFIG_USBNET_DEV_ADDR -CONFIG_USB_ATMEL -CONFIG_USB_ATMEL_CLK_SEL_PLLB -CONFIG_USB_ATMEL_CLK_SEL_UPLL CONFIG_USB_BOOTING CONFIG_USB_DEVICE CONFIG_USB_EXT2_BOOT CONFIG_USB_FAT_BOOT CONFIG_USB_GADGET_AT91 CONFIG_USB_ISP1301_I2C_ADDR -CONFIG_USB_OHCI_LPC32XX -CONFIG_USB_OHCI_NEW CONFIG_USB_TTY CONFIG_U_BOOT_HDR_SIZE CONFIG_VAR_SIZE_SPL
We don't use CONFIG_SYS_64BIT anywhere and can use CONFIG_TARGET_THUNDERX_88XX to build the device trees.
Signed-off-by: Tom Rini trini@konsulko.com --- arch/arm/dts/Makefile | 2 +- include/configs/thunderx_88xx.h | 4 ---- 2 files changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index dadcfdf9add0..f592a46b3fb9 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -412,7 +412,7 @@ dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \ am437x-cm-t43.dtb dtb-$(CONFIG_TARGET_AM3517_EVM) += am3517-evm.dtb dtb-$(CONFIG_TI816X) += dm8168-evm.dtb -dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb +dtb-$(CONFIG_TARGET_THUNDERX_88XX) += thunderx-88xx.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \ socfpga_agilex_socdk.dtb \ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index cc3891fd6dfd..cf2efdbe230b 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -6,10 +6,6 @@ #ifndef __THUNDERX_88XX_H__ #define __THUNDERX_88XX_H__
-#define CONFIG_THUNDERX - -#define CONFIG_SYS_64BIT - #define MEM_BASE 0x00500000
#define CONFIG_SYS_LOWMEM_BASE MEM_BASE
This converts the following to Kconfig: CONFIG_SYS_83XX_DDR_USES_CS0
Signed-off-by: Tom Rini trini@konsulko.com --- README | 4 ---- arch/powerpc/cpu/mpc83xx/Kconfig | 6 ++++++ include/configs/MPC837XERDB.h | 1 - 3 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/README b/README index 6bdfca66d65f..efc75a3f75b9 100644 --- a/README +++ b/README @@ -2074,10 +2074,6 @@ Low Level (hardware related) configuration options: - CONFIG_FSL_DDR_BIST Enable built-in memory test for Freescale DDR controllers.
-- CONFIG_SYS_83XX_DDR_USES_CS0 - Only for 83xx systems. If specified, then DDR should - be configured using CS0 and CS1 instead of CS2 and CS3. - - CONFIG_RMII Enable RMII mode for all FECs. Note that this is a global option, we can't diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index d1b9ae4c3c92..9a31604ba3e6 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -11,6 +11,11 @@ config E300 config SYS_CPU default "mpc83xx"
+config SYS_83XX_DDR_USES_CS0 + bool + help + DDR should be configured using CS0 and CS1 instead of CS2 and CS3. + choice prompt "Target select" optional @@ -19,6 +24,7 @@ config TARGET_MPC837XERDB bool "Support MPC837XERDB" select ARCH_MPC837X select BOARD_EARLY_INIT_F + select SYS_83XX_DDR_USES_CS0
config TARGET_IDS8313 bool "Support ids8313" diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 8517b0330f52..fc55e5c2f614 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -61,7 +61,6 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL 0x03000000 -#define CONFIG_SYS_83XX_DDR_USES_CS0
#define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_DHC_EN | DDRCDR_ODT | DDRCDR_Q_DRN)
With the last platform for this architecture removed, remove the rest of the architecture support as well.
Cc: Marek Vasut marex@denx.de Signed-off-by: Tom Rini trini@konsulko.com --- MAINTAINERS | 7 - README | 7 - arch/arm/Kconfig | 14 +- arch/arm/Makefile | 2 - arch/arm/cpu/pxa/Makefile | 14 - arch/arm/cpu/pxa/cache.c | 58 - arch/arm/cpu/pxa/config.mk | 18 - arch/arm/cpu/pxa/cpuinfo.c | 139 -- arch/arm/cpu/pxa/pxa2xx.c | 295 --- arch/arm/cpu/pxa/relocate.S | 22 - arch/arm/cpu/pxa/start.S | 98 - arch/arm/cpu/pxa/timer.c | 16 - arch/arm/cpu/pxa/usb.c | 89 - arch/arm/include/asm/arch-pxa/bitfield.h | 112 - arch/arm/include/asm/arch-pxa/config.h | 22 - arch/arm/include/asm/arch-pxa/hardware.h | 82 - arch/arm/include/asm/arch-pxa/pxa-regs.h | 2635 --------------------- arch/arm/include/asm/arch-pxa/pxa.h | 28 - arch/arm/include/asm/arch-pxa/regs-mmc.h | 140 -- arch/arm/include/asm/arch-pxa/regs-uart.h | 95 - arch/arm/include/asm/arch-pxa/regs-usb.h | 146 -- arch/arm/include/asm/config.h | 2 - doc/develop/driver-model/serial-howto.rst | 9 - drivers/mmc/Kconfig | 8 - drivers/mmc/Makefile | 1 - drivers/mmc/pxa_mmc_gen.c | 531 ----- drivers/serial/Kconfig | 6 - drivers/serial/Makefile | 1 - drivers/serial/serial_pxa.c | 342 --- drivers/serial/usbtty.h | 2 - drivers/usb/gadget/Makefile | 1 - drivers/usb/gadget/epautoconf.c | 6 - drivers/usb/gadget/ether.c | 25 +- drivers/usb/gadget/gadget_chips.h | 17 - drivers/usb/gadget/pxa27x_udc.c | 703 ------ drivers/video/Makefile | 1 - drivers/video/pxa_lcd.c | 549 ----- include/dm/platform_data/pxa_mmc_gen.h | 22 - include/dm/platform_data/serial_pxa.h | 40 - include/lcd.h | 4 +- include/pxa_lcd.h | 80 - include/usb/pxa27x_udc.h | 31 - 42 files changed, 3 insertions(+), 6417 deletions(-) delete mode 100644 arch/arm/cpu/pxa/Makefile delete mode 100644 arch/arm/cpu/pxa/cache.c delete mode 100644 arch/arm/cpu/pxa/config.mk delete mode 100644 arch/arm/cpu/pxa/cpuinfo.c delete mode 100644 arch/arm/cpu/pxa/pxa2xx.c delete mode 100644 arch/arm/cpu/pxa/relocate.S delete mode 100644 arch/arm/cpu/pxa/start.S delete mode 100644 arch/arm/cpu/pxa/timer.c delete mode 100644 arch/arm/cpu/pxa/usb.c delete mode 100644 arch/arm/include/asm/arch-pxa/bitfield.h delete mode 100644 arch/arm/include/asm/arch-pxa/config.h delete mode 100644 arch/arm/include/asm/arch-pxa/hardware.h delete mode 100644 arch/arm/include/asm/arch-pxa/pxa-regs.h delete mode 100644 arch/arm/include/asm/arch-pxa/pxa.h delete mode 100644 arch/arm/include/asm/arch-pxa/regs-mmc.h delete mode 100644 arch/arm/include/asm/arch-pxa/regs-uart.h delete mode 100644 arch/arm/include/asm/arch-pxa/regs-usb.h delete mode 100644 drivers/mmc/pxa_mmc_gen.c delete mode 100644 drivers/serial/serial_pxa.c delete mode 100644 drivers/usb/gadget/pxa27x_udc.c delete mode 100644 drivers/video/pxa_lcd.c delete mode 100644 include/dm/platform_data/pxa_mmc_gen.h delete mode 100644 include/dm/platform_data/serial_pxa.h delete mode 100644 include/pxa_lcd.h delete mode 100644 include/usb/pxa27x_udc.h
diff --git a/MAINTAINERS b/MAINTAINERS index 5945ba1c7a9a..bcffa14d9af9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -348,13 +348,6 @@ S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-marvell.git F: drivers/serial/serial_mvebu_a3700.c
-ARM MARVELL PXA -M: Marek Vasut marex@denx.de -S: Maintained -T: git https://source.denx.de/u-boot/custodians/u-boot-pxa.git -F: arch/arm/cpu/pxa/ -F: arch/arm/include/asm/arch-pxa/ - ARM MEDIATEK M: Ryder Lee ryder.lee@mediatek.com M: Weijie Gao weijie.gao@mediatek.com diff --git a/README b/README index efc75a3f75b9..ed8e807c8f33 100644 --- a/README +++ b/README @@ -850,13 +850,6 @@ The following options need to be configured: the appropriate value in Hz.
- MMC Support: - The MMC controller on the Intel PXA is supported. To - enable this define CONFIG_MMC. The MMC can be - accessed from the boot prompt by mapping the device - to physical memory similar to flash. Command line is - enabled with CONFIG_CMD_MMC. The MMC driver also works with - the FAT fs. This is enabled with CONFIG_CMD_FAT. - CONFIG_SH_MMCIF Support for Renesas on-chip MMCIF controller
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 423fca27de6b..434c5e98fa36 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -330,15 +330,6 @@ config CPU_V7R select SYS_ARM_MPU select SYS_CACHE_SHIFT_6
-config CPU_PXA - bool - select SYS_CACHE_SHIFT_5 - imply SYS_ARM_MMU - -config CPU_PXA27X - bool - select CPU_PXA - config CPU_SA1100 bool select SYS_CACHE_SHIFT_5 @@ -354,7 +345,6 @@ config SYS_CPU default "armv7" if CPU_V7A default "armv7" if CPU_V7R default "armv7m" if CPU_V7M - default "pxa" if CPU_PXA default "sa1100" if CPU_SA1100 default "armv8" if ARM64
@@ -369,14 +359,12 @@ config SYS_ARM_ARCH default 7 if CPU_V7A default 7 if CPU_V7M default 7 if CPU_V7R - default 5 if CPU_PXA default 4 if CPU_SA1100 default 8 if ARM64
choice prompt "Select the ARM data write cache policy" - default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \ - CPU_PXA || RZA1 + default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || RZA1 default SYS_ARM_CACHE_WRITEBACK
config SYS_ARM_CACHE_WRITEBACK diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 64c58f4c4a38..09fc31887880 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -11,7 +11,6 @@ arch-$(CONFIG_CPU_ARM920T) =-march=armv4t arch-$(CONFIG_CPU_ARM926EJS) =-march=armv5te arch-$(CONFIG_CPU_ARM946ES) =-march=armv5te arch-$(CONFIG_CPU_SA1100) =-march=armv4 -arch-$(CONFIG_CPU_PXA) = arch-$(CONFIG_CPU_ARM1136) =-march=armv5t arch-$(CONFIG_CPU_ARM1176) =-march=armv5t arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \ @@ -41,7 +40,6 @@ tune-$(CONFIG_CPU_ARM920T) = tune-$(CONFIG_CPU_ARM926EJS) = tune-$(CONFIG_CPU_ARM946ES) = tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100 -tune-$(CONFIG_CPU_PXA) =-mcpu=xscale tune-$(CONFIG_CPU_ARM1136) = tune-$(CONFIG_CPU_ARM1176) = tune-$(CONFIG_CPU_V7A) =-mtune=generic-armv7-a diff --git a/arch/arm/cpu/pxa/Makefile b/arch/arm/cpu/pxa/Makefile deleted file mode 100644 index fab77325c799..000000000000 --- a/arch/arm/cpu/pxa/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -extra-y = start.o - -obj-$(CONFIG_CPU_PXA27X) += pxa2xx.o - -obj-y += cpuinfo.o -obj-y += timer.o -obj-y += usb.o -obj-y += relocate.o -obj-y += cache.o diff --git a/arch/arm/cpu/pxa/cache.c b/arch/arm/cpu/pxa/cache.c deleted file mode 100644 index a2ec5e28c7dc..000000000000 --- a/arch/arm/cpu/pxa/cache.c +++ /dev/null @@ -1,58 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2016 Vasily Khoruzhick anarsoul@gmail.com - */ - -#include <cpu_func.h> -#include <asm/cache.h> -#include <linux/types.h> -#include <common.h> - -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -void invalidate_dcache_all(void) -{ - /* Flush/Invalidate I cache */ - asm volatile("mcr p15, 0, %0, c7, c5, 0\n" : : "r"(0)); - /* Flush/Invalidate D cache */ - asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0)); -} - -void flush_dcache_all(void) -{ - return invalidate_dcache_all(); -} - -void invalidate_dcache_range(unsigned long start, unsigned long stop) -{ - start &= ~(CONFIG_SYS_CACHELINE_SIZE - 1); - stop &= ~(CONFIG_SYS_CACHELINE_SIZE - 1); - - while (start <= stop) { - asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start)); - start += CONFIG_SYS_CACHELINE_SIZE; - } -} - -void flush_dcache_range(unsigned long start, unsigned long stop) -{ - return invalidate_dcache_range(start, stop); -} -#else /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ -void invalidate_dcache_all(void) -{ -} - -void flush_dcache_all(void) -{ -} -#endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ - -/* - * Stub implementations for l2 cache operations - */ - -__weak void l2_cache_disable(void) {} - -#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD) -__weak void invalidate_l2_cache(void) {} -#endif diff --git a/arch/arm/cpu/pxa/config.mk b/arch/arm/cpu/pxa/config.mk deleted file mode 100644 index e7b183674a2c..000000000000 --- a/arch/arm/cpu/pxa/config.mk +++ /dev/null @@ -1,18 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2002 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger mgroeger@sysgo.de - -# -# !WARNING! -# The PXA's OneNAND SPL uses .text.0 and .text.1 segments to allow booting from -# really small OneNAND memories where the mmap'd window is only 1KiB big. The -# .text.0 contains only the bare minimum needed to load the real SPL into SRAM. -# Add .text.0 and .text.1 into OBJFLAGS, so when the SPL is being objcopy'd, -# they are not discarded. -# - -#ifdef CONFIG_SPL_BUILD -OBJCOPYFLAGS += -j .text.0 -j .text.1 -#endif diff --git a/arch/arm/cpu/pxa/cpuinfo.c b/arch/arm/cpu/pxa/cpuinfo.c deleted file mode 100644 index 549b61d6e0f9..000000000000 --- a/arch/arm/cpu/pxa/cpuinfo.c +++ /dev/null @@ -1,139 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * PXA CPU information display - * - * Copyright (C) 2011 Marek Vasut marek.vasut@gmail.com - */ - -#include <common.h> -#include <init.h> -#include <asm/io.h> -#include <errno.h> -#include <linux/compiler.h> - -#define CPU_MASK_PXA_PRODID 0x000003f0 -#define CPU_MASK_PXA_REVID 0x0000000f - -#define CPU_MASK_PRODREV (CPU_MASK_PXA_PRODID | CPU_MASK_PXA_REVID) - -#define CPU_VALUE_PXA25X 0x100 -#define CPU_VALUE_PXA27X 0x110 - -static uint32_t pxa_get_cpuid(void) -{ - uint32_t cpuid; - asm volatile("mrc p15, 0, %0, c0, c0, 0" : "=r"(cpuid)); - return cpuid; -} - -int cpu_is_pxa25x(void) -{ - uint32_t id = pxa_get_cpuid(); - id &= CPU_MASK_PXA_PRODID; - return id == CPU_VALUE_PXA25X; -} - -int cpu_is_pxa27x(void) -{ - uint32_t id = pxa_get_cpuid(); - id &= CPU_MASK_PXA_PRODID; - return id == CPU_VALUE_PXA27X; -} - -int cpu_is_pxa27xm(void) -{ - uint32_t id = pxa_get_cpuid(); - return ((id & CPU_MASK_PXA_PRODID) == CPU_VALUE_PXA27X) && - ((id & CPU_MASK_PXA_REVID) == 8); -} - -uint32_t pxa_get_cpu_revision(void) -{ - return pxa_get_cpuid() & CPU_MASK_PRODREV; -} - -#ifdef CONFIG_DISPLAY_CPUINFO -static const char *pxa25x_get_revision(void) -{ - static __maybe_unused const char * const revs_25x[] = { "A0" }; - static __maybe_unused const char * const revs_26x[] = { - "A0", "B0", "B1" - }; - static const char *unknown = "Unknown"; - uint32_t id; - - if (!cpu_is_pxa25x()) - return unknown; - - id = pxa_get_cpuid() & CPU_MASK_PXA_REVID; - -/* PXA26x is a sick special case as it can't be told apart from PXA25x :-( */ -#ifdef CONFIG_CPU_PXA26X - switch (id) { - case 3: return revs_26x[0]; - case 5: return revs_26x[1]; - case 6: return revs_26x[2]; - } -#else - if (id == 6) - return revs_25x[0]; -#endif - return unknown; -} - -static const char *pxa27x_get_revision(void) -{ - static const char *const rev[] = { "A0", "A1", "B0", "B1", "C0", "C5" }; - static const char *unknown = "Unknown"; - uint32_t id; - - if (!cpu_is_pxa27x()) - return unknown; - - id = pxa_get_cpuid() & CPU_MASK_PXA_REVID; - - if ((id == 5) || (id == 6) || (id > 8)) - return unknown; - - /* Cap the special PXA270 C5 case. */ - if (id == 7) - id = 5; - - /* Cap the special PXA270M A1 case. */ - if (id == 8) - id = 1; - - return rev[id]; -} - -static int print_cpuinfo_pxa2xx(void) -{ - if (cpu_is_pxa25x()) { - puts("Marvell PXA25x rev. "); - puts(pxa25x_get_revision()); - } else if (cpu_is_pxa27x()) { - puts("Marvell PXA27x"); - if (cpu_is_pxa27xm()) puts("M"); - puts(" rev. "); - puts(pxa27x_get_revision()); - } else - return -EINVAL; - - puts("\n"); - - return 0; -} - -int print_cpuinfo(void) -{ - int ret; - - puts("CPU: "); - - ret = print_cpuinfo_pxa2xx(); - if (!ret) - return ret; - - return ret; -} -#endif diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c deleted file mode 100644 index c7efb67754e6..000000000000 --- a/arch/arm/cpu/pxa/pxa2xx.c +++ /dev/null @@ -1,295 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger mgroeger@sysgo.de - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke azu@sysgo.de - */ - -#include <common.h> -#include <cpu_func.h> -#include <init.h> -#include <irq_func.h> -#include <asm/arch/pxa-regs.h> -#include <asm/cache.h> -#include <asm/io.h> -#include <asm/system.h> -#include <command.h> - -/* Flush I/D-cache */ -static void cache_flush(void) -{ - unsigned long i = 0; - - asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i)); -} - -int cleanup_before_linux(void) -{ - /* - * This function is called just before we call Linux. It prepares - * the processor for Linux by just disabling everything that can - * disturb booting Linux. - */ - - disable_interrupts(); - icache_disable(); - dcache_disable(); - cache_flush(); - - return 0; -} - -inline void writelrb(uint32_t val, uint32_t addr) -{ - writel(val, addr); - asm volatile("" : : : "memory"); - readl(addr); - asm volatile("" : : : "memory"); -} - -void pxa2xx_dram_init(void) -{ - uint32_t tmp; - int i; - /* - * 1) Initialize Asynchronous static memory controller - */ - - writelrb(CONFIG_SYS_MSC0_VAL, MSC0); - writelrb(CONFIG_SYS_MSC1_VAL, MSC1); - writelrb(CONFIG_SYS_MSC2_VAL, MSC2); - /* - * 2) Initialize Card Interface - */ - - /* MECR: Memory Expansion Card Register */ - writelrb(CONFIG_SYS_MECR_VAL, MECR); - /* MCMEM0: Card Interface slot 0 timing */ - writelrb(CONFIG_SYS_MCMEM0_VAL, MCMEM0); - /* MCMEM1: Card Interface slot 1 timing */ - writelrb(CONFIG_SYS_MCMEM1_VAL, MCMEM1); - /* MCATT0: Card Interface Attribute Space Timing, slot 0 */ - writelrb(CONFIG_SYS_MCATT0_VAL, MCATT0); - /* MCATT1: Card Interface Attribute Space Timing, slot 1 */ - writelrb(CONFIG_SYS_MCATT1_VAL, MCATT1); - /* MCIO0: Card Interface I/O Space Timing, slot 0 */ - writelrb(CONFIG_SYS_MCIO0_VAL, MCIO0); - /* MCIO1: Card Interface I/O Space Timing, slot 1 */ - writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1); - - /* - * 3) Configure Fly-By DMA register - */ - - writelrb(CONFIG_SYS_FLYCNFG_VAL, FLYCNFG); - - /* - * 4) Initialize Timing for Sync Memory (SDCLK0) - */ - - /* - * Before accessing MDREFR we need a valid DRI field, so we set - * this to power on defaults + DRI field. - */ - - /* Read current MDREFR config and zero out DRI */ - tmp = readl(MDREFR) & ~0xfff; - /* Add user-specified DRI */ - tmp |= CONFIG_SYS_MDREFR_VAL & 0xfff; - /* Configure important bits */ - tmp |= MDREFR_K0RUN | MDREFR_SLFRSH; - tmp &= ~(MDREFR_APD | MDREFR_E1PIN); - - /* Write MDREFR back */ - writelrb(tmp, MDREFR); - - /* - * 5) Initialize Synchronous Static Memory (Flash/Peripherals) - */ - - /* Initialize SXCNFG register. Assert the enable bits. - * - * Write SXMRS to cause an MRS command to all enabled banks of - * synchronous static memory. Note that SXLCR need not be written - * at this time. - */ - writelrb(CONFIG_SYS_SXCNFG_VAL, SXCNFG); - - /* - * 6) Initialize SDRAM - */ - - writelrb(CONFIG_SYS_MDREFR_VAL & ~MDREFR_SLFRSH, MDREFR); - writelrb(CONFIG_SYS_MDREFR_VAL | MDREFR_E1PIN, MDREFR); - - /* - * 7) Write MDCNFG with MDCNFG:DEx deasserted (set to 0), to configure - * but not enable each SDRAM partition pair. - */ - - writelrb(CONFIG_SYS_MDCNFG_VAL & - ~(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3), MDCNFG); - - /* Wait for the clock to the SDRAMs to stabilize, 100..200 usec. */ - writel(0, OSCR); - while (readl(OSCR) < 0x300) - asm volatile("" : : : "memory"); - - /* - * 8) Trigger a number (usually 8) refresh cycles by attempting - * non-burst read or write accesses to disabled SDRAM, as commonly - * specified in the power up sequence documented in SDRAM data - * sheets. The address(es) used for this purpose must not be - * cacheable. - */ - for (i = 9; i >= 0; i--) { - writel(i, 0xa0000000); - asm volatile("" : : : "memory"); - } - /* - * 9) Write MDCNFG with enable bits asserted (MDCNFG:DEx set to 1). - */ - - tmp = CONFIG_SYS_MDCNFG_VAL & - (MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3); - tmp |= readl(MDCNFG); - writelrb(tmp, MDCNFG); - - /* - * 10) Write MDMRS. - */ - - writelrb(CONFIG_SYS_MDMRS_VAL, MDMRS); - - /* - * 11) Enable APD - */ - - if (CONFIG_SYS_MDREFR_VAL & MDREFR_APD) { - tmp = readl(MDREFR); - tmp |= MDREFR_APD; - writelrb(tmp, MDREFR); - } -} - -void pxa_gpio_setup(void) -{ - writel(CONFIG_SYS_GPSR0_VAL, GPSR0); - writel(CONFIG_SYS_GPSR1_VAL, GPSR1); - writel(CONFIG_SYS_GPSR2_VAL, GPSR2); -#if defined(CONFIG_CPU_PXA27X) - writel(CONFIG_SYS_GPSR3_VAL, GPSR3); -#endif - - writel(CONFIG_SYS_GPCR0_VAL, GPCR0); - writel(CONFIG_SYS_GPCR1_VAL, GPCR1); - writel(CONFIG_SYS_GPCR2_VAL, GPCR2); -#if defined(CONFIG_CPU_PXA27X) - writel(CONFIG_SYS_GPCR3_VAL, GPCR3); -#endif - - writel(CONFIG_SYS_GPDR0_VAL, GPDR0); - writel(CONFIG_SYS_GPDR1_VAL, GPDR1); - writel(CONFIG_SYS_GPDR2_VAL, GPDR2); -#if defined(CONFIG_CPU_PXA27X) - writel(CONFIG_SYS_GPDR3_VAL, GPDR3); -#endif - - writel(CONFIG_SYS_GAFR0_L_VAL, GAFR0_L); - writel(CONFIG_SYS_GAFR0_U_VAL, GAFR0_U); - writel(CONFIG_SYS_GAFR1_L_VAL, GAFR1_L); - writel(CONFIG_SYS_GAFR1_U_VAL, GAFR1_U); - writel(CONFIG_SYS_GAFR2_L_VAL, GAFR2_L); - writel(CONFIG_SYS_GAFR2_U_VAL, GAFR2_U); -#if defined(CONFIG_CPU_PXA27X) - writel(CONFIG_SYS_GAFR3_L_VAL, GAFR3_L); - writel(CONFIG_SYS_GAFR3_U_VAL, GAFR3_U); -#endif - - writel(CONFIG_SYS_PSSR_VAL, PSSR); -} - -void pxa_interrupt_setup(void) -{ - writel(0, ICLR); - writel(0, ICMR); -#if defined(CONFIG_CPU_PXA27X) - writel(0, ICLR2); - writel(0, ICMR2); -#endif -} - -void pxa_clock_setup(void) -{ - writel(CONFIG_SYS_CKEN, CKEN); - writel(CONFIG_SYS_CCCR, CCCR); - asm volatile("mcr p14, 0, %0, c6, c0, 0" : : "r"(0x0b)); - - /* enable the 32Khz oscillator for RTC and PowerManager */ - writel(OSCC_OON, OSCC); - while (!(readl(OSCC) & OSCC_OOK)) - asm volatile("" : : : "memory"); -} - -void pxa_wakeup(void) -{ - uint32_t rcsr; - - rcsr = readl(RCSR); - writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR); - - /* Wakeup */ - if (rcsr & RCSR_SMR) { - writel(PSSR_PH, PSSR); - pxa2xx_dram_init(); - icache_disable(); - dcache_disable(); - asm volatile("mov pc, %0" : : "r"(readl(PSPR))); - } -} - -int arch_cpu_init(void) -{ - pxa_gpio_setup(); - pxa_wakeup(); - pxa_interrupt_setup(); - pxa_clock_setup(); - return 0; -} - -void i2c_clk_enable(void) -{ - /* Set the global I2C clock on */ - writel(readl(CKEN) | CKEN14_I2C, CKEN); -} - -void __attribute__((weak)) reset_cpu(void) __attribute__((noreturn)); - -void reset_cpu(void) -{ - uint32_t tmp; - - setbits_le32(OWER, OWER_WME); - - tmp = readl(OSCR); - tmp += 0x1000; - writel(tmp, OSMR3); - writel(MDREFR_SLFRSH, MDREFR); - - for (;;) - ; -} - -void enable_caches(void) -{ -#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) - icache_enable(); -#endif -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) - dcache_enable(); -#endif -} diff --git a/arch/arm/cpu/pxa/relocate.S b/arch/arm/cpu/pxa/relocate.S deleted file mode 100644 index 778cd45e9c26..000000000000 --- a/arch/arm/cpu/pxa/relocate.S +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * relocate - PXA270 vector relocation - * - * Copyright (c) 2013 Albert ARIBAUD albert.u.boot@aribaud.net - */ - -#include <linux/linkage.h> - -/* - * The PXA SoC is very specific with respect to exceptions: it - * does not provide RAM at the high vectors address (0xFFFF0000), - * thus only the low address (0x00000000) is useable; but that is - * in ROM, so let's avoid relocating the vectors. - */ - .section .text.relocate_vectors,"ax",%progbits - -ENTRY(relocate_vectors) - - bx lr - -ENDPROC(relocate_vectors) diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S deleted file mode 100644 index ab7bcb4e5625..000000000000 --- a/arch/arm/cpu/pxa/start.S +++ /dev/null @@ -1,98 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * armboot - Startup Code for XScale CPU-core - * - * Copyright (C) 1998 Dan Malek dmalek@jlc.net - * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se> - * Copyright (C) 2000 Wolfgang Denk wd@denx.de - * Copyright (C) 2001 Alex Zuepke azu@sysgo.de - * Copyright (C) 2001 Marius Groger mag@sysgo.de - * Copyright (C) 2002 Alex Zupke azu@sysgo.de - * Copyright (C) 2002 Gary Jennejohn garyj@denx.de - * Copyright (C) 2002 Kyle Harris kharris@nexus-tech.net - * Copyright (C) 2003 Kai-Uwe Bloem kai-uwe.bloem@auerswald.de - * Copyright (C) 2003 Kshitij kshitij@ti.com - * Copyright (C) 2003 Richard Woodruff r-woodruff2@ti.com - * Copyright (C) 2003 Robert Schwebel r.schwebel@pengutronix.de - * Copyright (C) 2004 Texas Instruments r-woodruff2@ti.com - * Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com - */ - -#include <asm-offsets.h> -#include <config.h> - -/* - ************************************************************************* - * - * Startup Code (reset vector) - * - * do important init only if we don't start from memory! - * setup Memory and board specific bits prior to relocation. - * relocate armboot to ram - * setup stack - * - ************************************************************************* - */ - - .globl reset - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - -#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) - bl cpu_init_crit -#endif - -#ifdef CONFIG_CPU_PXA27X - /* - * enable clock for SRAM - */ - ldr r0,=CKEN - ldr r1,[r0] - orr r1,r1,#(1 << 20) - str r1,[r0] -#endif - bl _main - -/*------------------------------------------------------------------------------*/ - - .globl c_runtime_cpu_setup -c_runtime_cpu_setup: - bx lr - -/* - ************************************************************************* - * - * CPU_init_critical registers - * - * setup important registers - * setup memory timing - * - ************************************************************************* - */ -#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) -cpu_init_crit: - /* - * flush v4 I/D caches - */ - mov r0, #0 - mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */ - mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */ - - /* - * disable MMU stuff and caches - */ - mrc p15, 0, r0, c1, c0, 0 - bic r0, r0, #0x00003300 @ clear bits 13:12, 9:8 (--VI --RS) - bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) - orr r0, r0, #0x00000002 @ set bit 1 (A) Align - mcr p15, 0, r0, c1, c0, 0 - - mov pc, lr /* back to my caller */ -#endif /* !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */ diff --git a/arch/arm/cpu/pxa/timer.c b/arch/arm/cpu/pxa/timer.c deleted file mode 100644 index 8e9d610441ee..000000000000 --- a/arch/arm/cpu/pxa/timer.c +++ /dev/null @@ -1,16 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Marvell PXA2xx/3xx timer driver - * - * Copyright (C) 2011 Marek Vasut marek.vasut@gmail.com - */ - -#include <common.h> -#include <init.h> -#include <asm/io.h> - -int timer_init(void) -{ - writel(0, CONFIG_SYS_TIMER_COUNTER); - return 0; -} diff --git a/arch/arm/cpu/pxa/usb.c b/arch/arm/cpu/pxa/usb.c deleted file mode 100644 index 13e010d91ec4..000000000000 --- a/arch/arm/cpu/pxa/usb.c +++ /dev/null @@ -1,89 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2006 - * Markus Klotzbuecher, DENX Software Engineering mk@denx.de - */ - -#include <common.h> -#include <linux/delay.h> - -#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) -# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X) - -#include <asm/arch/pxa-regs.h> -#include <asm/io.h> -#include <usb.h> - -int usb_cpu_init(void) -{ -#if defined(CONFIG_CPU_MONAHANS) - /* Enable USB host clock. */ - writel(readl(CKENA) | CKENA_2_USBHOST | CKENA_20_UDC, CKENA); - udelay(100); -#endif -#if defined(CONFIG_CPU_PXA27X) - /* Enable USB host clock. */ - writel(readl(CKEN) | CKEN10_USBHOST, CKEN); -#endif - -#if defined(CONFIG_CPU_MONAHANS) - /* Configure Port 2 for Host (USB Client Registers) */ - writel(0x3000c, UP2OCR); -#endif - - writel(readl(UHCHR) | UHCHR_FHR, UHCHR); - mdelay(11); - writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR); - - writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR); - while (readl(UHCHR) & UHCHR_FSBIR) - udelay(1); - -#if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X) - writel(readl(UHCHR) & ~UHCHR_SSEP0, UHCHR); -#endif -#if defined(CONFIG_CPU_PXA27X) - writel(readl(UHCHR) & ~UHCHR_SSEP2, UHCHR); -#endif - writel(readl(UHCHR) & ~(UHCHR_SSEP1 | UHCHR_SSE), UHCHR); - - return 0; -} - -int usb_cpu_stop(void) -{ - writel(readl(UHCHR) | UHCHR_FHR, UHCHR); - udelay(11); - writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR); - - writel(readl(UHCCOMS) | UHCCOMS_HCR, UHCCOMS); - udelay(10); - -#if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X) - writel(readl(UHCHR) | UHCHR_SSEP0, UHCHR); -#endif -#if defined(CONFIG_CPU_PXA27X) - writel(readl(UHCHR) | UHCHR_SSEP2, UHCHR); -#endif - writel(readl(UHCHR) | UHCHR_SSEP1 | UHCHR_SSE, UHCHR); - -#if defined(CONFIG_CPU_MONAHANS) - /* Disable USB host clock. */ - writel(readl(CKENA) & ~(CKENA_2_USBHOST | CKENA_20_UDC), CKENA); - udelay(100); -#endif -#if defined(CONFIG_CPU_PXA27X) - /* Disable USB host clock. */ - writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN); -#endif - - return 0; -} - -int usb_cpu_init_fail(void) -{ - return usb_cpu_stop(); -} - -# endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X) */ -#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */ diff --git a/arch/arm/include/asm/arch-pxa/bitfield.h b/arch/arm/include/asm/arch-pxa/bitfield.h deleted file mode 100644 index 104a21c2e47d..000000000000 --- a/arch/arm/include/asm/arch-pxa/bitfield.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * FILE bitfield.h - * - * Version 1.1 - * Author Copyright (c) Marc A. Viredaz, 1998 - * DEC Western Research Laboratory, Palo Alto, CA - * Date April 1998 (April 1997) - * System Advanced RISC Machine (ARM) - * Language C or ARM Assembly - * Purpose Definition of macros to operate on bit fields. - */ - - -#ifndef __BITFIELD_H -#define __BITFIELD_H - -#ifndef __ASSEMBLY__ -#define UData(Data) ((unsigned long) (Data)) -#else -#define UData(Data) (Data) -#endif - - -/* - * MACRO: Fld - * - * Purpose - * The macro "Fld" encodes a bit field, given its size and its shift value - * with respect to bit 0. - * - * Note - * A more intuitive way to encode bit fields would have been to use their - * mask. However, extracting size and shift value information from a bit - * field's mask is cumbersome and might break the assembler (255-character - * line-size limit). - * - * Input - * Size Size of the bit field, in number of bits. - * Shft Shift value of the bit field with respect to bit 0. - * - * Output - * Fld Encoded bit field. - */ - -#define Fld(Size, Shft) (((Size) << 16) + (Shft)) - - -/* - * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit - * - * Purpose - * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return - * the size, shift value, mask, aligned mask, and first bit of a - * bit field. - * - * Input - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FSize Size of the bit field, in number of bits. - * FShft Shift value of the bit field with respect to bit 0. - * FMsk Mask for the bit field. - * FAlnMsk Mask for the bit field, aligned on bit 0. - * F1stBit First bit of the bit field. - */ - -#define FSize(Field) ((Field) >> 16) -#define FShft(Field) ((Field) & 0x0000FFFF) -#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) -#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) -#define F1stBit(Field) (UData (1) << FShft (Field)) - - -/* - * MACRO: FInsrt - * - * Purpose - * The macro "FInsrt" inserts a value into a bit field by shifting the - * former appropriately. - * - * Input - * Value Bit-field value. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FInsrt Bit-field value positioned appropriately. - */ - -#define FInsrt(Value, Field) \ - (UData (Value) << FShft (Field)) - - -/* - * MACRO: FExtr - * - * Purpose - * The macro "FExtr" extracts the value of a bit field by masking and - * shifting it appropriately. - * - * Input - * Data Data containing the bit-field to be extracted. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FExtr Bit-field value. - */ - -#define FExtr(Data, Field) \ - ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) - - -#endif /* __BITFIELD_H */ diff --git a/arch/arm/include/asm/arch-pxa/config.h b/arch/arm/include/asm/arch-pxa/config.h deleted file mode 100644 index 11effd47f5b9..000000000000 --- a/arch/arm/include/asm/arch-pxa/config.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014 Andrew Ruder andrew.ruder@elecsyscorp.com - */ - -#ifndef _ASM_ARM_PXA_CONFIG_ -#define _ASM_ARM_PXA_CONFIG_ - -#include <asm/arch/pxa-regs.h> - -/* - * Generic timer support - */ -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define CONFIG_SYS_TIMER_RATE 3250000 -#else -#error "Timer frequency unknown - please config PXA CPU type" -#endif - -#define CONFIG_SYS_TIMER_COUNTER OSCR - -#endif /* _ASM_ARM_PXA_CONFIG_ */ diff --git a/arch/arm/include/asm/arch-pxa/hardware.h b/arch/arm/include/asm/arch-pxa/hardware.h deleted file mode 100644 index 6d0023d7b865..000000000000 --- a/arch/arm/include/asm/arch-pxa/hardware.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/hardware.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Note: This file was taken from linux-2.4.19-rmk4-pxa1 - * - * - 2003/01/20 implementation specifics activated - * Robert Schwebel r.schwebel@pengutronix.de - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include <asm/mach-types.h> - -/* - * Define CONFIG_CPU_MONAHANS in case some CPU of the PXA3xx family is selected. - * PXA300/310/320 all have distinct register mappings in some cases, that's why - * the exact CPU has to be selected. CONFIG_CPU_MONAHANS is a helper for common - * drivers and compatibility glue with old source then. - */ -#ifndef CONFIG_CPU_MONAHANS -#if defined(CONFIG_CPU_PXA300) || \ - defined(CONFIG_CPU_PXA310) || \ - defined(CONFIG_CPU_PXA320) -#define CONFIG_CPU_MONAHANS -#endif -#endif - -/* - * These are statically mapped PCMCIA IO space for designs using it as a - * generic IO bus, typically with ISA parts, hardwired IDE interfaces, etc. - * The actual PCMCIA code is mapping required IO region at run time. - */ -#define PCMCIA_IO_0_BASE 0xf6000000 -#define PCMCIA_IO_1_BASE 0xf7000000 - - -/* - * We requires absolute addresses. - */ -#define PCIO_BASE 0 - -/* - * Workarounds for at least 2 errata so far require this. - * The mapping is set in mach-pxa/generic.c. - */ -#define UNCACHED_PHYS_0 0xff000000 -#define UNCACHED_ADDR UNCACHED_PHYS_0 - -/* - * Intel PXA internal I/O mappings: - * - * 0x40000000 - 0x41ffffff <--> 0xf8000000 - 0xf9ffffff - * 0x44000000 - 0x45ffffff <--> 0xfa000000 - 0xfbffffff - * 0x48000000 - 0x49ffffff <--> 0xfc000000 - 0xfdffffff - */ - -#include "pxa-regs.h" - -#ifndef __ASSEMBLY__ - -/* - * GPIO edge detection for IRQs: - * IRQs are generated on Falling-Edge, Rising-Edge, or both. - * This must be called *before* the corresponding IRQ is registered. - * Use this instead of directly setting GRER/GFER. - */ -#define GPIO_FALLING_EDGE 1 -#define GPIO_RISING_EDGE 2 -#define GPIO_BOTH_EDGES 3 - -#endif - -#endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-pxa/pxa-regs.h b/arch/arm/include/asm/arch-pxa/pxa-regs.h deleted file mode 100644 index b81b42c07c74..000000000000 --- a/arch/arm/include/asm/arch-pxa/pxa-regs.h +++ /dev/null @@ -1,2635 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/pxa-regs.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * - 2003/01/20: Robert Schwebel <r.schwebel@pengutronix.de - * Original file taken from linux-2.4.19-rmk4-pxa1. Added some definitions. - * Added include for hardware.h (for __REG definition) - */ -#ifndef _PXA_REGS_H_ -#define _PXA_REGS_H_ - -#include "bitfield.h" -#include "hardware.h" - -/* FIXME hack so that SA-1111.h will work [cb] */ - -#ifndef __ASSEMBLY__ -typedef unsigned short Word16 ; -typedef unsigned int Word32 ; -typedef Word32 Word ; -typedef Word Quad [4] ; -typedef void *Address ; -typedef void (*ExcpHndlr) (void) ; -#endif - -/* - * PXA Chip selects - */ -#ifdef CONFIG_CPU_MONAHANS -#define PXA_CS0_PHYS 0x00000000 /* for both small and large same start */ -#define PXA_CS1_PHYS 0x04000000 /* Small partition start address (64MB) */ -#define PXA_CS1_LPHYS 0x30000000 /* Large partition start address (256MB) */ -#define PXA_CS2_PHYS 0x10000000 /* (64MB) */ -#define PXA_CS3_PHYS 0x14000000 /* (64MB) */ -#define PXA_PCMCIA_PHYS 0x20000000 /* (256MB) */ -#else -#define PXA_CS0_PHYS 0x00000000 -#define PXA_CS1_PHYS 0x04000000 -#define PXA_CS2_PHYS 0x08000000 -#define PXA_CS3_PHYS 0x0C000000 -#define PXA_CS4_PHYS 0x10000000 -#define PXA_CS5_PHYS 0x14000000 -#endif /* CONFIG_CPU_MONAHANS */ - -/* - * Personal Computer Memory Card International Association (PCMCIA) sockets - */ -#define PCMCIAPrtSp 0x04000000 /* PCMCIA Partition Space [byte] */ -#define PCMCIASp (4*PCMCIAPrtSp) /* PCMCIA Space [byte] */ -#define PCMCIAIOSp PCMCIAPrtSp /* PCMCIA I/O Space [byte] */ -#define PCMCIAAttrSp PCMCIAPrtSp /* PCMCIA Attribute Space [byte] */ -#define PCMCIAMemSp PCMCIAPrtSp /* PCMCIA Memory Space [byte] */ - -#ifndef CONFIG_CPU_MONAHANS /* Monahans supports only one slot */ -#define PCMCIA0Sp PCMCIASp /* PCMCIA 0 Space [byte] */ -#define PCMCIA0IOSp PCMCIAIOSp /* PCMCIA 0 I/O Space [byte] */ -#define PCMCIA0AttrSp PCMCIAAttrSp /* PCMCIA 0 Attribute Space [byte] */ -#define PCMCIA0MemSp PCMCIAMemSp /* PCMCIA 0 Memory Space [byte] */ -#endif - -#define PCMCIA1Sp PCMCIASp /* PCMCIA 1 Space [byte] */ -#define PCMCIA1IOSp PCMCIAIOSp /* PCMCIA 1 I/O Space [byte] */ -#define PCMCIA1AttrSp PCMCIAAttrSp /* PCMCIA 1 Attribute Space [byte] */ -#define PCMCIA1MemSp PCMCIAMemSp /* PCMCIA 1 Memory Space [byte] */ - -#define _PCMCIA(Nb) /* PCMCIA [0..1] */ \ - (0x20000000 + (Nb)*PCMCIASp) -#define _PCMCIAIO(Nb) _PCMCIA (Nb) /* PCMCIA I/O [0..1] */ -#define _PCMCIAAttr(Nb) /* PCMCIA Attribute [0..1] */ \ - (_PCMCIA (Nb) + 2*PCMCIAPrtSp) -#define _PCMCIAMem(Nb) /* PCMCIA Memory [0..1] */ \ - (_PCMCIA (Nb) + 3*PCMCIAPrtSp) - -#define _PCMCIA0 _PCMCIA (0) /* PCMCIA 0 */ -#define _PCMCIA0IO _PCMCIAIO (0) /* PCMCIA 0 I/O */ -#define _PCMCIA0Attr _PCMCIAAttr (0) /* PCMCIA 0 Attribute */ -#define _PCMCIA0Mem _PCMCIAMem (0) /* PCMCIA 0 Memory */ - -#ifndef CONFIG_CPU_MONAHANS /* Monahans supports only one slot */ -#define _PCMCIA1 _PCMCIA (1) /* PCMCIA 1 */ -#define _PCMCIA1IO _PCMCIAIO (1) /* PCMCIA 1 I/O */ -#define _PCMCIA1Attr _PCMCIAAttr (1) /* PCMCIA 1 Attribute */ -#define _PCMCIA1Mem _PCMCIAMem (1) /* PCMCIA 1 Memory */ -#endif - -/* - * DMA Controller - */ -#define DCSR0 0x40000000 /* DMA Control / Status Register for Channel 0 */ -#define DCSR1 0x40000004 /* DMA Control / Status Register for Channel 1 */ -#define DCSR2 0x40000008 /* DMA Control / Status Register for Channel 2 */ -#define DCSR3 0x4000000c /* DMA Control / Status Register for Channel 3 */ -#define DCSR4 0x40000010 /* DMA Control / Status Register for Channel 4 */ -#define DCSR5 0x40000014 /* DMA Control / Status Register for Channel 5 */ -#define DCSR6 0x40000018 /* DMA Control / Status Register for Channel 6 */ -#define DCSR7 0x4000001c /* DMA Control / Status Register for Channel 7 */ -#define DCSR8 0x40000020 /* DMA Control / Status Register for Channel 8 */ -#define DCSR9 0x40000024 /* DMA Control / Status Register for Channel 9 */ -#define DCSR10 0x40000028 /* DMA Control / Status Register for Channel 10 */ -#define DCSR11 0x4000002c /* DMA Control / Status Register for Channel 11 */ -#define DCSR12 0x40000030 /* DMA Control / Status Register for Channel 12 */ -#define DCSR13 0x40000034 /* DMA Control / Status Register for Channel 13 */ -#define DCSR14 0x40000038 /* DMA Control / Status Register for Channel 14 */ -#define DCSR15 0x4000003c /* DMA Control / Status Register for Channel 15 */ -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define DCSR16 0x40000040 /* DMA Control / Status Register for Channel 16 */ -#define DCSR17 0x40000044 /* DMA Control / Status Register for Channel 17 */ -#define DCSR18 0x40000048 /* DMA Control / Status Register for Channel 18 */ -#define DCSR19 0x4000004c /* DMA Control / Status Register for Channel 19 */ -#define DCSR20 0x40000050 /* DMA Control / Status Register for Channel 20 */ -#define DCSR21 0x40000054 /* DMA Control / Status Register for Channel 21 */ -#define DCSR22 0x40000058 /* DMA Control / Status Register for Channel 22 */ -#define DCSR23 0x4000005c /* DMA Control / Status Register for Channel 23 */ -#define DCSR24 0x40000060 /* DMA Control / Status Register for Channel 24 */ -#define DCSR25 0x40000064 /* DMA Control / Status Register for Channel 25 */ -#define DCSR26 0x40000068 /* DMA Control / Status Register for Channel 26 */ -#define DCSR27 0x4000006c /* DMA Control / Status Register for Channel 27 */ -#define DCSR28 0x40000070 /* DMA Control / Status Register for Channel 28 */ -#define DCSR29 0x40000074 /* DMA Control / Status Register for Channel 29 */ -#define DCSR30 0x40000078 /* DMA Control / Status Register for Channel 30 */ -#define DCSR31 0x4000007c /* DMA Control / Status Register for Channel 31 */ -#endif /* CONFIG_CPU_PXA27X || CONFIG_CPU_MONAHANS */ - -#define DCSR(x) (0x40000000 | ((x) << 2)) - -#define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ -#define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */ -#define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ - -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ -#define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ -#define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ -#define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */ -#define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */ -#define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ -#define DCSR_ENRINTR (1 << 9) /* The end of Receive */ -#endif - -#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ -#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ -#define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */ -#define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ -#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ - -#define DINT 0x400000f0 /* DMA Interrupt Register */ - -#define DRCMR0 0x40000100 /* Request to Channel Map Register for DREQ 0 */ -#define DRCMR1 0x40000104 /* Request to Channel Map Register for DREQ 1 */ -#define DRCMR2 0x40000108 /* Request to Channel Map Register for I2S receive Request */ -#define DRCMR3 0x4000010c /* Request to Channel Map Register for I2S transmit Request */ -#define DRCMR4 0x40000110 /* Request to Channel Map Register for BTUART receive Request */ -#define DRCMR5 0x40000114 /* Request to Channel Map Register for BTUART transmit Request. */ -#define DRCMR6 0x40000118 /* Request to Channel Map Register for FFUART receive Request */ -#define DRCMR7 0x4000011c /* Request to Channel Map Register for FFUART transmit Request */ -#define DRCMR8 0x40000120 /* Request to Channel Map Register for AC97 microphone Request */ -#define DRCMR9 0x40000124 /* Request to Channel Map Register for AC97 modem receive Request */ -#define DRCMR10 0x40000128 /* Request to Channel Map Register for AC97 modem transmit Request */ -#define DRCMR11 0x4000012c /* Request to Channel Map Register for AC97 audio receive Request */ -#define DRCMR12 0x40000130 /* Request to Channel Map Register for AC97 audio transmit Request */ -#define DRCMR13 0x40000134 /* Request to Channel Map Register for SSP receive Request */ -#define DRCMR14 0x40000138 /* Request to Channel Map Register for SSP transmit Request */ -#define DRCMR15 0x4000013c /* Reserved */ -#define DRCMR16 0x40000140 /* Reserved */ -#define DRCMR17 0x40000144 /* Request to Channel Map Register for ICP receive Request */ -#define DRCMR18 0x40000148 /* Request to Channel Map Register for ICP transmit Request */ -#define DRCMR19 0x4000014c /* Request to Channel Map Register for STUART receive Request */ -#define DRCMR20 0x40000150 /* Request to Channel Map Register for STUART transmit Request */ -#define DRCMR21 0x40000154 /* Request to Channel Map Register for MMC receive Request */ -#define DRCMR22 0x40000158 /* Request to Channel Map Register for MMC transmit Request */ -#define DRCMR23 0x4000015c /* Reserved */ -#define DRCMR24 0x40000160 /* Reserved */ -#define DRCMR25 0x40000164 /* Request to Channel Map Register for USB endpoint 1 Request */ -#define DRCMR26 0x40000168 /* Request to Channel Map Register for USB endpoint 2 Request */ -#define DRCMR27 0x4000016C /* Request to Channel Map Register for USB endpoint 3 Request */ -#define DRCMR28 0x40000170 /* Request to Channel Map Register for USB endpoint 4 Request */ -#define DRCMR29 0x40000174 /* Reserved */ -#define DRCMR30 0x40000178 /* Request to Channel Map Register for USB endpoint 6 Request */ -#define DRCMR31 0x4000017C /* Request to Channel Map Register for USB endpoint 7 Request */ -#define DRCMR32 0x40000180 /* Request to Channel Map Register for USB endpoint 8 Request */ -#define DRCMR33 0x40000184 /* Request to Channel Map Register for USB endpoint 9 Request */ -#define DRCMR34 0x40000188 /* Reserved */ -#define DRCMR35 0x4000018C /* Request to Channel Map Register for USB endpoint 11 Request */ -#define DRCMR36 0x40000190 /* Request to Channel Map Register for USB endpoint 12 Request */ -#define DRCMR37 0x40000194 /* Request to Channel Map Register for USB endpoint 13 Request */ -#define DRCMR38 0x40000198 /* Request to Channel Map Register for USB endpoint 14 Request */ -#define DRCMR39 0x4000019C /* Reserved */ - -#define DRCMR68 0x40001110 /* Request to Channel Map Register for Camera FIFO 0 Request */ -#define DRCMR69 0x40001114 /* Request to Channel Map Register for Camera FIFO 1 Request */ -#define DRCMR70 0x40001118 /* Request to Channel Map Register for Camera FIFO 2 Request */ - -#define DRCMRRXSADR DRCMR2 -#define DRCMRTXSADR DRCMR3 -#define DRCMRRXBTRBR DRCMR4 -#define DRCMRTXBTTHR DRCMR5 -#define DRCMRRXFFRBR DRCMR6 -#define DRCMRTXFFTHR DRCMR7 -#define DRCMRRXMCDR DRCMR8 -#define DRCMRRXMODR DRCMR9 -#define DRCMRTXMODR DRCMR10 -#define DRCMRRXPCDR DRCMR11 -#define DRCMRTXPCDR DRCMR12 -#define DRCMRRXSSDR DRCMR13 -#define DRCMRTXSSDR DRCMR14 -#define DRCMRRXICDR DRCMR17 -#define DRCMRTXICDR DRCMR18 -#define DRCMRRXSTRBR DRCMR19 -#define DRCMRTXSTTHR DRCMR20 -#define DRCMRRXMMC DRCMR21 -#define DRCMRTXMMC DRCMR22 - -#define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */ -#define DRCMR_CHLNUM 0x0f /* mask for Channel Number (read / write) */ - -#define DDADR0 0x40000200 /* DMA Descriptor Address Register Channel 0 */ -#define DSADR0 0x40000204 /* DMA Source Address Register Channel 0 */ -#define DTADR0 0x40000208 /* DMA Target Address Register Channel 0 */ -#define DCMD0 0x4000020c /* DMA Command Address Register Channel 0 */ -#define DDADR1 0x40000210 /* DMA Descriptor Address Register Channel 1 */ -#define DSADR1 0x40000214 /* DMA Source Address Register Channel 1 */ -#define DTADR1 0x40000218 /* DMA Target Address Register Channel 1 */ -#define DCMD1 0x4000021c /* DMA Command Address Register Channel 1 */ -#define DDADR2 0x40000220 /* DMA Descriptor Address Register Channel 2 */ -#define DSADR2 0x40000224 /* DMA Source Address Register Channel 2 */ -#define DTADR2 0x40000228 /* DMA Target Address Register Channel 2 */ -#define DCMD2 0x4000022c /* DMA Command Address Register Channel 2 */ -#define DDADR3 0x40000230 /* DMA Descriptor Address Register Channel 3 */ -#define DSADR3 0x40000234 /* DMA Source Address Register Channel 3 */ -#define DTADR3 0x40000238 /* DMA Target Address Register Channel 3 */ -#define DCMD3 0x4000023c /* DMA Command Address Register Channel 3 */ -#define DDADR4 0x40000240 /* DMA Descriptor Address Register Channel 4 */ -#define DSADR4 0x40000244 /* DMA Source Address Register Channel 4 */ -#define DTADR4 0x40000248 /* DMA Target Address Register Channel 4 */ -#define DCMD4 0x4000024c /* DMA Command Address Register Channel 4 */ -#define DDADR5 0x40000250 /* DMA Descriptor Address Register Channel 5 */ -#define DSADR5 0x40000254 /* DMA Source Address Register Channel 5 */ -#define DTADR5 0x40000258 /* DMA Target Address Register Channel 5 */ -#define DCMD5 0x4000025c /* DMA Command Address Register Channel 5 */ -#define DDADR6 0x40000260 /* DMA Descriptor Address Register Channel 6 */ -#define DSADR6 0x40000264 /* DMA Source Address Register Channel 6 */ -#define DTADR6 0x40000268 /* DMA Target Address Register Channel 6 */ -#define DCMD6 0x4000026c /* DMA Command Address Register Channel 6 */ -#define DDADR7 0x40000270 /* DMA Descriptor Address Register Channel 7 */ -#define DSADR7 0x40000274 /* DMA Source Address Register Channel 7 */ -#define DTADR7 0x40000278 /* DMA Target Address Register Channel 7 */ -#define DCMD7 0x4000027c /* DMA Command Address Register Channel 7 */ -#define DDADR8 0x40000280 /* DMA Descriptor Address Register Channel 8 */ -#define DSADR8 0x40000284 /* DMA Source Address Register Channel 8 */ -#define DTADR8 0x40000288 /* DMA Target Address Register Channel 8 */ -#define DCMD8 0x4000028c /* DMA Command Address Register Channel 8 */ -#define DDADR9 0x40000290 /* DMA Descriptor Address Register Channel 9 */ -#define DSADR9 0x40000294 /* DMA Source Address Register Channel 9 */ -#define DTADR9 0x40000298 /* DMA Target Address Register Channel 9 */ -#define DCMD9 0x4000029c /* DMA Command Address Register Channel 9 */ -#define DDADR10 0x400002a0 /* DMA Descriptor Address Register Channel 10 */ -#define DSADR10 0x400002a4 /* DMA Source Address Register Channel 10 */ -#define DTADR10 0x400002a8 /* DMA Target Address Register Channel 10 */ -#define DCMD10 0x400002ac /* DMA Command Address Register Channel 10 */ -#define DDADR11 0x400002b0 /* DMA Descriptor Address Register Channel 11 */ -#define DSADR11 0x400002b4 /* DMA Source Address Register Channel 11 */ -#define DTADR11 0x400002b8 /* DMA Target Address Register Channel 11 */ -#define DCMD11 0x400002bc /* DMA Command Address Register Channel 11 */ -#define DDADR12 0x400002c0 /* DMA Descriptor Address Register Channel 12 */ -#define DSADR12 0x400002c4 /* DMA Source Address Register Channel 12 */ -#define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ -#define DCMD12 0x400002cc /* DMA Command Address Register Channel 12 */ -#define DDADR13 0x400002d0 /* DMA Descriptor Address Register Channel 13 */ -#define DSADR13 0x400002d4 /* DMA Source Address Register Channel 13 */ -#define DTADR13 0x400002d8 /* DMA Target Address Register Channel 13 */ -#define DCMD13 0x400002dc /* DMA Command Address Register Channel 13 */ -#define DDADR14 0x400002e0 /* DMA Descriptor Address Register Channel 14 */ -#define DSADR14 0x400002e4 /* DMA Source Address Register Channel 14 */ -#define DTADR14 0x400002e8 /* DMA Target Address Register Channel 14 */ -#define DCMD14 0x400002ec /* DMA Command Address Register Channel 14 */ -#define DDADR15 0x400002f0 /* DMA Descriptor Address Register Channel 15 */ -#define DSADR15 0x400002f4 /* DMA Source Address Register Channel 15 */ -#define DTADR15 0x400002f8 /* DMA Target Address Register Channel 15 */ -#define DCMD15 0x400002fc /* DMA Command Address Register Channel 15 */ - -#define DDADR(x) (0x40000200 | ((x) << 4)) -#define DSADR(x) (0x40000204 | ((x) << 4)) -#define DTADR(x) (0x40000208 | ((x) << 4)) -#define DCMD(x) (0x4000020c | ((x) << 4)) - -#define DDADR_DESCADDR 0xfffffff0 /* Address of next descriptor (mask) */ -#define DDADR_STOP (1 << 0) /* Stop (read / write) */ - -#define DCMD_INCSRCADDR (1 << 31) /* Source Address Increment Setting. */ -#define DCMD_INCTRGADDR (1 << 30) /* Target Address Increment Setting. */ -#define DCMD_FLOWSRC (1 << 29) /* Flow Control by the source. */ -#define DCMD_FLOWTRG (1 << 28) /* Flow Control by the target. */ -#define DCMD_STARTIRQEN (1 << 22) /* Start Interrupt Enable */ -#define DCMD_ENDIRQEN (1 << 21) /* End Interrupt Enable */ -#define DCMD_ENDIAN (1 << 18) /* Device Endian-ness. */ -#define DCMD_BURST8 (1 << 16) /* 8 byte burst */ -#define DCMD_BURST16 (2 << 16) /* 16 byte burst */ -#define DCMD_BURST32 (3 << 16) /* 32 byte burst */ -#define DCMD_WIDTH1 (1 << 14) /* 1 byte width */ -#define DCMD_WIDTH2 (2 << 14) /* 2 byte width (HalfWord) */ -#define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */ -#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ - -/* default combinations */ -#define DCMD_RXPCDR (DCMD_INCTRGADDR|DCMD_FLOWSRC|DCMD_BURST32|DCMD_WIDTH4) -#define DCMD_RXMCDR (DCMD_INCTRGADDR|DCMD_FLOWSRC|DCMD_BURST32|DCMD_WIDTH4) -#define DCMD_TXPCDR (DCMD_INCSRCADDR|DCMD_FLOWTRG|DCMD_BURST32|DCMD_WIDTH4) - -/******************************************************************************/ -/* - * IrSR (Infrared Selection Register) - */ -#define IrSR_OFFSET 0x20 - -#define IrSR_RXPL_NEG_IS_ZERO (1<<4) -#define IrSR_RXPL_POS_IS_ZERO 0x0 -#define IrSR_TXPL_NEG_IS_ZERO (1<<3) -#define IrSR_TXPL_POS_IS_ZERO 0x0 -#define IrSR_XMODE_PULSE_1_6 (1<<2) -#define IrSR_XMODE_PULSE_3_16 0x0 -#define IrSR_RCVEIR_IR_MODE (1<<1) -#define IrSR_RCVEIR_UART_MODE 0x0 -#define IrSR_XMITIR_IR_MODE (1<<0) -#define IrSR_XMITIR_UART_MODE 0x0 - -#define IrSR_IR_RECEIVE_ON (\ - IrSR_RXPL_NEG_IS_ZERO | \ - IrSR_TXPL_POS_IS_ZERO | \ - IrSR_XMODE_PULSE_3_16 | \ - IrSR_RCVEIR_IR_MODE | \ - IrSR_XMITIR_UART_MODE) - -#define IrSR_IR_TRANSMIT_ON (\ - IrSR_RXPL_NEG_IS_ZERO | \ - IrSR_TXPL_POS_IS_ZERO | \ - IrSR_XMODE_PULSE_3_16 | \ - IrSR_RCVEIR_UART_MODE | \ - IrSR_XMITIR_IR_MODE) - -/* - * Serial Audio Controller - */ -/* FIXME the audio defines collide w/ the SA1111 defines. I don't like these - * short defines because there is too much chance of namespace collision - */ -#define SACR0 0x40400000 /* Global Control Register */ -#define SACR1 0x40400004 /* Serial Audio I 2 S/MSB-Justified Control Register */ -#define SASR0 0x4040000C /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */ -#define SAIMR 0x40400014 /* Serial Audio Interrupt Mask Register */ -#define SAICR 0x40400018 /* Serial Audio Interrupt Clear Register */ -#define SADIV 0x40400060 /* Audio Clock Divider Register. */ -#define SADR 0x40400080 /* Serial Audio Data Register (TX and RX FIFO access Register). */ - -/* - * AC97 Controller registers - */ -#define POCR 0x40500000 /* PCM Out Control Register */ -#define POCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */ - -#define PICR 0x40500004 /* PCM In Control Register */ -#define PICR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */ - -#define MCCR 0x40500008 /* Mic In Control Register */ -#define MCCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */ - -#define GCR 0x4050000C /* Global Control Register */ -#define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */ -#define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */ -#define GCR_SECRDY_IEN (1 << 9) /* Secondary Ready Interrupt Enable */ -#define GCR_PRIRDY_IEN (1 << 8) /* Primary Ready Interrupt Enable */ -#define GCR_SECRES_IEN (1 << 5) /* Secondary Resume Interrupt Enable */ -#define GCR_PRIRES_IEN (1 << 4) /* Primary Resume Interrupt Enable */ -#define GCR_ACLINK_OFF (1 << 3) /* AC-link Shut Off */ -#define GCR_WARM_RST (1 << 2) /* AC97 Warm Reset */ -#define GCR_COLD_RST (1 << 1) /* AC'97 Cold Reset (0 = active) */ -#define GCR_GIE (1 << 0) /* Codec GPI Interrupt Enable */ - -#define POSR 0x40500010 /* PCM Out Status Register */ -#define POSR_FIFOE (1 << 4) /* FIFO error */ - -#define PISR 0x40500014 /* PCM In Status Register */ -#define PISR_FIFOE (1 << 4) /* FIFO error */ - -#define MCSR 0x40500018 /* Mic In Status Register */ -#define MCSR_FIFOE (1 << 4) /* FIFO error */ - -#define GSR 0x4050001C /* Global Status Register */ -#define GSR_CDONE (1 << 19) /* Command Done */ -#define GSR_SDONE (1 << 18) /* Status Done */ -#define GSR_RDCS (1 << 15) /* Read Completion Status */ -#define GSR_BIT3SLT12 (1 << 14) /* Bit 3 of slot 12 */ -#define GSR_BIT2SLT12 (1 << 13) /* Bit 2 of slot 12 */ -#define GSR_BIT1SLT12 (1 << 12) /* Bit 1 of slot 12 */ -#define GSR_SECRES (1 << 11) /* Secondary Resume Interrupt */ -#define GSR_PRIRES (1 << 10) /* Primary Resume Interrupt */ -#define GSR_SCR (1 << 9) /* Secondary Codec Ready */ -#define GSR_PCR (1 << 8) /* Primary Codec Ready */ -#define GSR_MINT (1 << 7) /* Mic In Interrupt */ -#define GSR_POINT (1 << 6) /* PCM Out Interrupt */ -#define GSR_PIINT (1 << 5) /* PCM In Interrupt */ -#define GSR_MOINT (1 << 2) /* Modem Out Interrupt */ -#define GSR_MIINT (1 << 1) /* Modem In Interrupt */ -#define GSR_GSCI (1 << 0) /* Codec GPI Status Change Interrupt */ - -#define CAR 0x40500020 /* CODEC Access Register */ -#define CAR_CAIP (1 << 0) /* Codec Access In Progress */ - -#define PCDR 0x40500040 /* PCM FIFO Data Register */ -#define MCDR 0x40500060 /* Mic-in FIFO Data Register */ - -#define MOCR 0x40500100 /* Modem Out Control Register */ -#define MOCR_FEIE (1 << 3) /* FIFO Error */ - -#define MICR 0x40500108 /* Modem In Control Register */ -#define MICR_FEIE (1 << 3) /* FIFO Error */ - -#define MOSR 0x40500110 /* Modem Out Status Register */ -#define MOSR_FIFOE (1 << 4) /* FIFO error */ - -#define MISR 0x40500118 /* Modem In Status Register */ -#define MISR_FIFOE (1 << 4) /* FIFO error */ - -#define MODR 0x40500140 /* Modem FIFO Data Register */ - -#define PAC_REG_BASE 0x40500200 /* Primary Audio Codec */ -#define SAC_REG_BASE 0x40500300 /* Secondary Audio Codec */ -#define PMC_REG_BASE 0x40500400 /* Primary Modem Codec */ -#define SMC_REG_BASE 0x40500500 /* Secondary Modem Codec */ - - -/* - * USB Device Controller - */ -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) - -#define UDCCR 0x40600000 /* UDC Control Register */ -#define UDCCR_UDE (1 << 0) /* UDC enable */ -#define UDCCR_UDA (1 << 1) /* UDC active */ -#define UDCCR_RSM (1 << 2) /* Device resume */ -#define UDCCR_EMCE (1 << 3) /* Endpoint Memory Configuration Error */ -#define UDCCR_SMAC (1 << 4) /* Switch Endpoint Memory to Active Configuration */ -#define UDCCR_RESIR (1 << 29) /* Resume interrupt request */ -#define UDCCR_SUSIR (1 << 28) /* Suspend interrupt request */ -#define UDCCR_SM (1 << 28) /* Suspend interrupt mask */ -#define UDCCR_RSTIR (1 << 27) /* Reset interrupt request */ -#define UDCCR_REM (1 << 27) /* Reset interrupt mask */ -#define UDCCR_RM (1 << 29) /* resume interrupt mask */ -#define UDCCR_SRM (UDCCR_SM|UDCCR_RM) -#define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ -#define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation Protocol Port Support */ -#define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol Support */ -#define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol Enable */ -#define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */ -#define UDCCR_ACN (0x03 << 11) /* Active UDC configuration Number */ -#define UDCCR_ACN_S 11 -#define UDCCR_AIN (0x07 << 8) /* Active UDC interface Number */ -#define UDCCR_AIN_S 8 -#define UDCCR_AAISN (0x07 << 5) /* Active UDC Alternate Interface Setting Number */ -#define UDCCR_AAISN_S 5 - -#define UDCCS0 0x40600100 /* UDC Endpoint 0 Control/Status Register */ -#define UDCCS0_OPR (1 << 0) /* OUT packet ready */ -#define UDCCS0_IPR (1 << 1) /* IN packet ready */ -#define UDCCS0_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS0_DRWF (1 << 16) /* Device remote wakeup feature */ -#define UDCCS0_SST (1 << 4) /* Sent stall */ -#define UDCCS0_FST (1 << 5) /* Force stall */ -#define UDCCS0_RNE (1 << 6) /* Receive FIFO no empty */ -#define UDCCS0_SA (1 << 7) /* Setup active */ - -/* Bulk IN - Endpoint 1,6,11 */ -#define UDCCS1 0x40600104 /* UDC Endpoint 1 (IN) Control/Status Register */ -#define UDCCS6 0x40600028 /* UDC Endpoint 6 (IN) Control/Status Register */ -#define UDCCS11 0x4060003C /* UDC Endpoint 11 (IN) Control/Status Register */ - -#define UDCCS_BI_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_BI_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_BI_FTF (1 << 8) /* Flush Tx FIFO */ -#define UDCCS_BI_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_BI_SST (1 << 4) /* Sent stall */ -#define UDCCS_BI_FST (1 << 5) /* Force stall */ -#define UDCCS_BI_TSP (1 << 7) /* Transmit short packet */ - -/* Bulk OUT - Endpoint 2,7,12 */ -#define UDCCS2 0x40600108 /* UDC Endpoint 2 (OUT) Control/Status Register */ -#define UDCCS7 0x4060002C /* UDC Endpoint 7 (OUT) Control/Status Register */ -#define UDCCS12 0x40600040 /* UDC Endpoint 12 (OUT) Control/Status Register */ - -#define UDCCS_BO_RFS (1 << 0) /* Receive FIFO service */ -#define UDCCS_BO_RPC (1 << 1) /* Receive packet complete */ -#define UDCCS_BO_DME (1 << 3) /* DMA enable */ -#define UDCCS_BO_SST (1 << 4) /* Sent stall */ -#define UDCCS_BO_FST (1 << 5) /* Force stall */ -#define UDCCS_BO_RNE (1 << 6) /* Receive FIFO not empty */ -#define UDCCS_BO_RSP (1 << 7) /* Receive short packet */ - -/* Isochronous IN - Endpoint 3,8,13 */ -#define UDCCS3 0x4060001C /* UDC Endpoint 3 (IN) Control/Status Register */ -#define UDCCS8 0x40600030 /* UDC Endpoint 8 (IN) Control/Status Register */ -#define UDCCS13 0x40600044 /* UDC Endpoint 13 (IN) Control/Status Register */ - -#define UDCCS_II_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_II_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_II_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS_II_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_II_TSP (1 << 7) /* Transmit short packet */ - -/* Isochronous OUT - Endpoint 4,9,14 */ -#define UDCCS4 0x40600020 /* UDC Endpoint 4 (OUT) Control/Status Register */ -#define UDCCS9 0x40600034 /* UDC Endpoint 9 (OUT) Control/Status Register */ -#define UDCCS14 0x40600048 /* UDC Endpoint 14 (OUT) Control/Status Register */ - -#define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */ -#define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */ -#define UDCCS_IO_ROF (1 << 3) /* Receive overflow */ -#define UDCCS_IO_DME (1 << 3) /* DMA enable */ -#define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */ -#define UDCCS_IO_RSP (1 << 7) /* Receive short packet */ - -/* Interrupt IN - Endpoint 5,10,15 */ -#define UDCCS5 0x40600024 /* UDC Endpoint 5 (Interrupt) Control/Status Register */ -#define UDCCS10 0x40600038 /* UDC Endpoint 10 (Interrupt) Control/Status Register */ -#define UDCCS15 0x4060004C /* UDC Endpoint 15 (Interrupt) Control/Status Register */ - -#define UDCCS_INT_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_INT_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_INT_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS_INT_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_INT_SST (1 << 4) /* Sent stall */ -#define UDCCS_INT_FST (1 << 5) /* Force stall */ -#define UDCCS_INT_TSP (1 << 7) /* Transmit short packet */ - -#define UFNRH 0x40600060 /* UDC Frame Number Register High */ -#define UFNRL 0x40600014 /* UDC Frame Number Register Low */ -#define UBCR2 0x40600208 /* UDC Byte Count Reg 2 */ -#define UBCR4 0x4060006c /* UDC Byte Count Reg 4 */ -#define UBCR7 0x40600070 /* UDC Byte Count Reg 7 */ -#define UBCR9 0x40600074 /* UDC Byte Count Reg 9 */ -#define UBCR12 0x40600078 /* UDC Byte Count Reg 12 */ -#define UBCR14 0x4060007c /* UDC Byte Count Reg 14 */ -#define UDDR0 0x40600300 /* UDC Endpoint 0 Data Register */ -#define UDDR1 0x40600304 /* UDC Endpoint 1 Data Register */ -#define UDDR2 0x40600308 /* UDC Endpoint 2 Data Register */ -#define UDDR3 0x40600200 /* UDC Endpoint 3 Data Register */ -#define UDDR4 0x40600400 /* UDC Endpoint 4 Data Register */ -#define UDDR5 0x406000A0 /* UDC Endpoint 5 Data Register */ -#define UDDR6 0x40600600 /* UDC Endpoint 6 Data Register */ -#define UDDR7 0x40600680 /* UDC Endpoint 7 Data Register */ -#define UDDR8 0x40600700 /* UDC Endpoint 8 Data Register */ -#define UDDR9 0x40600900 /* UDC Endpoint 9 Data Register */ -#define UDDR10 0x406000C0 /* UDC Endpoint 10 Data Register */ -#define UDDR11 0x40600B00 /* UDC Endpoint 11 Data Register */ -#define UDDR12 0x40600B80 /* UDC Endpoint 12 Data Register */ -#define UDDR13 0x40600C00 /* UDC Endpoint 13 Data Register */ -#define UDDR14 0x40600E00 /* UDC Endpoint 14 Data Register */ -#define UDDR15 0x406000E0 /* UDC Endpoint 15 Data Register */ - -#define UICR0 0x40600004 /* UDC Interrupt Control Register 0 */ - -#define UICR0_IM0 (1 << 0) /* Interrupt mask ep 0 */ -#define UICR0_IM1 (1 << 1) /* Interrupt mask ep 1 */ -#define UICR0_IM2 (1 << 2) /* Interrupt mask ep 2 */ -#define UICR0_IM3 (1 << 3) /* Interrupt mask ep 3 */ -#define UICR0_IM4 (1 << 4) /* Interrupt mask ep 4 */ -#define UICR0_IM5 (1 << 5) /* Interrupt mask ep 5 */ -#define UICR0_IM6 (1 << 6) /* Interrupt mask ep 6 */ -#define UICR0_IM7 (1 << 7) /* Interrupt mask ep 7 */ - -#define UICR1 0x40600008 /* UDC Interrupt Control Register 1 */ - -#define UICR1_IM8 (1 << 0) /* Interrupt mask ep 8 */ -#define UICR1_IM9 (1 << 1) /* Interrupt mask ep 9 */ -#define UICR1_IM10 (1 << 2) /* Interrupt mask ep 10 */ -#define UICR1_IM11 (1 << 3) /* Interrupt mask ep 11 */ -#define UICR1_IM12 (1 << 4) /* Interrupt mask ep 12 */ -#define UICR1_IM13 (1 << 5) /* Interrupt mask ep 13 */ -#define UICR1_IM14 (1 << 6) /* Interrupt mask ep 14 */ -#define UICR1_IM15 (1 << 7) /* Interrupt mask ep 15 */ - -#define USIR0 0x4060000C /* UDC Status Interrupt Register 0 */ - -#define USIR0_IR0 (1 << 0) /* Interrup request ep 0 */ -#define USIR0_IR1 (1 << 2) /* Interrup request ep 1 */ -#define USIR0_IR2 (1 << 4) /* Interrup request ep 2 */ -#define USIR0_IR3 (1 << 3) /* Interrup request ep 3 */ -#define USIR0_IR4 (1 << 4) /* Interrup request ep 4 */ -#define USIR0_IR5 (1 << 5) /* Interrup request ep 5 */ -#define USIR0_IR6 (1 << 6) /* Interrup request ep 6 */ -#define USIR0_IR7 (1 << 7) /* Interrup request ep 7 */ - -#define USIR1 0x40600010 /* UDC Status Interrupt Register 1 */ - -#define USIR1_IR8 (1 << 0) /* Interrup request ep 8 */ -#define USIR1_IR9 (1 << 1) /* Interrup request ep 9 */ -#define USIR1_IR10 (1 << 2) /* Interrup request ep 10 */ -#define USIR1_IR11 (1 << 3) /* Interrup request ep 11 */ -#define USIR1_IR12 (1 << 4) /* Interrup request ep 12 */ -#define USIR1_IR13 (1 << 5) /* Interrup request ep 13 */ -#define USIR1_IR14 (1 << 6) /* Interrup request ep 14 */ -#define USIR1_IR15 (1 << 7) /* Interrup request ep 15 */ - - -#define UDCICR0 0x40600004 /* UDC Interrupt Control Register0 */ -#define UDCICR1 0x40600008 /* UDC Interrupt Control Register1 */ -#define UDCICR_FIFOERR (1 << 1) /* FIFO Error interrupt for EP */ -#define UDCICR_PKTCOMPL (1 << 0) /* Packet Complete interrupt for EP */ - -#define UDCICR_INT(n, intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) -#define UDCICR1_IECC (1 << 31) /* IntEn - Configuration Change */ -#define UDCICR1_IESOF (1 << 30) /* IntEn - Start of Frame */ -#define UDCICR1_IERU (1 << 29) /* IntEn - Resume */ -#define UDCICR1_IESU (1 << 28) /* IntEn - Suspend */ -#define UDCICR1_IERS (1 << 27) /* IntEn - Reset */ - -#define UDCISR0 0x4060000C /* UDC Interrupt Status Register 0 */ -#define UDCISR1 0x40600010 /* UDC Interrupt Status Register 1 */ -#define UDCISR_INT(n, intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) -#define UDCISR1_IRCC (1 << 31) /* IntEn - Configuration Change */ -#define UDCISR1_IRSOF (1 << 30) /* IntEn - Start of Frame */ -#define UDCISR1_IRRU (1 << 29) /* IntEn - Resume */ -#define UDCISR1_IRSU (1 << 28) /* IntEn - Suspend */ -#define UDCISR1_IRRS (1 << 27) /* IntEn - Reset */ - - -#define UDCFNR 0x40600014 /* UDC Frame Number Register */ -#define UDCOTGICR 0x40600018 /* UDC On-The-Go interrupt control */ -#define UDCOTGICR_IESF (1 << 24) /* OTG SET_FEATURE command recvd */ -#define UDCOTGICR_IEXR (1 << 17) /* Extra Transciever Interrupt Rising Edge Interrupt Enable */ -#define UDCOTGICR_IEXF (1 << 16) /* Extra Transciever Interrupt Falling Edge Interrupt Enable */ -#define UDCOTGICR_IEVV40R (1 << 9) /* OTG Vbus Valid 4.0V Rising Edge Interrupt Enable */ -#define UDCOTGICR_IEVV40F (1 << 8) /* OTG Vbus Valid 4.0V Falling Edge Interrupt Enable */ -#define UDCOTGICR_IEVV44R (1 << 7) /* OTG Vbus Valid 4.4V Rising Edge Interrupt Enable */ -#define UDCOTGICR_IEVV44F (1 << 6) /* OTG Vbus Valid 4.4V Falling Edge Interrupt Enable */ -#define UDCOTGICR_IESVR (1 << 5) /* OTG Session Valid Rising Edge Interrupt Enable */ -#define UDCOTGICR_IESVF (1 << 4) /* OTG Session Valid Falling Edge Interrupt Enable */ -#define UDCOTGICR_IESDR (1 << 3) /* OTG A-Device SRP Detect Rising Edge Interrupt Enable */ -#define UDCOTGICR_IESDF (1 << 2) /* OTG A-Device SRP Detect Falling Edge Interrupt Enable */ -#define UDCOTGICR_IEIDR (1 << 1) /* OTG ID Change Rising Edge Interrupt Enable */ -#define UDCOTGICR_IEIDF (1 << 0) /* OTG ID Change Falling Edge Interrupt Enable */ - -#define UDCCSN(x) (0x40600100 + ((x) << 2)) -#define UDCCSR0 0x40600100 /* UDC Control/Status register - Endpoint 0 */ - -#define UDCCSR0_SA (1 << 7) /* Setup Active */ -#define UDCCSR0_RNE (1 << 6) /* Receive FIFO Not Empty */ -#define UDCCSR0_FST (1 << 5) /* Force Stall */ -#define UDCCSR0_SST (1 << 4) /* Sent Stall */ -#define UDCCSR0_DME (1 << 3) /* DMA Enable */ -#define UDCCSR0_FTF (1 << 2) /* Flush Transmit FIFO */ -#define UDCCSR0_IPR (1 << 1) /* IN Packet Ready */ -#define UDCCSR0_OPC (1 << 0) /* OUT Packet Complete */ - -#define UDCCSRA 0x40600104 /* UDC Control/Status register - Endpoint A */ -#define UDCCSRB 0x40600108 /* UDC Control/Status register - Endpoint B */ -#define UDCCSRC 0x4060010C /* UDC Control/Status register - Endpoint C */ -#define UDCCSRD 0x40600110 /* UDC Control/Status register - Endpoint D */ -#define UDCCSRE 0x40600114 /* UDC Control/Status register - Endpoint E */ -#define UDCCSRF 0x40600118 /* UDC Control/Status register - Endpoint F */ -#define UDCCSRG 0x4060011C /* UDC Control/Status register - Endpoint G */ -#define UDCCSRH 0x40600120 /* UDC Control/Status register - Endpoint H */ -#define UDCCSRI 0x40600124 /* UDC Control/Status register - Endpoint I */ -#define UDCCSRJ 0x40600128 /* UDC Control/Status register - Endpoint J */ -#define UDCCSRK 0x4060012C /* UDC Control/Status register - Endpoint K */ -#define UDCCSRL 0x40600130 /* UDC Control/Status register - Endpoint L */ -#define UDCCSRM 0x40600134 /* UDC Control/Status register - Endpoint M */ -#define UDCCSRN 0x40600138 /* UDC Control/Status register - Endpoint N */ -#define UDCCSRP 0x4060013C /* UDC Control/Status register - Endpoint P */ -#define UDCCSRQ 0x40600140 /* UDC Control/Status register - Endpoint Q */ -#define UDCCSRR 0x40600144 /* UDC Control/Status register - Endpoint R */ -#define UDCCSRS 0x40600148 /* UDC Control/Status register - Endpoint S */ -#define UDCCSRT 0x4060014C /* UDC Control/Status register - Endpoint T */ -#define UDCCSRU 0x40600150 /* UDC Control/Status register - Endpoint U */ -#define UDCCSRV 0x40600154 /* UDC Control/Status register - Endpoint V */ -#define UDCCSRW 0x40600158 /* UDC Control/Status register - Endpoint W */ -#define UDCCSRX 0x4060015C /* UDC Control/Status register - Endpoint X */ - -#define UDCCSR_DPE (1 << 9) /* Data Packet Error */ -#define UDCCSR_FEF (1 << 8) /* Flush Endpoint FIFO */ -#define UDCCSR_SP (1 << 7) /* Short Packet Control/Status */ -#define UDCCSR_BNE (1 << 6) /* Buffer Not Empty (IN endpoints) */ -#define UDCCSR_BNF (1 << 6) /* Buffer Not Full (OUT endpoints) */ -#define UDCCSR_FST (1 << 5) /* Force STALL */ -#define UDCCSR_SST (1 << 4) /* Sent STALL */ -#define UDCCSR_DME (1 << 3) /* DMA Enable */ -#define UDCCSR_TRN (1 << 2) /* Tx/Rx NAK */ -#define UDCCSR_PC (1 << 1) /* Packet Complete */ -#define UDCCSR_FS (1 << 0) /* FIFO needs service */ - -#define UDCBCN(x) (0x40600200 + ((x) << 2)) -#define UDCBCR0 0x40600200 /* Byte Count Register - EP0 */ -#define UDCBCRA 0x40600204 /* Byte Count Register - EPA */ -#define UDCBCRB 0x40600208 /* Byte Count Register - EPB */ -#define UDCBCRC 0x4060020C /* Byte Count Register - EPC */ -#define UDCBCRD 0x40600210 /* Byte Count Register - EPD */ -#define UDCBCRE 0x40600214 /* Byte Count Register - EPE */ -#define UDCBCRF 0x40600218 /* Byte Count Register - EPF */ -#define UDCBCRG 0x4060021C /* Byte Count Register - EPG */ -#define UDCBCRH 0x40600220 /* Byte Count Register - EPH */ -#define UDCBCRI 0x40600224 /* Byte Count Register - EPI */ -#define UDCBCRJ 0x40600228 /* Byte Count Register - EPJ */ -#define UDCBCRK 0x4060022C /* Byte Count Register - EPK */ -#define UDCBCRL 0x40600230 /* Byte Count Register - EPL */ -#define UDCBCRM 0x40600234 /* Byte Count Register - EPM */ -#define UDCBCRN 0x40600238 /* Byte Count Register - EPN */ -#define UDCBCRP 0x4060023C /* Byte Count Register - EPP */ -#define UDCBCRQ 0x40600240 /* Byte Count Register - EPQ */ -#define UDCBCRR 0x40600244 /* Byte Count Register - EPR */ -#define UDCBCRS 0x40600248 /* Byte Count Register - EPS */ -#define UDCBCRT 0x4060024C /* Byte Count Register - EPT */ -#define UDCBCRU 0x40600250 /* Byte Count Register - EPU */ -#define UDCBCRV 0x40600254 /* Byte Count Register - EPV */ -#define UDCBCRW 0x40600258 /* Byte Count Register - EPW */ -#define UDCBCRX 0x4060025C /* Byte Count Register - EPX */ - -#define UDCDN(x) (0x40600300 + ((x) << 2)) -#define UDCDR0 0x40600300 /* Data Register - EP0 */ -#define UDCDRA 0x40600304 /* Data Register - EPA */ -#define UDCDRB 0x40600308 /* Data Register - EPB */ -#define UDCDRC 0x4060030C /* Data Register - EPC */ -#define UDCDRD 0x40600310 /* Data Register - EPD */ -#define UDCDRE 0x40600314 /* Data Register - EPE */ -#define UDCDRF 0x40600318 /* Data Register - EPF */ -#define UDCDRG 0x4060031C /* Data Register - EPG */ -#define UDCDRH 0x40600320 /* Data Register - EPH */ -#define UDCDRI 0x40600324 /* Data Register - EPI */ -#define UDCDRJ 0x40600328 /* Data Register - EPJ */ -#define UDCDRK 0x4060032C /* Data Register - EPK */ -#define UDCDRL 0x40600330 /* Data Register - EPL */ -#define UDCDRM 0x40600334 /* Data Register - EPM */ -#define UDCDRN 0x40600338 /* Data Register - EPN */ -#define UDCDRP 0x4060033C /* Data Register - EPP */ -#define UDCDRQ 0x40600340 /* Data Register - EPQ */ -#define UDCDRR 0x40600344 /* Data Register - EPR */ -#define UDCDRS 0x40600348 /* Data Register - EPS */ -#define UDCDRT 0x4060034C /* Data Register - EPT */ -#define UDCDRU 0x40600350 /* Data Register - EPU */ -#define UDCDRV 0x40600354 /* Data Register - EPV */ -#define UDCDRW 0x40600358 /* Data Register - EPW */ -#define UDCDRX 0x4060035C /* Data Register - EPX */ - -#define UDCCN(x) (0x40600400 + ((x) << 2)) -#define UDCCRA 0x40600404 /* Configuration register EPA */ -#define UDCCRB 0x40600408 /* Configuration register EPB */ -#define UDCCRC 0x4060040C /* Configuration register EPC */ -#define UDCCRD 0x40600410 /* Configuration register EPD */ -#define UDCCRE 0x40600414 /* Configuration register EPE */ -#define UDCCRF 0x40600418 /* Configuration register EPF */ -#define UDCCRG 0x4060041C /* Configuration register EPG */ -#define UDCCRH 0x40600420 /* Configuration register EPH */ -#define UDCCRI 0x40600424 /* Configuration register EPI */ -#define UDCCRJ 0x40600428 /* Configuration register EPJ */ -#define UDCCRK 0x4060042C /* Configuration register EPK */ -#define UDCCRL 0x40600430 /* Configuration register EPL */ -#define UDCCRM 0x40600434 /* Configuration register EPM */ -#define UDCCRN 0x40600438 /* Configuration register EPN */ -#define UDCCRP 0x4060043C /* Configuration register EPP */ -#define UDCCRQ 0x40600440 /* Configuration register EPQ */ -#define UDCCRR 0x40600444 /* Configuration register EPR */ -#define UDCCRS 0x40600448 /* Configuration register EPS */ -#define UDCCRT 0x4060044C /* Configuration register EPT */ -#define UDCCRU 0x40600450 /* Configuration register EPU */ -#define UDCCRV 0x40600454 /* Configuration register EPV */ -#define UDCCRW 0x40600458 /* Configuration register EPW */ -#define UDCCRX 0x4060045C /* Configuration register EPX */ - -#define UDCCONR_CN (0x03 << 25) /* Configuration Number */ -#define UDCCONR_CN_S (25) -#define UDCCONR_IN (0x07 << 22) /* Interface Number */ -#define UDCCONR_IN_S (22) -#define UDCCONR_AISN (0x07 << 19) /* Alternate Interface Number */ -#define UDCCONR_AISN_S (19) -#define UDCCONR_EN (0x0f << 15) /* Endpoint Number */ -#define UDCCONR_EN_S (15) -#define UDCCONR_ET (0x03 << 13) /* Endpoint Type: */ -#define UDCCONR_ET_S (13) -#define UDCCONR_ET_INT (0x03 << 13) /* Interrupt */ -#define UDCCONR_ET_BULK (0x02 << 13) /* Bulk */ -#define UDCCONR_ET_ISO (0x01 << 13) /* Isochronous */ -#define UDCCONR_ET_NU (0x00 << 13) /* Not used */ -#define UDCCONR_ED (1 << 12) /* Endpoint Direction */ -#define UDCCONR_MPS (0x3ff << 2) /* Maximum Packet Size */ -#define UDCCONR_MPS_S (2) -#define UDCCONR_DE (1 << 1) /* Double Buffering Enable */ -#define UDCCONR_EE (1 << 0) /* Endpoint Enable */ - - -#define UDC_INT_FIFOERROR (0x2) -#define UDC_INT_PACKETCMP (0x1) -#define UDC_FNR_MASK (0x7ff) -#define UDCCSR_WR_MASK (UDCCSR_DME|UDCCSR_FST) -#define UDC_BCR_MASK (0x3ff) - -#endif /* CONFIG_CPU_PXA27X */ - -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) - -/******************************************************************************/ -/* - * USB Host Controller - */ -#define OHCI_REGS_BASE 0x4C000000 /* required for ohci driver */ -#define UHCREV 0x4C000000 -#define UHCHCON 0x4C000004 -#define UHCCOMS 0x4C000008 -#define UHCINTS 0x4C00000C -#define UHCINTE 0x4C000010 -#define UHCINTD 0x4C000014 -#define UHCHCCA 0x4C000018 -#define UHCPCED 0x4C00001C -#define UHCCHED 0x4C000020 -#define UHCCCED 0x4C000024 -#define UHCBHED 0x4C000028 -#define UHCBCED 0x4C00002C -#define UHCDHEAD 0x4C000030 -#define UHCFMI 0x4C000034 -#define UHCFMR 0x4C000038 -#define UHCFMN 0x4C00003C -#define UHCPERS 0x4C000040 -#define UHCLST 0x4C000044 -#define UHCRHDA 0x4C000048 -#define UHCRHDB 0x4C00004C -#define UHCRHS 0x4C000050 -#define UHCRHPS1 0x4C000054 -#define UHCRHPS2 0x4C000058 -#define UHCRHPS3 0x4C00005C -#define UHCSTAT 0x4C000060 -#define UHCHR 0x4C000064 -#define UHCHIE 0x4C000068 -#define UHCHIT 0x4C00006C - -#define UHCCOMS_HCR (1<<0) - -#define UHCHR_FSBIR (1<<0) -#define UHCHR_FHR (1<<1) -#define UHCHR_CGR (1<<2) -#define UHCHR_SSDC (1<<3) -#define UHCHR_UIT (1<<4) -#define UHCHR_SSE (1<<5) -#define UHCHR_PSPL (1<<6) -#define UHCHR_PCPL (1<<7) -#define UHCHR_SSEP0 (1<<9) -#define UHCHR_SSEP1 (1<<10) -#define UHCHR_SSEP2 (1<<11) - -#define UHCHIE_UPRIE (1<<13) -#define UHCHIE_UPS2IE (1<<12) -#define UHCHIE_UPS1IE (1<<11) -#define UHCHIE_TAIE (1<<10) -#define UHCHIE_HBAIE (1<<8) -#define UHCHIE_RWIE (1<<7) - -#define UP2OCR 0x40600020 - -#define UP2OCR_HXOE (1<<17) -#define UP2OCR_HXS (1<<16) -#define UP2OCR_IDON (1<<10) -#define UP2OCR_EXSUS (1<<9) -#define UP2OCR_EXSP (1<<8) -#define UP2OCR_DMSTATE (1<<7) -#define UP2OCR_VPM (1<<6) -#define UP2OCR_DPSTATE (1<<5) -#define UP2OCR_DPPUE (1<<4) -#define UP2OCR_DMPDE (1<<3) -#define UP2OCR_DPPDE (1<<2) -#define UP2OCR_CPVPE (1<<1) -#define UP2OCR_CPVEN (1<<0) - -#endif /* CONFIG_CPU_PXA27X || CONFIG_CPU_MONAHANS */ - -/******************************************************************************/ -/* - * Fast Infrared Communication Port - */ -#define ICCR0 0x40800000 /* ICP Control Register 0 */ -#define ICCR1 0x40800004 /* ICP Control Register 1 */ -#define ICCR2 0x40800008 /* ICP Control Register 2 */ -#define ICDR 0x4080000c /* ICP Data Register */ -#define ICSR0 0x40800014 /* ICP Status Register 0 */ -#define ICSR1 0x40800018 /* ICP Status Register 1 */ - -/* - * Real Time Clock - */ -#define RCNR 0x40900000 /* RTC Count Register */ -#define RTAR 0x40900004 /* RTC Alarm Register */ -#define RTSR 0x40900008 /* RTC Status Register */ -#define RTTR 0x4090000C /* RTC Timer Trim Register */ -#define RDAR1 0x40900018 /* Wristwatch Day Alarm Reg 1 */ -#define RDAR2 0x40900020 /* Wristwatch Day Alarm Reg 2 */ -#define RYAR1 0x4090001C /* Wristwatch Year Alarm Reg 1 */ -#define RYAR2 0x40900024 /* Wristwatch Year Alarm Reg 2 */ -#define SWAR1 0x4090002C /* Stopwatch Alarm Register 1 */ -#define SWAR2 0x40900030 /* Stopwatch Alarm Register 2 */ -#define PIAR 0x40900038 /* Periodic Interrupt Alarm Register */ -#define RDCR 0x40900010 /* RTC Day Count Register. */ -#define RYCR 0x40900014 /* RTC Year Count Register. */ -#define SWCR 0x40900028 /* Stopwatch Count Register */ -#define RTCPICR 0x40900034 /* Periodic Interrupt Counter Register */ - -#define RTSR_PICE (1 << 15) /* Peridoc interrupt count enable */ -#define RTSR_PIALE (1 << 14) /* Peridoc interrupt Alarm enable */ -#define RTSR_PIAL (1 << 13) /* Peridoc interrupt Alarm status */ -#define RTSR_HZE (1 << 3) /* HZ interrupt enable */ -#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ -#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ -#define RTSR_AL (1 << 0) /* RTC alarm detected */ - -/******************************************************************************/ -/* - * OS Timer & Match Registers - */ -#define OSMR0 0x40A00000 /* OS Timer Match Register 0 */ -#define OSMR1 0x40A00004 /* OS Timer Match Register 1 */ -#define OSMR2 0x40A00008 /* OS Timer Match Register 2 */ -#define OSMR3 0x40A0000C /* OS Timer Match Register 3 */ -#define OSCR 0x40A00010 /* OS Timer Counter Register */ -#define OSSR 0x40A00014 /* OS Timer Status Register */ -#define OWER 0x40A00018 /* OS Timer Watchdog Enable Register */ -#define OIER 0x40A0001C /* OS Timer Interrupt Enable Register */ - -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define OSCR4 0x40A00040 /* OS Timer Counter Register 4 */ -#define OSCR5 0x40A00044 /* OS Timer Counter Register 5 */ -#define OSCR6 0x40A00048 /* OS Timer Counter Register 6 */ -#define OSCR7 0x40A0004C /* OS Timer Counter Register 7 */ -#define OSCR8 0x40A00050 /* OS Timer Counter Register 8 */ -#define OSCR9 0x40A00054 /* OS Timer Counter Register 9 */ -#define OSCR10 0x40A00058 /* OS Timer Counter Register 10 */ -#define OSCR11 0x40A0005C /* OS Timer Counter Register 11 */ - -#define OSMR4 0x40A00080 /* OS Timer Match Register 4 */ -#define OSMR5 0x40A00084 /* OS Timer Match Register 5 */ -#define OSMR6 0x40A00088 /* OS Timer Match Register 6 */ -#define OSMR7 0x40A0008C /* OS Timer Match Register 7 */ -#define OSMR8 0x40A00090 /* OS Timer Match Register 8 */ -#define OSMR9 0x40A00094 /* OS Timer Match Register 9 */ -#define OSMR10 0x40A00098 /* OS Timer Match Register 10 */ -#define OSMR11 0x40A0009C /* OS Timer Match Register 11 */ - -#define OMCR4 0x40A000C0 /* OS Match Control Register 4 */ -#define OMCR5 0x40A000C4 /* OS Match Control Register 5 */ -#define OMCR6 0x40A000C8 /* OS Match Control Register 6 */ -#define OMCR7 0x40A000CC /* OS Match Control Register 7 */ -#define OMCR8 0x40A000D0 /* OS Match Control Register 8 */ -#define OMCR9 0x40A000D4 /* OS Match Control Register 9 */ -#define OMCR10 0x40A000D8 /* OS Match Control Register 10 */ -#define OMCR11 0x40A000DC /* OS Match Control Register 11 */ - -#endif /* CONFIG_CPU_PXA27X || CONFIG_CPU_MONAHANS */ - -#define OSSR_M4 (1 << 4) /* Match status channel 4 */ -#define OSSR_M3 (1 << 3) /* Match status channel 3 */ -#define OSSR_M2 (1 << 2) /* Match status channel 2 */ -#define OSSR_M1 (1 << 1) /* Match status channel 1 */ -#define OSSR_M0 (1 << 0) /* Match status channel 0 */ - -#define OWER_WME (1 << 0) /* Watchdog Match Enable */ - -#define OIER_E4 (1 << 4) /* Interrupt enable channel 4 */ -#define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */ -#define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */ -#define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */ -#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */ - -#define OSCR_CLK_FREQ 3250 - -/******************************************************************************/ -/* - * Core Clock - */ - -#if defined(CONFIG_CPU_MONAHANS) -#define ACCR 0x41340000 /* Application Subsystem Clock Configuration Register */ -#define ACSR 0x41340004 /* Application Subsystem Clock Status Register */ -#define AICSR 0x41340008 /* Application Subsystem Interrupt Control/Status Register */ -#define CKENA 0x4134000C /* A Clock Enable Register */ -#define CKENB 0x41340010 /* B Clock Enable Register */ -#define AC97_DIV 0x41340014 /* AC97 clock divisor value register */ - -#define ACCR_SMC_MASK 0x03800000 /* Static Memory Controller Frequency Select */ -#define ACCR_SRAM_MASK 0x000c0000 /* SRAM Controller Frequency Select */ -#define ACCR_FC_MASK 0x00030000 /* Frequency Change Frequency Select */ -#define ACCR_HSIO_MASK 0x0000c000 /* High Speed IO Frequency Select */ -#define ACCR_DDR_MASK 0x00003000 /* DDR Memory Controller Frequency Select */ -#define ACCR_XN_MASK 0x00000700 /* Run Mode Frequency to Turbo Mode Frequency Multiplier */ -#define ACCR_XL_MASK 0x0000001f /* Crystal Frequency to Memory Frequency Multiplier */ -#define ACCR_XPDIS (1 << 31) -#define ACCR_SPDIS (1 << 30) -#define ACCR_13MEND1 (1 << 27) -#define ACCR_D0CS (1 << 26) -#define ACCR_13MEND2 (1 << 21) -#define ACCR_PCCE (1 << 11) - -#define CKENA_30_MSL0 (1 << 30) /* MSL0 Interface Unit Clock Enable */ -#define CKENA_29_SSP4 (1 << 29) /* SSP3 Unit Clock Enable */ -#define CKENA_28_SSP3 (1 << 28) /* SSP2 Unit Clock Enable */ -#define CKENA_27_SSP2 (1 << 27) /* SSP1 Unit Clock Enable */ -#define CKENA_26_SSP1 (1 << 26) /* SSP0 Unit Clock Enable */ -#define CKENA_25_TSI (1 << 25) /* TSI Clock Enable */ -#define CKENA_24_AC97 (1 << 24) /* AC97 Unit Clock Enable */ -#define CKENA_23_STUART (1 << 23) /* STUART Unit Clock Enable */ -#define CKENA_22_FFUART (1 << 22) /* FFUART Unit Clock Enable */ -#define CKENA_21_BTUART (1 << 21) /* BTUART Unit Clock Enable */ -#define CKENA_20_UDC (1 << 20) /* UDC Clock Enable */ -#define CKENA_19_TPM (1 << 19) /* TPM Unit Clock Enable */ -#define CKENA_18_USIM1 (1 << 18) /* USIM1 Unit Clock Enable */ -#define CKENA_17_USIM0 (1 << 17) /* USIM0 Unit Clock Enable */ -#define CKENA_15_CIR (1 << 15) /* Consumer IR Clock Enable */ -#define CKENA_14_KEY (1 << 14) /* Keypad Controller Clock Enable */ -#define CKENA_13_MMC1 (1 << 13) /* MMC1 Clock Enable */ -#define CKENA_12_MMC0 (1 << 12) /* MMC0 Clock Enable */ -#define CKENA_11_FLASH (1 << 11) /* Boot ROM Clock Enable */ -#define CKENA_10_SRAM (1 << 10) /* SRAM Controller Clock Enable */ -#define CKENA_9_SMC (1 << 9) /* Static Memory Controller */ -#define CKENA_8_DMC (1 << 8) /* Dynamic Memory Controller */ -#define CKENA_7_GRAPHICS (1 << 7) /* 2D Graphics Clock Enable */ -#define CKENA_6_USBCLI (1 << 6) /* USB Client Unit Clock Enable */ -#define CKENA_4_NAND (1 << 4) /* NAND Flash Controller Clock Enable */ -#define CKENA_3_CAMERA (1 << 3) /* Camera Interface Clock Enable */ -#define CKENA_2_USBHOST (1 << 2) /* USB Host Unit Clock Enable */ -#define CKENA_1_LCD (1 << 1) /* LCD Unit Clock Enable */ - -#define CKENB_9_SYSBUS2 (1 << 9) /* System bus 2 */ -#define CKENB_8_1WIRE (1 << 8) /* One Wire Interface Unit Clock Enable */ -#define CKENB_7_GPIO (1 << 7) /* GPIO Clock Enable */ -#define CKENB_6_IRQ (1 << 6) /* Interrupt Controller Clock Enable */ -#define CKENB_4_I2C (1 << 4) /* I2C Unit Clock Enable */ -#define CKENB_1_PWM1 (1 << 1) /* PWM2 & PWM3 Clock Enable */ -#define CKENB_0_PWM0 (1 << 0) /* PWM0 & PWM1 Clock Enable */ - -#else /* if defined CONFIG_CPU_MONAHANS */ - -#define CCCR 0x41300000 /* Core Clock Configuration Register */ -#define CKEN 0x41300004 /* Clock Enable Register */ -#define OSCC 0x41300008 /* Oscillator Configuration Register */ -#define CCSR 0x4130000C /* Core Clock Status Register */ - -#define CKEN23_SSP1 (1 << 23) /* SSP1 Unit Clock Enable */ -#define CKEN22_MEMC (1 << 22) /* Memory Controler */ -#define CKEN21_MSHC (1 << 21) /* Memery Stick Host Controller */ -#define CKEN20_IM (1 << 20) /* Internal Memory Clock Enable */ -#define CKEN19_KEYPAD (1 << 19) /* Keypad Interface Clock Enable */ -#define CKEN18_USIM (1 << 18) /* USIM Unit Clock Enable */ -#define CKEN17_MSL (1 << 17) /* MSL Interface Unit Clock Enable */ -#define CKEN15_PWR_I2C (1 << 15) /* PWR_I2C Unit Clock Enable */ -#define CKEN9_OST (1 << 9) /* OS Timer Unit Clock Enable */ -#define CKEN4_SSP3 (1 << 4) /* SSP3 Unit Clock Enable */ - -#define CCCR_N_MASK 0x0380 /* Run Mode Frequency to Turbo Mode Frequency Multiplier */ -#if !defined(CONFIG_CPU_PXA27X) -#define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */ -#endif -#define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */ - -#define CKEN24_CAMERA (1 << 24) /* Camera Interface Clock Enable */ -#define CKEN23_SSP1 (1 << 23) /* SSP1 Unit Clock Enable */ -#define CKEN22_MEMC (1 << 22) /* Memory Controller Clock Enable */ -#define CKEN21_MEMSTK (1 << 21) /* Memory Stick Host Controller */ -#define CKEN20_IM (1 << 20) /* Internal Memory Clock Enable */ -#define CKEN19_KEYPAD (1 << 19) /* Keypad Interface Clock Enable */ -#define CKEN18_USIM (1 << 18) /* USIM Unit Clock Enable */ -#define CKEN17_MSL (1 << 17) /* MSL Unit Clock Enable */ -#define CKEN16_LCD (1 << 16) /* LCD Unit Clock Enable */ -#define CKEN15_PWRI2C (1 << 15) /* PWR I2C Unit Clock Enable */ -#define CKEN14_I2C (1 << 14) /* I2C Unit Clock Enable */ -#define CKEN13_FICP (1 << 13) /* FICP Unit Clock Enable */ -#define CKEN12_MMC (1 << 12) /* MMC Unit Clock Enable */ -#define CKEN11_USB (1 << 11) /* USB Unit Clock Enable */ -#if defined(CONFIG_CPU_PXA27X) -#define CKEN10_USBHOST (1 << 10) /* USB Host Unit Clock Enable */ -#define CKEN24_CAMERA (1 << 24) /* Camera Unit Clock Enable */ -#endif -#define CKEN8_I2S (1 << 8) /* I2S Unit Clock Enable */ -#define CKEN7_BTUART (1 << 7) /* BTUART Unit Clock Enable */ -#define CKEN6_FFUART (1 << 6) /* FFUART Unit Clock Enable */ -#define CKEN5_STUART (1 << 5) /* STUART Unit Clock Enable */ -#define CKEN3_SSP (1 << 3) /* SSP Unit Clock Enable */ -#define CKEN2_AC97 (1 << 2) /* AC97 Unit Clock Enable */ -#define CKEN1_PWM1 (1 << 1) /* PWM1 Clock Enable */ -#define CKEN0_PWM0 (1 << 0) /* PWM0 Clock Enable */ - -#define OSCC_OON (1 << 1) /* 32.768kHz OON (write-once only bit) */ -#define OSCC_OOK (1 << 0) /* 32.768kHz OOK (read-only bit) */ - -#if !defined(CONFIG_CPU_PXA27X) -#define CCCR_L09 (0x1F) -#define CCCR_L27 (0x1) -#define CCCR_L32 (0x2) -#define CCCR_L36 (0x3) -#define CCCR_L40 (0x4) -#define CCCR_L45 (0x5) - -#define CCCR_M1 (0x1 << 5) -#define CCCR_M2 (0x2 << 5) -#define CCCR_M4 (0x3 << 5) - -#define CCCR_N10 (0x2 << 7) -#define CCCR_N15 (0x3 << 7) -#define CCCR_N20 (0x4 << 7) -#define CCCR_N25 (0x5 << 7) -#define CCCR_N30 (0x6 << 7) -#endif - -#endif /* CONFIG_CPU_MONAHANS */ - -/******************************************************************************/ -/* - * Pulse Width Modulator - */ -#define PWM_CTRL0 0x40B00000 /* PWM 0 Control Register */ -#define PWM_PWDUTY0 0x40B00004 /* PWM 0 Duty Cycle Register */ -#define PWM_PERVAL0 0x40B00008 /* PWM 0 Period Control Register */ - -#define PWM_CTRL1 0x40C00000 /* PWM 1 Control Register */ -#define PWM_PWDUTY1 0x40C00004 /* PWM 1 Duty Cycle Register */ -#define PWM_PERVAL1 0x40C00008 /* PWM 1 Period Control Register */ - -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define PWM_CTRL2 0x40B00010 /* PWM 2 Control Register */ -#define PWM_PWDUTY2 0x40B00014 /* PWM 2 Duty Cycle Register */ -#define PWM_PERVAL2 0x40B00018 /* PWM 2 Period Control Register */ - -#define PWM_CTRL3 0x40C00010 /* PWM 3 Control Register */ -#define PWM_PWDUTY3 0x40C00014 /* PWM 3 Duty Cycle Register */ -#define PWM_PERVAL3 0x40C00018 /* PWM 3 Period Control Register */ -#endif /* CONFIG_CPU_PXA27X || CONFIG_CPU_MONAHANS */ - -/* - * Interrupt Controller - */ -#define ICIP 0x40D00000 /* Interrupt Controller IRQ Pending Register */ -#define ICMR 0x40D00004 /* Interrupt Controller Mask Register */ -#define ICLR 0x40D00008 /* Interrupt Controller Level Register */ -#define ICFP 0x40D0000C /* Interrupt Controller FIQ Pending Register */ -#define ICPR 0x40D00010 /* Interrupt Controller Pending Register */ -#define ICCR 0x40D00014 /* Interrupt Controller Control Register */ - -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define ICHP 0x40D00018 /* Interrupt Controller Highest Priority Register */ -#define ICIP2 0x40D0009C /* Interrupt Controller IRQ Pending Register 2 */ -#define ICMR2 0x40D000A0 /* Interrupt Controller Mask Register 2 */ -#define ICLR2 0x40D000A4 /* Interrupt Controller Level Register 2 */ -#define ICFP2 0x40D000A8 /* Interrupt Controller FIQ Pending Register 2 */ -#define ICPR2 0x40D000AC /* Interrupt Controller Pending Register 2 */ -#endif /* CONFIG_CPU_PXA27X || CONFIG_CPU_MONAHANS */ - -/******************************************************************************/ -/* - * General Purpose I/O - */ -#define GPLR0 0x40E00000 /* GPIO Pin-Level Register GPIO<31:0> */ -#define GPLR1 0x40E00004 /* GPIO Pin-Level Register GPIO<63:32> */ -#define GPLR2 0x40E00008 /* GPIO Pin-Level Register GPIO<80:64> */ - -#define GPDR0 0x40E0000C /* GPIO Pin Direction Register GPIO<31:0> */ -#define GPDR1 0x40E00010 /* GPIO Pin Direction Register GPIO<63:32> */ -#define GPDR2 0x40E00014 /* GPIO Pin Direction Register GPIO<80:64> */ - -#define GPSR0 0x40E00018 /* GPIO Pin Output Set Register GPIO<31:0> */ -#define GPSR1 0x40E0001C /* GPIO Pin Output Set Register GPIO<63:32> */ -#define GPSR2 0x40E00020 /* GPIO Pin Output Set Register GPIO<80:64> */ - -#define GPCR0 0x40E00024 /* GPIO Pin Output Clear Register GPIO<31:0> */ -#define GPCR1 0x40E00028 /* GPIO Pin Output Clear Register GPIO <63:32> */ -#define GPCR2 0x40E0002C /* GPIO Pin Output Clear Register GPIO <80:64> */ - -#define GRER0 0x40E00030 /* GPIO Rising-Edge Detect Register GPIO<31:0> */ -#define GRER1 0x40E00034 /* GPIO Rising-Edge Detect Register GPIO<63:32> */ -#define GRER2 0x40E00038 /* GPIO Rising-Edge Detect Register GPIO<80:64> */ - -#define GFER0 0x40E0003C /* GPIO Falling-Edge Detect Register GPIO<31:0> */ -#define GFER1 0x40E00040 /* GPIO Falling-Edge Detect Register GPIO<63:32> */ -#define GFER2 0x40E00044 /* GPIO Falling-Edge Detect Register GPIO<80:64> */ - -#define GEDR0 0x40E00048 /* GPIO Edge Detect Status Register GPIO<31:0> */ -#define GEDR1 0x40E0004C /* GPIO Edge Detect Status Register GPIO<63:32> */ -#define GEDR2 0x40E00050 /* GPIO Edge Detect Status Register GPIO<80:64> */ - -#define GAFR0_L 0x40E00054 /* GPIO Alternate Function Select Register GPIO<15:0> */ -#define GAFR0_U 0x40E00058 /* GPIO Alternate Function Select Register GPIO<31:16> */ -#define GAFR1_L 0x40E0005C /* GPIO Alternate Function Select Register GPIO<47:32> */ -#define GAFR1_U 0x40E00060 /* GPIO Alternate Function Select Register GPIO<63:48> */ -#define GAFR2_L 0x40E00064 /* GPIO Alternate Function Select Register GPIO<79:64> */ -#define GAFR2_U 0x40E00068 /* GPIO Alternate Function Select Register GPIO 80 */ - -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define GPLR3 0x40E00100 /* GPIO Pin-Level Register GPIO<127:96> */ -#define GPDR3 0x40E0010C /* GPIO Pin Direction Register GPIO<127:96> */ -#define GPSR3 0x40E00118 /* GPIO Pin Output Set Register GPIO<127:96> */ -#define GPCR3 0x40E00124 /* GPIO Pin Output Clear Register GPIO<127:96> */ -#define GRER3 0x40E00130 /* GPIO Rising-Edge Detect Register GPIO<127:96> */ -#define GFER3 0x40E0013C /* GPIO Falling-Edge Detect Register GPIO<127:96> */ -#define GEDR3 0x40E00148 /* GPIO Edge Detect Status Register GPIO<127:96> */ -#define GAFR3_L 0x40E0006C /* GPIO Alternate Function Select Register GPIO<111:96> */ -#define GAFR3_U 0x40E00070 /* GPIO Alternate Function Select Register GPIO<127:112> */ -#endif /* CONFIG_CPU_PXA27X || CONFIG_CPU_MONAHANS */ - -#ifdef CONFIG_CPU_MONAHANS -#define GSDR0 0x40E00400 /* Bit-wise Set of GPDR[31:0] */ -#define GSDR1 0x40E00404 /* Bit-wise Set of GPDR[63:32] */ -#define GSDR2 0x40E00408 /* Bit-wise Set of GPDR[95:64] */ -#define GSDR3 0x40E0040C /* Bit-wise Set of GPDR[127:96] */ - -#define GCDR0 0x40E00420 /* Bit-wise Clear of GPDR[31:0] */ -#define GCDR1 0x40E00424 /* Bit-wise Clear of GPDR[63:32] */ -#define GCDR2 0x40E00428 /* Bit-wise Clear of GPDR[95:64] */ -#define GCDR3 0x40E0042C /* Bit-wise Clear of GPDR[127:96] */ - -#define GSRER0 0x40E00440 /* Set Rising Edge Det. Enable [31:0] */ -#define GSRER1 0x40E00444 /* Set Rising Edge Det. Enable [63:32] */ -#define GSRER2 0x40E00448 /* Set Rising Edge Det. Enable [95:64] */ -#define GSRER3 0x40E0044C /* Set Rising Edge Det. Enable [127:96] */ - -#define GCRER0 0x40E00460 /* Clear Rising Edge Det. Enable [31:0] */ -#define GCRER1 0x40E00464 /* Clear Rising Edge Det. Enable [63:32] */ -#define GCRER2 0x40E00468 /* Clear Rising Edge Det. Enable [95:64] */ -#define GCRER3 0x40E0046C /* Clear Rising Edge Det. Enable[127:96] */ - -#define GSFER0 0x40E00480 /* Set Falling Edge Det. Enable [31:0] */ -#define GSFER1 0x40E00484 /* Set Falling Edge Det. Enable [63:32] */ -#define GSFER2 0x40E00488 /* Set Falling Edge Det. Enable [95:64] */ -#define GSFER3 0x40E0048C /* Set Falling Edge Det. Enable[127:96] */ - -#define GCFER0 0x40E004A0 /* Clr Falling Edge Det. Enable [31:0] */ -#define GCFER1 0x40E004A4 /* Clr Falling Edge Det. Enable [63:32] */ -#define GCFER2 0x40E004A8 /* Clr Falling Edge Det. Enable [95:64] */ -#define GCFER3 0x40E004AC /* Clr Falling Edge Det. Enable[127:96] */ - -#define GSDR(x) (0x40E00400 | ((x) & 0x60) >> 3) -#define GCDR(x) (0x40E00420 | ((x) & 0x60) >> 3) -#endif - -#define _GPLR(x) (0x40E00000 + (((x) & 0x60) >> 3)) -#define _GPDR(x) (0x40E0000C + (((x) & 0x60) >> 3)) -#define _GPSR(x) (0x40E00018 + (((x) & 0x60) >> 3)) -#define _GPCR(x) (0x40E00024 + (((x) & 0x60) >> 3)) -#define _GRER(x) (0x40E00030 + (((x) & 0x60) >> 3)) -#define _GFER(x) (0x40E0003C + (((x) & 0x60) >> 3)) -#define _GEDR(x) (0x40E00048 + (((x) & 0x60) >> 3)) -#define _GAFR(x) (0x40E00054 + (((x) & 0x70) >> 2)) - -#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS) -#define GPLR(x) (((((x) & 0x7f) < 96) ? _GPLR(x) : GPLR3)) -#define GPDR(x) (((((x) & 0x7f) < 96) ? _GPDR(x) : GPDR3)) -#define GPSR(x) (((((x) & 0x7f) < 96) ? _GPSR(x) : GPSR3)) -#define GPCR(x) (((((x) & 0x7f) < 96) ? _GPCR(x) : GPCR3)) -#define GRER(x) (((((x) & 0x7f) < 96) ? _GRER(x) : GRER3)) -#define GFER(x) (((((x) & 0x7f) < 96) ? _GFER(x) : GFER3)) -#define GEDR(x) (((((x) & 0x7f) < 96) ? _GEDR(x) : GEDR3)) -#define GAFR(x) (((((x) & 0x7f) < 96) ? _GAFR(x) : \ - ((((x) & 0x7f) < 112) ? GAFR3_L : GAFR3_U))) -#else -#define GPLR(x) _GPLR(x) -#define GPDR(x) _GPDR(x) -#define GPSR(x) _GPSR(x) -#define GPCR(x) _GPCR(x) -#define GRER(x) _GRER(x) -#define GFER(x) _GFER(x) -#define GEDR(x) _GEDR(x) -#define GAFR(x) _GAFR(x) -#endif - -#define GPIO_bit(x) (1 << ((x) & 0x1f)) - -/******************************************************************************/ -/* - * Multi-function Pin Registers: - */ -/* PXA320 */ -#if defined(CONFIG_CPU_PXA320) -#define DF_IO0 0x40e1024c -#define DF_IO1 0x40e10254 -#define DF_IO2 0x40e1025c -#define DF_IO3 0x40e10264 -#define DF_IO4 0x40e1026c -#define DF_IO5 0x40e10274 -#define DF_IO6 0x40e1027c -#define DF_IO7 0x40e10284 -#define DF_IO8 0x40e10250 -#define DF_IO9 0x40e10258 -#define DF_IO10 0x40e10260 -#define DF_IO11 0x40e10268 -#define DF_IO12 0x40e10270 -#define DF_IO13 0x40e10278 -#define DF_IO14 0x40e10280 -#define DF_IO15 0x40e10288 -#define DF_CLE_nOE 0x40e10204 -#define DF_ALE_nWE1 0x40e10208 -#define DF_ALE_nWE2 0x40e1021c -#define DF_SCLK_E 0x40e10210 -#define DF_nCS0 0x40e10224 -#define DF_nCS1 0x40e10228 -#define nBE0 0x40e10214 -#define nBE1 0x40e10218 -#define nLUA 0x40e10234 -#define nLLA 0x40e10238 -#define DF_ADDR0 0x40e1023c -#define DF_ADDR1 0x40e10240 -#define DF_ADDR2 0x40e10244 -#define DF_ADDR3 0x40e10248 -#define DF_INT_RnB 0x40e10220 -#define DF_nCS0 0x40e10224 -#define DF_nCS1 0x40e10228 -#define DF_nWE 0x40e1022c -#define DF_nRE 0x40e10230 - -#define nXCVREN 0x40e10138 - -#define GPIO0 0x40e10124 -#define GPIO1 0x40e10128 -#define GPIO2 0x40e1012c -#define GPIO3 0x40e10130 -#define GPIO4 0x40e10134 -#define GPIO5 0x40e1028c -#define GPIO6 0x40e10290 -#define GPIO7 0x40e10294 -#define GPIO8 0x40e10298 -#define GPIO9 0x40e1029c -#define GPIO10 0x40e10458 -#define GPIO11 0x40e102a0 -#define GPIO12 0x40e102a4 -#define GPIO13 0x40e102a8 -#define GPIO14 0x40e102ac -#define GPIO15 0x40e102b0 -#define GPIO16 0x40e102b4 -#define GPIO17 0x40e102b8 -#define GPIO18 0x40e102bc -#define GPIO19 0x40e102c0 -#define GPIO20 0x40e102c4 -#define GPIO21 0x40e102c8 -#define GPIO22 0x40e102cc -#define GPIO23 0x40e102d0 -#define GPIO24 0x40e102d4 -#define GPIO25 0x40e102d8 -#define GPIO26 0x40e102dc - -#define GPIO27 0x40e10400 -#define GPIO28 0x40e10404 -#define GPIO29 0x40e10408 -#define GPIO30 0x40e1040c -#define GPIO31 0x40e10410 -#define GPIO32 0x40e10414 -#define GPIO33 0x40e10418 -#define GPIO34 0x40e1041c -#define GPIO35 0x40e10420 -#define GPIO36 0x40e10424 -#define GPIO37 0x40e10428 -#define GPIO38 0x40e1042c -#define GPIO39 0x40e10430 -#define GPIO40 0x40e10434 -#define GPIO41 0x40e10438 -#define GPIO42 0x40e1043c -#define GPIO43 0x40e10440 -#define GPIO44 0x40e10444 -#define GPIO45 0x40e10448 -#define GPIO46 0x40e1044c -#define GPIO47 0x40e10450 -#define GPIO48 0x40e10454 -#define GPIO49 0x40e1045c -#define GPIO50 0x40e10460 -#define GPIO51 0x40e10464 -#define GPIO52 0x40e10468 -#define GPIO53 0x40e1046c -#define GPIO54 0x40e10470 -#define GPIO55 0x40e10474 -#define GPIO56 0x40e10478 -#define GPIO57 0x40e1047c -#define GPIO58 0x40e10480 -#define GPIO59 0x40e10484 -#define GPIO60 0x40e10488 -#define GPIO61 0x40e1048c -#define GPIO62 0x40e10490 - -#define GPIO6_2 0x40e10494 -#define GPIO7_2 0x40e10498 -#define GPIO8_2 0x40e1049c -#define GPIO9_2 0x40e104a0 -#define GPIO10_2 0x40e104a4 -#define GPIO11_2 0x40e104a8 -#define GPIO12_2 0x40e104ac -#define GPIO13_2 0x40e104b0 - -#define GPIO63 0x40e104b4 -#define GPIO64 0x40e104b8 -#define GPIO65 0x40e104bc -#define GPIO66 0x40e104c0 -#define GPIO67 0x40e104c4 -#define GPIO68 0x40e104c8 -#define GPIO69 0x40e104cc -#define GPIO70 0x40e104d0 -#define GPIO71 0x40e104d4 -#define GPIO72 0x40e104d8 -#define GPIO73 0x40e104dc - -#define GPIO14_2 0x40e104e0 -#define GPIO15_2 0x40e104e4 -#define GPIO16_2 0x40e104e8 -#define GPIO17_2 0x40e104ec - -#define GPIO74 0x40e104f0 -#define GPIO75 0x40e104f4 -#define GPIO76 0x40e104f8 -#define GPIO77 0x40e104fc -#define GPIO78 0x40e10500 -#define GPIO79 0x40e10504 -#define GPIO80 0x40e10508 -#define GPIO81 0x40e1050c -#define GPIO82 0x40e10510 -#define GPIO83 0x40e10514 -#define GPIO84 0x40e10518 -#define GPIO85 0x40e1051c -#define GPIO86 0x40e10520 -#define GPIO87 0x40e10524 -#define GPIO88 0x40e10528 -#define GPIO89 0x40e1052c -#define GPIO90 0x40e10530 -#define GPIO91 0x40e10534 -#define GPIO92 0x40e10538 -#define GPIO93 0x40e1053c -#define GPIO94 0x40e10540 -#define GPIO95 0x40e10544 -#define GPIO96 0x40e10548 -#define GPIO97 0x40e1054c -#define GPIO98 0x40e10550 - -#define GPIO99 0x40e10600 -#define GPIO100 0x40e10604 -#define GPIO101 0x40e10608 -#define GPIO102 0x40e1060c -#define GPIO103 0x40e10610 -#define GPIO104 0x40e10614 -#define GPIO105 0x40e10618 -#define GPIO106 0x40e1061c -#define GPIO107 0x40e10620 -#define GPIO108 0x40e10624 -#define GPIO109 0x40e10628 -#define GPIO110 0x40e1062c -#define GPIO111 0x40e10630 -#define GPIO112 0x40e10634 - -#define GPIO113 0x40e10638 -#define GPIO114 0x40e1063c -#define GPIO115 0x40e10640 -#define GPIO116 0x40e10644 -#define GPIO117 0x40e10648 -#define GPIO118 0x40e1064c -#define GPIO119 0x40e10650 -#define GPIO120 0x40e10654 -#define GPIO121 0x40e10658 -#define GPIO122 0x40e1065c -#define GPIO123 0x40e10660 -#define GPIO124 0x40e10664 -#define GPIO125 0x40e10668 -#define GPIO126 0x40e1066c -#define GPIO127 0x40e10670 - -#define GPIO0_2 0x40e10674 -#define GPIO1_2 0x40e10678 -#define GPIO2_2 0x40e1067c -#define GPIO3_2 0x40e10680 -#define GPIO4_2 0x40e10684 -#define GPIO5_2 0x40e10688 - -/* PXA300 and PXA310 */ -#elif defined(CONFIG_CPU_PXA300) || defined(CONFIG_CPU_PXA310) -#define DF_IO0 0x40e10220 -#define DF_IO1 0x40e10228 -#define DF_IO2 0x40e10230 -#define DF_IO3 0x40e10238 -#define DF_IO4 0x40e10258 -#define DF_IO5 0x40e10260 -#define DF_IO7 0x40e10270 -#define DF_IO6 0x40e10268 -#define DF_IO8 0x40e10224 -#define DF_IO9 0x40e1022c -#define DF_IO10 0x40e10234 -#define DF_IO11 0x40e1023c -#define DF_IO12 0x40e1025c -#define DF_IO13 0x40e10264 -#define DF_IO14 0x40e1026c -#define DF_IO15 0x40e10274 -#define DF_CLE_NOE 0x40e10240 -#define DF_ALE_nWE 0x40e1020c -#define DF_SCLK_E 0x40e10250 -#define nCS0 0x40e100c4 -#define nCS1 0x40e100c0 -#define nBE0 0x40e10204 -#define nBE1 0x40e10208 -#define nLUA 0x40e10244 -#define nLLA 0x40e10254 -#define DF_ADDR0 0x40e10210 -#define DF_ADDR1 0x40e10214 -#define DF_ADDR2 0x40e10218 -#define DF_ADDR3 0x40e1021c -#define DF_INT_RnB 0x40e100c8 -#define DF_nCS0 0x40e10248 -#define DF_nCS1 0x40e10278 -#define DF_nWE 0x40e100cc -#define DF_nRE 0x40e10200 - -#define GPIO0 0x40e100b4 -#define GPIO1 0x40e100b8 -#define GPIO2 0x40e100bc -#define GPIO3 0x40e1027c -#define GPIO4 0x40e10280 - -#define GPIO5 0x40e10284 -#define GPIO6 0x40e10288 -#define GPIO7 0x40e1028c -#define GPIO8 0x40e10290 -#define GPIO9 0x40e10294 -#define GPIO10 0x40e10298 -#define GPIO11 0x40e1029c -#define GPIO12 0x40e102a0 -#define GPIO13 0x40e102a4 -#define GPIO14 0x40e102a8 -#define GPIO15 0x40e102ac -#define GPIO16 0x40e102b0 -#define GPIO17 0x40e102b4 -#define GPIO18 0x40e102b8 -#define GPIO19 0x40e102bc -#define GPIO20 0x40e102c0 -#define GPIO21 0x40e102c4 -#define GPIO22 0x40e102c8 -#define GPIO23 0x40e102cc -#define GPIO24 0x40e102d0 -#define GPIO25 0x40e102d4 -#define GPIO26 0x40e102d8 - -#define GPIO27 0x40e10400 -#define GPIO28 0x40e10404 -#define GPIO29 0x40e10408 -#define ULPI_STP 0x40e1040c -#define ULPI_NXT 0x40e10410 -#define ULPI_DIR 0x40e10414 -#define GPIO30 0x40e10418 -#define GPIO31 0x40e1041c -#define GPIO32 0x40e10420 -#define GPIO33 0x40e10424 -#define GPIO34 0x40e10428 -#define GPIO35 0x40e1042c -#define GPIO36 0x40e10430 -#define GPIO37 0x40e10434 -#define GPIO38 0x40e10438 -#define GPIO39 0x40e1043c -#define GPIO40 0x40e10440 -#define GPIO41 0x40e10444 -#define GPIO42 0x40e10448 -#define GPIO43 0x40e1044c -#define GPIO44 0x40e10450 -#define GPIO45 0x40e10454 -#define GPIO46 0x40e10458 -#define GPIO47 0x40e1045c -#define GPIO48 0x40e10460 - -#define GPIO49 0x40e10464 -#define GPIO50 0x40e10468 -#define GPIO51 0x40e1046c -#define GPIO52 0x40e10470 -#define GPIO53 0x40e10474 -#define GPIO54 0x40e10478 -#define GPIO55 0x40e1047c -#define GPIO56 0x40e10480 -#define GPIO57 0x40e10484 -#define GPIO58 0x40e10488 -#define GPIO59 0x40e1048c -#define GPIO60 0x40e10490 -#define GPIO61 0x40e10494 -#define GPIO62 0x40e10498 -#define GPIO63 0x40e1049c -#define GPIO64 0x40e104a0 -#define GPIO65 0x40e104a4 -#define GPIO66 0x40e104a8 -#define GPIO67 0x40e104ac -#define GPIO68 0x40e104b0 -#define GPIO69 0x40e104b4 -#define GPIO70 0x40e104b8 -#define GPIO71 0x40e104bc -#define GPIO72 0x40e104c0 -#define GPIO73 0x40e104c4 -#define GPIO74 0x40e104c8 -#define GPIO75 0x40e104cc -#define GPIO76 0x40e104d0 -#define GPIO77 0x40e104d4 -#define GPIO78 0x40e104d8 -#define GPIO79 0x40e104dc -#define GPIO80 0x40e104e0 -#define GPIO81 0x40e104e4 -#define GPIO82 0x40e104e8 -#define GPIO83 0x40e104ec -#define GPIO84 0x40e104f0 -#define GPIO85 0x40e104f4 -#define GPIO86 0x40e104f8 -#define GPIO87 0x40e104fc -#define GPIO88 0x40e10500 -#define GPIO89 0x40e10504 -#define GPIO90 0x40e10508 -#define GPIO91 0x40e1050c -#define GPIO92 0x40e10510 -#define GPIO93 0x40e10514 -#define GPIO94 0x40e10518 -#define GPIO95 0x40e1051c -#define GPIO96 0x40e10520 -#define GPIO97 0x40e10524 -#define GPIO98 0x40e10528 - -#define GPIO99 0x40e10600 -#define GPIO100 0x40e10604 -#define GPIO101 0x40e10608 -#define GPIO102 0x40e1060c -#define GPIO103 0x40e10610 -#define GPIO104 0x40e10614 -#define GPIO105 0x40e10618 -#define GPIO106 0x40e1061c -#define GPIO107 0x40e10620 -#define GPIO108 0x40e10624 -#define GPIO109 0x40e10628 -#define GPIO110 0x40e1062c -#define GPIO111 0x40e10630 -#define GPIO112 0x40e10634 - -#define GPIO113 0x40e10638 -#define GPIO114 0x40e1063c -#define GPIO115 0x40e10640 -#define GPIO116 0x40e10644 -#define GPIO117 0x40e10648 -#define GPIO118 0x40e1064c -#define GPIO119 0x40e10650 -#define GPIO120 0x40e10654 -#define GPIO121 0x40e10658 -#define GPIO122 0x40e1065c -#define GPIO123 0x40e10660 -#define GPIO124 0x40e10664 -#define GPIO125 0x40e10668 -#define GPIO126 0x40e1066c -#define GPIO127 0x40e10670 - -#define GPIO0_2 0x40e10674 -#define GPIO1_2 0x40e10678 -#define GPIO2_2 0x40e102dc -#define GPIO3_2 0x40e102e0 -#define GPIO4_2 0x40e102e4 -#define GPIO5_2 0x40e102e8 -#define GPIO6_2 0x40e102ec - -#ifndef CONFIG_CPU_PXA300 /* PXA310 only */ -#define GPIO7_2 0x40e1052c -#define GPIO8_2 0x40e10530 -#define GPIO9_2 0x40e10534 -#define GPIO10_2 0x40e10538 -#endif -#endif - -#ifdef CONFIG_CPU_MONAHANS -/* MFPR Bit Definitions, see 4-10, Vol. 1 */ -#define PULL_SEL 0x8000 -#define PULLUP_EN 0x4000 -#define PULLDOWN_EN 0x2000 - -#define DRIVE_FAST_1mA 0x0 -#define DRIVE_FAST_2mA 0x400 -#define DRIVE_FAST_3mA 0x800 -#define DRIVE_FAST_4mA 0xC00 -#define DRIVE_SLOW_6mA 0x1000 -#define DRIVE_FAST_6mA 0x1400 -#define DRIVE_SLOW_10mA 0x1800 -#define DRIVE_FAST_10mA 0x1C00 - -#define SLEEP_SEL 0x200 -#define SLEEP_DATA 0x100 -#define SLEEP_OE_N 0x80 -#define EDGE_CLEAR 0x40 -#define EDGE_FALL_EN 0x20 -#define EDGE_RISE_EN 0x10 - -#define AF_SEL_0 0x0 /* Alternate function 0 (reset state) */ -#define AF_SEL_1 0x1 /* Alternate function 1 */ -#define AF_SEL_2 0x2 /* Alternate function 2 */ -#define AF_SEL_3 0x3 /* Alternate function 3 */ -#define AF_SEL_4 0x4 /* Alternate function 4 */ -#define AF_SEL_5 0x5 /* Alternate function 5 */ -#define AF_SEL_6 0x6 /* Alternate function 6 */ -#define AF_SEL_7 0x7 /* Alternate function 7 */ - -#endif /* CONFIG_CPU_MONAHANS */ - -/* GPIO alternate function assignments */ - -#define GPIO1_RST 1 /* reset */ -#define GPIO6_MMCCLK 6 /* MMC Clock */ -#define GPIO8_48MHz 7 /* 48 MHz clock output */ -#define GPIO8_MMCCS0 8 /* MMC Chip Select 0 */ -#define GPIO9_MMCCS1 9 /* MMC Chip Select 1 */ -#define GPIO10_RTCCLK 10 /* real time clock (1 Hz) */ -#define GPIO11_3_6MHz 11 /* 3.6 MHz oscillator out */ -#define GPIO12_32KHz 12 /* 32 kHz out */ -#define GPIO13_MBGNT 13 /* memory controller grant */ -#define GPIO14_MBREQ 14 /* alternate bus master request */ -#define GPIO15_nCS_1 15 /* chip select 1 */ -#define GPIO16_PWM0 16 /* PWM0 output */ -#define GPIO17_PWM1 17 /* PWM1 output */ -#define GPIO18_RDY 18 /* Ext. Bus Ready */ -#define GPIO19_DREQ1 19 /* External DMA Request */ -#define GPIO20_DREQ0 20 /* External DMA Request */ -#define GPIO23_SCLK 23 /* SSP clock */ -#define GPIO24_SFRM 24 /* SSP Frame */ -#define GPIO25_STXD 25 /* SSP transmit */ -#define GPIO26_SRXD 26 /* SSP receive */ -#define GPIO27_SEXTCLK 27 /* SSP ext_clk */ -#define GPIO28_BITCLK 28 /* AC97/I2S bit_clk */ -#define GPIO29_SDATA_IN 29 /* AC97 Sdata_in0 / I2S Sdata_in */ -#define GPIO30_SDATA_OUT 30 /* AC97/I2S Sdata_out */ -#define GPIO31_SYNC 31 /* AC97/I2S sync */ -#define GPIO32_SDATA_IN1 32 /* AC97 Sdata_in1 */ -#define GPIO33_nCS_5 33 /* chip select 5 */ -#define GPIO34_FFRXD 34 /* FFUART receive */ -#define GPIO34_MMCCS0 34 /* MMC Chip Select 0 */ -#define GPIO35_FFCTS 35 /* FFUART Clear to send */ -#define GPIO36_FFDCD 36 /* FFUART Data carrier detect */ -#define GPIO37_FFDSR 37 /* FFUART data set ready */ -#define GPIO38_FFRI 38 /* FFUART Ring Indicator */ -#define GPIO39_MMCCS1 39 /* MMC Chip Select 1 */ -#define GPIO39_FFTXD 39 /* FFUART transmit data */ -#define GPIO40_FFDTR 40 /* FFUART data terminal Ready */ -#define GPIO41_FFRTS 41 /* FFUART request to send */ -#define GPIO42_BTRXD 42 /* BTUART receive data */ -#define GPIO43_BTTXD 43 /* BTUART transmit data */ -#define GPIO44_BTCTS 44 /* BTUART clear to send */ -#define GPIO45_BTRTS 45 /* BTUART request to send */ -#define GPIO46_ICPRXD 46 /* ICP receive data */ -#define GPIO46_STRXD 46 /* STD_UART receive data */ -#define GPIO47_ICPTXD 47 /* ICP transmit data */ -#define GPIO47_STTXD 47 /* STD_UART transmit data */ -#define GPIO48_nPOE 48 /* Output Enable for Card Space */ -#define GPIO49_nPWE 49 /* Write Enable for Card Space */ -#define GPIO50_nPIOR 50 /* I/O Read for Card Space */ -#define GPIO51_nPIOW 51 /* I/O Write for Card Space */ -#define GPIO52_nPCE_1 52 /* Card Enable for Card Space */ -#define GPIO53_nPCE_2 53 /* Card Enable for Card Space */ -#define GPIO53_MMCCLK 53 /* MMC Clock */ -#define GPIO54_MMCCLK 54 /* MMC Clock */ -#define GPIO54_pSKTSEL 54 /* Socket Select for Card Space */ -#define GPIO55_nPREG 55 /* Card Address bit 26 */ -#define GPIO56_nPWAIT 56 /* Wait signal for Card Space */ -#define GPIO57_nIOIS16 57 /* Bus Width select for I/O Card Space */ -#define GPIO58_LDD_0 58 /* LCD data pin 0 */ -#define GPIO59_LDD_1 59 /* LCD data pin 1 */ -#define GPIO60_LDD_2 60 /* LCD data pin 2 */ -#define GPIO61_LDD_3 61 /* LCD data pin 3 */ -#define GPIO62_LDD_4 62 /* LCD data pin 4 */ -#define GPIO63_LDD_5 63 /* LCD data pin 5 */ -#define GPIO64_LDD_6 64 /* LCD data pin 6 */ -#define GPIO65_LDD_7 65 /* LCD data pin 7 */ -#define GPIO66_LDD_8 66 /* LCD data pin 8 */ -#define GPIO66_MBREQ 66 /* alternate bus master req */ -#define GPIO67_LDD_9 67 /* LCD data pin 9 */ -#define GPIO67_MMCCS0 67 /* MMC Chip Select 0 */ -#define GPIO68_LDD_10 68 /* LCD data pin 10 */ -#define GPIO68_MMCCS1 68 /* MMC Chip Select 1 */ -#define GPIO69_LDD_11 69 /* LCD data pin 11 */ -#define GPIO69_MMCCLK 69 /* MMC_CLK */ -#define GPIO70_LDD_12 70 /* LCD data pin 12 */ -#define GPIO70_RTCCLK 70 /* Real Time clock (1 Hz) */ -#define GPIO71_LDD_13 71 /* LCD data pin 13 */ -#define GPIO71_3_6MHz 71 /* 3.6 MHz Oscillator clock */ -#define GPIO72_LDD_14 72 /* LCD data pin 14 */ -#define GPIO72_32kHz 72 /* 32 kHz clock */ -#define GPIO73_LDD_15 73 /* LCD data pin 15 */ -#define GPIO73_MBGNT 73 /* Memory controller grant */ -#define GPIO74_LCD_FCLK 74 /* LCD Frame clock */ -#define GPIO75_LCD_LCLK 75 /* LCD line clock */ -#define GPIO76_LCD_PCLK 76 /* LCD Pixel clock */ -#define GPIO77_LCD_ACBIAS 77 /* LCD AC Bias */ -#define GPIO78_nCS_2 78 /* chip select 2 */ -#define GPIO79_nCS_3 79 /* chip select 3 */ -#define GPIO80_nCS_4 80 /* chip select 4 */ - -/* GPIO alternate function mode & direction */ - -#define GPIO_IN 0x000 -#define GPIO_OUT 0x080 -#define GPIO_ALT_FN_1_IN 0x100 -#define GPIO_ALT_FN_1_OUT 0x180 -#define GPIO_ALT_FN_2_IN 0x200 -#define GPIO_ALT_FN_2_OUT 0x280 -#define GPIO_ALT_FN_3_IN 0x300 -#define GPIO_ALT_FN_3_OUT 0x380 -#define GPIO_MD_MASK_NR 0x07f -#define GPIO_MD_MASK_DIR 0x080 -#define GPIO_MD_MASK_FN 0x300 - -#define GPIO1_RTS_MD ( 1 | GPIO_ALT_FN_1_IN) -#define GPIO6_MMCCLK_MD ( 6 | GPIO_ALT_FN_1_OUT) -#define GPIO8_48MHz_MD ( 8 | GPIO_ALT_FN_1_OUT) -#define GPIO8_MMCCS0_MD ( 8 | GPIO_ALT_FN_1_OUT) -#define GPIO9_MMCCS1_MD ( 9 | GPIO_ALT_FN_1_OUT) -#define GPIO10_RTCCLK_MD (10 | GPIO_ALT_FN_1_OUT) -#define GPIO11_3_6MHz_MD (11 | GPIO_ALT_FN_1_OUT) -#define GPIO12_32KHz_MD (12 | GPIO_ALT_FN_1_OUT) -#define GPIO13_MBGNT_MD (13 | GPIO_ALT_FN_2_OUT) -#define GPIO14_MBREQ_MD (14 | GPIO_ALT_FN_1_IN) -#define GPIO15_nCS_1_MD (15 | GPIO_ALT_FN_2_OUT) -#define GPIO16_PWM0_MD (16 | GPIO_ALT_FN_2_OUT) -#define GPIO17_PWM1_MD (17 | GPIO_ALT_FN_2_OUT) -#define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN) -#define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN) -#define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN) -#define GPIO23_SCLK_md (23 | GPIO_ALT_FN_2_OUT) -#define GPIO24_SFRM_MD (24 | GPIO_ALT_FN_2_OUT) -#define GPIO25_STXD_MD (25 | GPIO_ALT_FN_2_OUT) -#define GPIO26_SRXD_MD (26 | GPIO_ALT_FN_1_IN) -#define GPIO27_SEXTCLK_MD (27 | GPIO_ALT_FN_1_IN) -#define GPIO28_BITCLK_AC97_MD (28 | GPIO_ALT_FN_1_IN) -#define GPIO28_BITCLK_I2S_MD (28 | GPIO_ALT_FN_2_IN) -#define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN) -#define GPIO29_SDATA_IN_I2S_MD (29 | GPIO_ALT_FN_2_IN) -#define GPIO30_SDATA_OUT_AC97_MD (30 | GPIO_ALT_FN_2_OUT) -#define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT) -#define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT) -#define GPIO31_SYNC_I2S_MD (31 | GPIO_ALT_FN_1_OUT) -#define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN) -#define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT) -#define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN) -#define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT) -#define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) -#define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN) -#define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN) -#define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN) -#define GPIO39_MMCCS1_MD (39 | GPIO_ALT_FN_1_OUT) -#define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) -#define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT) -#define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) -#define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN) -#define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT) -#define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN) -#define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT) -#define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN) -#define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN) -#define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT) -#define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT) -#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) -#define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT) -#define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT) -#define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT) -#define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT) -#define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT) -#define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT) -#define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT) -#define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT) -#define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT) -#define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN) -#define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN) -#define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT) -#define GPIO59_LDD_1_MD (59 | GPIO_ALT_FN_2_OUT) -#define GPIO60_LDD_2_MD (60 | GPIO_ALT_FN_2_OUT) -#define GPIO61_LDD_3_MD (61 | GPIO_ALT_FN_2_OUT) -#define GPIO62_LDD_4_MD (62 | GPIO_ALT_FN_2_OUT) -#define GPIO63_LDD_5_MD (63 | GPIO_ALT_FN_2_OUT) -#define GPIO64_LDD_6_MD (64 | GPIO_ALT_FN_2_OUT) -#define GPIO65_LDD_7_MD (65 | GPIO_ALT_FN_2_OUT) -#define GPIO66_LDD_8_MD (66 | GPIO_ALT_FN_2_OUT) -#define GPIO66_MBREQ_MD (66 | GPIO_ALT_FN_1_IN) -#define GPIO67_LDD_9_MD (67 | GPIO_ALT_FN_2_OUT) -#define GPIO67_MMCCS0_MD (67 | GPIO_ALT_FN_1_OUT) -#define GPIO68_LDD_10_MD (68 | GPIO_ALT_FN_2_OUT) -#define GPIO68_MMCCS1_MD (68 | GPIO_ALT_FN_1_OUT) -#define GPIO69_LDD_11_MD (69 | GPIO_ALT_FN_2_OUT) -#define GPIO69_MMCCLK_MD (69 | GPIO_ALT_FN_1_OUT) -#define GPIO70_LDD_12_MD (70 | GPIO_ALT_FN_2_OUT) -#define GPIO70_RTCCLK_MD (70 | GPIO_ALT_FN_1_OUT) -#define GPIO71_LDD_13_MD (71 | GPIO_ALT_FN_2_OUT) -#define GPIO71_3_6MHz_MD (71 | GPIO_ALT_FN_1_OUT) -#define GPIO72_LDD_14_MD (72 | GPIO_ALT_FN_2_OUT) -#define GPIO72_32kHz_MD (72 | GPIO_ALT_FN_1_OUT) -#define GPIO73_LDD_15_MD (73 | GPIO_ALT_FN_2_OUT) -#define GPIO73_MBGNT_MD (73 | GPIO_ALT_FN_1_OUT) -#define GPIO74_LCD_FCLK_MD (74 | GPIO_ALT_FN_2_OUT) -#define GPIO75_LCD_LCLK_MD (75 | GPIO_ALT_FN_2_OUT) -#define GPIO76_LCD_PCLK_MD (76 | GPIO_ALT_FN_2_OUT) -#define GPIO77_LCD_ACBIAS_MD (77 | GPIO_ALT_FN_2_OUT) -#define GPIO78_nCS_2_MD (78 | GPIO_ALT_FN_2_OUT) -#define GPIO79_nCS_3_MD (79 | GPIO_ALT_FN_2_OUT) -#define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT) - -#define GPIO117_SCL (117 | GPIO_ALT_FN_1_OUT) -#define GPIO118_SDA (118 | GPIO_ALT_FN_1_OUT) - -/* - * Power Manager - */ -#ifdef CONFIG_CPU_MONAHANS - -#define ASCR 0x40F40000 /* Application Subsystem Power Status/Control Register */ -#define ARSR 0x40F40004 /* Application Subsystem Reset Status Register */ -#define AD3ER 0x40F40008 /* Application Subsystem D3 state Wakeup Enable Register */ -#define AD3SR 0x40F4000C /* Application Subsystem D3 state Wakeup Status Register */ -#define AD2D0ER 0x40F40010 /* Application Subsystem D2 to D0 state Wakeup Enable Register */ -#define AD2D0SR 0x40F40014 /* Application Subsystem D2 to D0 state Wakeup Status Register */ -#define AD2D1ER 0x40F40018 /* Application Subsystem D2 to D1 state Wakeup Enable Register */ -#define AD2D1SR 0x40F4001C /* Application Subsystem D2 to D1 state Wakeup Status Register */ -#define AD1D0ER 0x40F40020 /* Application Subsystem D1 to D0 state Wakeup Enable Register */ -#define AD1D0SR 0x40F40024 /* Application Subsystem D1 to D0 state Wakeup Status Register */ -#define ASDCNT 0x40F40028 /* Application Subsystem SRAM Drowsy Count Register */ -#define AD3R 0x40F40030 /* Application Subsystem D3 State Configuration Register */ -#define AD2R 0x40F40034 /* Application Subsystem D2 State Configuration Register */ -#define AD1R 0x40F40038 /* Application Subsystem D1 State Configuration Register */ - -#define PMCR 0x40F50000 /* Power Manager Control Register */ -#define PSR 0x40F50004 /* Power Manager S2 Status Register */ -#define PSPR 0x40F50008 /* Power Manager Scratch Pad Register */ -#define PCFR 0x40F5000C /* Power Manager General Configuration Register */ -#define PWER 0x40F50010 /* Power Manager Wake-up Enable Register */ -#define PWSR 0x40F50014 /* Power Manager Wake-up Status Register */ -#define PECR 0x40F50018 /* Power Manager EXT_WAKEUP[1:0] Control Register */ -#define DCDCSR 0x40F50080 /* DC-DC Controller Status Register */ -#define PVCR 0x40F50100 /* Power Manager Voltage Change Control Register */ -#define PCMD(x) (0x40F50110 + x*4) -#define PCMD0 (0x40F50110 + 0 * 4) -#define PCMD1 (0x40F50110 + 1 * 4) -#define PCMD2 (0x40F50110 + 2 * 4) -#define PCMD3 (0x40F50110 + 3 * 4) -#define PCMD4 (0x40F50110 + 4 * 4) -#define PCMD5 (0x40F50110 + 5 * 4) -#define PCMD6 (0x40F50110 + 6 * 4) -#define PCMD7 (0x40F50110 + 7 * 4) -#define PCMD8 (0x40F50110 + 8 * 4) -#define PCMD9 (0x40F50110 + 9 * 4) -#define PCMD10 (0x40F50110 + 10 * 4) -#define PCMD11 (0x40F50110 + 11 * 4) -#define PCMD12 (0x40F50110 + 12 * 4) -#define PCMD13 (0x40F50110 + 13 * 4) -#define PCMD14 (0x40F50110 + 14 * 4) -#define PCMD15 (0x40F50110 + 15 * 4) -#define PCMD16 (0x40F50110 + 16 * 4) -#define PCMD17 (0x40F50110 + 17 * 4) -#define PCMD18 (0x40F50110 + 18 * 4) -#define PCMD19 (0x40F50110 + 19 * 4) -#define PCMD20 (0x40F50110 + 20 * 4) -#define PCMD21 (0x40F50110 + 21 * 4) -#define PCMD22 (0x40F50110 + 22 * 4) -#define PCMD23 (0x40F50110 + 23 * 4) -#define PCMD24 (0x40F50110 + 24 * 4) -#define PCMD25 (0x40F50110 + 25 * 4) -#define PCMD26 (0x40F50110 + 26 * 4) -#define PCMD27 (0x40F50110 + 27 * 4) -#define PCMD28 (0x40F50110 + 28 * 4) -#define PCMD29 (0x40F50110 + 29 * 4) -#define PCMD30 (0x40F50110 + 30 * 4) -#define PCMD31 (0x40F50110 + 31 * 4) - -#define PCMD_MBC (1<<12) -#define PCMD_DCE (1<<11) -#define PCMD_LC (1<<10) -#define PCMD_SQC (3<<8) /* only 00 and 01 are valid */ - -#define PVCR_FVC (0x1 << 28) -#define PVCR_VCSA (0x1<<14) -#define PVCR_CommandDelay (0xf80) -#define PVCR_ReadPointer 0x01f00000 -#define PVCR_SlaveAddress (0x7f) - -#else /* ifdef CONFIG_CPU_MONAHANS */ - -#define PMCR 0x40F00000 /* Power Manager Control Register */ -#define PSSR 0x40F00004 /* Power Manager Sleep Status Register */ -#define PSPR 0x40F00008 /* Power Manager Scratch Pad Register */ -#define PWER 0x40F0000C /* Power Manager Wake-up Enable Register */ -#define PRER 0x40F00010 /* Power Manager GPIO Rising-Edge Detect Enable Register */ -#define PFER 0x40F00014 /* Power Manager GPIO Falling-Edge Detect Enable Register */ -#define PEDR 0x40F00018 /* Power Manager GPIO Edge Detect Status Register */ -#define PCFR 0x40F0001C /* Power Manager General Configuration Register */ -#define PGSR0 0x40F00020 /* Power Manager GPIO Sleep State Register for GP[31-0] */ -#define PGSR1 0x40F00024 /* Power Manager GPIO Sleep State Register for GP[63-32] */ -#define PGSR2 0x40F00028 /* Power Manager GPIO Sleep State Register for GP[84-64] */ -#define PGSR3 0x40F0002C /* Power Manager GPIO Sleep State Register for GP[118-96] */ -#define RCSR 0x40F00030 /* Reset Controller Status Register */ - -#define PSLR 0x40F00034 /* Power Manager Sleep Config Register */ -#define PSTR 0x40F00038 /* Power Manager Standby Config Register */ -#define PSNR 0x40F0003C /* Power Manager Sense Config Register */ -#define PVCR 0x40F00040 /* Power Manager VoltageControl Register */ -#define PKWR 0x40F00050 /* Power Manager KB Wake-up Enable Reg */ -#define PKSR 0x40F00054 /* Power Manager KB Level-Detect Register */ -#define PCMD(x) (0x40F00080 + x*4) -#define PCMD0 (0x40F00080 + 0 * 4) -#define PCMD1 (0x40F00080 + 1 * 4) -#define PCMD2 (0x40F00080 + 2 * 4) -#define PCMD3 (0x40F00080 + 3 * 4) -#define PCMD4 (0x40F00080 + 4 * 4) -#define PCMD5 (0x40F00080 + 5 * 4) -#define PCMD6 (0x40F00080 + 6 * 4) -#define PCMD7 (0x40F00080 + 7 * 4) -#define PCMD8 (0x40F00080 + 8 * 4) -#define PCMD9 (0x40F00080 + 9 * 4) -#define PCMD10 (0x40F00080 + 10 * 4) -#define PCMD11 (0x40F00080 + 11 * 4) -#define PCMD12 (0x40F00080 + 12 * 4) -#define PCMD13 (0x40F00080 + 13 * 4) -#define PCMD14 (0x40F00080 + 14 * 4) -#define PCMD15 (0x40F00080 + 15 * 4) -#define PCMD16 (0x40F00080 + 16 * 4) -#define PCMD17 (0x40F00080 + 17 * 4) -#define PCMD18 (0x40F00080 + 18 * 4) -#define PCMD19 (0x40F00080 + 19 * 4) -#define PCMD20 (0x40F00080 + 20 * 4) -#define PCMD21 (0x40F00080 + 21 * 4) -#define PCMD22 (0x40F00080 + 22 * 4) -#define PCMD23 (0x40F00080 + 23 * 4) -#define PCMD24 (0x40F00080 + 24 * 4) -#define PCMD25 (0x40F00080 + 25 * 4) -#define PCMD26 (0x40F00080 + 26 * 4) -#define PCMD27 (0x40F00080 + 27 * 4) -#define PCMD28 (0x40F00080 + 28 * 4) -#define PCMD29 (0x40F00080 + 29 * 4) -#define PCMD30 (0x40F00080 + 30 * 4) -#define PCMD31 (0x40F00080 + 31 * 4) - -#define PCMD_MBC (1<<12) -#define PCMD_DCE (1<<11) -#define PCMD_LC (1<<10) -/* FIXME: PCMD_SQC need be checked. */ -#define PCMD_SQC (3<<8) /* currently only bit 8 is changerable, */ - /* bit 9 should be 0 all day. */ -#define PVCR_VCSA (0x1<<14) -#define PVCR_CommandDelay (0xf80) -/* define MACRO for Power Manager General Configuration Register (PCFR) */ -#define PCFR_FVC (0x1 << 10) -#define PCFR_PI2C_EN (0x1 << 6) - -#define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */ -#define PSSR_RDH (1 << 5) /* Read Disable Hold */ -#define PSSR_PH (1 << 4) /* Peripheral Control Hold */ -#define PSSR_VFS (1 << 2) /* VDD Fault Status */ -#define PSSR_BFS (1 << 1) /* Battery Fault Status */ -#define PSSR_SSS (1 << 0) /* Software Sleep Status */ - -#define PCFR_DS (1 << 3) /* Deep Sleep Mode */ -#define PCFR_FS (1 << 2) /* Float Static Chip Selects */ -#define PCFR_FP (1 << 1) /* Float PCMCIA controls */ -#define PCFR_OPDE (1 << 0) /* 3.6864 MHz oscillator power-down enable */ - -#define RCSR_GPR (1 << 3) /* GPIO Reset */ -#define RCSR_SMR (1 << 2) /* Sleep Mode */ -#define RCSR_WDR (1 << 1) /* Watchdog Reset */ -#define RCSR_HWR (1 << 0) /* Hardware Reset */ - -#endif /* CONFIG_CPU_MONAHANS */ - -/* - * SSP Serial Port Registers - */ -#define SSCR0 0x41000000 /* SSP Control Register 0 */ -#define SSCR1 0x41000004 /* SSP Control Register 1 */ -#define SSSR 0x41000008 /* SSP Status Register */ -#define SSITR 0x4100000C /* SSP Interrupt Test Register */ -#define SSDR 0x41000010 /* (Write / Read) SSP Data Write Register/SSP Data Read Register */ - -/* - * MultiMediaCard (MMC) controller - */ -#define MMC_STRPCL 0x41100000 /* Control to start and stop MMC clock */ -#define MMC_STAT 0x41100004 /* MMC Status Register (read only) */ -#define MMC_CLKRT 0x41100008 /* MMC clock rate */ -#define MMC_SPI 0x4110000c /* SPI mode control bits */ -#define MMC_CMDAT 0x41100010 /* Command/response/data sequence control */ -#define MMC_RESTO 0x41100014 /* Expected response time out */ -#define MMC_RDTO 0x41100018 /* Expected data read time out */ -#define MMC_BLKLEN 0x4110001c /* Block length of data transaction */ -#define MMC_NOB 0x41100020 /* Number of blocks, for block mode */ -#define MMC_PRTBUF 0x41100024 /* Partial MMC_TXFIFO FIFO written */ -#define MMC_I_MASK 0x41100028 /* Interrupt Mask */ -#define MMC_I_REG 0x4110002c /* Interrupt Register (read only) */ -#define MMC_CMD 0x41100030 /* Index of current command */ -#define MMC_ARGH 0x41100034 /* MSW part of the current command argument */ -#define MMC_ARGL 0x41100038 /* LSW part of the current command argument */ -#define MMC_RES 0x4110003c /* Response FIFO (read only) */ -#define MMC_RXFIFO 0x41100040 /* Receive FIFO (read only) */ -#define MMC_TXFIFO 0x41100044 /* Transmit FIFO (write only) */ - - -/* - * LCD - */ -#define LCCR0 0x44000000 /* LCD Controller Control Register 0 */ -#define LCCR1 0x44000004 /* LCD Controller Control Register 1 */ -#define LCCR2 0x44000008 /* LCD Controller Control Register 2 */ -#define LCCR3 0x4400000C /* LCD Controller Control Register 3 */ -#define DFBR0 0x44000020 /* DMA Channel 0 Frame Branch Register */ -#define DFBR1 0x44000024 /* DMA Channel 1 Frame Branch Register */ -#define LCSR0 0x44000038 /* LCD Controller Status Register */ -#define LCSR1 0x44000034 /* LCD Controller Status Register */ -#define LIIDR 0x4400003C /* LCD Controller Interrupt ID Register */ -#define TMEDRGBR 0x44000040 /* TMED RGB Seed Register */ -#define TMEDCR 0x44000044 /* TMED Control Register */ - -#define FDADR0 0x44000200 /* DMA Channel 0 Frame Descriptor Address Register */ -#define FSADR0 0x44000204 /* DMA Channel 0 Frame Source Address Register */ -#define FIDR0 0x44000208 /* DMA Channel 0 Frame ID Register */ -#define LDCMD0 0x4400020C /* DMA Channel 0 Command Register */ -#define FDADR1 0x44000210 /* DMA Channel 1 Frame Descriptor Address Register */ -#define FSADR1 0x44000214 /* DMA Channel 1 Frame Source Address Register */ -#define FIDR1 0x44000218 /* DMA Channel 1 Frame ID Register */ -#define LDCMD1 0x4400021C /* DMA Channel 1 Command Register */ - -#define LCCR0_ENB (1 << 0) /* LCD Controller enable */ -#define LCCR0_CMS (1 << 1) /* Color = 0, Monochrome = 1 */ -#define LCCR0_SDS (1 << 2) /* Single Panel = 0, Dual Panel = 1 */ -#define LCCR0_LDM (1 << 3) /* LCD Disable Done Mask */ -#define LCCR0_SFM (1 << 4) /* Start of frame mask */ -#define LCCR0_IUM (1 << 5) /* Input FIFO underrun mask */ -#define LCCR0_EFM (1 << 6) /* End of Frame mask */ -#define LCCR0_PAS (1 << 7) /* Passive = 0, Active = 1 */ -#define LCCR0_BLE (1 << 8) /* Little Endian = 0, Big Endian = 1 */ -#define LCCR0_DPD (1 << 9) /* Double Pixel mode, 4 pixel value = 0, 8 pixle values = 1 */ -#define LCCR0_DIS (1 << 10) /* LCD Disable */ -#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ -#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ -#define LCCR0_PDD_S 12 -#define LCCR0_BM (1 << 20) /* Branch mask */ -#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ -#if defined(CONFIG_CPU_PXA27X) -#define LCCR0_LCDT (1 << 22) /* LCD Panel Type */ -#define LCCR0_RDSTM (1 << 23) /* Read Status Interrupt Mask */ -#define LCCR0_CMDIM (1 << 24) /* Command Interrupt Mask */ -#endif - -#define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */ -#define LCCR1_DisWdth(Pixel) /* Display Width [1..800 pix.] */ \ - (((Pixel) - 1) << FShft (LCCR1_PPL)) - -#define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */ -#define LCCR1_HorSnchWdth(Tpix) /* Horizontal Synchronization */ \ - /* pulse Width [1..64 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_HSW)) - -#define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait */ - /* count - 1 [Tpix] */ -#define LCCR1_EndLnDel(Tpix) /* End-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_ELW)) - -#define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */ - /* Wait count - 1 [Tpix] */ -#define LCCR1_BegLnDel(Tpix) /* Beginning-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_BLW)) - - -#define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */ -#define LCCR2_DisHght(Line) /* Display Height [1..1024 lines] */ \ - (((Line) - 1) << FShft (LCCR2_LPP)) - -#define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse */ - /* Width - 1 [Tln] (L_FCLK) */ -#define LCCR2_VrtSnchWdth(Tln) /* Vertical Synchronization pulse */ \ - /* Width [1..64 Tln] */ \ - (((Tln) - 1) << FShft (LCCR2_VSW)) - -#define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */ - /* count [Tln] */ -#define LCCR2_EndFrmDel(Tln) /* End-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_EFW)) - -#define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */ - /* Wait count [Tln] */ -#define LCCR2_BegFrmDel(Tln) /* Beginning-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_BFW)) - -#define LCCR3_API (0xf << 16) /* AC Bias pin trasitions per interrupt */ -#define LCCR3_API_S 16 -#define LCCR3_VSP (1 << 20) /* vertical sync polarity */ -#define LCCR3_HSP (1 << 21) /* horizontal sync polarity */ -#define LCCR3_PCP (1 << 22) /* pixel clock polarity */ -#define LCCR3_OEP (1 << 23) /* output enable polarity */ -#define LCCR3_DPC (1 << 27) /* double pixel clock mode */ - -#define LCCR3_PDFOR_0 (0 << 30) -#define LCCR3_PDFOR_1 (1 << 30) -#define LCCR3_PDFOR_2 (2 << 30) -#define LCCR3_PDFOR_3 (3 << 30) - - -#define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */ -#define LCCR3_PixClkDiv(Div) /* Pixel Clock Divisor */ \ - (((Div) << FShft (LCCR3_PCD))) - - -#define LCCR3_BPP Fld (3, 24) /* Bit Per Pixel */ -#define LCCR3_Bpp(Bpp) /* Bit Per Pixel */ \ - ((((Bpp&0x7) << FShft (LCCR3_BPP)))|(((Bpp&0x8)<<26))) - -#define LCCR3_ACB Fld (8, 8) /* AC Bias */ -#define LCCR3_Acb(Acb) /* BAC Bias */ \ - (((Acb) << FShft (LCCR3_ACB))) - -#define LCCR3_HorSnchH (LCCR3_HSP*0) /* Horizontal Synchronization */ - /* pulse active High */ -#define LCCR3_HorSnchL (LCCR3_HSP*1) /* Horizontal Synchronization */ - -#define LCCR3_VrtSnchH (LCCR3_VSP*0) /* Vertical Synchronization pulse */ - /* active High */ -#define LCCR3_VrtSnchL (LCCR3_VSP*1) /* Vertical Synchronization pulse */ - /* active Low */ - -#define LCSR0_LDD (1 << 0) /* LCD Disable Done */ -#define LCSR0_SOF (1 << 1) /* Start of frame */ -#define LCSR0_BER (1 << 2) /* Bus error */ -#define LCSR0_ABC (1 << 3) /* AC Bias count */ -#define LCSR0_IUL (1 << 4) /* input FIFO underrun Lower panel */ -#define LCSR0_IUU (1 << 5) /* input FIFO underrun Upper panel */ -#define LCSR0_OU (1 << 6) /* output FIFO underrun */ -#define LCSR0_QD (1 << 7) /* quick disable */ -#define LCSR0_EOF0 (1 << 8) /* end of frame */ -#define LCSR0_BS (1 << 9) /* branch status */ -#define LCSR0_SINT (1 << 10) /* subsequent interrupt */ - -#define LCSR1_SOF1 (1 << 0) -#define LCSR1_SOF2 (1 << 1) -#define LCSR1_SOF3 (1 << 2) -#define LCSR1_SOF4 (1 << 3) -#define LCSR1_SOF5 (1 << 4) -#define LCSR1_SOF6 (1 << 5) - -#define LCSR1_EOF1 (1 << 8) -#define LCSR1_EOF2 (1 << 9) -#define LCSR1_EOF3 (1 << 10) -#define LCSR1_EOF4 (1 << 11) -#define LCSR1_EOF5 (1 << 12) -#define LCSR1_EOF6 (1 << 13) - -#define LCSR1_BS1 (1 << 16) -#define LCSR1_BS2 (1 << 17) -#define LCSR1_BS3 (1 << 18) -#define LCSR1_BS4 (1 << 19) -#define LCSR1_BS5 (1 << 20) -#define LCSR1_BS6 (1 << 21) - -#define LCSR1_IU2 (1 << 25) -#define LCSR1_IU3 (1 << 26) -#define LCSR1_IU4 (1 << 27) -#define LCSR1_IU5 (1 << 28) -#define LCSR1_IU6 (1 << 29) - -#define LDCMD_PAL (1 << 26) /* instructs DMA to load palette buffer */ -#if defined(CONFIG_CPU_PXA27X) -#define LDCMD_SOFINT (1 << 22) -#define LDCMD_EOFINT (1 << 21) -#endif - -/* - * Memory controller - */ - -#ifdef CONFIG_CPU_MONAHANS - -/* PXA3xx */ - -/* Static Memory Controller Registers */ -#define MSC0 0x4A000008 /* Static Memory Control Register 0 */ -#define MSC1 0x4A00000C /* Static Memory Control Register 1 */ -#define MECR 0x4A000014 /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */ -#define SXCNFG 0x4A00001C /* Synchronous Static Memory Control Register */ -#define MCMEM0 0x4A000028 /* Card interface Common Memory Space Socket 0 Timing */ -#define MCATT0 0x4A000030 /* Card interface Attribute Space Socket 0 Timing Configuration */ -#define MCIO0 0x4A000038 /* Card interface I/O Space Socket 0 Timing Configuration */ -#define MEMCLKCFG 0x4A000068 /* SCLK speed configuration */ -#define CSADRCFG0 0x4A000080 /* Address Configuration for chip select 0 */ -#define CSADRCFG1 0x4A000084 /* Address Configuration for chip select 1 */ -#define CSADRCFG2 0x4A000088 /* Address Configuration for chip select 2 */ -#define CSADRCFG3 0x4A00008C /* Address Configuration for chip select 3 */ -#define CSADRCFG_P 0x4A000090 /* Address Configuration for pcmcia card interface */ -#define CSMSADRCFG 0x4A0000A0 /* Master Address Configuration Register */ -#define CLK_RET_DEL 0x4A0000B0 /* Delay line and mux selects for return data latching for sync. flash */ -#define ADV_RET_DEL 0x4A0000B4 /* Delay line and mux selects for return data latching for sync. flash */ - -/* Dynamic Memory Controller Registers */ -#define MDCNFG 0x48100000 /* SDRAM Configuration Register 0 */ -#define MDREFR 0x48100004 /* SDRAM Refresh Control Register */ -#define FLYCNFG 0x48100020 /* Fly-by DMA DVAL[1:0] polarities */ -#define MDMRS 0x48100040 /* MRS value to be written to SDRAM */ -#define DDR_SCAL 0x48100050 /* Software Delay Line Calibration/Configuration for external DDR memory. */ -#define DDR_HCAL 0x48100060 /* Hardware Delay Line Calibration/Configuration for external DDR memory. */ -#define DDR_WCAL 0x48100068 /* DDR Write Strobe Calibration Register */ -#define DMCIER 0x48100070 /* Dynamic MC Interrupt Enable Register. */ -#define DMCISR 0x48100078 /* Dynamic MC Interrupt Status Register. */ -#define DDR_DLS 0x48100080 /* DDR Delay Line Value Status register for external DDR memory. */ -#define EMPI 0x48100090 /* EMPI Control Register */ -#define RCOMP 0x48100100 -#define PAD_MA 0x48100110 -#define PAD_MDMSB 0x48100114 -#define PAD_MDLSB 0x48100118 -#define PAD_DMEM 0x4810011c -#define PAD_SDCLK 0x48100120 -#define PAD_SDCS 0x48100124 -#define PAD_SMEM 0x48100128 -#define PAD_SCLK 0x4810012C -#define TAI 0x48100F00 /* TAI Tavor Address Isolation Register */ - -/* Some frequently used bits */ -#define MDCNFG_DMAP 0x80000000 /* SDRAM 1GB Memory Map Enable */ -#define MDCNFG_DMCEN 0x40000000 /* Enable Dynamic Memory Controller */ -#define MDCNFG_HWFREQ 0x20000000 /* Hardware Frequency Change Calibration */ -#define MDCNFG_DTYPE 0x400 /* SDRAM Type: 1=DDR SDRAM */ - -#define MDCNFG_DTC_0 0x0 /* Timing Category of SDRAM */ -#define MDCNFG_DTC_1 0x100 -#define MDCNFG_DTC_2 0x200 -#define MDCNFG_DTC_3 0x300 - -#define MDCNFG_DRAC_12 0x0 /* Number of Row Access Bits */ -#define MDCNFG_DRAC_13 0x20 -#define MDCNFG_DRAC_14 0x40 - -#define MDCNFG_DCAC_9 0x0 /* Number of Column Acess Bits */ -#define MDCNFG_DCAC_10 0x08 -#define MDCNFG_DCAC_11 0x10 - -#define MDCNFG_DBW_16 0x4 /* SDRAM Data Bus width 16bit */ -#define MDCNFG_DCSE1 0x2 /* SDRAM CS 1 Enable */ -#define MDCNFG_DCSE0 0x1 /* SDRAM CS 0 Enable */ - - -/* Data Flash Controller Registers */ - -#define NDCR 0x43100000 /* Data Flash Control register */ -#define NDTR0CS0 0x43100004 /* Data Controller Timing Parameter 0 Register for ND_nCS0 */ -/* #define NDTR0CS1 0x43100008 /* Data Controller Timing Parameter 0 Register for ND_nCS1 */ */ -#define NDTR1CS0 0x4310000C /* Data Controller Timing Parameter 1 Register for ND_nCS0 */ -/* #define NDTR1CS1 0x43100010 /* Data Controller Timing Parameter 1 Register for ND_nCS1 */ */ -#define NDSR 0x43100014 /* Data Controller Status Register */ -#define NDPCR 0x43100018 /* Data Controller Page Count Register */ -#define NDBDR0 0x4310001C /* Data Controller Bad Block Register 0 */ -#define NDBDR1 0x43100020 /* Data Controller Bad Block Register 1 */ -#define NDDB 0x43100040 /* Data Controller Data Buffer */ -#define NDCB0 0x43100048 /* Data Controller Command Buffer0 */ -#define NDCB1 0x4310004C /* Data Controller Command Buffer1 */ -#define NDCB2 0x43100050 /* Data Controller Command Buffer2 */ - -#define NDCR_SPARE_EN (0x1<<31) -#define NDCR_ECC_EN (0x1<<30) -#define NDCR_DMA_EN (0x1<<29) -#define NDCR_ND_RUN (0x1<<28) -#define NDCR_DWIDTH_C (0x1<<27) -#define NDCR_DWIDTH_M (0x1<<26) -#define NDCR_PAGE_SZ (0x3<<24) -#define NDCR_NCSX (0x1<<23) -#define NDCR_ND_STOP (0x1<<22) -/* reserved: - * #define NDCR_ND_MODE (0x3<<21) - * #define NDCR_NAND_MODE 0x0 */ -#define NDCR_CLR_PG_CNT (0x1<<20) -#define NDCR_CLR_ECC (0x1<<19) -#define NDCR_RD_ID_CNT (0x7<<16) -#define NDCR_RA_START (0x1<<15) -#define NDCR_PG_PER_BLK (0x1<<14) -#define NDCR_ND_ARB_EN (0x1<<12) -#define NDCR_RDYM (0x1<<11) -#define NDCR_CS0_PAGEDM (0x1<<10) -#define NDCR_CS1_PAGEDM (0x1<<9) -#define NDCR_CS0_CMDDM (0x1<<8) -#define NDCR_CS1_CMDDM (0x1<<7) -#define NDCR_CS0_BBDM (0x1<<6) -#define NDCR_CS1_BBDM (0x1<<5) -#define NDCR_DBERRM (0x1<<4) -#define NDCR_SBERRM (0x1<<3) -#define NDCR_WRDREQM (0x1<<2) -#define NDCR_RDDREQM (0x1<<1) -#define NDCR_WRCMDREQM (0x1) - -#define NDSR_RDY (0x1<<11) -#define NDSR_CS0_PAGED (0x1<<10) -#define NDSR_CS1_PAGED (0x1<<9) -#define NDSR_CS0_CMDD (0x1<<8) -#define NDSR_CS1_CMDD (0x1<<7) -#define NDSR_CS0_BBD (0x1<<6) -#define NDSR_CS1_BBD (0x1<<5) -#define NDSR_DBERR (0x1<<4) -#define NDSR_SBERR (0x1<<3) -#define NDSR_WRDREQ (0x1<<2) -#define NDSR_RDDREQ (0x1<<1) -#define NDSR_WRCMDREQ (0x1) - -#define NDCB0_AUTO_RS (0x1<<25) -#define NDCB0_CSEL (0x1<<24) -#define NDCB0_CMD_TYPE (0x7<<21) -#define NDCB0_NC (0x1<<20) -#define NDCB0_DBC (0x1<<19) -#define NDCB0_ADDR_CYC (0x7<<16) -#define NDCB0_CMD2 (0xff<<8) -#define NDCB0_CMD1 (0xff) -#define MCMEM(s) MCMEM0 -#define MCATT(s) MCATT0 -#define MCIO(s) MCIO0 -#define MECR_CIT (1 << 1)/* Card Is There: 0 -> no card, 1 -> card inserted */ - -/* Maximum values for NAND Interface Timing Registers in DFC clock - * periods */ -#define DFC_MAX_tCH 7 -#define DFC_MAX_tCS 7 -#define DFC_MAX_tWH 7 -#define DFC_MAX_tWP 7 -#define DFC_MAX_tRH 7 -#define DFC_MAX_tRP 15 -#define DFC_MAX_tR 65535 -#define DFC_MAX_tWHR 15 -#define DFC_MAX_tAR 15 - -#define DFC_CLOCK 104 /* DFC Clock is 104 MHz */ -#define DFC_CLK_PER_US DFC_CLOCK/1000 /* clock period in ns */ - -#else /* CONFIG_CPU_MONAHANS */ - -/* PXA2xx */ - -#define MEMC_BASE 0x48000000 /* Base of Memory Controller */ -#define MDCNFG_OFFSET 0x0 -#define MDREFR_OFFSET 0x4 -#define MSC0_OFFSET 0x8 -#define MSC1_OFFSET 0xC -#define MSC2_OFFSET 0x10 -#define MECR_OFFSET 0x14 -#define SXLCR_OFFSET 0x18 -#define SXCNFG_OFFSET 0x1C -#define FLYCNFG_OFFSET 0x20 -#define SXMRS_OFFSET 0x24 -#define MCMEM0_OFFSET 0x28 -#define MCMEM1_OFFSET 0x2C -#define MCATT0_OFFSET 0x30 -#define MCATT1_OFFSET 0x34 -#define MCIO0_OFFSET 0x38 -#define MCIO1_OFFSET 0x3C -#define MDMRS_OFFSET 0x40 - -#define MDCNFG 0x48000000 /* SDRAM Configuration Register 0 */ -#define MDCNFG_DE0 0x00000001 -#define MDCNFG_DE1 0x00000002 -#define MDCNFG_DE2 0x00010000 -#define MDCNFG_DE3 0x00020000 -#define MDCNFG_DWID0 0x00000004 - -#define MDREFR 0x48000004 /* SDRAM Refresh Control Register */ -#define MSC0 0x48000008 /* Static Memory Control Register 0 */ -#define MSC1 0x4800000C /* Static Memory Control Register 1 */ -#define MSC2 0x48000010 /* Static Memory Control Register 2 */ -#define MECR 0x48000014 /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */ -#define SXLCR 0x48000018 /* LCR value to be written to SDRAM-Timing Synchronous Flash */ -#define SXCNFG 0x4800001C /* Synchronous Static Memory Control Register */ -#define FLYCNFG 0x48000020 -#define SXMRS 0x48000024 /* MRS value to be written to Synchronous Flash or SMROM */ -#define MCMEM0 0x48000028 /* Card interface Common Memory Space Socket 0 Timing */ -#define MCMEM1 0x4800002C /* Card interface Common Memory Space Socket 1 Timing */ -#define MCATT0 0x48000030 /* Card interface Attribute Space Socket 0 Timing Configuration */ -#define MCATT1 0x48000034 /* Card interface Attribute Space Socket 1 Timing Configuration */ -#define MCIO0 0x48000038 /* Card interface I/O Space Socket 0 Timing Configuration */ -#define MCIO1 0x4800003C /* Card interface I/O Space Socket 1 Timing Configuration */ -#define MDMRS 0x48000040 /* MRS value to be written to SDRAM */ -#define BOOT_DEF 0x48000044 /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */ - -#define MDREFR_ALTREFA (1 << 31) /* Exiting Alternate Bus Master Mode Refresh Control */ -#define MDREFR_ALTREFB (1 << 30) /* Entering Alternate Bus Master Mode Refresh Control */ -#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */ -#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */ -#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */ -#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */ -#define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */ -#define MDREFR_APD (1 << 20) /* SDRAM/SSRAM Auto-Power-Down Enable */ -#define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */ -#define MDREFR_K2RUN (1 << 18) /* SDCLK2 Run Control/Status */ -#define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */ -#define MDREFR_K1RUN (1 << 16) /* SDCLK1 Run Control/Status */ -#define MDREFR_E1PIN (1 << 15) /* SDCKE1 Level Control/Status */ -#define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */ -#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */ -#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */ - -#if defined(CONFIG_CPU_PXA27X) - -#define ARB_CNTRL 0x48000048 /* Arbiter Control Register */ - -#define ARB_DMA_SLV_PARK (1<<31) /* Be parked with DMA slave when idle */ -#define ARB_CI_PARK (1<<30) /* Be parked with Camera Interface when idle */ -#define ARB_EX_MEM_PARK (1<<29) /* Be parked with external MEMC when idle */ -#define ARB_INT_MEM_PARK (1<<28) /* Be parked with internal MEMC when idle */ -#define ARB_USB_PARK (1<<27) /* Be parked with USB when idle */ -#define ARB_LCD_PARK (1<<26) /* Be parked with LCD when idle */ -#define ARB_DMA_PARK (1<<25) /* Be parked with DMA when idle */ -#define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ -#define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ - -#endif /* CONFIG_CPU_PXA27X */ - -/* LCD registers */ -#define LCCR4 0x44000010 /* LCD Controller Control Register 4 */ -#define LCCR5 0x44000014 /* LCD Controller Control Register 5 */ -#define FBR0 0x44000020 /* DMA Channel 0 Frame Branch Register */ -#define FBR1 0x44000024 /* DMA Channel 1 Frame Branch Register */ -#define FBR2 0x44000028 /* DMA Channel 2 Frame Branch Register */ -#define FBR3 0x4400002C /* DMA Channel 3 Frame Branch Register */ -#define FBR4 0x44000030 /* DMA Channel 4 Frame Branch Register */ -#define FDADR2 0x44000220 /* DMA Channel 2 Frame Descriptor Address Register */ -#define FSADR2 0x44000224 /* DMA Channel 2 Frame Source Address Register */ -#define FIDR2 0x44000228 /* DMA Channel 2 Frame ID Register */ -#define LDCMD2 0x4400022C /* DMA Channel 2 Command Register */ -#define FDADR3 0x44000230 /* DMA Channel 3 Frame Descriptor Address Register */ -#define FSADR3 0x44000234 /* DMA Channel 3 Frame Source Address Register */ -#define FIDR3 0x44000238 /* DMA Channel 3 Frame ID Register */ -#define LDCMD3 0x4400023C /* DMA Channel 3 Command Register */ -#define FDADR4 0x44000240 /* DMA Channel 4 Frame Descriptor Address Register */ -#define FSADR4 0x44000244 /* DMA Channel 4 Frame Source Address Register */ -#define FIDR4 0x44000248 /* DMA Channel 4 Frame ID Register */ -#define LDCMD4 0x4400024C /* DMA Channel 4 Command Register */ -#define FDADR5 0x44000250 /* DMA Channel 5 Frame Descriptor Address Register */ -#define FSADR5 0x44000254 /* DMA Channel 5 Frame Source Address Register */ -#define FIDR5 0x44000258 /* DMA Channel 5 Frame ID Register */ -#define LDCMD5 0x4400025C /* DMA Channel 5 Command Register */ - -#define OVL1C1 0x44000050 /* Overlay 1 Control Register 1 */ -#define OVL1C2 0x44000060 /* Overlay 1 Control Register 2 */ -#define OVL2C1 0x44000070 /* Overlay 2 Control Register 1 */ -#define OVL2C2 0x44000080 /* Overlay 2 Control Register 2 */ -#define CCR 0x44000090 /* Cursor Control Register */ - -#define FBR5 0x44000110 /* DMA Channel 5 Frame Branch Register */ -#define FBR6 0x44000114 /* DMA Channel 6 Frame Branch Register */ - -#define LCCR0_LDDALT (1<<26) /* LDD Alternate mapping bit when base pixel is RGBT16 */ -#define LCCR0_OUC (1<<25) /* Overlay Underlay Control Bit */ - -#define LCCR5_SOFM1 (1<<0) /* Start Of Frame Mask for Overlay 1 (channel 1) */ -#define LCCR5_SOFM2 (1<<1) /* Start Of Frame Mask for Overlay 2 (channel 2) */ -#define LCCR5_SOFM3 (1<<2) /* Start Of Frame Mask for Overlay 2 (channel 3) */ -#define LCCR5_SOFM4 (1<<3) /* Start Of Frame Mask for Overlay 2 (channel 4) */ -#define LCCR5_SOFM5 (1<<4) /* Start Of Frame Mask for cursor (channel 5) */ -#define LCCR5_SOFM6 (1<<5) /* Start Of Frame Mask for command data (channel 6) */ - -#define LCCR5_EOFM1 (1<<8) /* End Of Frame Mask for Overlay 1 (channel 1) */ -#define LCCR5_EOFM2 (1<<9) /* End Of Frame Mask for Overlay 2 (channel 2) */ -#define LCCR5_EOFM3 (1<<10) /* End Of Frame Mask for Overlay 2 (channel 3) */ -#define LCCR5_EOFM4 (1<<11) /* End Of Frame Mask for Overlay 2 (channel 4) */ -#define LCCR5_EOFM5 (1<<12) /* End Of Frame Mask for cursor (channel 5) */ -#define LCCR5_EOFM6 (1<<13) /* End Of Frame Mask for command data (channel 6) */ - -#define LCCR5_BSM1 (1<<16) /* Branch mask for Overlay 1 (channel 1) */ -#define LCCR5_BSM2 (1<<17) /* Branch mask for Overlay 2 (channel 2) */ -#define LCCR5_BSM3 (1<<18) /* Branch mask for Overlay 2 (channel 3) */ -#define LCCR5_BSM4 (1<<19) /* Branch mask for Overlay 2 (channel 4) */ -#define LCCR5_BSM5 (1<<20) /* Branch mask for cursor (channel 5) */ -#define LCCR5_BSM6 (1<<21) /* Branch mask for data command (channel 6) */ - -#define LCCR5_IUM1 (1<<24) /* Input FIFO Underrun Mask for Overlay 1 */ -#define LCCR5_IUM2 (1<<25) /* Input FIFO Underrun Mask for Overlay 2 */ -#define LCCR5_IUM3 (1<<26) /* Input FIFO Underrun Mask for Overlay 2 */ -#define LCCR5_IUM4 (1<<27) /* Input FIFO Underrun Mask for Overlay 2 */ -#define LCCR5_IUM5 (1<<28) /* Input FIFO Underrun Mask for cursor */ -#define LCCR5_IUM6 (1<<29) /* Input FIFO Underrun Mask for data command */ - -#define OVL1C1_O1EN (1<<31) /* Enable bit for Overlay 1 */ -#define OVL2C1_O2EN (1<<31) /* Enable bit for Overlay 2 */ -#define CCR_CEN (1<<31) /* Enable bit for Cursor */ - -/* Keypad controller */ - -#define KPC 0x41500000 /* Keypad Interface Control register */ -#define KPDK 0x41500008 /* Keypad Interface Direct Key register */ -#define KPREC 0x41500010 /* Keypad Intefcace Rotary Encoder register */ -#define KPMK 0x41500018 /* Keypad Intefcace Matrix Key register */ -#define KPAS 0x41500020 /* Keypad Interface Automatic Scan register */ -#define KPASMKP0 0x41500028 /* Keypad Interface Automatic Scan Multiple Key Presser register 0 */ -#define KPASMKP1 0x41500030 /* Keypad Interface Automatic Scan Multiple Key Presser register 1 */ -#define KPASMKP2 0x41500038 /* Keypad Interface Automatic Scan Multiple Key Presser register 2 */ -#define KPASMKP3 0x41500040 /* Keypad Interface Automatic Scan Multiple Key Presser register 3 */ -#define KPKDI 0x41500048 /* Keypad Interface Key Debounce Interval register */ - -#define KPC_AS (0x1 << 30) /* Automatic Scan bit */ -#define KPC_ASACT (0x1 << 29) /* Automatic Scan on Activity */ -#define KPC_MI (0x1 << 22) /* Matrix interrupt bit */ -#define KPC_IMKP (0x1 << 21) /* Ignore Multiple Key Press */ -#define KPC_MS7 (0x1 << 20) /* Matrix scan line 7 */ -#define KPC_MS6 (0x1 << 19) /* Matrix scan line 6 */ -#define KPC_MS5 (0x1 << 18) /* Matrix scan line 5 */ -#define KPC_MS4 (0x1 << 17) /* Matrix scan line 4 */ -#define KPC_MS3 (0x1 << 16) /* Matrix scan line 3 */ -#define KPC_MS2 (0x1 << 15) /* Matrix scan line 2 */ -#define KPC_MS1 (0x1 << 14) /* Matrix scan line 1 */ -#define KPC_MS0 (0x1 << 13) /* Matrix scan line 0 */ -#define KPC_ME (0x1 << 12) /* Matrix Keypad Enable */ -#define KPC_MIE (0x1 << 11) /* Matrix Interrupt Enable */ -#define KPC_DK_DEB_SEL (0x1 << 9) /* Direct Key Debounce select */ -#define KPC_DI (0x1 << 5) /* Direct key interrupt bit */ -#define KPC_DEE0 (0x1 << 2) /* Rotary Encoder 0 Enable */ -#define KPC_DE (0x1 << 1) /* Direct Keypad Enable */ -#define KPC_DIE (0x1 << 0) /* Direct Keypad interrupt Enable */ - -#define KPDK_DKP (0x1 << 31) -#define KPDK_DK7 (0x1 << 7) -#define KPDK_DK6 (0x1 << 6) -#define KPDK_DK5 (0x1 << 5) -#define KPDK_DK4 (0x1 << 4) -#define KPDK_DK3 (0x1 << 3) -#define KPDK_DK2 (0x1 << 2) -#define KPDK_DK1 (0x1 << 1) -#define KPDK_DK0 (0x1 << 0) - -#define KPREC_OF1 (0x1 << 31) -#define kPREC_UF1 (0x1 << 30) -#define KPREC_OF0 (0x1 << 15) -#define KPREC_UF0 (0x1 << 14) - -#define KPMK_MKP (0x1 << 31) -#define KPAS_SO (0x1 << 31) -#define KPASMKPx_SO (0x1 << 31) - -#define GPIO113_BIT (1 << 17)/* GPIO113 in GPSR, GPCR, bit 17 */ -#define PSLR 0x40F00034 -#define PSTR 0x40F00038 /* Power Manager Standby Configuration Reg */ -#define PSNR 0x40F0003C /* Power Manager Sense Configuration Reg */ -#define PVCR 0x40F00040 /* Power Manager Voltage Change Control Reg */ -#define PKWR 0x40F00050 /* Power Manager KB Wake-Up Enable Reg */ -#define PKSR 0x40F00054 /* Power Manager KB Level-Detect Status Reg */ -#define OSMR4 0x40A00080 /* */ -#define OSCR4 0x40A00040 /* OS Timer Counter Register */ -#define OMCR4 0x40A000C0 /* */ - -#endif /* CONFIG_CPU_PXA27X */ - -#endif /* _PXA_REGS_H_ */ diff --git a/arch/arm/include/asm/arch-pxa/pxa.h b/arch/arm/include/asm/arch-pxa/pxa.h deleted file mode 100644 index 428a848e1573..000000000000 --- a/arch/arm/include/asm/arch-pxa/pxa.h +++ /dev/null @@ -1,28 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * PXA common functions - * - * Copyright (C) 2011 Marek Vasut marek.vasut@gmail.com - */ - -#ifndef __PXA_H__ -#define __PXA_H__ - -#define PXA255_A0 0x00000106 -#define PXA250_C0 0x00000105 -#define PXA250_B2 0x00000104 -#define PXA250_B1 0x00000103 -#define PXA250_B0 0x00000102 -#define PXA250_A1 0x00000101 -#define PXA250_A0 0x00000100 -#define PXA210_C0 0x00000125 -#define PXA210_B2 0x00000124 -#define PXA210_B1 0x00000123 -#define PXA210_B0 0x00000122 - -int cpu_is_pxa25x(void); -int cpu_is_pxa27x(void); -uint32_t pxa_get_cpu_revision(void); -void pxa2xx_dram_init(void); - -#endif /* __PXA_H__ */ diff --git a/arch/arm/include/asm/arch-pxa/regs-mmc.h b/arch/arm/include/asm/arch-pxa/regs-mmc.h deleted file mode 100644 index 6d9a736d9c06..000000000000 --- a/arch/arm/include/asm/arch-pxa/regs-mmc.h +++ /dev/null @@ -1,140 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 Marek Vasut marek.vasut@gmail.com - */ - -#ifndef __REGS_MMC_H__ -#define __REGS_MMC_H__ - -#define MMC0_BASE 0x41100000 -#define MMC1_BASE 0x42000000 - -int pxa_mmc_register(int card_index); - -struct pxa_mmc_regs { - uint32_t strpcl; - uint32_t stat; - uint32_t clkrt; - uint32_t spi; - uint32_t cmdat; - uint32_t resto; - uint32_t rdto; - uint32_t blklen; - uint32_t nob; - uint32_t prtbuf; - uint32_t i_mask; - uint32_t i_reg; - uint32_t cmd; - uint32_t argh; - uint32_t argl; - uint32_t res; - uint32_t rxfifo; - uint32_t txfifo; -}; - -/* MMC_STRPCL */ -#define MMC_STRPCL_STOP_CLK (1 << 0) -#define MMC_STRPCL_START_CLK (1 << 1) - -/* MMC_STAT */ -#define MMC_STAT_END_CMD_RES (1 << 13) -#define MMC_STAT_PRG_DONE (1 << 12) -#define MMC_STAT_DATA_TRAN_DONE (1 << 11) -#define MMC_STAT_CLK_EN (1 << 8) -#define MMC_STAT_RECV_FIFO_FULL (1 << 7) -#define MMC_STAT_XMIT_FIFO_EMPTY (1 << 6) -#define MMC_STAT_RES_CRC_ERROR (1 << 5) -#define MMC_STAT_SPI_READ_ERROR_TOKEN (1 << 4) -#define MMC_STAT_CRC_READ_ERROR (1 << 3) -#define MMC_STAT_CRC_WRITE_ERROR (1 << 2) -#define MMC_STAT_TIME_OUT_RESPONSE (1 << 1) -#define MMC_STAT_READ_TIME_OUT (1 << 0) - -/* MMC_CLKRT */ -#define MMC_CLKRT_20MHZ 0 -#define MMC_CLKRT_10MHZ 1 -#define MMC_CLKRT_5MHZ 2 -#define MMC_CLKRT_2_5MHZ 3 -#define MMC_CLKRT_1_25MHZ 4 -#define MMC_CLKRT_0_625MHZ 5 -#define MMC_CLKRT_0_3125MHZ 6 - -/* MMC_SPI */ -#define MMC_SPI_EN (1 << 0) -#define MMC_SPI_CS_EN (1 << 2) -#define MMC_SPI_CS_ADDRESS (1 << 3) -#define MMC_SPI_CRC_ON (1 << 1) - -/* MMC_CMDAT */ -#define MMC_CMDAT_SD_4DAT (1 << 8) -#define MMC_CMDAT_MMC_DMA_EN (1 << 7) -#define MMC_CMDAT_INIT (1 << 6) -#define MMC_CMDAT_BUSY (1 << 5) -#define MMC_CMDAT_BCR (MMC_CMDAT_BUSY | MMC_CMDAT_INIT) -#define MMC_CMDAT_STREAM (1 << 4) -#define MMC_CMDAT_WRITE (1 << 3) -#define MMC_CMDAT_DATA_EN (1 << 2) -#define MMC_CMDAT_R0 0 -#define MMC_CMDAT_R1 1 -#define MMC_CMDAT_R2 2 -#define MMC_CMDAT_R3 3 - -/* MMC_RESTO */ -#define MMC_RES_TO_MAX_MASK 0x7f - -/* MMC_RDTO */ -#define MMC_READ_TO_MAX_MASK 0xffff - -/* MMC_BLKLEN */ -#define MMC_BLK_LEN_MAX_MASK 0x3ff - -/* MMC_PRTBUF */ -#define MMC_PRTBUF_BUF_PART_FULL (1 << 0) - -/* MMC_I_MASK */ -#define MMC_I_MASK_TXFIFO_WR_REQ (1 << 6) -#define MMC_I_MASK_RXFIFO_RD_REQ (1 << 5) -#define MMC_I_MASK_CLK_IS_OFF (1 << 4) -#define MMC_I_MASK_STOP_CMD (1 << 3) -#define MMC_I_MASK_END_CMD_RES (1 << 2) -#define MMC_I_MASK_PRG_DONE (1 << 1) -#define MMC_I_MASK_DATA_TRAN_DONE (1 << 0) -#define MMC_I_MASK_ALL 0x7f - - -/* MMC_I_REG */ -#define MMC_I_REG_TXFIFO_WR_REQ (1 << 6) -#define MMC_I_REG_RXFIFO_RD_REQ (1 << 5) -#define MMC_I_REG_CLK_IS_OFF (1 << 4) -#define MMC_I_REG_STOP_CMD (1 << 3) -#define MMC_I_REG_END_CMD_RES (1 << 2) -#define MMC_I_REG_PRG_DONE (1 << 1) -#define MMC_I_REG_DATA_TRAN_DONE (1 << 0) - -/* MMC_CMD */ -#define MMC_CMD_INDEX_MAX 0x6f - -#define MMC_R1_IDLE_STATE 0x01 -#define MMC_R1_ERASE_STATE 0x02 -#define MMC_R1_ILLEGAL_CMD 0x04 -#define MMC_R1_COM_CRC_ERR 0x08 -#define MMC_R1_ERASE_SEQ_ERR 0x01 -#define MMC_R1_ADDR_ERR 0x02 -#define MMC_R1_PARAM_ERR 0x04 - -#define MMC_R1B_WP_ERASE_SKIP 0x0002 -#define MMC_R1B_ERR 0x0004 -#define MMC_R1B_CC_ERR 0x0008 -#define MMC_R1B_CARD_ECC_ERR 0x0010 -#define MMC_R1B_WP_VIOLATION 0x0020 -#define MMC_R1B_ERASE_PARAM 0x0040 -#define MMC_R1B_OOR 0x0080 -#define MMC_R1B_IDLE_STATE 0x0100 -#define MMC_R1B_ERASE_RESET 0x0200 -#define MMC_R1B_ILLEGAL_CMD 0x0400 -#define MMC_R1B_COM_CRC_ERR 0x0800 -#define MMC_R1B_ERASE_SEQ_ERR 0x1000 -#define MMC_R1B_ADDR_ERR 0x2000 -#define MMC_R1B_PARAM_ERR 0x4000 - -#endif /* __REGS_MMC_H__ */ diff --git a/arch/arm/include/asm/arch-pxa/regs-uart.h b/arch/arm/include/asm/arch-pxa/regs-uart.h deleted file mode 100644 index bdd0a4757b53..000000000000 --- a/arch/arm/include/asm/arch-pxa/regs-uart.h +++ /dev/null @@ -1,95 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 Marek Vasut marek.vasut@gmail.com - */ - -#ifndef __REGS_UART_H__ -#define __REGS_UART_H__ - -#define FFUART_BASE 0x40100000 -#define BTUART_BASE 0x40200000 -#define STUART_BASE 0x40700000 -#define HWUART_BASE 0x41600000 - -struct pxa_uart_regs { - union { - uint32_t thr; - uint32_t rbr; - uint32_t dll; - }; - union { - uint32_t ier; - uint32_t dlh; - }; - union { - uint32_t fcr; - uint32_t iir; - }; - uint32_t lcr; - uint32_t mcr; - uint32_t lsr; - uint32_t msr; - uint32_t spr; - uint32_t isr; -}; - -#define IER_DMAE (1 << 7) -#define IER_UUE (1 << 6) -#define IER_NRZE (1 << 5) -#define IER_RTIOE (1 << 4) -#define IER_MIE (1 << 3) -#define IER_RLSE (1 << 2) -#define IER_TIE (1 << 1) -#define IER_RAVIE (1 << 0) - -#define IIR_FIFOES1 (1 << 7) -#define IIR_FIFOES0 (1 << 6) -#define IIR_TOD (1 << 3) -#define IIR_IID2 (1 << 2) -#define IIR_IID1 (1 << 1) -#define IIR_IP (1 << 0) - -#define FCR_ITL2 (1 << 7) -#define FCR_ITL1 (1 << 6) -#define FCR_RESETTF (1 << 2) -#define FCR_RESETRF (1 << 1) -#define FCR_TRFIFOE (1 << 0) -#define FCR_ITL_1 0 -#define FCR_ITL_8 (FCR_ITL1) -#define FCR_ITL_16 (FCR_ITL2) -#define FCR_ITL_32 (FCR_ITL2|FCR_ITL1) - -#define LCR_DLAB (1 << 7) -#define LCR_SB (1 << 6) -#define LCR_STKYP (1 << 5) -#define LCR_EPS (1 << 4) -#define LCR_PEN (1 << 3) -#define LCR_STB (1 << 2) -#define LCR_WLS1 (1 << 1) -#define LCR_WLS0 (1 << 0) - -#define LSR_FIFOE (1 << 7) -#define LSR_TEMT (1 << 6) -#define LSR_TDRQ (1 << 5) -#define LSR_BI (1 << 4) -#define LSR_FE (1 << 3) -#define LSR_PE (1 << 2) -#define LSR_OE (1 << 1) -#define LSR_DR (1 << 0) - -#define MCR_LOOP (1 << 4) -#define MCR_OUT2 (1 << 3) -#define MCR_OUT1 (1 << 2) -#define MCR_RTS (1 << 1) -#define MCR_DTR (1 << 0) - -#define MSR_DCD (1 << 7) -#define MSR_RI (1 << 6) -#define MSR_DSR (1 << 5) -#define MSR_CTS (1 << 4) -#define MSR_DDCD (1 << 3) -#define MSR_TERI (1 << 2) -#define MSR_DDSR (1 << 1) -#define MSR_DCTS (1 << 0) - -#endif /* __REGS_UART_H__ */ diff --git a/arch/arm/include/asm/arch-pxa/regs-usb.h b/arch/arm/include/asm/arch-pxa/regs-usb.h deleted file mode 100644 index e46887c9ed45..000000000000 --- a/arch/arm/include/asm/arch-pxa/regs-usb.h +++ /dev/null @@ -1,146 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * PXA25x UDC definitions - * - * Copyright (C) 2012 Łukasz Dałek luk0104@gmail.com - */ - -#ifndef __REGS_USB_H__ -#define __REGS_USB_H__ - -struct pxa25x_udc_regs { - /* UDC Control Register */ - uint32_t udccr; /* 0x000 */ - uint32_t reserved1; - - /* UDC Control Function Register */ - uint32_t udccfr; /* 0x008 */ - uint32_t reserved2; - - /* UDC Endpoint Control/Status Registers */ - uint32_t udccs[16]; /* 0x010 - 0x04c */ - - /* UDC Interrupt Control/Status Registers */ - uint32_t uicr0; /* 0x050 */ - uint32_t uicr1; /* 0x054 */ - uint32_t usir0; /* 0x058 */ - uint32_t usir1; /* 0x05c */ - - /* UDC Frame Number/Byte Count Registers */ - uint32_t ufnrh; /* 0x060 */ - uint32_t ufnrl; /* 0x064 */ - uint32_t ubcr2; /* 0x068 */ - uint32_t ubcr4; /* 0x06c */ - uint32_t ubcr7; /* 0x070 */ - uint32_t ubcr9; /* 0x074 */ - uint32_t ubcr12; /* 0x078 */ - uint32_t ubcr14; /* 0x07c */ - - /* UDC Endpoint Data Registers */ - uint32_t uddr0; /* 0x080 */ - uint32_t reserved3[7]; - uint32_t uddr5; /* 0x0a0 */ - uint32_t reserved4[7]; - uint32_t uddr10; /* 0x0c0 */ - uint32_t reserved5[7]; - uint32_t uddr15; /* 0x0e0 */ - uint32_t reserved6[7]; - uint32_t uddr1; /* 0x100 */ - uint32_t reserved7[31]; - uint32_t uddr2; /* 0x180 */ - uint32_t reserved8[31]; - uint32_t uddr3; /* 0x200 */ - uint32_t reserved9[127]; - uint32_t uddr4; /* 0x400 */ - uint32_t reserved10[127]; - uint32_t uddr6; /* 0x600 */ - uint32_t reserved11[31]; - uint32_t uddr7; /* 0x680 */ - uint32_t reserved12[31]; - uint32_t uddr8; /* 0x700 */ - uint32_t reserved13[127]; - uint32_t uddr9; /* 0x900 */ - uint32_t reserved14[127]; - uint32_t uddr11; /* 0xb00 */ - uint32_t reserved15[31]; - uint32_t uddr12; /* 0xb80 */ - uint32_t reserved16[31]; - uint32_t uddr13; /* 0xc00 */ - uint32_t reserved17[127]; - uint32_t uddr14; /* 0xe00 */ - -}; - -#define PXA25X_UDC_BASE 0x40600000 - -#define UDCCR_UDE (1 << 0) -#define UDCCR_UDA (1 << 1) -#define UDCCR_RSM (1 << 2) -#define UDCCR_RESIR (1 << 3) -#define UDCCR_SUSIR (1 << 4) -#define UDCCR_SRM (1 << 5) -#define UDCCR_RSTIR (1 << 6) -#define UDCCR_REM (1 << 7) - -/* Bulk IN endpoint 1/6/11 */ -#define UDCCS_BI_TSP (1 << 7) -#define UDCCS_BI_FST (1 << 5) -#define UDCCS_BI_SST (1 << 4) -#define UDCCS_BI_TUR (1 << 3) -#define UDCCS_BI_FTF (1 << 2) -#define UDCCS_BI_TPC (1 << 1) -#define UDCCS_BI_TFS (1 << 0) - -/* Bulk OUT endpoint 2/7/12 */ -#define UDCCS_BO_RSP (1 << 7) -#define UDCCS_BO_RNE (1 << 6) -#define UDCCS_BO_FST (1 << 5) -#define UDCCS_BO_SST (1 << 4) -#define UDCCS_BO_DME (1 << 3) -#define UDCCS_BO_RPC (1 << 1) -#define UDCCS_BO_RFS (1 << 0) - -/* Isochronous OUT endpoint 4/9/14 */ -#define UDCCS_IO_RSP (1 << 7) -#define UDCCS_IO_RNE (1 << 6) -#define UDCCS_IO_DME (1 << 3) -#define UDCCS_IO_ROF (1 << 2) -#define UDCCS_IO_RPC (1 << 1) -#define UDCCS_IO_RFS (1 << 0) - -/* Control endpoint 0 */ -#define UDCCS0_OPR (1 << 0) -#define UDCCS0_IPR (1 << 1) -#define UDCCS0_FTF (1 << 2) -#define UDCCS0_DRWF (1 << 3) -#define UDCCS0_SST (1 << 4) -#define UDCCS0_FST (1 << 5) -#define UDCCS0_RNE (1 << 6) -#define UDCCS0_SA (1 << 7) - -#define UICR0_IM0 (1 << 0) - -#define USIR0_IR0 (1 << 0) -#define USIR0_IR1 (1 << 1) -#define USIR0_IR2 (1 << 2) -#define USIR0_IR3 (1 << 3) -#define USIR0_IR4 (1 << 4) -#define USIR0_IR5 (1 << 5) -#define USIR0_IR6 (1 << 6) -#define USIR0_IR7 (1 << 7) - -#define UDCCFR_AREN (1 << 7) /* ACK response enable (now) */ -#define UDCCFR_ACM (1 << 2) /* ACK control mode (wait for AREN) */ -/* - * Intel(R) PXA255 Processor Specification, September 2003 (page 31) - * define new "must be one" bits in UDCCFR (see Table 12-13.) - */ -#define UDCCFR_MB1 (0xff & ~(UDCCFR_AREN | UDCCFR_ACM)) - -#define UFNRH_SIR (1 << 7) /* SOF interrupt request */ -#define UFNRH_SIM (1 << 6) /* SOF interrupt mask */ -#define UFNRH_IPE14 (1 << 5) /* ISO packet error, ep14 */ -#define UFNRH_IPE9 (1 << 4) /* ISO packet error, ep9 */ -#define UFNRH_IPE4 (1 << 3) /* ISO packet error, ep4 */ - -#endif /* __REGS_USB_H__ */ diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index 26f187779142..be44b7676429 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_BOOT_RAMDISK_HIGH
#if defined(CONFIG_ARCH_LS1021A) || \ - defined(CONFIG_CPU_PXA27X) || \ - defined(CONFIG_CPU_MONAHANS) || \ defined(CONFIG_FSL_LAYERSCAPE) #include <asm/arch/config.h> #endif diff --git a/doc/develop/driver-model/serial-howto.rst b/doc/develop/driver-model/serial-howto.rst index 8af79a90f46a..9da0e57eab69 100644 --- a/doc/develop/driver-model/serial-howto.rst +++ b/doc/develop/driver-model/serial-howto.rst @@ -3,15 +3,6 @@ How to port a serial driver to driver model ===========================================
-Almost all of the serial drivers have been converted as at January 2016. These -ones remain: - - * serial_bfin.c - * serial_pxa.c - -The deadline for this work was the end of January 2016. If no one steps -forward to convert these, at some point there may come a patch to remove them! - Here is a suggested approach for converting your serial driver over to driver model. Please feel free to update this file with your ideas and suggestions.
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 9f8319c84602..0c317311f641 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -346,14 +346,6 @@ config MVEBU_MMC
If unsure, say N.
-config PXA_MMC_GENERIC - bool "Support for MMC controllers on PXA" - help - This selects MMC controllers on PXA. - If you are on a PXA architecture, say Y here. - - If unsure, say N. - config MMC_OMAP_HS bool "TI OMAP High Speed Multimedia Card Interface support" select DM_REGULATOR_PBIAS if DM_MMC && DM_REGULATOR diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 962750930229..7c4243289c4d 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -46,7 +46,6 @@ obj-$(CONFIG_MMC_MXS) += mxsmmc.o obj-$(CONFIG_MMC_OCTEONTX) += octeontx_hsmmc.o obj-$(CONFIG_MMC_OWL) += owl_mmc.o obj-$(CONFIG_MMC_PCI) += pci_mmc.o -obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o obj-$(CONFIG_$(SPL_TPL_)SUPPORT_EMMC_RPMB) += rpmb.o obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c deleted file mode 100644 index a0e1a76d5716..000000000000 --- a/drivers/mmc/pxa_mmc_gen.c +++ /dev/null @@ -1,531 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2010 Marek Vasut marek.vasut@gmail.com - * - * Modified to add driver model (DM) support - * Copyright (C) 2019 Marcel Ziswiler marcel@ziswiler.com - * - * Loosely based on the old code and Linux's PXA MMC driver - */ - -#include <common.h> -#include <asm/arch/hardware.h> -#include <asm/arch/regs-mmc.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <asm/io.h> -#include <dm.h> -#include <dm/platform_data/pxa_mmc_gen.h> -#include <malloc.h> -#include <mmc.h> - -/* PXAMMC Generic default config for various CPUs */ -#if defined(CONFIG_CPU_PXA27X) -#define PXAMMC_CRC_SKIP -#define PXAMMC_FIFO_SIZE 32 -#define PXAMMC_MIN_SPEED 304000 -#define PXAMMC_MAX_SPEED 19500000 -#define PXAMMC_HOST_CAPS (MMC_MODE_4BIT) -#elif defined(CONFIG_CPU_MONAHANS) -#define PXAMMC_FIFO_SIZE 32 -#define PXAMMC_MIN_SPEED 304000 -#define PXAMMC_MAX_SPEED 26000000 -#define PXAMMC_HOST_CAPS (MMC_MODE_4BIT | MMC_MODE_HS) -#else -#error "This CPU isn't supported by PXA MMC!" -#endif - -#define MMC_STAT_ERRORS \ - (MMC_STAT_RES_CRC_ERROR | MMC_STAT_SPI_READ_ERROR_TOKEN | \ - MMC_STAT_CRC_READ_ERROR | MMC_STAT_TIME_OUT_RESPONSE | \ - MMC_STAT_READ_TIME_OUT | MMC_STAT_CRC_WRITE_ERROR) - -/* 1 millisecond (in wait cycles below it's 100 x 10uS waits) */ -#define PXA_MMC_TIMEOUT 100 - -struct pxa_mmc_priv { - struct pxa_mmc_regs *regs; -}; - -/* Wait for bit to be set */ -static int pxa_mmc_wait(struct mmc *mmc, uint32_t mask) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - unsigned int timeout = PXA_MMC_TIMEOUT; - - /* Wait for bit to be set */ - while (--timeout) { - if (readl(®s->stat) & mask) - break; - udelay(10); - } - - if (!timeout) - return -ETIMEDOUT; - - return 0; -} - -static int pxa_mmc_stop_clock(struct mmc *mmc) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - unsigned int timeout = PXA_MMC_TIMEOUT; - - /* If the clock aren't running, exit */ - if (!(readl(®s->stat) & MMC_STAT_CLK_EN)) - return 0; - - /* Tell the controller to turn off the clock */ - writel(MMC_STRPCL_STOP_CLK, ®s->strpcl); - - /* Wait until the clock are off */ - while (--timeout) { - if (!(readl(®s->stat) & MMC_STAT_CLK_EN)) - break; - udelay(10); - } - - /* The clock refused to stop, scream and die a painful death */ - if (!timeout) - return -ETIMEDOUT; - - /* The clock stopped correctly */ - return 0; -} - -static int pxa_mmc_start_cmd(struct mmc *mmc, struct mmc_cmd *cmd, - uint32_t cmdat) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - int ret; - - /* The card can send a "busy" response */ - if (cmd->resp_type & MMC_RSP_BUSY) - cmdat |= MMC_CMDAT_BUSY; - - /* Inform the controller about response type */ - switch (cmd->resp_type) { - case MMC_RSP_R1: - case MMC_RSP_R1b: - cmdat |= MMC_CMDAT_R1; - break; - case MMC_RSP_R2: - cmdat |= MMC_CMDAT_R2; - break; - case MMC_RSP_R3: - cmdat |= MMC_CMDAT_R3; - break; - default: - break; - } - - /* Load command and it's arguments into the controller */ - writel(cmd->cmdidx, ®s->cmd); - writel(cmd->cmdarg >> 16, ®s->argh); - writel(cmd->cmdarg & 0xffff, ®s->argl); - writel(cmdat, ®s->cmdat); - - /* Start the controller clock and wait until they are started */ - writel(MMC_STRPCL_START_CLK, ®s->strpcl); - - ret = pxa_mmc_wait(mmc, MMC_STAT_CLK_EN); - if (ret) - return ret; - - /* Correct and happy end */ - return 0; -} - -static int pxa_mmc_cmd_done(struct mmc *mmc, struct mmc_cmd *cmd) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - u32 a, b, c; - int i; - int stat; - - /* Read the controller status */ - stat = readl(®s->stat); - - /* - * Linux says: - * Did I mention this is Sick. We always need to - * discard the upper 8 bits of the first 16-bit word. - */ - a = readl(®s->res) & 0xffff; - for (i = 0; i < 4; i++) { - b = readl(®s->res) & 0xffff; - c = readl(®s->res) & 0xffff; - cmd->response[i] = (a << 24) | (b << 8) | (c >> 8); - a = c; - } - - /* The command response didn't arrive */ - if (stat & MMC_STAT_TIME_OUT_RESPONSE) { - return -ETIMEDOUT; - } else if (stat & MMC_STAT_RES_CRC_ERROR && - cmd->resp_type & MMC_RSP_CRC) { -#ifdef PXAMMC_CRC_SKIP - if (cmd->resp_type & MMC_RSP_136 && - cmd->response[0] & (1 << 31)) - printf("Ignoring CRC, this may be dangerous!\n"); - else -#endif - return -EILSEQ; - } - - /* The command response was successfully read */ - return 0; -} - -static int pxa_mmc_do_read_xfer(struct mmc *mmc, struct mmc_data *data) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - u32 len; - u32 *buf = (uint32_t *)data->dest; - int size; - int ret; - - len = data->blocks * data->blocksize; - - while (len) { - /* The controller has data ready */ - if (readl(®s->i_reg) & MMC_I_REG_RXFIFO_RD_REQ) { - size = min(len, (uint32_t)PXAMMC_FIFO_SIZE); - len -= size; - size /= 4; - - /* Read data into the buffer */ - while (size--) - *buf++ = readl(®s->rxfifo); - } - - if (readl(®s->stat) & MMC_STAT_ERRORS) - return -EIO; - } - - /* Wait for the transmission-done interrupt */ - ret = pxa_mmc_wait(mmc, MMC_STAT_DATA_TRAN_DONE); - if (ret) - return ret; - - return 0; -} - -static int pxa_mmc_do_write_xfer(struct mmc *mmc, struct mmc_data *data) -{ - struct pxa_mmc_priv *priv = mmc->priv; - struct pxa_mmc_regs *regs = priv->regs; - u32 len; - u32 *buf = (uint32_t *)data->src; - int size; - int ret; - - len = data->blocks * data->blocksize; - - while (len) { - /* The controller is ready to receive data */ - if (readl(®s->i_reg) & MMC_I_REG_TXFIFO_WR_REQ) { - size = min(len, (uint32_t)PXAMMC_FIFO_SIZE); - len -= size; - size /= 4; - - while (size--) - writel(*buf++, ®s->txfifo); - - if (min(len, (uint32_t)PXAMMC_FIFO_SIZE) < 32) - writel(MMC_PRTBUF_BUF_PART_FULL, ®s->prtbuf); - } - - if (readl(®s->stat) & MMC_STAT_ERRORS) - return -EIO; - } - - /* Wait for the transmission-done interrupt */ - ret = pxa_mmc_wait(mmc, MMC_STAT_DATA_TRAN_DONE); - if (ret) - return ret; - - /* Wait until the data are really written to the card */ - ret = pxa_mmc_wait(mmc, MMC_STAT_PRG_DONE); - if (ret) - return ret; - - return 0; -} - -static int pxa_mmc_send_cmd_common(struct pxa_mmc_priv *priv, struct mmc *mmc, - struct mmc_cmd *cmd, struct mmc_data *data) -{ - struct pxa_mmc_regs *regs = priv->regs; - u32 cmdat = 0; - int ret; - - /* Stop the controller */ - ret = pxa_mmc_stop_clock(mmc); - if (ret) - return ret; - - /* If we're doing data transfer, configure the controller accordingly */ - if (data) { - writel(data->blocks, ®s->nob); - writel(data->blocksize, ®s->blklen); - /* This delay can be optimized, but stick with max value */ - writel(0xffff, ®s->rdto); - cmdat |= MMC_CMDAT_DATA_EN; - if (data->flags & MMC_DATA_WRITE) - cmdat |= MMC_CMDAT_WRITE; - } - - /* Run in 4bit mode if the card can do it */ - if (mmc->bus_width == 4) - cmdat |= MMC_CMDAT_SD_4DAT; - - /* Execute the command */ - ret = pxa_mmc_start_cmd(mmc, cmd, cmdat); - if (ret) - return ret; - - /* Wait until the command completes */ - ret = pxa_mmc_wait(mmc, MMC_STAT_END_CMD_RES); - if (ret) - return ret; - - /* Read back the result */ - ret = pxa_mmc_cmd_done(mmc, cmd); - if (ret) - return ret; - - /* In case there was a data transfer scheduled, do it */ - if (data) { - if (data->flags & MMC_DATA_WRITE) - pxa_mmc_do_write_xfer(mmc, data); - else - pxa_mmc_do_read_xfer(mmc, data); - } - - return 0; -} - -static int pxa_mmc_set_ios_common(struct pxa_mmc_priv *priv, struct mmc *mmc) -{ - struct pxa_mmc_regs *regs = priv->regs; - u32 tmp; - u32 pxa_mmc_clock; - - if (!mmc->clock) { - pxa_mmc_stop_clock(mmc); - return 0; - } - - /* PXA3xx can do 26MHz with special settings. */ - if (mmc->clock == 26000000) { - writel(0x7, ®s->clkrt); - return 0; - } - - /* Set clock to the card the usual way. */ - pxa_mmc_clock = 0; - tmp = mmc->cfg->f_max / mmc->clock; - tmp += tmp % 2; - - while (tmp > 1) { - pxa_mmc_clock++; - tmp >>= 1; - } - - writel(pxa_mmc_clock, ®s->clkrt); - - return 0; -} - -static int pxa_mmc_init_common(struct pxa_mmc_priv *priv, struct mmc *mmc) -{ - struct pxa_mmc_regs *regs = priv->regs; - - /* Make sure the clock are stopped */ - pxa_mmc_stop_clock(mmc); - - /* Turn off SPI mode */ - writel(0, ®s->spi); - - /* Set up maximum timeout to wait for command response */ - writel(MMC_RES_TO_MAX_MASK, ®s->resto); - - /* Mask all interrupts */ - writel(~(MMC_I_MASK_TXFIFO_WR_REQ | MMC_I_MASK_RXFIFO_RD_REQ), - ®s->i_mask); - - return 0; -} - -#if !CONFIG_IS_ENABLED(DM_MMC) -static int pxa_mmc_init(struct mmc *mmc) -{ - struct pxa_mmc_priv *priv = mmc->priv; - - return pxa_mmc_init_common(priv, mmc); -} - -static int pxa_mmc_request(struct mmc *mmc, struct mmc_cmd *cmd, - struct mmc_data *data) -{ - struct pxa_mmc_priv *priv = mmc->priv; - - return pxa_mmc_send_cmd_common(priv, mmc, cmd, data); -} - -static int pxa_mmc_set_ios(struct mmc *mmc) -{ - struct pxa_mmc_priv *priv = mmc->priv; - - return pxa_mmc_set_ios_common(priv, mmc); -} - -static const struct mmc_ops pxa_mmc_ops = { - .send_cmd = pxa_mmc_request, - .set_ios = pxa_mmc_set_ios, - .init = pxa_mmc_init, -}; - -static struct mmc_config pxa_mmc_cfg = { - .name = "PXA MMC", - .ops = &pxa_mmc_ops, - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .f_max = PXAMMC_MAX_SPEED, - .f_min = PXAMMC_MIN_SPEED, - .host_caps = PXAMMC_HOST_CAPS, - .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, -}; - -int pxa_mmc_register(int card_index) -{ - struct mmc *mmc; - struct pxa_mmc_priv *priv; - u32 reg; - int ret = -ENOMEM; - - priv = malloc(sizeof(struct pxa_mmc_priv)); - if (!priv) - goto err0; - - memset(priv, 0, sizeof(*priv)); - - switch (card_index) { - case 0: - priv->regs = (struct pxa_mmc_regs *)MMC0_BASE; - break; - case 1: - priv->regs = (struct pxa_mmc_regs *)MMC1_BASE; - break; - default: - ret = -EINVAL; - printf("PXA MMC: Invalid MMC controller ID (card_index = %d)\n", - card_index); - goto err1; - } - -#ifndef CONFIG_CPU_MONAHANS /* PXA2xx */ - reg = readl(CKEN); - reg |= CKEN12_MMC; - writel(reg, CKEN); -#else /* PXA3xx */ - reg = readl(CKENA); - reg |= CKENA_12_MMC0 | CKENA_13_MMC1; - writel(reg, CKENA); -#endif - - mmc = mmc_create(&pxa_mmc_cfg, priv); - if (!mmc) - goto err1; - - return 0; - -err1: - free(priv); -err0: - return ret; -} -#else /* !CONFIG_IS_ENABLED(DM_MMC) */ -static int pxa_mmc_probe(struct udevice *dev) -{ - struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); - struct pxa_mmc_plat *plat = dev_get_plat(dev); - struct mmc_config *cfg = &plat->cfg; - struct mmc *mmc = &plat->mmc; - struct pxa_mmc_priv *priv = dev_get_priv(dev); - u32 reg; - - upriv->mmc = mmc; - - cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; - cfg->f_max = PXAMMC_MAX_SPEED; - cfg->f_min = PXAMMC_MIN_SPEED; - cfg->host_caps = PXAMMC_HOST_CAPS; - cfg->name = dev->name; - cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; - - mmc->priv = priv; - - priv->regs = plat->base; - -#ifndef CONFIG_CPU_MONAHANS /* PXA2xx */ - reg = readl(CKEN); - reg |= CKEN12_MMC; - writel(reg, CKEN); -#else /* PXA3xx */ - reg = readl(CKENA); - reg |= CKENA_12_MMC0 | CKENA_13_MMC1; - writel(reg, CKENA); -#endif - - return pxa_mmc_init_common(priv, mmc); -} - -static int pxa_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, - struct mmc_data *data) -{ - struct pxa_mmc_plat *plat = dev_get_plat(dev); - struct pxa_mmc_priv *priv = dev_get_priv(dev); - - return pxa_mmc_send_cmd_common(priv, &plat->mmc, cmd, data); -} - -static int pxa_mmc_set_ios(struct udevice *dev) -{ - struct pxa_mmc_plat *plat = dev_get_plat(dev); - struct pxa_mmc_priv *priv = dev_get_priv(dev); - - return pxa_mmc_set_ios_common(priv, &plat->mmc); -} - -static const struct dm_mmc_ops pxa_mmc_ops = { - .get_cd = NULL, - .send_cmd = pxa_mmc_send_cmd, - .set_ios = pxa_mmc_set_ios, -}; - -#if CONFIG_IS_ENABLED(BLK) -static int pxa_mmc_bind(struct udevice *dev) -{ - struct pxa_mmc_plat *plat = dev_get_plat(dev); - - return mmc_bind(dev, &plat->mmc, &plat->cfg); -} -#endif - -U_BOOT_DRIVER(pxa_mmc) = { -#if CONFIG_IS_ENABLED(BLK) - .bind = pxa_mmc_bind, -#endif - .id = UCLASS_MMC, - .name = "pxa_mmc", - .ops = &pxa_mmc_ops, - .priv_auto = sizeof(struct pxa_mmc_priv), - .probe = pxa_mmc_probe, -}; -#endif /* !CONFIG_IS_ENABLED(DM_MMC) */ diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 45c284a408d8..323a1da94929 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -936,12 +936,6 @@ config OWL_SERIAL serial port, say Y to this option. If unsure, say N. Single baudrate is supported in current implementation (115200).
-config PXA_SERIAL - bool "PXA serial port support" - help - If you have a machine based on a Marvell XScale PXA2xx CPU you - can enable its onboard serial ports by enabling this option. - config HTIF_CONSOLE bool "RISC-V HTIF console support" depends on DM_SERIAL && 64BIT diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 51de06a78c58..eb7b8f23ee90 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -43,7 +43,6 @@ obj-$(CONFIG_MCFUART) += serial_mcf.o obj-$(CONFIG_SYS_NS16550) += ns16550.o obj-$(CONFIG_S5P_SERIAL) += serial_s5p.o obj-$(CONFIG_MXC_UART) += serial_mxc.o -obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o obj-$(CONFIG_MESON_SERIAL) += serial_meson.o obj-$(CONFIG_INTEL_MID_SERIAL) += serial_intel_mid.o obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c deleted file mode 100644 index aa928efdc008..000000000000 --- a/drivers/serial/serial_pxa.c +++ /dev/null @@ -1,342 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2011 Marek Vasut marek.vasut@gmail.com - * - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger mgroeger@sysgo.de - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke azu@sysgo.de - * - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) - * - * Modified to add driver model (DM) support - * (C) Copyright 2016 Marcel Ziswiler marcel.ziswiler@toradex.com - */ - -#include <common.h> -#include <hang.h> -#include <asm/arch/pxa-regs.h> -#include <asm/arch/regs-uart.h> -#include <asm/global_data.h> -#include <asm/io.h> -#include <dm.h> -#include <dm/platform_data/serial_pxa.h> -#include <linux/compiler.h> -#include <serial.h> -#include <watchdog.h> - -DECLARE_GLOBAL_DATA_PTR; - -static uint32_t pxa_uart_get_baud_divider(int baudrate) -{ - return 921600 / baudrate; -} - -static void pxa_uart_toggle_clock(uint32_t uart_index, int enable) -{ - uint32_t clk_reg, clk_offset, reg; - - clk_reg = UART_CLK_REG; - clk_offset = UART_CLK_BASE << uart_index; - - reg = readl(clk_reg); - - if (enable) - reg |= clk_offset; - else - reg &= ~clk_offset; - - writel(reg, clk_reg); -} - -/* - * Enable clock and set baud rate, parity etc. - */ -void pxa_setbrg_common(struct pxa_uart_regs *uart_regs, int port, int baudrate) -{ - uint32_t divider = pxa_uart_get_baud_divider(baudrate); - if (!divider) - hang(); - - - pxa_uart_toggle_clock(port, 1); - - /* Disable interrupts and FIFOs */ - writel(0, &uart_regs->ier); - writel(0, &uart_regs->fcr); - - /* Set baud rate */ - writel(LCR_WLS0 | LCR_WLS1 | LCR_DLAB, &uart_regs->lcr); - writel(divider & 0xff, &uart_regs->dll); - writel(divider >> 8, &uart_regs->dlh); - writel(LCR_WLS0 | LCR_WLS1, &uart_regs->lcr); - - /* Enable UART */ - writel(IER_UUE, &uart_regs->ier); -} - -#ifndef CONFIG_DM_SERIAL -static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index) -{ - switch (uart_index) { - case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE; - case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE; - case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE; - default: - return NULL; - } -} - -/* - * Enable clock and set baud rate, parity etc. - */ -void pxa_setbrg_dev(uint32_t uart_index) -{ - struct pxa_uart_regs *uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - panic("Failed getting UART registers\n"); - - pxa_setbrg_common(uart_regs, uart_index, gd->baudrate); -} - -/* - * Initialise the serial port with the given baudrate. The settings - * are always 8 data bits, no parity, 1 stop bit, no start bits. - */ -int pxa_init_dev(unsigned int uart_index) -{ - pxa_setbrg_dev(uart_index); - return 0; -} - -/* - * Output a single byte to the serial port. - */ -void pxa_putc_dev(unsigned int uart_index, const char c) -{ - struct pxa_uart_regs *uart_regs; - - /* If \n, also do \r */ - if (c == '\n') - pxa_putc_dev(uart_index, '\r'); - - uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - hang(); - - while (!(readl(&uart_regs->lsr) & LSR_TEMT)) - WATCHDOG_RESET(); - writel(c, &uart_regs->thr); -} - -/* - * Read a single byte from the serial port. Returns 1 on success, 0 - * otherwise. When the function is succesfull, the character read is - * written into its argument c. - */ -int pxa_tstc_dev(unsigned int uart_index) -{ - struct pxa_uart_regs *uart_regs; - - uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - return -1; - - return readl(&uart_regs->lsr) & LSR_DR; -} - -/* - * Read a single byte from the serial port. Returns 1 on success, 0 - * otherwise. When the function is succesfull, the character read is - * written into its argument c. - */ -int pxa_getc_dev(unsigned int uart_index) -{ - struct pxa_uart_regs *uart_regs; - - uart_regs = pxa_uart_index_to_regs(uart_index); - if (!uart_regs) - return -1; - - while (!(readl(&uart_regs->lsr) & LSR_DR)) - WATCHDOG_RESET(); - return readl(&uart_regs->rbr) & 0xff; -} - -void pxa_puts_dev(unsigned int uart_index, const char *s) -{ - while (*s) - pxa_putc_dev(uart_index, *s++); -} - -#define pxa_uart(uart, UART) \ - int uart##_init(void) \ - { \ - return pxa_init_dev(UART##_INDEX); \ - } \ - \ - void uart##_setbrg(void) \ - { \ - return pxa_setbrg_dev(UART##_INDEX); \ - } \ - \ - void uart##_putc(const char c) \ - { \ - return pxa_putc_dev(UART##_INDEX, c); \ - } \ - \ - void uart##_puts(const char *s) \ - { \ - return pxa_puts_dev(UART##_INDEX, s); \ - } \ - \ - int uart##_getc(void) \ - { \ - return pxa_getc_dev(UART##_INDEX); \ - } \ - \ - int uart##_tstc(void) \ - { \ - return pxa_tstc_dev(UART##_INDEX); \ - } \ - -#define pxa_uart_desc(uart) \ - struct serial_device serial_##uart##_device = \ - { \ - .name = "serial_"#uart, \ - .start = uart##_init, \ - .stop = NULL, \ - .setbrg = uart##_setbrg, \ - .getc = uart##_getc, \ - .tstc = uart##_tstc, \ - .putc = uart##_putc, \ - .puts = uart##_puts, \ - }; - -#define pxa_uart_multi(uart, UART) \ - pxa_uart(uart, UART) \ - pxa_uart_desc(uart) - -#if defined(CONFIG_HWUART) - pxa_uart_multi(hwuart, HWUART) -#endif -#if defined(CONFIG_STUART) - pxa_uart_multi(stuart, STUART) -#endif -#if defined(CONFIG_FFUART) - pxa_uart_multi(ffuart, FFUART) -#endif -#if defined(CONFIG_BTUART) - pxa_uart_multi(btuart, BTUART) -#endif - -__weak struct serial_device *default_serial_console(void) -{ -#if CONFIG_CONS_INDEX == 1 - return &serial_hwuart_device; -#elif CONFIG_CONS_INDEX == 2 - return &serial_stuart_device; -#elif CONFIG_CONS_INDEX == 3 - return &serial_ffuart_device; -#elif CONFIG_CONS_INDEX == 4 - return &serial_btuart_device; -#else -#error "Bad CONFIG_CONS_INDEX." -#endif -} - -void pxa_serial_initialize(void) -{ -#if defined(CONFIG_FFUART) - serial_register(&serial_ffuart_device); -#endif -#if defined(CONFIG_BTUART) - serial_register(&serial_btuart_device); -#endif -#if defined(CONFIG_STUART) - serial_register(&serial_stuart_device); -#endif -} -#endif /* CONFIG_DM_SERIAL */ - -#ifdef CONFIG_DM_SERIAL -static int pxa_serial_probe(struct udevice *dev) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - - pxa_setbrg_common((struct pxa_uart_regs *)plat->base, plat->port, - plat->baudrate); - return 0; -} - -static int pxa_serial_putc(struct udevice *dev, const char ch) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; - - /* Wait for last character to go. */ - if (!(readl(&uart_regs->lsr) & LSR_TEMT)) - return -EAGAIN; - - writel(ch, &uart_regs->thr); - - return 0; -} - -static int pxa_serial_getc(struct udevice *dev) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; - - /* Wait for a character to arrive. */ - if (!(readl(&uart_regs->lsr) & LSR_DR)) - return -EAGAIN; - - return readl(&uart_regs->rbr) & 0xff; -} - -int pxa_serial_setbrg(struct udevice *dev, int baudrate) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; - int port = plat->port; - - pxa_setbrg_common(uart_regs, port, baudrate); - - return 0; -} - -static int pxa_serial_pending(struct udevice *dev, bool input) -{ - struct pxa_serial_plat *plat = dev_get_plat(dev); - struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; - - if (input) - return readl(&uart_regs->lsr) & LSR_DR ? 1 : 0; - else - return readl(&uart_regs->lsr) & LSR_TEMT ? 0 : 1; - - return 0; -} - -static const struct dm_serial_ops pxa_serial_ops = { - .putc = pxa_serial_putc, - .pending = pxa_serial_pending, - .getc = pxa_serial_getc, - .setbrg = pxa_serial_setbrg, -}; - -U_BOOT_DRIVER(serial_pxa) = { - .name = "serial_pxa", - .id = UCLASS_SERIAL, - .probe = pxa_serial_probe, - .ops = &pxa_serial_ops, - .flags = DM_FLAG_PRE_RELOC, -}; -#endif /* CONFIG_DM_SERIAL */ diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h index 05b3c01e5fc1..0d89fc085fb5 100644 --- a/drivers/serial/usbtty.h +++ b/drivers/serial/usbtty.h @@ -13,8 +13,6 @@ #include <usbdevice.h> #if defined(CONFIG_PPC) #include <usb/mpc8xx_udc.h> -#elif defined(CONFIG_CPU_PXA27X) -#include <usb/pxa27x_udc.h> #elif defined(CONFIG_DW_UDC) #include <usb/designware_udc.h> #elif defined(CONFIG_CI_UDC) diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index d8de8efa0a4d..306dd3127f41 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -43,6 +43,5 @@ ifdef CONFIG_USB_DEVICE obj-y += core.o obj-y += ep0.o obj-$(CONFIG_DW_UDC) += designware_udc.o -obj-$(CONFIG_CPU_PXA27X) += pxa27x_udc.o endif endif diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c index 01337d6511b3..bb0d2971d06b 100644 --- a/drivers/usb/gadget/epautoconf.c +++ b/drivers/usb/gadget/epautoconf.c @@ -79,12 +79,6 @@ static int ep_matches( */ if ('s' == tmp[2]) /* == "-iso" */ return 0; - /* for now, avoid PXA "interrupt-in"; - * it's documented as never using DATA1. - */ - if (gadget_is_pxa(gadget) - && 'i' == tmp[1]) - return 0; break; case USB_ENDPOINT_XFER_BULK: if ('b' != tmp[1]) /* != "-bulk" */ diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 430732865723..72b4f7f306ab 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -1325,24 +1325,6 @@ eth_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) if (!cdc_active(dev) && wIndex != 0) break;
- /* - * PXA hardware partially handles SET_INTERFACE; - * we need to kluge around that interference. - */ - if (gadget_is_pxa(gadget)) { - value = eth_set_config(dev, DEV_CONFIG_VALUE, - GFP_ATOMIC); - /* - * PXA25x driver use non-CDC ethernet gadget. - * But only _CDC and _RNDIS code can signalize - * that network is working. So we signalize it - * here. - */ - dev->network_started = 1; - debug("USB network up!\n"); - goto done_set_intf; - } - #ifdef CONFIG_USB_ETH_CDC switch (wIndex) { case 0: /* control/master intf */ @@ -1386,8 +1368,6 @@ eth_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) */ debug("set_interface ignored!\n"); #endif /* CONFIG_USB_ETH_CDC */ - -done_set_intf: break; case USB_REQ_GET_INTERFACE: if (ctrl->bRequestType != (USB_DIR_IN|USB_RECIP_INTERFACE) @@ -2032,10 +2012,7 @@ static int eth_bind(struct usb_gadget *gadget) * standard protocol is _strongly_ preferred for interop purposes. * (By everyone except Microsoft.) */ - if (gadget_is_pxa(gadget)) { - /* pxa doesn't support altsettings */ - cdc = 0; - } else if (gadget_is_musbhdrc(gadget)) { + if (gadget_is_musbhdrc(gadget)) { /* reduce tx dma overhead by avoiding special cases */ zlp = 0; } else if (gadget_is_sh(gadget)) { diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index 06e6a4894954..66ccd0541726 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h @@ -32,12 +32,6 @@ #define gadget_is_dummy(g) 0 #endif
-#ifdef CONFIG_USB_GADGET_PXA2XX -#define gadget_is_pxa(g) (!strcmp("pxa2xx_udc", (g)->name)) -#else -#define gadget_is_pxa(g) 0 -#endif - #ifdef CONFIG_USB_GADGET_GOKU #define gadget_is_goku(g) (!strcmp("goku_udc", (g)->name)) #else @@ -78,13 +72,6 @@ #define gadget_is_n9604(g) 0 #endif
-/* various unstable versions available */ -#ifdef CONFIG_USB_GADGET_PXA27X -#define gadget_is_pxa27x(g) (!strcmp("pxa27x_udc", (g)->name)) -#else -#define gadget_is_pxa27x(g) 0 -#endif - #ifdef CONFIG_USB_GADGET_ATMEL_USBA #define gadget_is_atmel_usba(g) (!strcmp("atmel_usba_udc", (g)->name)) #else @@ -194,8 +181,6 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x01; else if (gadget_is_dummy(gadget)) return 0x02; - else if (gadget_is_pxa(gadget)) - return 0x03; else if (gadget_is_sh(gadget)) return 0x04; else if (gadget_is_sa1100(gadget)) @@ -208,8 +193,6 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x08; else if (gadget_is_n9604(gadget)) return 0x09; - else if (gadget_is_pxa27x(gadget)) - return 0x10; else if (gadget_is_at91(gadget)) return 0x12; else if (gadget_is_imx(gadget)) diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c deleted file mode 100644 index 583ceb4d55c6..000000000000 --- a/drivers/usb/gadget/pxa27x_udc.c +++ /dev/null @@ -1,703 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * PXA27x USB device driver for u-boot. - * - * Copyright (C) 2007 Rodolfo Giometti giometti@linux.it - * Copyright (C) 2007 Eurotech S.p.A. info@eurotech.it - * Copyright (C) 2008 Vivek Kutal vivek.kutal@azingo.com - */ - - -#include <common.h> -#include <asm/arch/hardware.h> -#include <asm/byteorder.h> -#include <asm/io.h> -#include <usbdevice.h> -#include <linux/delay.h> -#include <usb/pxa27x_udc.h> -#include <usb/udc.h> - -#include "ep0.h" - -/* number of endpoints on this UDC */ -#define UDC_MAX_ENDPOINTS 24 - -static struct urb *ep0_urb; -static struct usb_device_instance *udc_device; -static int ep0state = EP0_IDLE; - -#ifdef USBDDBG -static void udc_dump_buffer(char *name, u8 *buf, int len) -{ - usbdbg("%s - buf %p, len %d", name, buf, len); - print_buffer(0, buf, 1, len, 0); -} -#else -#define udc_dump_buffer(name, buf, len) /* void */ -#endif - -static inline void udc_ack_int_UDCCR(int mask) -{ - writel(readl(USIR1) | mask, USIR1); -} - -/* - * If the endpoint has an active tx_urb, then the next packet of data from the - * URB is written to the tx FIFO. - * The total amount of data in the urb is given by urb->actual_length. - * The maximum amount of data that can be sent in any one packet is given by - * endpoint->tx_packetSize. - * The number of data bytes from this URB that have already been transmitted - * is given by endpoint->sent. - * endpoint->last is updated by this routine with the number of data bytes - * transmitted in this packet. - */ -static int udc_write_urb(struct usb_endpoint_instance *endpoint) -{ - struct urb *urb = endpoint->tx_urb; - int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; - u32 *data32 = (u32 *) urb->buffer; - u8 *data8 = (u8 *) urb->buffer; - unsigned int i, n, w, b, is_short; - int timeout = 2000; /* 2ms */ - - if (!urb || !urb->actual_length) - return -1; - - n = min_t(unsigned int, urb->actual_length - endpoint->sent, - endpoint->tx_packetSize); - if (n <= 0) - return -1; - - usbdbg("write urb on ep %d", ep_num); -#if defined(USBDDBG) && defined(USBDPARANOIA) - usbdbg("urb: buf %p, buf_len %d, actual_len %d", - urb->buffer, urb->buffer_length, urb->actual_length); - usbdbg("endpoint: sent %d, tx_packetSize %d, last %d", - endpoint->sent, endpoint->tx_packetSize, endpoint->last); -#endif - - is_short = n != endpoint->tx_packetSize; - w = n / 4; - b = n % 4; - usbdbg("n %d%s w %d b %d", n, is_short ? "-s" : "", w, b); - udc_dump_buffer("urb write", data8 + endpoint->sent, n); - - /* Prepare for data send */ - if (ep_num) - writel(UDCCSR_PC ,UDCCSN(ep_num)); - - for (i = 0; i < w; i++) - writel(data32[endpoint->sent / 4 + i], UDCDN(ep_num)); - - for (i = 0; i < b; i++) - writeb(data8[endpoint->sent + w * 4 + i], UDCDN(ep_num)); - - /* Set "Packet Complete" if less data then tx_packetSize */ - if (is_short) - writel(ep_num ? UDCCSR_SP : UDCCSR0_IPR, UDCCSN(ep_num)); - - /* Wait for data sent */ - if (ep_num) { - while (!(readl(UDCCSN(ep_num)) & UDCCSR_PC)) { - if (timeout-- == 0) - return -1; - else - udelay(1); - } - } - - endpoint->last = n; - - if (ep_num) { - usbd_tx_complete(endpoint); - } else { - endpoint->sent += n; - endpoint->last -= n; - } - - if (endpoint->sent >= urb->actual_length) { - urb->actual_length = 0; - endpoint->sent = 0; - endpoint->last = 0; - } - - if ((endpoint->sent >= urb->actual_length) && (!ep_num)) { - usbdbg("ep0 IN stage done"); - if (is_short) - ep0state = EP0_IDLE; - else - ep0state = EP0_XFER_COMPLETE; - } - - return 0; -} - -static int udc_read_urb(struct usb_endpoint_instance *endpoint) -{ - struct urb *urb = endpoint->rcv_urb; - int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; - u32 *data32 = (u32 *) urb->buffer; - unsigned int i, n; - - usbdbg("read urb on ep %d", ep_num); -#if defined(USBDDBG) && defined(USBDPARANOIA) - usbdbg("urb: buf %p, buf_len %d, actual_len %d", - urb->buffer, urb->buffer_length, urb->actual_length); - usbdbg("endpoint: rcv_packetSize %d", - endpoint->rcv_packetSize); -#endif - - if (readl(UDCCSN(ep_num)) & UDCCSR_BNE) - n = readl(UDCBCN(ep_num)) & 0x3ff; - else /* zlp */ - n = 0; - - usbdbg("n %d%s", n, n != endpoint->rcv_packetSize ? "-s" : ""); - for (i = 0; i < n; i += 4) - data32[urb->actual_length / 4 + i / 4] = readl(UDCDN(ep_num)); - - udc_dump_buffer("urb read", (u8 *) data32, urb->actual_length + n); - usbd_rcv_complete(endpoint, n, 0); - - return 0; -} - -static int udc_read_urb_ep0(void) -{ - u32 *data32 = (u32 *) ep0_urb->buffer; - u8 *data8 = (u8 *) ep0_urb->buffer; - unsigned int i, n, w, b; - - usbdbg("read urb on ep 0"); -#if defined(USBDDBG) && defined(USBDPARANOIA) - usbdbg("urb: buf %p, buf_len %d, actual_len %d", - ep0_urb->buffer, ep0_urb->buffer_length, ep0_urb->actual_length); -#endif - - n = readl(UDCBCR0); - w = n / 4; - b = n % 4; - - for (i = 0; i < w; i++) { - data32[ep0_urb->actual_length / 4 + i] = readl(UDCDN(0)); - /* ep0_urb->actual_length += 4; */ - } - - for (i = 0; i < b; i++) { - data8[ep0_urb->actual_length + w * 4 + i] = readb(UDCDN(0)); - /* ep0_urb->actual_length++; */ - } - - ep0_urb->actual_length += n; - - udc_dump_buffer("urb read", (u8 *) data32, ep0_urb->actual_length); - - writel(UDCCSR0_OPC | UDCCSR0_IPR, UDCCSR0); - if (ep0_urb->actual_length == ep0_urb->device_request.wLength) - return 1; - - return 0; -} - -static void udc_handle_ep0(struct usb_endpoint_instance *endpoint) -{ - u32 udccsr0 = readl(UDCCSR0); - u32 *data = (u32 *) &ep0_urb->device_request; - int i; - - usbdbg("udccsr0 %x", udccsr0); - - /* Clear stall status */ - if (udccsr0 & UDCCSR0_SST) { - usberr("clear stall status"); - writel(UDCCSR0_SST, UDCCSR0); - ep0state = EP0_IDLE; - } - - /* previous request unfinished? non-error iff back-to-back ... */ - if ((udccsr0 & UDCCSR0_SA) != 0 && ep0state != EP0_IDLE) - ep0state = EP0_IDLE; - - switch (ep0state) { - - case EP0_IDLE: - udccsr0 = readl(UDCCSR0); - /* Start control request? */ - if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) - == (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) { - - /* Read SETUP packet. - * SETUP packet size is 8 bytes (aka 2 words) - */ - usbdbg("try reading SETUP packet"); - for (i = 0; i < 2; i++) { - if ((readl(UDCCSR0) & UDCCSR0_RNE) == 0) { - usberr("setup packet too short:%d", i); - goto stall; - } - data[i] = readl(UDCDR0); - } - - writel(readl(UDCCSR0) | UDCCSR0_OPC | UDCCSR0_SA, UDCCSR0); - if ((readl(UDCCSR0) & UDCCSR0_RNE) != 0) { - usberr("setup packet too long"); - goto stall; - } - - udc_dump_buffer("ep0 setup read", (u8 *) data, 8); - - if (ep0_urb->device_request.wLength == 0) { - usbdbg("Zero Data control Packet\n"); - if (ep0_recv_setup(ep0_urb)) { - usberr("Invalid Setup Packet\n"); - udc_dump_buffer("ep0 setup read", - (u8 *)data, 8); - goto stall; - } - writel(UDCCSR0_IPR, UDCCSR0); - ep0state = EP0_IDLE; - } else { - /* Check direction */ - if ((ep0_urb->device_request.bmRequestType & - USB_REQ_DIRECTION_MASK) - == USB_REQ_HOST2DEVICE) { - ep0state = EP0_OUT_DATA; - ep0_urb->buffer = - (u8 *)ep0_urb->buffer_data; - ep0_urb->buffer_length = - sizeof(ep0_urb->buffer_data); - ep0_urb->actual_length = 0; - writel(UDCCSR0_IPR, UDCCSR0); - } else { - /* The ep0_recv_setup function has - * already placed our response packet - * data in ep0_urb->buffer and the - * packet length in - * ep0_urb->actual_length. - */ - if (ep0_recv_setup(ep0_urb)) { -stall: - usberr("Invalid setup packet"); - udc_dump_buffer("ep0 setup read" - , (u8 *) data, 8); - ep0state = EP0_IDLE; - - writel(UDCCSR0_SA | - UDCCSR0_OPC | UDCCSR0_FST | - UDCCS0_FTF, UDCCSR0); - - return; - } - - endpoint->tx_urb = ep0_urb; - endpoint->sent = 0; - usbdbg("EP0_IN_DATA"); - ep0state = EP0_IN_DATA; - if (udc_write_urb(endpoint) < 0) - goto stall; - - } - } - return; - } else if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA)) - == (UDCCSR0_OPC|UDCCSR0_SA)) { - usberr("Setup Active but no data. Stalling ....\n"); - goto stall; - } else { - usbdbg("random early IRQs"); - /* Some random early IRQs: - * - we acked FST - * - IPR cleared - * - OPC got set, without SA (likely status stage) - */ - writel(udccsr0 & (UDCCSR0_SA | UDCCSR0_OPC), UDCCSR0); - } - break; - - case EP0_OUT_DATA: - - if ((udccsr0 & UDCCSR0_OPC) && !(udccsr0 & UDCCSR0_SA)) { - if (udc_read_urb_ep0()) { -read_complete: - ep0state = EP0_IDLE; - if (ep0_recv_setup(ep0_urb)) { - /* Not a setup packet, stall next - * EP0 transaction - */ - udc_dump_buffer("ep0 setup read", - (u8 *) data, 8); - usberr("can't parse setup packet\n"); - goto stall; - } - } - } else if (!(udccsr0 & UDCCSR0_OPC) && - !(udccsr0 & UDCCSR0_IPR)) { - if (ep0_urb->device_request.wLength == - ep0_urb->actual_length) - goto read_complete; - - usberr("Premature Status\n"); - ep0state = EP0_IDLE; - } - break; - - case EP0_IN_DATA: - /* GET_DESCRIPTOR etc */ - if (udccsr0 & UDCCSR0_OPC) { - writel(UDCCSR0_OPC | UDCCSR0_FTF, UDCCSR0); - usberr("ep0in premature status"); - ep0state = EP0_IDLE; - } else { - /* irq was IPR clearing */ - if (udc_write_urb(endpoint) < 0) { - usberr("ep0_write_error\n"); - goto stall; - } - } - break; - - case EP0_XFER_COMPLETE: - writel(UDCCSR0_IPR, UDCCSR0); - ep0state = EP0_IDLE; - break; - - default: - usbdbg("Default\n"); - } - writel(USIR0_IR0, USIR0); -} - -static void udc_handle_ep(struct usb_endpoint_instance *endpoint) -{ - int ep_addr = endpoint->endpoint_address; - int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; - int ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; - - u32 flags = readl(UDCCSN(ep_num)) & (UDCCSR_SST | UDCCSR_TRN); - if (flags) - writel(flags, UDCCSN(ep_num)); - - if (ep_isout) - udc_read_urb(endpoint); - else - udc_write_urb(endpoint); - - writel(UDCCSR_PC, UDCCSN(ep_num)); -} - -static void udc_state_changed(void) -{ - - writel(readl(UDCCR) | UDCCR_SMAC, UDCCR); - - usbdbg("New UDC settings are: conf %d - inter %d - alter %d", - (readl(UDCCR) & UDCCR_ACN) >> UDCCR_ACN_S, - (readl(UDCCR) & UDCCR_AIN) >> UDCCR_AIN_S, - (readl(UDCCR) & UDCCR_AAISN) >> UDCCR_AAISN_S); - - usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0); - writel(UDCISR1_IRCC, UDCISR1); -} - -void udc_irq(void) -{ - int handled; - struct usb_endpoint_instance *endpoint; - int ep_num, i; - u32 udcisr0; - - do { - handled = 0; - /* Suspend Interrupt Request */ - if (readl(USIR1) & UDCCR_SUSIR) { - usbdbg("Suspend\n"); - udc_ack_int_UDCCR(UDCCR_SUSIR); - handled = 1; - ep0state = EP0_IDLE; - } - - /* Resume Interrupt Request */ - if (readl(USIR1) & UDCCR_RESIR) { - udc_ack_int_UDCCR(UDCCR_RESIR); - handled = 1; - usbdbg("USB resume\n"); - } - - if (readl(USIR1) & (1<<31)) { - handled = 1; - udc_state_changed(); - } - - /* Reset Interrupt Request */ - if (readl(USIR1) & UDCCR_RSTIR) { - udc_ack_int_UDCCR(UDCCR_RSTIR); - handled = 1; - usbdbg("Reset\n"); - usbd_device_event_irq(udc_device, DEVICE_RESET, 0); - } else { - if (readl(USIR0)) - usbdbg("UISR0: %x \n", readl(USIR0)); - - if (readl(USIR0) & 0x2) - writel(0x2, USIR0); - - /* Control traffic */ - if (readl(USIR0) & USIR0_IR0) { - handled = 1; - writel(USIR0_IR0, USIR0); - udc_handle_ep0(udc_device->bus->endpoint_array); - } - - endpoint = udc_device->bus->endpoint_array; - for (i = 0; i < udc_device->bus->max_endpoints; i++) { - ep_num = (endpoint[i].endpoint_address) & - USB_ENDPOINT_NUMBER_MASK; - if (!ep_num) - continue; - udcisr0 = readl(UDCISR0); - if (udcisr0 & - UDCISR_INT(ep_num, UDC_INT_PACKETCMP)) { - writel(UDCISR_INT(ep_num, UDC_INT_PACKETCMP), - UDCISR0); - udc_handle_ep(&endpoint[i]); - } - } - } - - } while (handled); -} - -/* The UDCCR reg contains mask and interrupt status bits, - * so using '|=' isn't safe as it may ack an interrupt. - */ -#define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ -#define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE) - -static inline void udc_set_mask_UDCCR(int mask) -{ - writel((readl(UDCCR) & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS), UDCCR); -} - -static inline void udc_clear_mask_UDCCR(int mask) -{ - writel((readl(UDCCR) & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS), UDCCR); -} - -static void pio_irq_enable(int ep_num) -{ - if (ep_num < 16) - writel(readl(UDCICR0) | 3 << (ep_num * 2), UDCICR0); - else { - ep_num -= 16; - writel(readl(UDCICR1) | 3 << (ep_num * 2), UDCICR1); - } -} - -/* - * udc_set_nak - * - * Allow upper layers to signal lower layers should not accept more RX data - */ -void udc_set_nak(int ep_num) -{ - /* TODO */ -} - -/* - * udc_unset_nak - * - * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint. - * Switch off NAKing on this endpoint to accept more data output from host. - */ -void udc_unset_nak(int ep_num) -{ - /* TODO */ -} - -int udc_endpoint_write(struct usb_endpoint_instance *endpoint) -{ - return udc_write_urb(endpoint); -} - -/* Associate a physical endpoint with endpoint instance */ -void udc_setup_ep(struct usb_device_instance *device, unsigned int id, - struct usb_endpoint_instance *endpoint) -{ - int ep_num, ep_addr, ep_isout, ep_type, ep_size; - int config, interface, alternate; - u32 tmp; - - usbdbg("setting up endpoint id %d", id); - - if (!endpoint) { - usberr("endpoint void!"); - return; - } - - ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; - if (ep_num >= UDC_MAX_ENDPOINTS) { - usberr("unable to setup ep %d!", ep_num); - return; - } - - pio_irq_enable(ep_num); - if (ep_num == 0) { - /* Done for ep0 */ - return; - } - - config = 1; - interface = 0; - alternate = 0; - - usbdbg("config %d - interface %d - alternate %d", - config, interface, alternate); - - ep_addr = endpoint->endpoint_address; - ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; - ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT; - ep_type = ep_isout ? endpoint->rcv_attributes : endpoint->tx_attributes; - ep_size = ep_isout ? endpoint->rcv_packetSize : endpoint->tx_packetSize; - - usbdbg("addr %x, num %d, dir %s, type %s, packet size %d", - ep_addr, ep_num, - ep_isout ? "out" : "in", - ep_type == USB_ENDPOINT_XFER_ISOC ? "isoc" : - ep_type == USB_ENDPOINT_XFER_BULK ? "bulk" : - ep_type == USB_ENDPOINT_XFER_INT ? "int" : "???", - ep_size - ); - - /* Configure UDCCRx */ - tmp = 0; - tmp |= (config << UDCCONR_CN_S) & UDCCONR_CN; - tmp |= (interface << UDCCONR_IN_S) & UDCCONR_IN; - tmp |= (alternate << UDCCONR_AISN_S) & UDCCONR_AISN; - tmp |= (ep_num << UDCCONR_EN_S) & UDCCONR_EN; - tmp |= (ep_type << UDCCONR_ET_S) & UDCCONR_ET; - tmp |= ep_isout ? 0 : UDCCONR_ED; - tmp |= (ep_size << UDCCONR_MPS_S) & UDCCONR_MPS; - tmp |= UDCCONR_EE; - - writel(tmp, UDCCN(ep_num)); - - usbdbg("UDCCR%c = %x", 'A' + ep_num-1, readl(UDCCN(ep_num))); - usbdbg("UDCCSR%c = %x", 'A' + ep_num-1, readl(UDCCSN(ep_num))); -} - -/* Connect the USB device to the bus */ -void udc_connect(void) -{ - usbdbg("UDC connect"); - -#ifdef CONFIG_USB_DEV_PULLUP_GPIO - /* Turn on the USB connection by enabling the pullup resistor */ - writel(readl(GPDR(CONFIG_USB_DEV_PULLUP_GPIO)) - | GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), - GPDR(CONFIG_USB_DEV_PULLUP_GPIO)); - writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPSR(CONFIG_USB_DEV_PULLUP_GPIO)); -#else - /* Host port 2 transceiver D+ pull up enable */ - writel(readl(UP2OCR) | UP2OCR_DPPUE, UP2OCR); -#endif -} - -/* Disconnect the USB device to the bus */ -void udc_disconnect(void) -{ - usbdbg("UDC disconnect"); - -#ifdef CONFIG_USB_DEV_PULLUP_GPIO - /* Turn off the USB connection by disabling the pullup resistor */ - writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPCR(CONFIG_USB_DEV_PULLUP_GPIO)); -#else - /* Host port 2 transceiver D+ pull up disable */ - writel(readl(UP2OCR) & ~UP2OCR_DPPUE, UP2OCR); -#endif -} - -/* Switch on the UDC */ -void udc_enable(struct usb_device_instance *device) -{ - - ep0state = EP0_IDLE; - - /* enable endpoint 0, A, B's Packet Complete Interrupt. */ - writel(0xffffffff, UDCICR0); - writel(0xa8000000, UDCICR1); - - /* clear the interrupt status/control registers */ - writel(0xffffffff, UDCISR0); - writel(0xffffffff, UDCISR1); - - /* set UDC-enable */ - udc_set_mask_UDCCR(UDCCR_UDE); - - udc_device = device; - if (!ep0_urb) - ep0_urb = usbd_alloc_urb(udc_device, - udc_device->bus->endpoint_array); - else - usbinfo("ep0_urb %p already allocated", ep0_urb); - - usbdbg("UDC Enabled\n"); -} - -/* Need to check this again */ -void udc_disable(void) -{ - usbdbg("disable UDC"); - - udc_clear_mask_UDCCR(UDCCR_UDE); - - /* Disable clock for USB device */ - writel(readl(CKEN) & ~CKEN11_USB, CKEN); - - /* Free ep0 URB */ - if (ep0_urb) { - usbd_dealloc_urb(ep0_urb); - ep0_urb = NULL; - } - - /* Reset device pointer */ - udc_device = NULL; -} - -/* Allow udc code to do any additional startup */ -void udc_startup_events(struct usb_device_instance *device) -{ - /* The DEVICE_INIT event puts the USB device in the state STATE_INIT */ - usbd_device_event_irq(device, DEVICE_INIT, 0); - - /* The DEVICE_CREATE event puts the USB device in the state - * STATE_ATTACHED */ - usbd_device_event_irq(device, DEVICE_CREATE, 0); - - /* Some USB controller driver implementations signal - * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here. - * DEVICE_HUB_CONFIGURED causes a transition to the state - * STATE_POWERED, and DEVICE_RESET causes a transition to - * the state STATE_DEFAULT. - */ - udc_enable(device); -} - -/* Initialize h/w stuff */ -int udc_init(void) -{ - udc_device = NULL; - usbdbg("PXA27x usbd start"); - - /* Enable clock for USB device */ - writel(readl(CKEN) | CKEN11_USB, CKEN); - - /* Disable the UDC */ - udc_clear_mask_UDCCR(UDCCR_UDE); - - /* Disable IRQs: we don't use them */ - writel(0, UDCICR0); - writel(0, UDCICR1); - - return 0; -} diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 63d8dbe3c85f..7019b2639639 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -36,7 +36,6 @@ obj-$(CONFIG_LG4573) += lg4573.o obj-$(CONFIG_LOGICORE_DP_TX) += logicore_dp_tx.o obj-$(CONFIG_NXP_TDA19988) += tda19988.o obj-$(CONFIG_OSD) += video_osd-uclass.o -obj-$(CONFIG_PXA_LCD) += pxa_lcd.o obj-$(CONFIG_SANDBOX_OSD) += sandbox_osd.o obj-$(CONFIG_SCF0403_LCD) += scf0403_lcd.o obj-$(CONFIG_VIDEO_ARM_MALIDP) += mali_dp.o diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c deleted file mode 100644 index 21ade8d93c4a..000000000000 --- a/drivers/video/pxa_lcd.c +++ /dev/null @@ -1,549 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * PXA LCD Controller - * - * (C) Copyright 2001-2002 - * Wolfgang Denk, DENX Software Engineering -- wd@denx.de - */ - -/************************************************************************/ -/* ** HEADER FILES */ -/************************************************************************/ - -#include <common.h> -#include <log.h> -#include <asm/arch/pxa-regs.h> -#include <asm/io.h> -#include <lcd.h> -#include <linux/types.h> -#include <stdarg.h> -#include <stdio_dev.h> - -/* #define DEBUG */ - -#ifdef CONFIG_LCD - -/*----------------------------------------------------------------------*/ -/* - * Define panel bpp, LCCR0, LCCR3 and panel_info video struct for - * your display. - */ - -#ifdef CONFIG_PXA_VGA -/* LCD outputs connected to a video DAC */ -# define LCD_BPP LCD_COLOR8 - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x003008f8 -# define REG_LCCR3 0x0300FF01 - -/* 640x480x16 @ 61 Hz */ -vidinfo_t panel_info = { - .vl_col = 640, - .vl_row = 480, - .vl_width = 640, - .vl_height = 480, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 0, - .vl_clor = 0, - .vl_tft = 1, - .vl_hpw = 40, - .vl_blw = 56, - .vl_elw = 56, - .vl_vpw = 20, - .vl_bfw = 8, - .vl_efw = 8, -}; -#endif /* CONFIG_PXA_VIDEO */ - -/*----------------------------------------------------------------------*/ -#ifdef CONFIG_SHARP_LM8V31 - -# define LCD_BPP LCD_COLOR8 -# define LCD_INVERT_COLORS /* Needed for colors to be correct, but why? */ - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x0030087C -# define REG_LCCR3 0x0340FF08 - -vidinfo_t panel_info = { - .vl_col = 640, - .vl_row = 480, - .vl_width = 157, - .vl_height = 118, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 1, - .vl_clor = 1, - .vl_tft = 0, - .vl_hpw = 1, - .vl_blw = 3, - .vl_elw = 3, - .vl_vpw = 1, - .vl_bfw = 0, - .vl_efw = 0, -}; -#endif /* CONFIG_SHARP_LM8V31 */ -/*----------------------------------------------------------------------*/ -#ifdef CONFIG_VOIPAC_LCD - -# define LCD_BPP LCD_COLOR8 -# define LCD_INVERT_COLORS - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x043008f8 -# define REG_LCCR3 0x0340FF08 - -vidinfo_t panel_info = { - .vl_col = 640, - .vl_row = 480, - .vl_width = 157, - .vl_height = 118, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 1, - .vl_clor = 1, - .vl_tft = 1, - .vl_hpw = 32, - .vl_blw = 144, - .vl_elw = 32, - .vl_vpw = 2, - .vl_bfw = 13, - .vl_efw = 30, -}; -#endif /* CONFIG_VOIPAC_LCD */ - -/*----------------------------------------------------------------------*/ -#ifdef CONFIG_HITACHI_SX14 -/* Hitachi SX14Q004-ZZA color STN LCD */ -#define LCD_BPP LCD_COLOR8 - -/* you have to set lccr0 and lccr3 (including pcd) */ -#define REG_LCCR0 0x00301079 -#define REG_LCCR3 0x0340FF20 - -vidinfo_t panel_info = { - .vl_col = 320, - .vl_row = 240, - .vl_width = 167, - .vl_height = 109, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 1, - .vl_splt = 0, - .vl_clor = 1, - .vl_tft = 0, - .vl_hpw = 1, - .vl_blw = 1, - .vl_elw = 1, - .vl_vpw = 7, - .vl_bfw = 0, - .vl_efw = 0, -}; -#endif /* CONFIG_HITACHI_SX14 */ - -/*----------------------------------------------------------------------*/ -#ifdef CONFIG_LMS283GF05 - -# define LCD_BPP LCD_COLOR8 -/*# define LCD_INVERT_COLORS*/ - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x043008f8 -# define REG_LCCR3 0x03b00009 - -vidinfo_t panel_info = { - .vl_col = 240, - .vl_row = 320, - .vl_rot = 3, - .vl_width = 240, - .vl_height = 320, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_LOW, - .vl_hsp = CONFIG_SYS_LOW, - .vl_vsp = CONFIG_SYS_LOW, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 1, - .vl_clor = 1, - .vl_tft = 1, - .vl_hpw = 4, - .vl_blw = 4, - .vl_elw = 8, - .vl_vpw = 4, - .vl_bfw = 4, - .vl_efw = 8, -}; -#endif /* CONFIG_LMS283GF05 */ - -/*----------------------------------------------------------------------*/ - -#ifdef CONFIG_LQ038J7DH53 - -# define LCD_BPP LCD_COLOR8 - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x003008f9 -# define REG_LCCR3 0x03700004 - -vidinfo_t panel_info = { - .vl_col = 320, - .vl_row = 480, - .vl_width = 320, - .vl_height = 480, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_LOW, - .vl_hsp = CONFIG_SYS_LOW, - .vl_vsp = CONFIG_SYS_LOW, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 1, - .vl_clor = 1, - .vl_tft = 1, - .vl_hpw = 0x04, - .vl_blw = 0x20, - .vl_elw = 0x01, - .vl_vpw = 0x01, - .vl_bfw = 0x04, - .vl_efw = 0x01, -}; -#endif /* CONFIG_LQ038J7DH53 */ - -/*----------------------------------------------------------------------*/ - -#ifdef CONFIG_LITTLETON_LCD -# define LCD_BPP LCD_COLOR8 - -/* you have to set lccr0 and lccr3 (including pcd) */ -# define REG_LCCR0 0x003008f8 -# define REG_LCCR3 0x0300FF04 - -vidinfo_t panel_info = { - .vl_col = 480, - .vl_row = 640, - .vl_width = 480, - .vl_height = 640, - .vl_clkp = CONFIG_SYS_HIGH, - .vl_oep = CONFIG_SYS_HIGH, - .vl_hsp = CONFIG_SYS_HIGH, - .vl_vsp = CONFIG_SYS_HIGH, - .vl_dp = CONFIG_SYS_HIGH, - .vl_bpix = LCD_BPP, - .vl_lbw = 0, - .vl_splt = 0, - .vl_clor = 0, - .vl_tft = 1, - .vl_hpw = 9, - .vl_blw = 8, - .vl_elw = 24, - .vl_vpw = 2, - .vl_bfw = 2, - .vl_efw = 4, -}; -#endif /* CONFIG_LITTLETON_LCD */ - -/*----------------------------------------------------------------------*/ - -static int pxafb_init_mem (void *lcdbase, vidinfo_t *vid); -static void pxafb_setup_gpio (vidinfo_t *vid); -static void pxafb_enable_controller (vidinfo_t *vid); -static int pxafb_init (vidinfo_t *vid); - -/************************************************************************/ -/* --------------- PXA chipset specific functions ------------------- */ -/************************************************************************/ - -ushort *configuration_get_cmap(void) -{ - struct pxafb_info *fbi = &panel_info.pxa; - return (ushort *)fbi->palette; -} - -void lcd_ctrl_init (void *lcdbase) -{ - pxafb_init_mem(lcdbase, &panel_info); - pxafb_init(&panel_info); - pxafb_setup_gpio(&panel_info); - pxafb_enable_controller(&panel_info); -} - -/*----------------------------------------------------------------------*/ -#if LCD_BPP == LCD_COLOR8 -void -lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue) -{ - struct pxafb_info *fbi = &panel_info.pxa; - unsigned short *palette = (unsigned short *)fbi->palette; - u_int val; - - if (regno < fbi->palette_size) { - val = ((red << 8) & 0xf800); - val |= ((green << 4) & 0x07e0); - val |= (blue & 0x001f); - -#ifdef LCD_INVERT_COLORS - palette[regno] = ~val; -#else - palette[regno] = val; -#endif - } - - debug ("setcolreg: reg %2d @ %p: R=%02X G=%02X B=%02X => %04X\n", - regno, &palette[regno], - red, green, blue, - palette[regno]); -} -#endif /* LCD_COLOR8 */ - -/*----------------------------------------------------------------------*/ -__weak void lcd_enable(void) -{ -} - -/************************************************************************/ -/* ** PXA255 specific routines */ -/************************************************************************/ - -/* - * Calculate fb size for VIDEOLFB_ATAG. Size returned contains fb, - * descriptors and palette areas. - */ -ulong calc_fbsize (void) -{ - ulong size; - int line_length = (panel_info.vl_col * NBITS (panel_info.vl_bpix)) / 8; - - size = line_length * panel_info.vl_row; - size += PAGE_SIZE; - - return size; -} - -static int pxafb_init_mem (void *lcdbase, vidinfo_t *vid) -{ - u_long palette_mem_size; - struct pxafb_info *fbi = &vid->pxa; - int fb_size = vid->vl_row * (vid->vl_col * NBITS (vid->vl_bpix)) / 8; - - fbi->screen = (u_long)lcdbase; - - fbi->palette_size = NBITS(vid->vl_bpix) == 8 ? 256 : 16; - palette_mem_size = fbi->palette_size * sizeof(u16); - - debug("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size); - /* locate palette and descs at end of page following fb */ - fbi->palette = (u_long)lcdbase + fb_size + PAGE_SIZE - palette_mem_size; - - return 0; -} -#ifdef CONFIG_CPU_MONAHANS -static inline void pxafb_setup_gpio (vidinfo_t *vid) {} -#else -static void pxafb_setup_gpio (vidinfo_t *vid) -{ - u_long lccr0; - - /* - * setup is based on type of panel supported - */ - - lccr0 = vid->pxa.reg_lccr0; - - /* 4 bit interface */ - if ((lccr0 & LCCR0_CMS) && (lccr0 & LCCR0_SDS) && !(lccr0 & LCCR0_DPD)) - { - debug("Setting GPIO for 4 bit data\n"); - /* bits 58-61 */ - writel(readl(GPDR1) | (0xf << 26), GPDR1); - writel((readl(GAFR1_U) & ~(0xff << 20)) | (0xaa << 20), - GAFR1_U); - - /* bits 74-77 */ - writel(readl(GPDR2) | (0xf << 10), GPDR2); - writel((readl(GAFR2_L) & ~(0xff << 20)) | (0xaa << 20), - GAFR2_L); - } - - /* 8 bit interface */ - else if (((lccr0 & LCCR0_CMS) && ((lccr0 & LCCR0_SDS) || (lccr0 & LCCR0_DPD))) || - (!(lccr0 & LCCR0_CMS) && !(lccr0 & LCCR0_PAS) && !(lccr0 & LCCR0_SDS))) - { - debug("Setting GPIO for 8 bit data\n"); - /* bits 58-65 */ - writel(readl(GPDR1) | (0x3f << 26), GPDR1); - writel(readl(GPDR2) | (0x3), GPDR2); - - writel((readl(GAFR1_U) & ~(0xfff << 20)) | (0xaaa << 20), - GAFR1_U); - writel((readl(GAFR2_L) & ~0xf) | (0xa), GAFR2_L); - - /* bits 74-77 */ - writel(readl(GPDR2) | (0xf << 10), GPDR2); - writel((readl(GAFR2_L) & ~(0xff << 20)) | (0xaa << 20), - GAFR2_L); - } - - /* 16 bit interface */ - else if (!(lccr0 & LCCR0_CMS) && ((lccr0 & LCCR0_SDS) || (lccr0 & LCCR0_PAS))) - { - debug("Setting GPIO for 16 bit data\n"); - /* bits 58-77 */ - writel(readl(GPDR1) | (0x3f << 26), GPDR1); - writel(readl(GPDR2) | 0x00003fff, GPDR2); - - writel((readl(GAFR1_U) & ~(0xfff << 20)) | (0xaaa << 20), - GAFR1_U); - writel((readl(GAFR2_L) & 0xf0000000) | 0x0aaaaaaa, GAFR2_L); - } - else - { - printf("pxafb_setup_gpio: unable to determine bits per pixel\n"); - } -} -#endif - -static void pxafb_enable_controller (vidinfo_t *vid) -{ - debug("Enabling LCD controller\n"); - - /* Sequence from 11.7.10 */ - writel(vid->pxa.reg_lccr3, LCCR3); - writel(vid->pxa.reg_lccr2, LCCR2); - writel(vid->pxa.reg_lccr1, LCCR1); - writel(vid->pxa.reg_lccr0 & ~LCCR0_ENB, LCCR0); - writel(vid->pxa.fdadr0, FDADR0); - writel(vid->pxa.fdadr1, FDADR1); - writel(readl(LCCR0) | LCCR0_ENB, LCCR0); - -#ifdef CONFIG_CPU_MONAHANS - writel(readl(CKENA) | CKENA_1_LCD, CKENA); -#else - writel(readl(CKEN) | CKEN16_LCD, CKEN); -#endif - - debug("FDADR0 = 0x%08x\n", readl(FDADR0)); - debug("FDADR1 = 0x%08x\n", readl(FDADR1)); - debug("LCCR0 = 0x%08x\n", readl(LCCR0)); - debug("LCCR1 = 0x%08x\n", readl(LCCR1)); - debug("LCCR2 = 0x%08x\n", readl(LCCR2)); - debug("LCCR3 = 0x%08x\n", readl(LCCR3)); -} - -static int pxafb_init (vidinfo_t *vid) -{ - struct pxafb_info *fbi = &vid->pxa; - - debug("Configuring PXA LCD\n"); - - fbi->reg_lccr0 = REG_LCCR0; - fbi->reg_lccr3 = REG_LCCR3; - - debug("vid: vl_col=%d hslen=%d lm=%d rm=%d\n", - vid->vl_col, vid->vl_hpw, - vid->vl_blw, vid->vl_elw); - debug("vid: vl_row=%d vslen=%d um=%d bm=%d\n", - vid->vl_row, vid->vl_vpw, - vid->vl_bfw, vid->vl_efw); - - fbi->reg_lccr1 = - LCCR1_DisWdth(vid->vl_col) + - LCCR1_HorSnchWdth(vid->vl_hpw) + - LCCR1_BegLnDel(vid->vl_blw) + - LCCR1_EndLnDel(vid->vl_elw); - - fbi->reg_lccr2 = - LCCR2_DisHght(vid->vl_row) + - LCCR2_VrtSnchWdth(vid->vl_vpw) + - LCCR2_BegFrmDel(vid->vl_bfw) + - LCCR2_EndFrmDel(vid->vl_efw); - - fbi->reg_lccr3 = REG_LCCR3 & ~(LCCR3_HSP | LCCR3_VSP); - fbi->reg_lccr3 |= (vid->vl_hsp ? LCCR3_HorSnchL : LCCR3_HorSnchH) - | (vid->vl_vsp ? LCCR3_VrtSnchL : LCCR3_VrtSnchH); - - - /* setup dma descriptors */ - fbi->dmadesc_fblow = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 3*16); - fbi->dmadesc_fbhigh = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 2*16); - fbi->dmadesc_palette = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 1*16); - - #define BYTES_PER_PANEL ((fbi->reg_lccr0 & LCCR0_SDS) ? \ - (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8 / 2) : \ - (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8)) - - /* populate descriptors */ - fbi->dmadesc_fblow->fdadr = (u_long)fbi->dmadesc_fblow; - fbi->dmadesc_fblow->fsadr = fbi->screen + BYTES_PER_PANEL; - fbi->dmadesc_fblow->fidr = 0; - fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL; - - fbi->fdadr1 = (u_long)fbi->dmadesc_fblow; /* only used in dual-panel mode */ - - fbi->dmadesc_fbhigh->fsadr = fbi->screen; - fbi->dmadesc_fbhigh->fidr = 0; - fbi->dmadesc_fbhigh->ldcmd = BYTES_PER_PANEL; - - fbi->dmadesc_palette->fsadr = fbi->palette; - fbi->dmadesc_palette->fidr = 0; - fbi->dmadesc_palette->ldcmd = (fbi->palette_size * 2) | LDCMD_PAL; - - if( NBITS(vid->vl_bpix) < 12) - { - /* assume any mode with <12 bpp is palette driven */ - fbi->dmadesc_palette->fdadr = (u_long)fbi->dmadesc_fbhigh; - fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_palette; - /* flips back and forth between pal and fbhigh */ - fbi->fdadr0 = (u_long)fbi->dmadesc_palette; - } - else - { - /* palette shouldn't be loaded in true-color mode */ - fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_fbhigh; - fbi->fdadr0 = (u_long)fbi->dmadesc_fbhigh; /* no pal just fbhigh */ - } - - debug("fbi->dmadesc_fblow = 0x%lx\n", (u_long)fbi->dmadesc_fblow); - debug("fbi->dmadesc_fbhigh = 0x%lx\n", (u_long)fbi->dmadesc_fbhigh); - debug("fbi->dmadesc_palette = 0x%lx\n", (u_long)fbi->dmadesc_palette); - - debug("fbi->dmadesc_fblow->fdadr = 0x%lx\n", fbi->dmadesc_fblow->fdadr); - debug("fbi->dmadesc_fbhigh->fdadr = 0x%lx\n", fbi->dmadesc_fbhigh->fdadr); - debug("fbi->dmadesc_palette->fdadr = 0x%lx\n", fbi->dmadesc_palette->fdadr); - - debug("fbi->dmadesc_fblow->fsadr = 0x%lx\n", fbi->dmadesc_fblow->fsadr); - debug("fbi->dmadesc_fbhigh->fsadr = 0x%lx\n", fbi->dmadesc_fbhigh->fsadr); - debug("fbi->dmadesc_palette->fsadr = 0x%lx\n", fbi->dmadesc_palette->fsadr); - - debug("fbi->dmadesc_fblow->ldcmd = 0x%lx\n", fbi->dmadesc_fblow->ldcmd); - debug("fbi->dmadesc_fbhigh->ldcmd = 0x%lx\n", fbi->dmadesc_fbhigh->ldcmd); - debug("fbi->dmadesc_palette->ldcmd = 0x%lx\n", fbi->dmadesc_palette->ldcmd); - - return 0; -} - -/************************************************************************/ -/************************************************************************/ - -#endif /* CONFIG_LCD */ diff --git a/include/dm/platform_data/pxa_mmc_gen.h b/include/dm/platform_data/pxa_mmc_gen.h deleted file mode 100644 index d15c1551f468..000000000000 --- a/include/dm/platform_data/pxa_mmc_gen.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2019 Marcel Ziswiler marcel.ziswiler@toradex.com - */ - -#ifndef __PXA_MMC_GEN_H -#define __PXA_MMC_GEN_H - -#include <mmc.h> - -/* - * struct pxa_mmc_plat - information about a PXA MMC controller - * - * @base: MMC controller base register address - */ -struct pxa_mmc_plat { - struct mmc_config cfg; - struct mmc mmc; - struct pxa_mmc_regs *base; -}; - -#endif /* __PXA_MMC_GEN_H */ diff --git a/include/dm/platform_data/serial_pxa.h b/include/dm/platform_data/serial_pxa.h deleted file mode 100644 index e1a02aed28e0..000000000000 --- a/include/dm/platform_data/serial_pxa.h +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2016 Marcel Ziswiler marcel.ziswiler@toradex.com - */ - -#ifndef __SERIAL_PXA_H -#define __SERIAL_PXA_H - -/* - * The numbering scheme differs here for PXA25x, PXA27x and PXA3xx so we can - * easily handle enabling of clock. - */ -#ifdef CONFIG_CPU_MONAHANS -#define UART_CLK_BASE CKENA_21_BTUART -#define UART_CLK_REG CKENA -#define BTUART_INDEX 0 -#define FFUART_INDEX 1 -#define STUART_INDEX 2 -#else /* PXA27x */ -#define UART_CLK_BASE CKEN5_STUART -#define UART_CLK_REG CKEN -#define STUART_INDEX 0 -#define FFUART_INDEX 1 -#define BTUART_INDEX 2 -#endif - -/* - * struct pxa_serial_plat - information about a PXA port - * - * @base: Uart port base register address - * @port: Uart port index, for cpu with pinmux for uart / gpio - * baudrtatre: Uart port baudrate - */ -struct pxa_serial_plat { - struct pxa_uart_regs *base; - int port; - int baudrate; -}; - -#endif /* __SERIAL_PXA_H */ diff --git a/include/lcd.h b/include/lcd.h index 7570e7ac609c..4f1806927811 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -40,9 +40,7 @@ ulong lcd_setmem(ulong addr); */ void lcd_set_flush_dcache(int flush);
-#if defined(CONFIG_CPU_PXA27X) || defined CONFIG_CPU_MONAHANS -#include <pxa_lcd.h> -#elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD) +#if defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD) #include <atmel_lcd.h> #elif defined(CONFIG_EXYNOS_FB) #include <exynos_lcd.h> diff --git a/include/pxa_lcd.h b/include/pxa_lcd.h deleted file mode 100644 index 11a22abca6dc..000000000000 --- a/include/pxa_lcd.h +++ /dev/null @@ -1,80 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * pxa_lcd.h - PXA LCD Controller structures - * - * (C) Copyright 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - */ - -#ifndef _PXA_LCD_H_ -#define _PXA_LCD_H_ - -/* - * PXA LCD DMA descriptor - */ -struct pxafb_dma_descriptor { - u_long fdadr; /* Frame descriptor address register */ - u_long fsadr; /* Frame source address register */ - u_long fidr; /* Frame ID register */ - u_long ldcmd; /* Command register */ -}; - -/* - * PXA LCD info - */ -struct pxafb_info { - /* Misc registers */ - u_long reg_lccr3; - u_long reg_lccr2; - u_long reg_lccr1; - u_long reg_lccr0; - u_long fdadr0; - u_long fdadr1; - - /* DMA descriptors */ - struct pxafb_dma_descriptor *dmadesc_fblow; - struct pxafb_dma_descriptor *dmadesc_fbhigh; - struct pxafb_dma_descriptor *dmadesc_palette; - - u_long screen; /* physical address of frame buffer */ - u_long palette; /* physical address of palette memory */ - u_int palette_size; -}; - -/* - * LCD controller stucture for PXA CPU - */ -typedef struct vidinfo { - ushort vl_col; /* Number of columns (i.e. 640) */ - ushort vl_row; /* Number of rows (i.e. 480) */ - ushort vl_rot; /* Rotation of Display (0, 1, 2, 3) */ - ushort vl_width; /* Width of display area in millimeters */ - ushort vl_height; /* Height of display area in millimeters */ - - /* LCD configuration register */ - u_char vl_clkp; /* Clock polarity */ - u_char vl_oep; /* Output Enable polarity */ - u_char vl_hsp; /* Horizontal Sync polarity */ - u_char vl_vsp; /* Vertical Sync polarity */ - u_char vl_dp; /* Data polarity */ - u_char vl_bpix;/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */ - u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */ - u_char vl_splt;/* Split display, 0 = single-scan, 1 = dual-scan */ - u_char vl_clor; /* Color, 0 = mono, 1 = color */ - u_char vl_tft; /* 0 = passive, 1 = TFT */ - - /* Horizontal control register. Timing from data sheet */ - ushort vl_hpw; /* Horz sync pulse width */ - u_char vl_blw; /* Wait before of line */ - u_char vl_elw; /* Wait end of line */ - - /* Vertical control register. */ - u_char vl_vpw; /* Vertical sync pulse width */ - u_char vl_bfw; /* Wait before of frame */ - u_char vl_efw; /* Wait end of frame */ - - /* PXA LCD controller params */ - struct pxafb_info pxa; -} vidinfo_t; - -#endif diff --git a/include/usb/pxa27x_udc.h b/include/usb/pxa27x_udc.h deleted file mode 100644 index 07d14821c31d..000000000000 --- a/include/usb/pxa27x_udc.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * PXA27x register declarations and HCD data structures - * - * Copyright (C) 2007 Rodolfo Giometti giometti@linux.it - * Copyright (C) 2007 Eurotech S.p.A. info@eurotech.it - */ - - -#ifndef __PXA270X_UDC_H__ -#define __PXA270X_UDC_H__ - -#include <asm/byteorder.h> - -/* Endpoint 0 states */ -#define EP0_IDLE 0 -#define EP0_IN_DATA 1 -#define EP0_OUT_DATA 2 -#define EP0_XFER_COMPLETE 3 - - -/* Endpoint parameters */ -#define MAX_ENDPOINTS 4 - -#define EP0_MAX_PACKET_SIZE 16 - -#define UDC_OUT_ENDPOINT 0x02 -#define UDC_IN_ENDPOINT 0x01 -#define UDC_INT_ENDPOINT 0x05 - -#endif
On Sat, 25 Jun 2022 at 09:06, Tom Rini trini@konsulko.com wrote:
With the last platform for this architecture removed, remove the rest of the architecture support as well.
Cc: Marek Vasut marex@denx.de Signed-off-by: Tom Rini trini@konsulko.com
MAINTAINERS | 7 - README | 7 - arch/arm/Kconfig | 14 +- arch/arm/Makefile | 2 - arch/arm/cpu/pxa/Makefile | 14 - arch/arm/cpu/pxa/cache.c | 58 - arch/arm/cpu/pxa/config.mk | 18 - arch/arm/cpu/pxa/cpuinfo.c | 139 -- arch/arm/cpu/pxa/pxa2xx.c | 295 --- arch/arm/cpu/pxa/relocate.S | 22 - arch/arm/cpu/pxa/start.S | 98 - arch/arm/cpu/pxa/timer.c | 16 - arch/arm/cpu/pxa/usb.c | 89 - arch/arm/include/asm/arch-pxa/bitfield.h | 112 - arch/arm/include/asm/arch-pxa/config.h | 22 - arch/arm/include/asm/arch-pxa/hardware.h | 82 - arch/arm/include/asm/arch-pxa/pxa-regs.h | 2635 --------------------- arch/arm/include/asm/arch-pxa/pxa.h | 28 - arch/arm/include/asm/arch-pxa/regs-mmc.h | 140 -- arch/arm/include/asm/arch-pxa/regs-uart.h | 95 - arch/arm/include/asm/arch-pxa/regs-usb.h | 146 -- arch/arm/include/asm/config.h | 2 - doc/develop/driver-model/serial-howto.rst | 9 - drivers/mmc/Kconfig | 8 - drivers/mmc/Makefile | 1 - drivers/mmc/pxa_mmc_gen.c | 531 ----- drivers/serial/Kconfig | 6 - drivers/serial/Makefile | 1 - drivers/serial/serial_pxa.c | 342 --- drivers/serial/usbtty.h | 2 - drivers/usb/gadget/Makefile | 1 - drivers/usb/gadget/epautoconf.c | 6 - drivers/usb/gadget/ether.c | 25 +- drivers/usb/gadget/gadget_chips.h | 17 - drivers/usb/gadget/pxa27x_udc.c | 703 ------ drivers/video/Makefile | 1 - drivers/video/pxa_lcd.c | 549 ----- include/dm/platform_data/pxa_mmc_gen.h | 22 - include/dm/platform_data/serial_pxa.h | 40 - include/lcd.h | 4 +- include/pxa_lcd.h | 80 - include/usb/pxa27x_udc.h | 31 - 42 files changed, 3 insertions(+), 6417 deletions(-) delete mode 100644 arch/arm/cpu/pxa/Makefile delete mode 100644 arch/arm/cpu/pxa/cache.c delete mode 100644 arch/arm/cpu/pxa/config.mk delete mode 100644 arch/arm/cpu/pxa/cpuinfo.c delete mode 100644 arch/arm/cpu/pxa/pxa2xx.c delete mode 100644 arch/arm/cpu/pxa/relocate.S delete mode 100644 arch/arm/cpu/pxa/start.S delete mode 100644 arch/arm/cpu/pxa/timer.c delete mode 100644 arch/arm/cpu/pxa/usb.c delete mode 100644 arch/arm/include/asm/arch-pxa/bitfield.h delete mode 100644 arch/arm/include/asm/arch-pxa/config.h delete mode 100644 arch/arm/include/asm/arch-pxa/hardware.h delete mode 100644 arch/arm/include/asm/arch-pxa/pxa-regs.h delete mode 100644 arch/arm/include/asm/arch-pxa/pxa.h delete mode 100644 arch/arm/include/asm/arch-pxa/regs-mmc.h delete mode 100644 arch/arm/include/asm/arch-pxa/regs-uart.h delete mode 100644 arch/arm/include/asm/arch-pxa/regs-usb.h delete mode 100644 drivers/mmc/pxa_mmc_gen.c delete mode 100644 drivers/serial/serial_pxa.c delete mode 100644 drivers/usb/gadget/pxa27x_udc.c delete mode 100644 drivers/video/pxa_lcd.c delete mode 100644 include/dm/platform_data/pxa_mmc_gen.h delete mode 100644 include/dm/platform_data/serial_pxa.h delete mode 100644 include/pxa_lcd.h delete mode 100644 include/usb/pxa27x_udc.h
Reviewed-by: Simon Glass sjg@chromium.org
This converts the following to Kconfig: CONFIG_SYS_BOOK3E_HV
Signed-off-by: Tom Rini trini@konsulko.com --- arch/powerpc/cpu/mpc85xx/Kconfig | 4 ++++ configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig | 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1024RDB_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SECURE_BOOT_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/T4240RDB_defconfig | 1 + configs/kmcent2_defconfig | 1 + include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/kmcent2.h | 1 - 49 files changed, 44 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index e7003d3b647e..f4f5ebfe0c40 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1216,6 +1216,10 @@ config SYS_FSL_LBC_CLK_DIV config ENABLE_36BIT_PHYS bool "Enable 36bit physical address space support"
+config SYS_BOOK3E_HV + bool "Category E.HV is supported" + depends on BOOKE + config SYS_MPC85XX_NO_RESETVEC bool "Discard resetvec section and move bootpg section up" depends on MPC85xx diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 5063470d8547..459b9e6c5443 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index a64f8924dd2d..6ff6a4283069 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index f295174da527..a5872faa4741 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index e3dd1e93e323..247db8e0fef9 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 3e4cb5180ea5..91ad3ee30515 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 66eb6c3f3d91..6ca91fe77ed2 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 87c62be04f8d..13857b8208f8 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index d083c256b089..b587d525a266 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index ed6f3de96ec5..c88a869bc8f1 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index e77085ae3e2d..a627475420f6 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 91aa75d9e1ce..82371ea9897b 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 3a48362c3b52..be3d388484f5 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 9aa293dc2292..4dcdb391e408 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 6f0d51a7abfe..7620f4879a79 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index ae5f7b7ba348..68573a5c9821 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 30108b711f56..59ddb20a82e6 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 1ff5faec9772..e92ef995520f 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 62f06dd9e23a..95321ba42475 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index a0908ac83a78..5c30e9fe3765 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -9,6 +9,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 0bfe868b3e65..260f5d7a64a7 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index e205717c79c0..99ff6fafbb90 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index f05e38f18775..29dca83a4d3b 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 44458015c24f..af7df9ee91c3 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index f65304d1aefc..ddeffb600e8e 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index f5caa46bd25c..c9dfc4a7817c 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index fa3701eee994..5b4c74ca1e2a 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -6,6 +6,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_NXP_ESBC=y CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000 CONFIG_PCIE1=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 08860ab5c402..5ac030097780 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 7a873c136013..5b0c8ccdc4e8 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -7,6 +7,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SRIO_PCIE_BOOT_SLAVE=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 7a7a5c760a05..12b31c5f1b23 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 0321170553ca..7d0b130dc034 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index b0b6515f1041..a74b10997570 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index e5a1d59cc337..ef99ce759294 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index b8768d5dd7fb..138032d28640 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 167069ae59a1..894d08e47f88 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index bd126f9da9cd..72a8df6c9e55 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_PCIE1=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index e7ed84b855bf..a8b25b62f808 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_PCIE1=y diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index aca8704a8e93..368622de1e3d 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_T2080RDB_REV_D=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 514b41cd843a..0ee65e1aa1dd 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 20eb620afb63..9f6398a433f8 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index cd6fb9675b00..38d33c20dc99 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_SYS_BOOK3E_HV=y # CONFIG_DEEP_SLEEP is not set CONFIG_PCIE1=y CONFIG_KM_DEF_NETDEV="eth2" diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index e019c168434a..2dc7da621600 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -25,7 +25,6 @@ #endif
/* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index a519b5a9355e..159002d1ed83 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -14,7 +14,6 @@ #include <linux/stringify.h>
/* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 3a7c643cfc94..25d82db0f8e9 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -53,7 +53,6 @@ #endif
/* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index eff22c18bb72..969e7f728feb 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -21,7 +21,6 @@ #endif
/* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index ba9bfdd72f7e..098125989e95 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -16,7 +16,6 @@ #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
/* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 12b479f9c773..6ec3c6a8c039 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -34,7 +34,6 @@ #endif /* CONFIG_RAMBOOT_PBL */
/* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 2252bf89543d..d8ad45688167 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -28,7 +28,6 @@ #endif
/* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index ed24733abf57..eafdc35c27bb 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -133,7 +133,6 @@ #define KM_I2C_DEBLOCK_SDA 21
/* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_RESET_VECTOR_ADDRESS 0xebfffffc
This converts the following to Kconfig: CONFIG_SYS_RAMBOOT
Signed-off-by: Tom Rini trini@konsulko.com --- arch/powerpc/cpu/mpc85xx/Kconfig | 1 + boot/Kconfig | 4 ++++ include/configs/MPC837XERDB.h | 6 ------ include/configs/P1010RDB.h | 6 ------ include/configs/P2041RDB.h | 4 ---- include/configs/T102xRDB.h | 4 ---- include/configs/T104xRDB.h | 4 ---- include/configs/T208xQDS.h | 4 ---- include/configs/T208xRDB.h | 4 ---- include/configs/T4240RDB.h | 4 ---- include/configs/corenet_ds.h | 4 ---- include/configs/km/km-mpc83xx.h | 8 -------- include/configs/p1_p2_rdb_pc.h | 2 -- include/configs/qemu-ppce500.h | 2 -- 14 files changed, 5 insertions(+), 52 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index f4f5ebfe0c40..9c5b1af8b591 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -109,6 +109,7 @@ config TARGET_QEMU_PPCE500 bool "Support qemu-ppce500" select ARCH_QEMU_E500 select PHYS_64BIT + select SYS_RAMBOOT imply OF_HAS_PRIOR_STAGE
config TARGET_T1024RDB diff --git a/boot/Kconfig b/boot/Kconfig index ee0dc90e93cc..8e50eef727d9 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -555,8 +555,12 @@ config CHROMEOS_VBOOT distinguishing between booting Chrome OS in a basic way (developer mode) and a full boot.
+config SYS_RAMBOOT + bool + config RAMBOOT_PBL bool "Freescale PBL(pre-boot loader) image format support" + select SYS_RAMBOOT help Some SoCs use PBL to load RCW and/or pre-initialization instructions. For more details refer to doc/README.pblimage diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index fc55e5c2f614..b6621f9a0728 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -126,12 +126,6 @@ * The reserved memory */
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#else -#undef CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
/* diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index aea744c826cc..b5e0e2901f0a 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -342,12 +342,6 @@ extern unsigned long get_sdram_size(void); FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0
-#if defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) -#define CONFIG_SYS_RAMBOOT -#else -#undef CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 2dc7da621600..72dd39d2306e 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -129,10 +129,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Write Timeout (ms) */
-#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC #define CONFIG_SYS_NAND_BASE 0xffa00000 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 159002d1ed83..a93e9d0b58ac 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -287,10 +287,6 @@ #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 #endif
-#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_HWCONFIG
/* define to use L1 as initial stack */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 25d82db0f8e9..365640dffc14 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -259,10 +259,6 @@ #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 #endif
-#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_HWCONFIG
/* define to use L1 as initial stack */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 969e7f728feb..2faec638e2dd 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -267,10 +267,6 @@ #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 #endif
-#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_HWCONFIG
/* define to use L1 as initial stack */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 098125989e95..5ed9e1badb3b 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -226,10 +226,6 @@ #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 #endif
-#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - #define CONFIG_HWCONFIG
/* define to use L1 as initial stack */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 6ec3c6a8c039..96e8ff4842b4 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -321,10 +321,6 @@ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0
-#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - /* I2C */ #define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */ #define I2C_MUX_PCA_ADDR_SEC 0x76 /* I2C bus multiplexer,secondary */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index d8ad45688167..66bd5cb9c0fe 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -119,10 +119,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC #define CONFIG_SYS_NAND_BASE 0xffa00000 diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index c8929814aaa9..9f76f48a5c6b 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -25,10 +25,6 @@ */ #define CONFIG_SYS_FLASH_BASE 0xF0000000
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#endif - /* Reserve 768 kB for Mon */ #define CONFIG_SYS_MONITOR_LEN (768 * 1024)
@@ -81,10 +77,6 @@ * Environment */
-#ifndef CONFIG_SYS_RAMBOOT -/* Address and size of Redundant Environment Sector */ -#endif /* CFG_SYS_RAMBOOT */ - /* * Environment Configuration */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 7c00f54dfd75..7410c60cbd2a 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -423,8 +423,6 @@ #ifdef CONFIG_TPL_BUILD #define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) #endif -#elif defined(CONFIG_SYS_RAMBOOT) -#define SPL_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) #endif
#define CONFIG_LOADS_ECHO /* echo on for serial download */ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 451ae0e1e6df..ce60a3c7421d 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -9,8 +9,6 @@ #ifndef __QEMU_PPCE500_H #define __QEMU_PPCE500_H
-#define CONFIG_SYS_RAMBOOT - /* Needed to fill the ccsrbar pointer */
/* Virtual address to CCSRBAR */
This converts the following to Kconfig: CONFIG_SYS_FSL_CPC CONFIG_SYS_CPC_REINIT_F
Signed-off-by: Tom Rini trini@konsulko.com --- README | 4 ---- arch/Kconfig.nxp | 1 + arch/powerpc/cpu/mpc85xx/Kconfig | 9 +++++++++ arch/powerpc/include/asm/fsl_secure_boot.h | 3 --- configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig | 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1024RDB_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SECURE_BOOT_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/T4240RDB_defconfig | 1 + configs/kmcent2_defconfig | 1 + include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/kmcent2.h | 1 - 52 files changed, 50 insertions(+), 15 deletions(-)
diff --git a/README b/README index ed8e807c8f33..dae467a4da09 100644 --- a/README +++ b/README @@ -371,10 +371,6 @@ The following options need to be configured: In this mode, a single differential clock is used to supply clocks to the sysclock, ddrclock and usbclock.
- CONFIG_SYS_CPC_REINIT_F - This CONFIG is defined when the CPC is configured as SRAM at the - time of U-Boot entry and is required to be re-initialized. - - Generic CPU options: CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 5971ec5df4e6..d3ebbff43be1 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -16,6 +16,7 @@ config CHAIN_OF_TRUST select SHA_HW_ACCEL select SHA_PROG_HW_ACCEL select ENV_IS_NOWHERE + select SYS_CPC_REINIT_F if MPC85xx && !SYS_RAMBOOT select CMD_EXT4 if ARM select CMD_EXT4_WRITE if ARM imply CMD_BLOB diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 9c5b1af8b591..915e28e11088 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1221,6 +1221,15 @@ config SYS_BOOK3E_HV bool "Category E.HV is supported" depends on BOOKE
+config SYS_CPC_REINIT_F + bool + help + The CPC is configured as SRAM at the time of U-Boot entry and is + required to be re-initialized. + +config SYS_FSL_CPC + bool "Corenet Platform Cache support" + config SYS_MPC85XX_NO_RESETVEC bool "Discard resetvec section and move bootpg section up" depends on MPC85xx diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index a96a1ac5d77e..3e707600f28f 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -21,9 +21,6 @@ defined(CONFIG_TARGET_T1042D4RDB) || \ defined(CONFIG_TARGET_T1042RDB_PI) || \ defined(CONFIG_ARCH_T1024) -#ifndef CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_CPC_REINIT_F -#endif #undef CONFIG_SYS_INIT_L3_ADDR #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 #endif diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 459b9e6c5443..4c453a7cd943 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index 6ff6a4283069..b5f920b013e4 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index a5872faa4741..ecf63e59c6b3 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 247db8e0fef9..e609dfcbf216 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 91ad3ee30515..59fdc33ad47d 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 6ca91fe77ed2..17aa980518df 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 13857b8208f8..2be600a58478 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index b587d525a266..f22719558fef 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index c88a869bc8f1..2aba2228947a 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index a627475420f6..9bfb0a88f11b 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 82371ea9897b..1d5f00d1c8b4 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index be3d388484f5..741adc516229 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 4dcdb391e408..c10c94849e08 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 7620f4879a79..111ca1d4877e 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 68573a5c9821..fd94afa762f6 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 59ddb20a82e6..a2648c4e526d 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index e92ef995520f..5cf089d99009 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 95321ba42475..c7b2def55345 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -17,6 +17,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 5c30e9fe3765..9f1599fb6339 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_T1024RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 260f5d7a64a7..695d752dd5e0 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -13,6 +13,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 99ff6fafbb90..7e925643a376 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 29dca83a4d3b..bfae94210dab 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index af7df9ee91c3..3063157a7f66 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_T1042D4RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index ddeffb600e8e..8392299c9d4b 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -13,6 +13,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index c9dfc4a7817c..d043c8f793d9 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 5b4c74ca1e2a..2fc4e16cfe24 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_NXP_ESBC=y CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000 CONFIG_PCIE1=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 5ac030097780..daaccc62f3b9 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 5b0c8ccdc4e8..2228c64d10f1 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -8,6 +8,7 @@ CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SRIO_PCIE_BOOT_SLAVE=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 12b31c5f1b23..fbfbab84a185 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 7d0b130dc034..c6a2b6214138 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -13,6 +13,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index a74b10997570..e161f9ec623f 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index ef99ce759294..b5ede3003959 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 138032d28640..8df5b3db2904 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 894d08e47f88..1035ae8980e4 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -13,6 +13,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 72a8df6c9e55..1de3526028b1 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_PCIE1=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index a8b25b62f808..af8888982bfc 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_PCIE1=y diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index 368622de1e3d..e4eaa75d3024 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_T2080RDB_REV_D=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 0ee65e1aa1dd..583b2edc4c04 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PCIE1=y CONFIG_PCIE2=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 9f6398a433f8..c3216474c312 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_T4240RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 38d33c20dc99..bcecb88e4d10 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -12,6 +12,7 @@ CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y +CONFIG_SYS_FSL_CPC=y # CONFIG_DEEP_SLEEP is not set CONFIG_PCIE1=y CONFIG_KM_DEF_NETDEV="eth2" diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 72dd39d2306e..27889e3033cf 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -30,7 +30,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif
-#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_SYS_SRIO diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index a93e9d0b58ac..aa80d400bd98 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -15,7 +15,6 @@
/* High Level Configuration Options */
-#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#ifdef CONFIG_RAMBOOT_PBL diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 365640dffc14..2fb181090b5d 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -58,7 +58,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif
-#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
/* diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 2faec638e2dd..84dfc8948194 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -22,7 +22,6 @@
/* High Level Configuration Options */
-#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#ifdef CONFIG_RAMBOOT_PBL diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 5ed9e1badb3b..716e9c3d5566 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -17,7 +17,6 @@
/* High Level Configuration Options */
-#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#ifdef CONFIG_RAMBOOT_PBL diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 96e8ff4842b4..e697d8490c94 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -39,7 +39,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif
-#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
/* diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 66bd5cb9c0fe..d1a5d866d2d0 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -33,7 +33,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif
-#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
/* diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index eafdc35c27bb..ff9d7d59a390 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -137,7 +137,6 @@
#define CONFIG_RESET_VECTOR_ADDRESS 0xebfffffc
-#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
/* Environment in parallel NOR-Flash */
This converts the following to Kconfig: CONFIG_SYS_BOOT_RAMDISK_HIGH
Signed-off-by: Tom Rini trini@konsulko.com --- README | 5 ----- arch/arc/include/asm/config.h | 2 -- arch/arm/include/asm/config.h | 2 -- arch/m68k/include/asm/config.h | 2 -- arch/microblaze/include/asm/config.h | 2 -- arch/mips/include/asm/config.h | 2 -- arch/powerpc/include/asm/config.h | 2 -- arch/riscv/include/asm/config.h | 2 -- arch/x86/include/asm/config.h | 2 -- boot/Kconfig | 8 ++++++++ scripts/config_whitelist.txt | 1 - 11 files changed, 8 insertions(+), 22 deletions(-)
diff --git a/README b/README index dae467a4da09..fb0284d4ecb6 100644 --- a/README +++ b/README @@ -1754,11 +1754,6 @@ Configuration Settings: CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined, then the value in "bootm_size" will be used instead.
-- CONFIG_SYS_BOOT_RAMDISK_HIGH: - Enable initrd_high functionality. If defined then the - initrd_high feature is enabled and the bootm ramdisk subcommand - is enabled. - - CONFIG_SYS_BOOT_GET_CMDLINE: Enables allocating and saving kernel cmdline in space between "bootm_low" and "bootm_low" + BOOTMAPSZ. diff --git a/arch/arc/include/asm/config.h b/arch/arc/include/asm/config.h index 46e94be141b9..afdfcaa78b57 100644 --- a/arch/arc/include/asm/config.h +++ b/arch/arc/include/asm/config.h @@ -6,6 +6,4 @@ #ifndef __ASM_ARC_CONFIG_H_ #define __ASM_ARC_CONFIG_H_
-#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #endif /*__ASM_ARC_CONFIG_H_ */ diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index be44b7676429..5870412c4390 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -6,8 +6,6 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_
-#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #if defined(CONFIG_ARCH_LS1021A) || \ defined(CONFIG_FSL_LAYERSCAPE) #include <asm/arch/config.h> diff --git a/arch/m68k/include/asm/config.h b/arch/m68k/include/asm/config.h index 221eb93d58bc..bad0026648a1 100644 --- a/arch/m68k/include/asm/config.h +++ b/arch/m68k/include/asm/config.h @@ -6,6 +6,4 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_
-#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #endif diff --git a/arch/microblaze/include/asm/config.h b/arch/microblaze/include/asm/config.h index 221eb93d58bc..bad0026648a1 100644 --- a/arch/microblaze/include/asm/config.h +++ b/arch/microblaze/include/asm/config.h @@ -6,6 +6,4 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_
-#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #endif diff --git a/arch/mips/include/asm/config.h b/arch/mips/include/asm/config.h index 221eb93d58bc..bad0026648a1 100644 --- a/arch/mips/include/asm/config.h +++ b/arch/mips/include/asm/config.h @@ -6,6 +6,4 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_
-#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #endif diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h index 059ffe1fd4f9..79fe567b5875 100644 --- a/arch/powerpc/include/asm/config.h +++ b/arch/powerpc/include/asm/config.h @@ -14,8 +14,6 @@ #define HWCONFIG_BUFFER_SIZE 256 #endif
-#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #ifndef CONFIG_MAX_MEM_MAPPED #if defined(CONFIG_E500) || \ defined(CONFIG_MPC86xx) || \ diff --git a/arch/riscv/include/asm/config.h b/arch/riscv/include/asm/config.h index d91100753769..c55c85d4e6cd 100644 --- a/arch/riscv/include/asm/config.h +++ b/arch/riscv/include/asm/config.h @@ -7,6 +7,4 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_
-#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #endif diff --git a/arch/x86/include/asm/config.h b/arch/x86/include/asm/config.h index 221eb93d58bc..bad0026648a1 100644 --- a/arch/x86/include/asm/config.h +++ b/arch/x86/include/asm/config.h @@ -6,6 +6,4 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_
-#define CONFIG_SYS_BOOT_RAMDISK_HIGH - #endif diff --git a/boot/Kconfig b/boot/Kconfig index 8e50eef727d9..924845887975 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -606,6 +606,14 @@ config SYS_FSL_PBL_RCW Enables addition of RCW (Power on reset configuration) in built image. Please refer doc/README.pblimage for more details.
+config SYS_BOOT_RAMDISK_HIGH + depends on CMD_BOOTM || CMD_BOOTI || CMD_BOOTZ + depends on !(NIOS2 || SANDBOX || SH || XTENSA) + def_bool y + help + Enable initrd_high functionality. If defined then the initrd_high + feature is enabled and the boot* ramdisk subcommand is enabled. + endmenu # Boot images
menu "Boot timing" diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 2b792a90692d..f2181353ea71 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -502,7 +502,6 @@ CONFIG_SYS_BOOTCOUNT_LE CONFIG_SYS_BOOTMAPSZ CONFIG_SYS_BOOTM_LEN CONFIG_SYS_BOOT_BLOCK -CONFIG_SYS_BOOT_RAMDISK_HIGH CONFIG_SYS_CACHE_ACR0 CONFIG_SYS_CACHE_ACR1 CONFIG_SYS_CACHE_ACR2
As this is used in the environment, reference it directly rather than as a CONFIG value.
Cc: Fabio Estevam festevam@gmail.com Cc: Adrian Alonso adrian.alonso@nxp.com Signed-off-by: Tom Rini trini@konsulko.com --- An alternative would be to move to text file environments (which would be good to do regardless) and control this via an environmental variable if desired. Or introduce a new CONFIG symbol in Kconfig. --- include/configs/mx6sxsabresd.h | 4 +--- include/configs/mx7dsabresd.h | 5 +---- 2 files changed, 2 insertions(+), 7 deletions(-)
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 58d550fee9ec..570e2ce687ac 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -19,8 +19,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE
#ifdef CONFIG_IMX_BOOTAUX -/* Set to QSPI2 B flash at default */ -#define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000
#define UPDATE_M4_ENV \ "m4image=m4_qspi.bin\0" \ @@ -35,7 +33,7 @@ "sf write ${loadaddr} 0x0 ${filesize}; " \ "fi; " \ "fi\0" \ - "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" + "m4boot=sf probe 1:0; bootaux 0x78000000\0" #else #define UPDATE_M4_ENV "" #endif diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index a6b8c275fe77..b96341a587c4 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -12,10 +12,7 @@
#define PHYS_SDRAM_SIZE SZ_1G
- #ifdef CONFIG_IMX_BOOTAUX -/* Set to QSPI1 A flash at default */ -#define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
#define UPDATE_M4_ENV \ "m4image=m4_qspi.bin\0" \ @@ -30,7 +27,7 @@ "sf write ${loadaddr} 0x0 ${filesize}; " \ "fi; " \ "fi\0" \ - "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" + "m4boot=sf probe 0:0; bootaux 0x60000000\0" #else #define UPDATE_M4_ENV "" #endif
We only reference CONFIG_SYS_BFTIC3_BASE in one location. Move the comment to where we reference it, and use the value directly.
Cc: Holger Brunck holger.brunck@hitachienergy.com Cc: Heiko Schocher hs@denx.de Signed-off-by: Tom Rini trini@konsulko.com --- board/keymile/km83xx/km83xx.c | 6 ++++-- include/configs/kmcoge5ne.h | 6 ------ 2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index ecc8c786b6b8..8a0b17585663 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -102,8 +102,10 @@ int misc_init_r(void) int last_stage_init(void) { #if defined(CONFIG_TARGET_KMCOGE5NE) - struct bfticu_iomap *base = - (struct bfticu_iomap *)CONFIG_SYS_BFTIC3_BASE; + /* + * BFTIC3 on the local bus CS4 + */ + struct bfticu_iomap *base = (struct bfticu_iomap *)0xB0000000; u8 dip_switch = in_8((u8 *)&(base->mswitch)) & BFTICU_DIPSWITCH_MASK;
if (dip_switch != 0) { diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index 8f4685c271c6..b9d20c9c8eb9 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -35,12 +35,6 @@ CSCONFIG_ROW_BIT_13 | \ CSCONFIG_COL_BIT_10)
-/* - * BFTIC3 on the local bus CS4 - */ -#define CONFIG_SYS_BFTIC3_BASE 0xB0000000 -#define CONFIG_SYS_BFTIC3_SIZE 256 - /* enable POST tests */ #define CONFIG_POST (CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS) #define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */
We only reference CONFIG_SYS_BFTIC3_BASE in one location. Move the comment to where we reference it, and use the value directly.
Cc: Holger Brunck holger.brunck@hitachienergy.com Cc: Heiko Schocher hs@denx.de Signed-off-by: Tom Rini trini@konsulko.com
board/keymile/km83xx/km83xx.c | 6 ++++-- include/configs/kmcoge5ne.h | 6 ------ 2 files changed, 4 insertions(+), 8 deletions(-)
Reviewed-By: Holger Brunck holger.brunck@hitachienergy.com
Best regards Holger
Hello Tom,
On 25.06.22 17:02, Tom Rini wrote:
We only reference CONFIG_SYS_BFTIC3_BASE in one location. Move the comment to where we reference it, and use the value directly.
Cc: Holger Brunck holger.brunck@hitachienergy.com Cc: Heiko Schocher hs@denx.de Signed-off-by: Tom Rini trini@konsulko.com
board/keymile/km83xx/km83xx.c | 6 ++++-- include/configs/kmcoge5ne.h | 6 ------ 2 files changed, 4 insertions(+), 8 deletions(-)
Reviewed-by: Heiko Schocher hs@denx.de
bye, Heiko
This converts the following to Kconfig: CONFIG_SYS_BOOTCOUNT_LE CONFIG_SYS_BOOTCOUNT_BE
Signed-off-by: Tom Rini trini@konsulko.com --- configs/am335x_boneblack_vboot_defconfig | 1 + configs/am335x_evm_defconfig | 1 + configs/am335x_evm_spiboot_defconfig | 1 + configs/am335x_hs_evm_defconfig | 1 + configs/am335x_hs_evm_uart_defconfig | 1 + configs/am335x_sl50_defconfig | 1 + configs/chiliboard_defconfig | 1 + configs/dh_imx6_defconfig | 1 + configs/kmcent2_defconfig | 1 + configs/kmcoge5ne_defconfig | 1 + configs/kmeter1_defconfig | 1 + configs/kmsupx5_defconfig | 1 + configs/kmtegr1_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + configs/socfpga_is1_defconfig | 1 + configs/socfpga_sr1500_defconfig | 1 + configs/tuge1_defconfig | 1 + drivers/bootcount/Kconfig | 11 +++++++++++ include/bootcount.h | 8 -------- include/configs/am335x_evm.h | 8 -------- include/configs/am335x_guardian.h | 3 --- include/configs/am335x_sl50.h | 3 --- include/configs/chiliboard.h | 2 -- include/configs/dh_imx6.h | 3 --- include/configs/highbank.h | 2 -- include/configs/km/pg-wcom-ls102xa.h | 2 -- include/configs/socfpga_is1.h | 5 ----- include/configs/socfpga_sr1500.h | 5 ----- include/configs/tqma6_wru4.h | 3 --- 32 files changed, 31 insertions(+), 44 deletions(-)
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index b5ba2ccda5c9..ab74bdb2f884 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -54,6 +54,7 @@ CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_USB_FUNCTION_FASTBOOT=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index c7dbd3c5702d..de13af62be2d 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -63,6 +63,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_CLK=y CONFIG_CLK_CDCE9XX=y CONFIG_CLK_TI_CTRL=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index a5af17b2ffbe..f0a6b4be43a8 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -53,6 +53,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_CLK=y CONFIG_CLK_CDCE9XX=y CONFIG_DFU_TFTP=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index ef0a09877c10..4d0ee46ac70f 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -51,6 +51,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_CLK=y CONFIG_CLK_CDCE9XX=y CONFIG_DFU_MMC=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index d7ea5a31cd1d..9a86e869aa1f 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -52,6 +52,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_CLK=y CONFIG_CLK_CDCE9XX=y CONFIG_DFU_MMC=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 1338190e9ff4..8808e1ff6583 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -68,6 +68,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index 849d751f08e8..055690614299 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_MISC=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 7cb4f417e7eb..051816f719fe 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -69,6 +69,7 @@ CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000 CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index bcecb88e4d10..ee900f5d9cd3 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -57,6 +57,7 @@ CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="fm1-mac5" CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 924f9ac46377..3b73fbc812cb 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -200,6 +200,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index dfa2500a29a5..310278d61127 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -169,6 +169,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 221335da8eae..027bb73b57c6 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -160,6 +160,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index f1791a0fc0e8..19cb1e85b04c 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -161,6 +161,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index 4b205e13831c..a84e0cdd9eb1 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -70,6 +70,7 @@ CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index 98f3dcc4545a..f04c3ac61476 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -68,6 +68,7 @@ CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index ce3e7eb179b1..4380d8836351 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -70,6 +70,7 @@ CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 623afa33877e..ca05e25d47e2 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -68,6 +68,7 @@ CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index c3b6368f6171..958adfe25a43 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -52,6 +52,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_ARP_TIMEOUT=500 CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 53d6b82972f9..def2ee8dbc14 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -56,6 +56,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 3c2a7a34d1c4..1bd48cb82a14 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -160,6 +160,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 66ce4cc29baa..13e99dfc0d95 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -237,4 +237,15 @@ config SYS_BOOTCOUNT_MAGIC help Set the magic value used for the boot counter.
+choice + prompt "Endianess of bootcount accessors" + default SYS_BOOTCOUNT_LE + +config SYS_BOOTCOUNT_LE + bool "Little endian accessors" + +config SYS_BOOTCOUNT_BE + bool "Big endian accessors" + +endchoice endif diff --git a/include/bootcount.h b/include/bootcount.h index fccee7e15bf7..bfa5d4642764 100644 --- a/include/bootcount.h +++ b/include/bootcount.h @@ -72,14 +72,6 @@ ulong bootcount_load(void);
#if defined(CONFIG_SPL_BOOTCOUNT_LIMIT) || defined(CONFIG_TPL_BOOTCOUNT_LIMIT) || defined(CONFIG_BOOTCOUNT_LIMIT)
-#if !defined(CONFIG_SYS_BOOTCOUNT_LE) && !defined(CONFIG_SYS_BOOTCOUNT_BE) -# if __BYTE_ORDER == __LITTLE_ENDIAN -# define CONFIG_SYS_BOOTCOUNT_LE -# else -# define CONFIG_SYS_BOOTCOUNT_BE -# endif -#endif - #ifdef CONFIG_SYS_BOOTCOUNT_LE static inline void raw_bootcount_store(volatile u32 *addr, u32 data) { diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 754bcc3304b9..f0a979423dea 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -170,14 +170,6 @@ /* PMIC support */ #define CONFIG_POWER_TPS65910
-/* SPL */ -#ifndef CONFIG_NOR_BOOT -/* Bootcount using the RTC block */ -#define CONFIG_SYS_BOOTCOUNT_BE - -/* USB gadget RNDIS */ -#endif - #ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ /* NAND: driver related configs */ diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index 93fea95996cc..356c21a1b0ad 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -93,9 +93,6 @@ #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
-/* Bootcount using the RTC block */ -#define CONFIG_SYS_BOOTCOUNT_LE - #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index 79d9d03a176b..4289836bc3f6 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -50,9 +50,6 @@
/* SPL */
-/* Bootcount using the RTC block */ -#define CONFIG_SYS_BOOTCOUNT_BE - /* Network. */
#endif /* ! __CONFIG_AM335X_SL50_H */ diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index 97adb8353591..965eba58b311 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -105,8 +105,6 @@ #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
/* SPL */ -/* Bootcount using the RTC block */ -#define CONFIG_SYS_BOOTCOUNT_BE
/* NAND: device related configs */ /* NAND: driver related configs */ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index f770b3552869..79424647f618 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -26,9 +26,6 @@
/* Miscellaneous configurable options */
-/* Bootcounter */ -#define CONFIG_SYS_BOOTCOUNT_BE - /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 1fc38cfa0cc6..bb6cc957261a 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -14,8 +14,6 @@
#define CONFIG_PL011_CLOCK 150000000
-#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ - /* * Miscellaneous configurable options */ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index a12923386a5f..dd6747388c74 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -187,8 +187,6 @@
#define CONFIG_SYS_MONITOR_LEN 0x100000 /* 1Mbyte */
-#define CONFIG_SYS_BOOTCOUNT_BE - /* * Environment */ diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h index 468a35d4ff9b..ad271791206d 100644 --- a/include/configs/socfpga_is1.h +++ b/include/configs/socfpga_is1.h @@ -16,9 +16,4 @@ /* The rest of the configuration is shared */ #include <configs/socfpga_common.h>
-/* - * Bootcounter - */ -#define CONFIG_SYS_BOOTCOUNT_BE - #endif /* __CONFIG_SOCFPGA_IS1_H__ */ diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index 62c1bc7408a6..432144cb40ce 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -18,11 +18,6 @@ /* Enable SPI NOR flash reset, needed for SPI booting */ #define CONFIG_SPI_N25Q256A_RESET
-/* - * Bootcounter - */ -#define CONFIG_SYS_BOOTCOUNT_BE - /* Environment setting for SPI flash */
/* The rest of the configuration is shared */ diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h index 90db96599c1b..999130600ccb 100644 --- a/include/configs/tqma6_wru4.h +++ b/include/configs/tqma6_wru4.h @@ -24,9 +24,6 @@
/* LED */
-/* Bootcounter */ -#define CONFIG_SYS_BOOTCOUNT_BE - /* I2C */
#endif /* __CONFIG_TQMA6_WRU4_H */
This converts the following to Kconfig: CONFIG_SYS_BOOTM_LEN
As part of this, rework error handling in boot/bootm.c so that we pass the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not be available to host tools but we do know the size that we passed to malloc().
Signed-off-by: Tom Rini trini@konsulko.com --- README | 6 ----- boot/bootm.c | 24 +++++++++---------- cmd/Kconfig | 10 ++++++++ configs/M5208EVBE_defconfig | 1 + configs/M5235EVB_Flash32_defconfig | 1 + configs/M5235EVB_defconfig | 1 + configs/M5253DEMO_defconfig | 1 + configs/M5275EVB_defconfig | 1 + configs/M53017EVB_defconfig | 1 + configs/M5329AFEE_defconfig | 1 + configs/M5329BFEE_defconfig | 1 + configs/M5373EVB_defconfig | 1 + configs/MCR3000_defconfig | 1 + configs/a3y17lte_defconfig | 1 + configs/a5y17lte_defconfig | 1 + configs/a64-olinuxino-emmc_defconfig | 1 + configs/a64-olinuxino_defconfig | 1 + configs/a7y17lte_defconfig | 1 + configs/ae350_rv32_defconfig | 1 + configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv32_xip_defconfig | 1 + configs/ae350_rv64_defconfig | 1 + configs/ae350_rv64_spl_defconfig | 1 + configs/ae350_rv64_spl_xip_defconfig | 1 + configs/ae350_rv64_xip_defconfig | 1 + configs/am335x_baltos_defconfig | 1 + configs/am335x_boneblack_vboot_defconfig | 1 + configs/am335x_evm_defconfig | 1 + configs/am335x_evm_spiboot_defconfig | 1 + configs/am335x_guardian_defconfig | 1 + configs/am335x_hs_evm_defconfig | 1 + configs/am335x_hs_evm_uart_defconfig | 1 + configs/am335x_shc_defconfig | 1 + configs/am335x_shc_ict_defconfig | 1 + configs/am335x_shc_netboot_defconfig | 1 + configs/am335x_shc_sdboot_defconfig | 1 + configs/am335x_sl50_defconfig | 1 + configs/am57xx_evm_defconfig | 1 + configs/am57xx_hs_evm_defconfig | 1 + configs/am57xx_hs_evm_usb_defconfig | 1 + configs/am62x_evm_a53_defconfig | 1 + configs/am64x_evm_a53_defconfig | 1 + configs/am65x_evm_r5_defconfig | 1 + configs/am65x_evm_r5_usbdfu_defconfig | 1 + configs/am65x_evm_r5_usbmsc_defconfig | 1 + configs/am65x_hs_evm_r5_defconfig | 1 + configs/amarula_a64_relic_defconfig | 1 + configs/apalis_imx6_defconfig | 1 + configs/apple_m1_defconfig | 1 + configs/aristainetos2c_defconfig | 1 + configs/aristainetos2ccslb_defconfig | 1 + ...edev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 1 + configs/axs101_defconfig | 1 + configs/axs103_defconfig | 1 + configs/bananapi_m2_plus_h5_defconfig | 1 + configs/bananapi_m64_defconfig | 1 + configs/bcm7260_defconfig | 1 + configs/bcm7445_defconfig | 1 + configs/bcm947622_defconfig | 1 + configs/bcm963158_ram_defconfig | 1 + configs/bcm968360bg_ram_defconfig | 1 + configs/bcm968580xref_ram_defconfig | 1 + configs/bcm_ns3_defconfig | 1 + configs/beelink_gs1_defconfig | 1 + configs/bitmain_antminer_s9_defconfig | 1 + configs/boston32r2_defconfig | 1 + configs/boston32r2el_defconfig | 1 + configs/boston32r6_defconfig | 1 + configs/boston32r6el_defconfig | 1 + configs/boston64r2_defconfig | 1 + configs/boston64r2el_defconfig | 1 + configs/boston64r6_defconfig | 1 + configs/boston64r6el_defconfig | 1 + configs/brppt1_mmc_defconfig | 1 + configs/brppt1_nand_defconfig | 1 + configs/brppt1_spi_defconfig | 1 + configs/brsmarc1_defconfig | 1 + configs/bubblegum_96_defconfig | 1 + configs/cgtqmx8_defconfig | 1 + configs/chromebit_mickey_defconfig | 1 + configs/chromebook_jerry_defconfig | 1 + configs/chromebook_minnie_defconfig | 1 + configs/chromebook_speedy_defconfig | 1 + configs/ci20_mmc_defconfig | 1 + configs/cl-som-imx7_defconfig | 1 + configs/clearfog_gt_8k_defconfig | 1 + configs/cm_fx6_defconfig | 1 + configs/colibri-imx6ull-emmc_defconfig | 1 + configs/colibri-imx6ull_defconfig | 1 + configs/colibri_imx6_defconfig | 1 + configs/colibri_imx7_defconfig | 1 + configs/colibri_imx7_emmc_defconfig | 1 + configs/corstone1000_defconfig | 1 + configs/cortina_presidio-asic-base_defconfig | 1 + configs/cortina_presidio-asic-emmc_defconfig | 1 + configs/cortina_presidio-asic-pnand_defconfig | 1 + configs/crs305-1g-4s-bit_defconfig | 1 + configs/crs305-1g-4s_defconfig | 1 + configs/crs326-24g-2s-bit_defconfig | 1 + configs/crs326-24g-2s_defconfig | 1 + configs/crs328-4c-20s-4s-bit_defconfig | 1 + configs/crs328-4c-20s-4s_defconfig | 1 + configs/cubieboard7_defconfig | 1 + configs/deneb_defconfig | 1 + configs/dh_imx6_defconfig | 1 + configs/display5_defconfig | 1 + configs/display5_factory_defconfig | 1 + configs/durian_defconfig | 1 + configs/emlid_neutis_n5_devboard_defconfig | 1 + configs/espresso7420_defconfig | 1 + configs/ev-imx280-nano-x-mb_defconfig | 1 + configs/evb-rk3128_defconfig | 1 + configs/evb-rk3229_defconfig | 1 + configs/evb-rk3288_defconfig | 1 + configs/firefly-rk3288_defconfig | 1 + configs/gazerbeam_defconfig | 1 + configs/ge_b1x5v2_defconfig | 1 + configs/ge_bx50v3_defconfig | 1 + configs/giedi_defconfig | 1 + configs/gwventana_emmc_defconfig | 1 + configs/gwventana_gw5904_defconfig | 1 + configs/gwventana_nand_defconfig | 1 + configs/hsdk_4xd_defconfig | 1 + configs/hsdk_defconfig | 1 + configs/ids8313_defconfig | 1 + configs/imx6dl_icore_nand_defconfig | 1 + configs/imx6dl_mamoj_defconfig | 1 + configs/imx6q_bosch_acc_defconfig | 1 + configs/imx6q_icore_nand_defconfig | 1 + configs/imx6q_logic_defconfig | 1 + configs/imx6qdl_icore_mipi_defconfig | 1 + configs/imx6qdl_icore_mmc_defconfig | 1 + configs/imx6qdl_icore_nand_defconfig | 1 + configs/imx6qdl_icore_rqs_defconfig | 1 + configs/imx6ul_geam_mmc_defconfig | 1 + configs/imx6ul_geam_nand_defconfig | 1 + configs/imx6ul_isiot_emmc_defconfig | 1 + configs/imx6ul_isiot_nand_defconfig | 1 + configs/imx7_cm_defconfig | 1 + configs/imx8mm-cl-iot-gate-optee_defconfig | 1 + configs/imx8mm-cl-iot-gate_defconfig | 1 + configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 + configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 + configs/imx8mm_beacon_defconfig | 1 + configs/imx8mm_data_modul_edm_sbc_defconfig | 1 + configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_beacon_2g_defconfig | 1 + configs/imx8mn_beacon_defconfig | 1 + configs/imx8mn_bsh_smm_s2_defconfig | 1 + configs/imx8mn_bsh_smm_s2pro_defconfig | 1 + configs/imx8mn_ddr4_evk_defconfig | 1 + configs/imx8mn_evk_defconfig | 1 + configs/imx8mn_var_som_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 + configs/imx8mp_dhcom_pdk2_defconfig | 1 + configs/imx8mp_evk_defconfig | 1 + configs/imx8mp_rsb3720a1_4G_defconfig | 1 + configs/imx8mp_rsb3720a1_6G_defconfig | 1 + configs/imx8mp_venice_defconfig | 1 + configs/imx8mq_cm_defconfig | 1 + configs/imx8mq_phanbell_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/j7200_evm_r5_defconfig | 1 + configs/j721e_evm_r5_defconfig | 1 + configs/j721e_hs_evm_r5_defconfig | 1 + configs/j721s2_evm_r5_defconfig | 1 + configs/km_kirkwood_128m16_defconfig | 1 + configs/km_kirkwood_defconfig | 1 + configs/km_kirkwood_pci_defconfig | 1 + configs/kmcoge5ne_defconfig | 1 + configs/kmcoge5un_defconfig | 1 + configs/kmeter1_defconfig | 1 + configs/kmnusa_defconfig | 1 + configs/kmopti2_defconfig | 1 + configs/kmsupx5_defconfig | 1 + configs/kmsuse2_defconfig | 1 + configs/kmtegr1_defconfig | 1 + configs/kmtepr2_defconfig | 1 + configs/kontron-sl-mx6ul_defconfig | 1 + configs/kontron_pitx_imx8m_defconfig | 1 + configs/kontron_sl28_defconfig | 1 + configs/kp_imx6q_tpc_defconfig | 1 + configs/libretech_all_h3_cc_h5_defconfig | 1 + configs/libretech_all_h3_it_h5_defconfig | 1 + configs/libretech_all_h5_cc_h5_defconfig | 1 + configs/liteboard_defconfig | 1 + configs/ls1021aqds_ddr4_nor_defconfig | 1 + configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 1 + configs/ls1021aqds_nand_defconfig | 1 + configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021aqds_nor_defconfig | 1 + configs/ls1021aqds_nor_lpuart_defconfig | 1 + configs/ls1021aqds_qspi_defconfig | 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + configs/ls1021atsn_qspi_defconfig | 1 + configs/ls1021atsn_sdcard_defconfig | 1 + configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_nor_defconfig | 1 + configs/ls1021atwr_nor_lpuart_defconfig | 1 + configs/ls1021atwr_qspi_defconfig | 1 + ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_defconfig | 1 + configs/ls1021atwr_sdcard_qspi_defconfig | 1 + configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 1 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 1 + configs/marsboard_defconfig | 1 + configs/mccmon6_nor_defconfig | 1 + configs/mccmon6_sd_defconfig | 1 + configs/meerkat96_defconfig | 1 + configs/microblaze-generic_defconfig | 1 + configs/microchip_mpfs_icicle_defconfig | 1 + configs/miqi-rk3288_defconfig | 1 + configs/mscc_jr2_defconfig | 1 + configs/mscc_luton_defconfig | 1 + configs/mscc_ocelot_defconfig | 1 + configs/mscc_serval_defconfig | 1 + configs/mscc_servalt_defconfig | 1 + configs/mt7620_mt7530_rfb_defconfig | 1 + configs/mt7620_rfb_defconfig | 1 + configs/mt7623a_unielec_u7623_02_defconfig | 1 + configs/mt7623n_bpir2_defconfig | 1 + configs/mt7628_rfb_defconfig | 1 + configs/mt7629_rfb_defconfig | 1 + configs/mvebu_crb_cn9130_defconfig | 1 + configs/mvebu_db_armada8k_defconfig | 1 + configs/mvebu_db_cn9130_defconfig | 1 + configs/mvebu_mcbin-88f8040_defconfig | 1 + configs/mvebu_puzzle-m801-88f8040_defconfig | 1 + configs/mx6cuboxi_defconfig | 1 + configs/mx6qsabrelite_defconfig | 1 + configs/mx6sabreauto_defconfig | 1 + configs/mx6sabresd_defconfig | 1 + configs/mx6slevk_defconfig | 1 + configs/mx6slevk_spinor_defconfig | 1 + configs/mx6slevk_spl_defconfig | 1 + configs/mx6sllevk_defconfig | 1 + configs/mx6sllevk_plugin_defconfig | 1 + configs/mx6sxsabreauto_defconfig | 1 + configs/mx6sxsabresd_defconfig | 1 + configs/mx6ul_14x14_evk_defconfig | 1 + configs/mx6ul_9x9_evk_defconfig | 1 + configs/mx6ull_14x14_evk_defconfig | 1 + configs/mx6ull_14x14_evk_plugin_defconfig | 1 + configs/mx6ulz_14x14_evk_defconfig | 1 + configs/mx7dsabresd_defconfig | 1 + configs/mx7dsabresd_qspi_defconfig | 1 + configs/mx7ulp_com_defconfig | 1 + configs/mx7ulp_evk_defconfig | 1 + configs/mx7ulp_evk_plugin_defconfig | 1 + configs/myir_mys_6ulx_defconfig | 1 + configs/nanopi_a64_defconfig | 1 + configs/nanopi_neo2_defconfig | 1 + configs/nanopi_neo_plus2_defconfig | 1 + configs/nanopi_r1s_h5_defconfig | 1 + configs/nitrogen6dl2g_defconfig | 1 + configs/nitrogen6dl_defconfig | 1 + configs/nitrogen6q2g_defconfig | 1 + configs/nitrogen6q_defconfig | 1 + configs/nitrogen6s1g_defconfig | 1 + configs/nitrogen6s_defconfig | 1 + configs/novena_defconfig | 1 + configs/nsim_700_defconfig | 1 + configs/nsim_700be_defconfig | 1 + configs/nsim_hs38_defconfig | 1 + configs/nsim_hs38be_defconfig | 1 + configs/o4-imx6ull-nano_defconfig | 1 + configs/oceanic_5205_5inmfd_defconfig | 1 + configs/octeon_ebb7304_defconfig | 1 + configs/octeon_nic23_defconfig | 1 + configs/octeontx2_95xx_defconfig | 1 + configs/octeontx2_96xx_defconfig | 1 + configs/octeontx_81xx_defconfig | 1 + configs/octeontx_83xx_defconfig | 1 + configs/openpiton_riscv64_defconfig | 1 + configs/openpiton_riscv64_spl_defconfig | 1 + configs/opos6uldev_defconfig | 1 + configs/orangepi_3_defconfig | 1 + configs/orangepi_lite2_defconfig | 1 + configs/orangepi_one_plus_defconfig | 1 + configs/orangepi_pc2_defconfig | 1 + configs/orangepi_prime_defconfig | 1 + configs/orangepi_win_defconfig | 1 + configs/orangepi_zero2_defconfig | 1 + configs/orangepi_zero_plus2_defconfig | 1 + configs/orangepi_zero_plus_defconfig | 1 + configs/p2371-0000_defconfig | 1 + configs/p2371-2180_defconfig | 1 + configs/p2571_defconfig | 1 + configs/p2771-0000-000_defconfig | 1 + configs/p2771-0000-500_defconfig | 1 + configs/p3450-0000_defconfig | 1 + configs/pcm058_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + configs/phycore-rk3288_defconfig | 1 + configs/phycore_pcl063_defconfig | 1 + configs/phycore_pcl063_ull_defconfig | 1 + configs/pico-dwarf-imx6ul_defconfig | 1 + configs/pico-dwarf-imx7d_defconfig | 1 + configs/pico-hobbit-imx6ul_defconfig | 1 + configs/pico-hobbit-imx7d_defconfig | 1 + configs/pico-imx6_defconfig | 1 + configs/pico-imx6ul_defconfig | 1 + configs/pico-imx7d_bl33_defconfig | 1 + configs/pico-imx7d_defconfig | 1 + configs/pico-imx8mq_defconfig | 1 + configs/pico-nymph-imx7d_defconfig | 1 + configs/pico-pi-imx6ul_defconfig | 1 + configs/pico-pi-imx7d_defconfig | 1 + configs/pine64-lts_defconfig | 1 + configs/pine64_plus_defconfig | 1 + configs/pine_h64_defconfig | 1 + configs/pinebook_defconfig | 1 + configs/pinephone_defconfig | 1 + configs/pinetab_defconfig | 1 + configs/pomelo_defconfig | 1 + configs/popmetal-rk3288_defconfig | 1 + configs/qemu-riscv32_defconfig | 1 + configs/qemu-riscv32_smode_defconfig | 1 + configs/qemu-riscv32_spl_defconfig | 1 + configs/qemu-riscv64_defconfig | 1 + configs/qemu-riscv64_smode_defconfig | 1 + configs/qemu-riscv64_spl_defconfig | 1 + configs/qemu_arm_defconfig | 1 + configs/riotboard_defconfig | 1 + configs/rock-pi-n8-rk3288_defconfig | 1 + configs/rock2_defconfig | 1 + configs/sama7g5ek_mmc1_defconfig | 1 + configs/sama7g5ek_mmc_defconfig | 1 + configs/seeed_npi_imx6ull_defconfig | 1 + configs/sifive_unleashed_defconfig | 1 + configs/sifive_unmatched_defconfig | 1 + configs/smegw01_defconfig | 1 + configs/socfpga_agilex_atf_defconfig | 1 + configs/socfpga_agilex_defconfig | 1 + configs/socfpga_agilex_vab_defconfig | 1 + configs/socfpga_n5x_atf_defconfig | 1 + configs/socfpga_n5x_defconfig | 1 + configs/socfpga_n5x_vab_defconfig | 1 + configs/socfpga_secu1_defconfig | 1 + configs/socfpga_stratix10_atf_defconfig | 1 + configs/socfpga_stratix10_defconfig | 1 + configs/socfpga_vining_fpga_defconfig | 1 + configs/socrates_defconfig | 1 + configs/somlabs_visionsom_6ull_defconfig | 1 + configs/sopine_baseboard_defconfig | 1 + configs/stemmy_defconfig | 1 + configs/stih410-b2260_defconfig | 1 + configs/stm32mp13_defconfig | 1 + ...stm32mp15-icore-stm32mp1-ctouch2_defconfig | 1 + ...tm32mp15-icore-stm32mp1-edimm2.2_defconfig | 1 + ...-microgea-stm32mp1-microdev2-of7_defconfig | 1 + ...mp15-microgea-stm32mp1-microdev2_defconfig | 1 + configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_defconfig | 1 + configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + configs/synquacer_developerbox_defconfig | 1 + configs/syzygy_hub_defconfig | 1 + configs/tanix_tx6_defconfig | 1 + configs/tb100_defconfig | 1 + configs/tbs2910_defconfig | 1 + configs/teres_i_defconfig | 1 + configs/thunderx_88xx_defconfig | 1 + configs/tinker-rk3288_defconfig | 1 + configs/tinker-s-rk3288_defconfig | 1 + configs/topic_miami_defconfig | 1 + configs/topic_miamilite_defconfig | 1 + configs/topic_miamiplus_defconfig | 1 + configs/tqma6dl_mba6_mmc_defconfig | 1 + configs/tqma6dl_mba6_spi_defconfig | 1 + configs/tqma6q_mba6_mmc_defconfig | 1 + configs/tqma6q_mba6_spi_defconfig | 1 + configs/tqma6s_mba6_mmc_defconfig | 1 + configs/tqma6s_mba6_spi_defconfig | 1 + configs/tuge1_defconfig | 1 + configs/tuxx1_defconfig | 1 + configs/udoo_defconfig | 1 + configs/udoo_neo_defconfig | 1 + configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_v7_defconfig | 1 + configs/uniphier_v8_defconfig | 1 + configs/variscite_dart6ul_defconfig | 1 + configs/vining_2000_defconfig | 1 + configs/vyasa-rk3288_defconfig | 1 + configs/wandboard_defconfig | 1 + configs/warp7_bl33_defconfig | 1 + configs/warp7_defconfig | 1 + configs/warp_defconfig | 1 + configs/xenguest_arm64_defconfig | 1 + configs/xilinx_versal_virt_defconfig | 1 + configs/xilinx_zynq_virt_defconfig | 1 + configs/xilinx_zynqmp_r5_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + include/configs/M5208EVBE.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/MPC837XERDB.h | 1 - include/configs/MPC8548CDS.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/am335x_evm.h | 2 -- include/configs/am335x_guardian.h | 2 -- include/configs/am335x_shc.h | 2 -- include/configs/am335x_sl50.h | 2 -- include/configs/am57xx_evm.h | 2 -- include/configs/am65x_evm.h | 2 -- include/configs/apalis-imx8.h | 2 -- include/configs/ax25-ae350.h | 1 - include/configs/axs10x.h | 2 -- include/configs/baltos.h | 1 - include/configs/bcm947622.h | 2 -- include/configs/bcm_ns3.h | 1 - include/configs/bcmstb.h | 1 - include/configs/boston.h | 1 - include/configs/broadcom_bcm963158.h | 1 - include/configs/brppt1.h | 1 - include/configs/brsmarc1.h | 1 - include/configs/ci20.h | 1 - include/configs/colibri-imx8x.h | 2 -- include/configs/corenet_ds.h | 1 - include/configs/crs3xx-98dx3236.h | 2 -- include/configs/dragonboard410c.h | 1 - include/configs/dragonboard820c.h | 1 - include/configs/durian.h | 1 - include/configs/exynos78x0-common.h | 1 - include/configs/gw_ventana.h | 3 --- include/configs/hikey.h | 2 -- include/configs/hikey960.h | 2 -- include/configs/hsdk-4xd.h | 2 -- include/configs/hsdk.h | 2 -- include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/imx8mm_data_modul_edm_sbc.h | 2 -- include/configs/imx8mm_evk.h | 1 - include/configs/imx8mm_icore_mx8mm.h | 1 - include/configs/imx8mm_venice.h | 1 - include/configs/imx8mn_bsh_smm_s2_common.h | 2 -- include/configs/imx8mn_evk.h | 2 -- include/configs/imx8mn_var_som.h | 2 -- include/configs/imx8mn_venice.h | 1 - include/configs/imx8mp_dhcom_pdk2.h | 2 -- include/configs/imx8mp_evk.h | 2 -- include/configs/imx8mp_rsb3720.h | 2 -- include/configs/imx8mp_venice.h | 1 - include/configs/imx8mq_cm.h | 2 -- include/configs/imx8mq_evk.h | 2 -- include/configs/imx8qm_mek.h | 2 -- include/configs/imx8qm_rom7720.h | 2 -- include/configs/imx8ulp_evk.h | 1 - include/configs/iot2050.h | 2 -- include/configs/iot_devkit.h | 2 -- include/configs/j721e_evm.h | 2 -- include/configs/j721s2_evm.h | 2 -- include/configs/km/km-powerpc.h | 1 - include/configs/km/km_arm.h | 1 - include/configs/km/pg-wcom-ls102xa.h | 1 - include/configs/kmcent2.h | 1 - include/configs/kontron-sl-mx8mm.h | 2 -- include/configs/kontron_pitx_imx8m.h | 2 -- include/configs/ls1012a_common.h | 2 -- include/configs/ls1021aqds.h | 1 - include/configs/ls1021atsn.h | 2 -- include/configs/ls1021atwr.h | 1 - include/configs/ls1028a_common.h | 2 -- include/configs/ls1043a_common.h | 2 -- include/configs/ls1046a_common.h | 2 -- include/configs/ls1088a_common.h | 1 - include/configs/ls2080a_common.h | 2 -- include/configs/lx2160a_common.h | 2 -- include/configs/malta.h | 2 -- include/configs/meson64.h | 1 - include/configs/microblaze-generic.h | 2 -- include/configs/microchip_mpfs_icicle.h | 2 -- include/configs/mt7620.h | 2 -- include/configs/mt7622.h | 1 - include/configs/mt7623.h | 2 -- include/configs/mt7628.h | 2 -- include/configs/mt7629.h | 2 -- include/configs/mt8183.h | 2 -- include/configs/mt8512.h | 3 --- include/configs/mt8516.h | 2 -- include/configs/mt8518.h | 2 -- include/configs/mvebu_armada-37xx.h | 2 -- include/configs/mx6_common.h | 2 -- include/configs/mx7_common.h | 2 -- include/configs/mx7ulp_com.h | 2 -- include/configs/mx7ulp_evk.h | 2 -- include/configs/nsim.h | 2 -- include/configs/octeon_common.h | 2 -- include/configs/octeontx2_common.h | 1 - include/configs/octeontx_common.h | 1 - include/configs/openpiton-riscv64.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/phycore_imx8mm.h | 1 - include/configs/phycore_imx8mp.h | 2 -- include/configs/pico-imx8mq.h | 2 -- include/configs/pomelo.h | 1 - include/configs/poplar.h | 1 - include/configs/presidio_asic.h | 2 -- include/configs/px30_common.h | 4 ---- include/configs/qemu-arm.h | 2 -- include/configs/qemu-ppce500.h | 1 - include/configs/qemu-riscv.h | 2 -- include/configs/rcar-gen3-common.h | 1 - include/configs/rk3128_common.h | 2 -- include/configs/rk322x_common.h | 2 -- include/configs/rk3288_common.h | 2 -- include/configs/rk3308_common.h | 4 ---- include/configs/rk3328_common.h | 2 -- include/configs/rk3368_common.h | 2 -- include/configs/rk3399_common.h | 2 -- include/configs/rk3568_common.h | 2 -- include/configs/rpi.h | 4 ---- include/configs/sama7g5ek.h | 1 - include/configs/sdm845.h | 1 - include/configs/sifive-unleashed.h | 2 -- include/configs/sifive-unmatched.h | 2 -- include/configs/socfpga_arria5_secu1.h | 2 -- include/configs/socfpga_soc64_common.h | 1 - include/configs/socfpga_vining_fpga.h | 1 - include/configs/stemmy.h | 1 - include/configs/stih410-b2260.h | 2 -- include/configs/stm32mp13_common.h | 1 - include/configs/stm32mp15_common.h | 1 - include/configs/sunxi-common.h | 4 ---- include/configs/tb100.h | 2 -- include/configs/total_compute.h | 2 -- include/configs/turris_mox.h | 1 - include/configs/uniphier.h | 2 -- include/configs/vcoreiii.h | 2 -- include/configs/verdin-imx8mm.h | 2 -- include/configs/verdin-imx8mp.h | 2 -- include/configs/vexpress_aemv8.h | 2 -- include/configs/x86-common.h | 1 - include/configs/xilinx_versal.h | 2 -- include/configs/xilinx_zynqmp.h | 2 -- include/configs/xilinx_zynqmp_r5.h | 1 - include/configs/zynq-common.h | 1 - scripts/config_whitelist.txt | 1 - 555 files changed, 419 insertions(+), 270 deletions(-)
diff --git a/README b/README index fb0284d4ecb6..ff0df3797d21 100644 --- a/README +++ b/README @@ -1736,12 +1736,6 @@ Configuration Settings:
Non-cached memory is only supported on 32-bit ARM at present.
-- CONFIG_SYS_BOOTM_LEN: - Normally compressed uImages are limited to an - uncompressed size of 8 MBytes. If this is not enough, - you can define CONFIG_SYS_BOOTM_LEN in your board config file - to adjust this setting to your needs. - - CONFIG_SYS_BOOTMAPSZ: Maximum size of memory mapped by the startup code of the Linux kernel; all data that must be processed by diff --git a/boot/bootm.c b/boot/bootm.c index dfa65f125e57..86dbfbcfed5b 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -33,11 +33,6 @@ #include <bootm.h> #include <image.h>
-#ifndef CONFIG_SYS_BOOTM_LEN -/* use 8MByte as default max gunzip size */ -#define CONFIG_SYS_BOOTM_LEN 0x800000 -#endif - #define MAX_CMDLINE_SIZE SZ_4K
#define IH_INITRD_ARCH IH_ARCH_DEFAULT @@ -369,10 +364,12 @@ static int bootm_find_other(struct cmd_tbl *cmdtp, int flag, int argc, * * @comp_type: Compression type being used (IH_COMP_...) * @uncomp_size: Number of bytes uncompressed + * @buf_size: Number of bytes the decompresion buffer was * @ret: errno error code received from compression library * Return: Appropriate BOOTM_ERR_ error code */ -static int handle_decomp_error(int comp_type, size_t uncomp_size, int ret) +static int handle_decomp_error(int comp_type, size_t uncomp_size, + size_t buf_size, int ret) { const char *name = genimg_get_comp_name(comp_type);
@@ -380,7 +377,7 @@ static int handle_decomp_error(int comp_type, size_t uncomp_size, int ret) if (ret == -ENOSYS) return BOOTM_ERR_UNIMPLEMENTED;
- if (uncomp_size >= CONFIG_SYS_BOOTM_LEN) + if (uncomp_size >= buf_size) printf("Image too large: increase CONFIG_SYS_BOOTM_LEN\n"); else printf("%s: uncompress error %d\n", name, ret); @@ -420,7 +417,8 @@ static int bootm_load_os(bootm_headers_t *images, int boot_progress) load_buf, image_buf, image_len, CONFIG_SYS_BOOTM_LEN, &load_end); if (err) { - err = handle_decomp_error(os.comp, load_end - load, err); + err = handle_decomp_error(os.comp, load_end - load, + CONFIG_SYS_BOOTM_LEN, err); bootstage_error(BOOTSTAGE_ID_DECOMP_IMAGE); return err; } @@ -1006,7 +1004,7 @@ static int bootm_host_load_image(const void *fit, int req_image_type, ulong data, len; bootm_headers_t images; int noffset; - ulong load_end; + ulong load_end, buf_size; uint8_t image_type; uint8_t imape_comp; void *load_buf; @@ -1032,14 +1030,14 @@ static int bootm_host_load_image(const void *fit, int req_image_type, }
/* Allow the image to expand by a factor of 4, should be safe */ - load_buf = malloc((1 << 20) + len * 4); + buf_size = (1 << 20) + len * 4; + load_buf = malloc(buf_size); ret = image_decomp(imape_comp, 0, data, image_type, load_buf, - (void *)data, len, CONFIG_SYS_BOOTM_LEN, - &load_end); + (void *)data, len, buf_size, &load_end); free(load_buf);
if (ret) { - ret = handle_decomp_error(imape_comp, load_end - 0, ret); + ret = handle_decomp_error(imape_comp, load_end - 0, buf_size, ret); if (ret != BOOTM_ERR_UNIMPLEMENTED) return ret; } diff --git a/cmd/Kconfig b/cmd/Kconfig index bb956e330750..357b82849f7f 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -335,6 +335,16 @@ config BOOTM_VXWORKS help Support booting VxWorks images via the bootm command.
+config SYS_BOOTM_LEN + hex "Maximum size of a decompresed OS image" + depends on CMD_BOOTM || CMD_BOOTI || CMD_BOOTZ + default 0x4000000 if PPC || ARM64 + default 0x1000000 if X86 + default 0x800000 + help + Normally compressed OS images are limited to an uncompressed size of + 8 MiB. If this is not enough, increase this setting to fit your needs. + config CMD_BOOTEFI bool "bootefi" depends on EFI_LOADER diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 4ab888f59ed5..858fc5bbfd2e 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index 2a7996278418..c7fd5a07a7c5 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 5eeed2d2f313..a14bf427ad0a 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig index b3e6277a7e6d..3ed703a7a793 100644 --- a/configs/M5253DEMO_defconfig +++ b/configs/M5253DEMO_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index 3420934caf71..fe6ffca43c9f 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index cec2520bdd78..28d51eaa9deb 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 9d55d5058e57..c59359b820c7 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index bd0cbddfb89c..ae4add504b1c 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 0a159eb170e2..aead0f45bd30 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index 236be1628ce0..6adba431ef09 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_PROMPT="S3K> " CONFIG_SYS_PBSIZE=278 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_LOADB is not set diff --git a/configs/a3y17lte_defconfig b/configs/a3y17lte_defconfig index 67eb7aff1fd0..9c0427236b93 100644 --- a/configs/a3y17lte_defconfig +++ b/configs/a3y17lte_defconfig @@ -20,6 +20,7 @@ CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/a5y17lte_defconfig b/configs/a5y17lte_defconfig index 44915ea5341e..ea0773e7a264 100644 --- a/configs/a5y17lte_defconfig +++ b/configs/a5y17lte_defconfig @@ -20,6 +20,7 @@ CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig index 7d8e7649f2a5..afa0c24b688a 100644 --- a/configs/a64-olinuxino-emmc_defconfig +++ b/configs/a64-olinuxino-emmc_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index 06f51a8f8d31..ccb5abc98452 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/a7y17lte_defconfig b/configs/a7y17lte_defconfig index 58486f6a5715..952c72b760d2 100644 --- a/configs/a7y17lte_defconfig +++ b/configs/a7y17lte_defconfig @@ -20,6 +20,7 @@ CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index fcfc7b3fe231..b7ea28b1786a 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index cfd857c183fb..fd89ea14e9cb 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 36345fbfdc33..2a0c1abf6e54 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index 01883850f9a4..e85921bcb3ab 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 477329fa67ae..cab5a387e5a9 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index eba12a8f0d40..a5cc75718229 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 6ade12b740e2..dbe5db278fd2 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index 2be91815a8e7..c9dc1d10f821 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index 0ec440917519..bbb987c5edd6 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index ab74bdb2f884..9fe5ac4a1618 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index de13af62be2d..b5801094e8c4 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00080000 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index f0a6b4be43a8..1f28d50a1b3e 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 34bef30edd3b..56da3720d961 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 4d0ee46ac70f..bb03e487f874 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y # CONFIG_SPL_YMODEM_SUPPORT is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index 9a86e869aa1f..ac451026b09a 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 77593e3e3dcb..070674651ffd 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index 97a361ce4d61..595e7301cf9e 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 2c6fc5496ebd..d5cd182acb83 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -51,6 +51,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index a154a342551a..e9e89f627e20 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 8808e1ff6583..f2385e3d703a 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index a077ef8ae24b..249e6702dd76 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_CMD_SPL=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index e22c11d9807d..aa0b466d9548 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index fc1bc01c0629..1c37b635406a 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index 7ebf3665214f..2c0bd4d2e10c 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_MMC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 49bfc006ddba..0f547526fe62 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -63,6 +63,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_DM=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 2d8add2fbd5e..5232b979709d 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -64,6 +64,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index 05a6a9219ea7..7507128c11e9 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -56,6 +56,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index 37e04483dbdb..e7e222647322 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -56,6 +56,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index fc0c5432dbc3..6e63f0e88078 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -60,6 +60,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/amarula_a64_relic_defconfig b/configs/amarula_a64_relic_defconfig index 0e173c28c12a..72f97cee4de5 100644 --- a/configs/amarula_a64_relic_defconfig +++ b/configs/amarula_a64_relic_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_MUSB_GADGET=y diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index f9721796dbf9..b5f0aeb28b10 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_PROMPT="Apalis iMX6 # " CONFIG_SYS_MAXARGS=48 CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1055 +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig index c4fd80345657..4ba09334d422 100644 --- a/configs/apple_m1_defconfig +++ b/configs/apple_m1_defconfig @@ -8,6 +8,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_NET is not set CONFIG_APPLE_SPI_KEYB=y # CONFIG_MMC is not set diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index 26bcb00ff537..3b2f3c204aaa 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_ENV_FLAGS=y CONFIG_CMD_NVEDIT_INFO=y # CONFIG_CMD_FLASH is not set diff --git a/configs/aristainetos2ccslb_defconfig b/configs/aristainetos2ccslb_defconfig index 682903082cba..c07e547f551c 100644 --- a/configs/aristainetos2ccslb_defconfig +++ b/configs/aristainetos2ccslb_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_ENV_FLAGS=y CONFIG_CMD_NVEDIT_INFO=y # CONFIG_CMD_FLASH is not set diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 450b2830e56a..bfcbaa59f854 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x8000000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2073 +CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADP=y diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index efad458720b3..c744b38cc48b 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AXS# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=278 +CONFIG_SYS_BOOTM_LEN=0x8000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index 0d1764958224..29affdc5e964 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AXS# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=278 +CONFIG_SYS_BOOTM_LEN=0x8000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig index 0fb1bda1c6ef..a68742e9d6a7 100644 --- a/configs/bananapi_m2_plus_h5_defconfig +++ b/configs/bananapi_m2_plus_h5_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 5d1d10a0918c..36aa80a09baa 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index 280422021099..c44e6ba4ffcc 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=536 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index 0382034a4793..bab2c76efb73 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=536 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/bcm947622_defconfig b/configs/bcm947622_defconfig index af9e0c742c69..c61fbe1848e6 100644 --- a/configs/bcm947622_defconfig +++ b/configs/bcm947622_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_CACHE=y CONFIG_OF_EMBED=y CONFIG_CLK=y diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig index 3bc4ca3ef6e2..424eca7946b8 100644 --- a/configs/bcm963158_ram_defconfig +++ b/configs/bcm963158_ram_defconfig @@ -25,6 +25,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig index d327dc68b110..7f9093c6f6d3 100644 --- a/configs/bcm968360bg_ram_defconfig +++ b/configs/bcm968360bg_ram_defconfig @@ -23,6 +23,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y diff --git a/configs/bcm968580xref_ram_defconfig b/configs/bcm968580xref_ram_defconfig index ef5ae44345e7..a8c7ffa74875 100644 --- a/configs/bcm968580xref_ram_defconfig +++ b/configs/bcm968580xref_ram_defconfig @@ -23,6 +23,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 9446f8454c1a..9181b9e47743 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_PROMPT="u-boot> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 # CONFIG_SYS_XTRACE is not set +CONFIG_SYS_BOOTM_LEN=0x1800000 CONFIG_CMD_GPT=y CONFIG_CMD_GPT_RENAME=y CONFIG_CMD_MMC=y diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig index 6453a72a7d78..2c440e44f5dc 100644 --- a/configs/beelink_gs1_defconfig +++ b/configs/beelink_gs1_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 98d38a89a042..00f604725f51 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_PROMPT="antminer> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2075 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x3c00000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_DM is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig index 691e47c5508d..2be57d2d1ed9 100644 --- a/configs/boston32r2_defconfig +++ b/configs/boston32r2_defconfig @@ -21,6 +21,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig index 3c4aac93d89a..bcd6c05a1141 100644 --- a/configs/boston32r2el_defconfig +++ b/configs/boston32r2el_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig index 30c5356c015b..7bb4e692d6b7 100644 --- a/configs/boston32r6_defconfig +++ b/configs/boston32r6_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig index f1253e6a51cf..a3c6546ebb5b 100644 --- a/configs/boston32r6el_defconfig +++ b/configs/boston32r6el_defconfig @@ -23,6 +23,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig index a7c67805ab1a..4a41e6b5cc64 100644 --- a/configs/boston64r2_defconfig +++ b/configs/boston64r2_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig index 326c757057fb..792341e76f06 100644 --- a/configs/boston64r2el_defconfig +++ b/configs/boston64r2el_defconfig @@ -23,6 +23,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig index d31b92dc3cda..bf7f709524b9 100644 --- a/configs/boston64r6_defconfig +++ b/configs/boston64r6_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig index 72b3649d4a13..f716a4383959 100644 --- a/configs/boston64r6el_defconfig +++ b/configs/boston64r6el_defconfig @@ -23,6 +23,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index b1c8577ab627..f088e0bdc099 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index 5addd4970b2a..7f961ae473cb 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 67683c895d23..5d6dfbd5c449 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 2f7ff524cc1d..0a906ca95517 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -56,6 +56,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig index 0daff7d15054..8dc928a9274e 100644 --- a/configs/bubblegum_96_defconfig +++ b/configs/bubblegum_96_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyOWL5,115200n8" CONFIG_SYS_PROMPT="U-Boot => " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1051 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_CACHE=y diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 17219969f604..5dea71980ba0 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -49,6 +49,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_CLK=y CONFIG_CMD_DM=y diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index 862b37d0fb64..dad3b36b9937 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SPL_CRC32 is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index a0f15f6e7b2d..35d546e63159 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SPL_CRC32 is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 513e5f85e9cb..60fc528a8ce7 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SPL_CRC32 is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 7fc505ee4e36..e6f03faa87e8 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SPL_CRC32 is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 983642dac5c6..07848a5933eb 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1c CONFIG_SPL_MMC_TINY=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DM=y CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index bf670dbae689..d1e44f8e68ab 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -41,6 +41,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index cf35307937f6..baafe3c58c6e 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -26,6 +26,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 9bf78788e497..c02def8ecd51 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="CM-FX6 # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=538 +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_XIMG is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/colibri-imx6ull-emmc_defconfig b/configs/colibri-imx6ull-emmc_defconfig index bfbbf34ae5cd..81987abcc6f8 100644 --- a/configs/colibri-imx6ull-emmc_defconfig +++ b/configs/colibri-imx6ull-emmc_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=547 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index a4225d862b44..f309bc8a726c 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=547 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 0bdd088b1e7e..0320eafb11e9 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_PROMPT="Colibri iMX6 # " CONFIG_SYS_MAXARGS=48 CONFIG_SYS_CBSIZE=1024 CONFIG_SYS_PBSIZE=1056 +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index 15dae6b3db94..9de3744a0016 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_PBSIZE=544 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index 361077ee84e7..40b1e8432ccb 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_PBSIZE=544 # CONFIG_CMD_BOOTD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig index 49a651aba238..ba5cf0308f3a 100644 --- a/configs/corstone1000_defconfig +++ b/configs/corstone1000_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 # CONFIG_CMD_CONSOLE is not set CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_XIMG is not set CONFIG_CMD_LOADM=y # CONFIG_CMD_LOADS is not set diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index 3edc532e31eb..1471deb0a987 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0xc00000 CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index becb1beb1f91..456f26ced3c2 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0xc00000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_WDT=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index 842ec9fa92a7..be3e6a9bd193 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0xc00000 CONFIG_CMD_MTD=y CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig index 01e784efa85f..1b46ab4bf972 100644 --- a/configs/crs305-1g-4s-bit_defconfig +++ b/configs/crs305-1g-4s-bit_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index 98e10d509dd1..a7a3ffe4812d 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig index dd04bd18a1c3..70f71de6ae09 100644 --- a/configs/crs326-24g-2s-bit_defconfig +++ b/configs/crs326-24g-2s-bit_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig index 8f7b839460b9..5991b62923af 100644 --- a/configs/crs326-24g-2s_defconfig +++ b/configs/crs326-24g-2s_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig index 68a47fc7c219..434e9fb90f39 100644 --- a/configs/crs328-4c-20s-4s-bit_defconfig +++ b/configs/crs328-4c-20s-4s-bit_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig index fbf810136349..8e08cceaac4a 100644 --- a/configs/crs328-4c-20s-4s_defconfig +++ b/configs/crs328-4c-20s-4s_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig index 223a775387a4..7437d4b4b9d5 100644 --- a/configs/cubieboard7_defconfig +++ b/configs/cubieboard7_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTARGS="console=ttyOWL3,115200n8" CONFIG_SYS_PROMPT="U-Boot => " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1051 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_MMC=y CONFIG_MMC_OWL=y CONFIG_PHY_REALTEK=y diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index 309545be5310..ae1179a11601 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 051816f719fe..042aecd7b4e1 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index f586596ee921..2ddb11300df3 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2076 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index e2f35a9790c0..05ed34933a0d 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -55,6 +55,7 @@ CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2084 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/durian_defconfig b/configs/durian_defconfig index eccf55f895ec..27c8e260d92e 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -22,6 +22,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="durian#" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 +CONFIG_SYS_BOOTM_LEN=0x3c00000 # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set CONFIG_CMD_PCI=y diff --git a/configs/emlid_neutis_n5_devboard_defconfig b/configs/emlid_neutis_n5_devboard_defconfig index d9272eae168f..73121f2f4eb2 100644 --- a/configs/emlid_neutis_n5_devboard_defconfig +++ b/configs/emlid_neutis_n5_devboard_defconfig @@ -10,4 +10,5 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig index 9128fa086a7a..34e5b4e743f2 100644 --- a/configs/espresso7420_defconfig +++ b/configs/espresso7420_defconfig @@ -20,6 +20,7 @@ CONFIG_CONSOLE_MUX=y # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="ESPRESSO7420 # " CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set diff --git a/configs/ev-imx280-nano-x-mb_defconfig b/configs/ev-imx280-nano-x-mb_defconfig index 20ac5ddb332c..cb84e4045a97 100644 --- a/configs/ev-imx280-nano-x-mb_defconfig +++ b/configs/ev-imx280-nano-x-mb_defconfig @@ -11,6 +11,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index ac38d5e78852..6526933274a2 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -18,6 +18,7 @@ CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index f44dec09c278..ebf13c31c5bf 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_OPTEE_IMAGE=y CONFIG_TPL_MAX_SIZE=0x100000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 6587c19c36a1..a2b88169c67d 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_OPTEE_IMAGE=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index c2b3a0e315de..b3198bfa3808 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index c48541a9ec5c..a81aa00f2dba 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -133,6 +133,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=1024 CONFIG_CMD_CPU=y +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_BINOP=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index c282990aa458..0ef089c1ec53 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -47,6 +47,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_DM=y diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index c33287812663..d0949a157476 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -26,6 +26,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 7e9a7ea7c0b5..016282080bed 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index ea9e7e2cbf0a..0516176e6d07 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_PROMPT="Ventana > " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=539 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index c0c7c0daf134..63c87f17a5c6 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_PROMPT="Ventana > " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=539 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 7ce02fef8a2c..9d6819f19d30 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_PROMPT="Ventana > " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=539 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL_NAND_OFS=0x1100000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index 1d78c17d13b0..8e673545a966 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -23,6 +23,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="hsdk-4xd# " CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2075 +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_ENV_FLAGS=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index f9823af34d4d..3bd6f9314ccb 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -22,6 +22,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="hsdk# " CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2071 +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_ENV_FLAGS=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index b8070e7351a6..74dfc6680420 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -142,6 +142,7 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_CBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_IMLS=y CONFIG_CMD_ENV_FLAGS=y CONFIG_CMD_I2C=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index 71e3d39597d1..d53c524abeef 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -32,6 +32,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=541 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 067498d80e32..9f4408ee2e64 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6q_bosch_acc_defconfig b/configs/imx6q_bosch_acc_defconfig index a2501ebc1a1e..31a0d804afb3 100644 --- a/configs/imx6q_bosch_acc_defconfig +++ b/configs/imx6q_bosch_acc_defconfig @@ -43,6 +43,7 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_FDT is not set # CONFIG_CMD_GO is not set diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index bf5f620ad882..252eaf9c7085 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -33,6 +33,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=541 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 1510d10dc527..43de4b86e72e 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="i.MX6 Logic # " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=543 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x1500000 CONFIG_CMD_SPL_WRITE_SIZE=0x00100000 diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index bddc4ff98ef6..93fcd33116d3 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -45,6 +45,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-mipi> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=546 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index f8194a002a19..8b5fdf52ef80 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -48,6 +48,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=541 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index bf5f620ad882..252eaf9c7085 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -33,6 +33,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=541 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index cb2b0df98b76..d96d2dce428e 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -42,6 +42,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-rqs> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=545 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 9e46b1137fc8..d48e0a8c3298 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=538 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index ac56f204cdbd..e93df0a4e6d2 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -33,6 +33,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=538 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 7dadf80cd5ac..4c9cb42e7419 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -34,6 +34,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=541 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index a5828ead1bd7..afc338122614 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -33,6 +33,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=541 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index 830e4029e504..5d9511c70d05 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 800559120960..2a209bcfe471 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index dae7ddc20e07..070849881394 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 69ebc6fa325a..7040d782ef64 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index a3c142feb284..0488ec223f0d 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index bf2b6486347a..1a0672879e58 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index 399b388460f4..da59e4c7adf5 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -71,6 +71,7 @@ CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 190209d63256..49b36e0c8f48 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -49,6 +49,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index cadef45028d9..bd177887689c 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 357109e32e5f..738d308f45b3 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index 68c2940456d9..5013dc5895c7 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_FUSE=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index 4bc551210515..74d033eb4035 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index e16c1f60e674..e53e00845edb 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 6390a274e509..7c1e48dcccea 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 889bcf7dc58e..927b449e03f9 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 4a0bf393986c..935de023161a 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 3a41767c1560..f3b69070698b 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -71,6 +71,7 @@ CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 2b2a025c2b2f..dcee933a1be0 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index 97925196a85f..9f067fc6336e 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -56,6 +56,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index df35dcbb7625..2271f2a14e5e 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -56,6 +56,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index cef5f26d0baa..7fdde41b6da5 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index cd1ee4d9e702..6f59f29dac07 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_I2C=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index 2c566e068fd9..dc3992b0b45f 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 5c361780267f..f250425e26a6 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index a0f9f20f2f5c..9ac6ef167862 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -66,6 +66,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 21ec66d7e4ab..5e25ed620fa9 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -67,6 +67,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index 02a666522386..add8da02056c 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index fb6e69197d11..98d69a18b95f 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -73,6 +73,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 655759b09ce7..054038fdd043 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 65378d3cec16..ac2deeb27c20 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 4d116c3a7adb..80746791fe3a 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 3b73fbc812cb..34ab31565ca4 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -171,6 +171,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 8b54f9c7c842..5766f49d774a 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index 310278d61127..98f23dbbf175 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -141,6 +141,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 8cbde0e178aa..a309acae7dc3 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index 7775b604f570..6a6f20890a76 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -154,6 +154,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 027bb73b57c6..d251eba0d04b 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -134,6 +134,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index 8e27f9f6af3b..de44deb1ad1c 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index 19cb1e85b04c..7c0ebefa6982 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -133,6 +133,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index 6670c317a19e..5bb3d9c1160a 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -154,6 +154,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig index f9cebf9e9c96..a0486381f5cd 100644 --- a/configs/kontron-sl-mx6ul_defconfig +++ b/configs/kontron-sl-mx6ul_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index 27a89f9b1b66..49671e8fb47f 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index aaabb14f91a2..aaca8966c8f9 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x230000 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 8c5010d60523..03d1c5ca46e3 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig index 524138aa2e17..13ff75821244 100644 --- a/configs/libretech_all_h3_cc_h5_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/libretech_all_h3_it_h5_defconfig b/configs/libretech_all_h3_it_h5_defconfig index 1b0833358632..75280ee1e3b2 100644 --- a/configs/libretech_all_h3_it_h5_defconfig +++ b/configs/libretech_all_h3_it_h5_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPI_FLASH_XMC=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h5_cc_h5_defconfig b/configs/libretech_all_h5_cc_h5_defconfig index e0734f96735a..f42747e9466c 100644 --- a/configs/libretech_all_h5_cc_h5_defconfig +++ b/configs/libretech_all_h5_cc_h5_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPI_FLASH_XMC=y CONFIG_SUN8I_EMAC=y CONFIG_SPI=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index 24e71bb48d88..85db3dd74685 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -30,6 +30,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 165e1a780fd2..92fa4f000ed3 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -38,6 +38,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 13ded158e68e..fcbaf9b685e0 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -38,6 +38,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 1423d732f8ae..19a21f4a0475 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -66,6 +66,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 1e6e650f47b3..727475f62264 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 7cc61213e33b..82c6a1bdc3bc 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -38,6 +38,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 04cb087ad55c..438a8ecf0ae6 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -38,6 +38,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 2d560b2ea6d2..750a5a501e5f 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 8e23ccc78895..cbb7c55944f9 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -64,6 +64,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index ff8fbeb71778..71eff4582f93 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -63,6 +63,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index b368791280ac..4ee30728663e 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -29,6 +29,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 64266afd013a..aad997833111 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 831c20fc6d96..b86a60fd3264 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index c806309b0938..0410249b316b 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -36,6 +36,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index de025930d85d..82e3b39a522e 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -36,6 +36,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index b5b2cf13f923..9343203eacfd 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -37,6 +37,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 2b76f0a2b960..d247d114f393 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -62,6 +62,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 161fa1eebd6d..855657ca37a0 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -63,6 +63,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 2dc01e19bbc5..a225f1a37bf7 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -64,6 +64,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index be8689071665..e55b4a491455 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 436bae8af87c..2bd6d7c26fd8 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 88c0d5628dee..3aff68b0188f 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -16,6 +16,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 58d31d6a4432..e268fb63743f 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -18,6 +18,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index c7212ebcd3b9..307ba9ade977 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 80b59cbb053b..4282058f4987 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -33,6 +33,7 @@ CONFIG_SYS_SPL_ARGS_ADDR=0x18000000 CONFIG_SYS_OS_BASE=0x8180000 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NOR_OFS=0x09600000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 6984256a1c2d..5469fa93ec98 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -30,6 +30,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NOR_OFS=0x09600000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig index 4fdcdafac205..25ecc70b0ac7 100644 --- a/configs/meerkat96_defconfig +++ b/configs/meerkat96_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_MEMTEST=y diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 8ece12630fb2..688f42afdb1f 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_PROMPT="U-Boot-mONStR> " CONFIG_SYS_MAXARGS=15 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=544 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig index 462c8b7f291b..cf093532b192 100644 --- a/configs/microchip_mpfs_icicle_defconfig +++ b/configs/microchip_mpfs_icicle_defconfig @@ -16,6 +16,7 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM_MTD=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 7000b89311a2..34465f99a52f 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig index 04e15c61487b..f3b60e4e4f88 100644 --- a/configs/mscc_jr2_defconfig +++ b/configs/mscc_jr2_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig index b144dd4354c5..dc996936a9fa 100644 --- a/configs/mscc_luton_defconfig +++ b/configs/mscc_luton_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig index e088f3ca04ad..450ff6e0e174 100644 --- a/configs/mscc_ocelot_defconfig +++ b/configs/mscc_ocelot_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig index a56c5ebdecfe..fe2dcee9742c 100644 --- a/configs/mscc_serval_defconfig +++ b/configs/mscc_serval_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig index cf1c4db1d384..5819827de03a 100644 --- a/configs/mscc_servalt_defconfig +++ b/configs/mscc_servalt_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig index 9e409b60b275..8c64bb740a30 100644 --- a/configs/mt7620_mt7530_rfb_defconfig +++ b/configs/mt7620_mt7530_rfb_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig index f3f5e3a88711..2aa6eb7e2697 100644 --- a/configs/mt7620_rfb_defconfig +++ b/configs/mt7620_rfb_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig index 06e85c2f57d7..c8ac1997ca58 100644 --- a/configs/mt7623a_unielec_u7623_02_defconfig +++ b/configs/mt7623a_unielec_u7623_02_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_MAXARGS=8 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig index 4320fe5bb626..4e8905b68f79 100644 --- a/configs/mt7623n_bpir2_defconfig +++ b/configs/mt7623n_bpir2_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_MAXARGS=8 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig index 7690213ab80c..14fc8b05e3cf 100644 --- a/configs/mt7628_rfb_defconfig +++ b/configs/mt7628_rfb_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index f5e3c26d66ce..a74c3edbf8e6 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_MAXARGS=8 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig index 2541b8a22aee..bcffaefb9b19 100644 --- a/configs/mvebu_crb_cn9130_defconfig +++ b/configs/mvebu_crb_cn9130_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="Marvell>> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=1051 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index d3633d04dcb3..2eee745ed67a 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -25,6 +25,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig index 7563873ef2e4..99d46c1a2a80 100644 --- a/configs/mvebu_db_cn9130_defconfig +++ b/configs/mvebu_db_cn9130_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="Marvell>> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=1051 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index d334c89ed315..8164beb14132 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -26,6 +26,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig index 5cec3d8a682a..25ae690fe600 100644 --- a/configs/mvebu_puzzle-m801-88f8040_defconfig +++ b/configs/mvebu_puzzle-m801-88f8040_defconfig @@ -30,6 +30,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 1f15287369e3..0cded7fe8cb9 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y # CONFIG_CMD_PINMUX is not set diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index fa2c280a8d40..b8ae5915ffd6 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -27,6 +27,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index d9d429b4f962..e73e90dc7e7a 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -46,6 +46,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index ea0c76467462..9a47b47acbab 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -42,6 +42,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 # CONFIG_CMD_FLASH is not set diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 34f9b06deefb..d9668b4cf439 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -18,6 +18,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index 5e54fd3eac42..7537dc8a1222 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -20,6 +20,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index c05c33d0df88..126630c10617 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -34,6 +34,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index ec6843e57431..886090c1c0e8 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -20,6 +20,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index bd44298cb297..ab1df8435ed0 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index d32ea1ea3cac..483053599452 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 1985ff96dec3..549d880244dc 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 784a5d97f086..e1e156c32a0c 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -39,6 +39,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index de77e4fed6df..b210cefb0730 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -36,6 +36,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index c48fd4adae0b..48dc67c0c98f 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index a9b7eb4aaff2..e3182a25d92f 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -20,6 +20,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6ulz_14x14_evk_defconfig b/configs/mx6ulz_14x14_evk_defconfig index a3afd12d2cbc..ad949474865b 100644 --- a/configs/mx6ulz_14x14_evk_defconfig +++ b/configs/mx6ulz_14x14_evk_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index 0de958b621b9..7cc56ce707c4 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig index c52f45a97493..c0fa715f1f10 100644 --- a/configs/mx7dsabresd_qspi_defconfig +++ b/configs/mx7dsabresd_qspi_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/mx7ulp_com_defconfig b/configs/mx7ulp_com_defconfig index 5b3b332f10d1..2b55fbd3b29a 100644 --- a/configs/mx7ulp_com_defconfig +++ b/configs/mx7ulp_com_defconfig @@ -20,6 +20,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index 6a22040c035c..95cd22a59d8f 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_MAXARGS=256 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index ea03eb377171..45cdd74f09ab 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=256 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig index f748b4dd66ba..90a1d3b078b2 100644 --- a/configs/myir_mys_6ulx_defconfig +++ b/configs/myir_mys_6ulx_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig index 8f3c242a7a93..226ccaa12ffe 100644 --- a/configs/nanopi_a64_defconfig +++ b/configs/nanopi_a64_defconfig @@ -7,6 +7,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig index 66df94b33b9f..6fedf056ff72 100644 --- a/configs/nanopi_neo2_defconfig +++ b/configs/nanopi_neo2_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig index 60f26318429b..3f834b756dfd 100644 --- a/configs/nanopi_neo_plus2_defconfig +++ b/configs/nanopi_neo_plus2_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_r1s_h5_defconfig b/configs/nanopi_r1s_h5_defconfig index 06c564ec8cd8..a0cf8ff0442f 100644 --- a/configs/nanopi_r1s_h5_defconfig +++ b/configs/nanopi_r1s_h5_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index 2d653d4d0d33..1a9aff5e9a53 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -32,6 +32,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 282fea4508d1..16c1ffdaaa7c 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -32,6 +32,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index ec75ead6e20c..5637343eec13 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -32,6 +32,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 1b999ecc9c17..dd36a3af5573 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -32,6 +32,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 60edd7d6e321..473fdc65caae 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -32,6 +32,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 7d1da4cf6b1a..57003d661c00 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -32,6 +32,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/novena_defconfig b/configs/novena_defconfig index d4ab93850c4a..89e68991beb5 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_BUS=2 diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index bcf954aa632d..60809400d263 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 5a09db2f9bf3..e021cc94cca6 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index ad8acec4e085..3c3d1812a791 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -20,6 +20,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="nsim# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_DM=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index 8a63e58263f3..9e1a14845df3 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/o4-imx6ull-nano_defconfig b/configs/o4-imx6ull-nano_defconfig index b634a82eaa7f..a8bfdf72a12a 100644 --- a/configs/o4-imx6ull-nano_defconfig +++ b/configs/o4-imx6ull-nano_defconfig @@ -11,6 +11,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig index 21468c426b52..1cd8e9f2b680 100644 --- a/configs/oceanic_5205_5inmfd_defconfig +++ b/configs/oceanic_5205_5inmfd_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig index dc2e215c0502..0a18b94295a6 100644 --- a/configs/octeon_ebb7304_defconfig +++ b/configs/octeon_ebb7304_defconfig @@ -20,6 +20,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/octeon_nic23_defconfig b/configs/octeon_nic23_defconfig index 23cdef3316c0..95e98c1161db 100644 --- a/configs/octeon_nic23_defconfig +++ b/configs/octeon_nic23_defconfig @@ -27,6 +27,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index 2b3748b2d049..d4f9f565aef8 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index 0fd5b7212b82..aeb9f8a8b6de 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig index 38ef7f41632d..6fe96f47553d 100644 --- a/configs/octeontx_81xx_defconfig +++ b/configs/octeontx_81xx_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig index 371f61866970..5ba4fc1cad86 100644 --- a/configs/octeontx_83xx_defconfig +++ b/configs/octeontx_83xx_defconfig @@ -35,6 +35,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/openpiton_riscv64_defconfig b/configs/openpiton_riscv64_defconfig index f75c140cf4d4..98d6818e1be4 100644 --- a/configs/openpiton_riscv64_defconfig +++ b/configs/openpiton_riscv64_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index e9514f3da1de..8ae265f902b7 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index b76e272e2552..0fbe2b8b507e 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_PBSIZE=535 CONFIG_CMD_CONFIG=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig index 824f017dae45..dbca66d14292 100644 --- a/configs/orangepi_3_defconfig +++ b/configs/orangepi_3_defconfig @@ -10,6 +10,7 @@ CONFIG_BLUETOOTH_DT_DEVICE_FIXUP="brcm,bcm4345c5" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_PHY_SUN50I_USB3=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig index cfce6cb0d478..14c880628122 100644 --- a/configs/orangepi_lite2_defconfig +++ b/configs/orangepi_lite2_defconfig @@ -9,5 +9,6 @@ CONFIG_MMC0_CD_PIN="PF6" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig index 63d3addbdd38..a4336332fc75 100644 --- a/configs/orangepi_one_plus_defconfig +++ b/configs/orangepi_one_plus_defconfig @@ -9,5 +9,6 @@ CONFIG_MMC0_CD_PIN="PF6" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index 7b12bf00ff24..d0cad2a74615 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_SPI_SUNXI=y CONFIG_SPL_STACK=0x54000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index 8c4cb57ef0f9..690a5f195b63 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig index 830cbbaaeba3..7a9ca8e88a80 100644 --- a/configs/orangepi_win_defconfig +++ b/configs/orangepi_win_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index 62117548e2bc..cad7a7bb064f 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_MAX_SIZE=0xbfa0 CONFIG_SPL_STACK=0x58000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig index 79040125dcc3..02f70ccf0c09 100644 --- a/configs/orangepi_zero_plus2_defconfig +++ b/configs/orangepi_zero_plus2_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig index 008384e46014..15520955f5ef 100644 --- a/configs/orangepi_zero_plus_defconfig +++ b/configs/orangepi_zero_plus_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index dcba51de8e56..3852f7ba07f7 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-0000) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index f8a8407a7f81..bf5872203b3d 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index 031549470f7b..5f57b1c01989 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2571) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 7b2fd5795a0f..ed23937fed50 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2093 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index 41621970f004..15e07a129429 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2093 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index 7604e8a12231..36a001b83b66 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index 132942bf554c..51fa5e8f8309 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index a84e0cdd9eb1..bc58a631bed3 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -46,6 +46,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index f04c3ac61476..5d70160bd3b9 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -44,6 +44,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 4380d8836351..a604d3248f2c 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -46,6 +46,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index ca05e25d47e2..dfd6d627e1c1 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -44,6 +44,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index d791e9dcf8d4..519a705a40ed 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index b9d2a976636c..b7b1f3fb488f 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig index f172b065bfcf..7eb6850200aa 100644 --- a/configs/phycore_pcl063_ull_defconfig +++ b/configs/phycore_pcl063_ull_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig index cb9c6b8fece9..89dfaf475433 100644 --- a/configs/pico-dwarf-imx6ul_defconfig +++ b/configs/pico-dwarf-imx6ul_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 3adba803dd43..2577332a74dd 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index 0a2f10d0f159..8a759c24d4b1 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index cbfe346820f5..3f3fa1420b33 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index 086b3ee3ab25..94b352acfa0d 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index e8f6c434b66e..4e84627c27b9 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index a9d21eb02c8d..0220fb76b1a4 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_MEMTEST=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 6a2f87a8bb17..a004d3c68965 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index 8e27f7231429..6d4bebd6dcf2 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x8000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 3adba803dd43..2577332a74dd 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index a184393abd22..c50a8317cd51 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 79aa398e1e81..564bdb6d43f3 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig index c6b4f7bf1438..3f9ea1e329f1 100644 --- a/configs/pine64-lts_defconfig +++ b/configs/pine64-lts_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index 7dbe061790cd..62608f93bdb5 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -8,6 +8,7 @@ CONFIG_PINE64_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 2cddcf58301e..2f511c805173 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pinebook_defconfig b/configs/pinebook_defconfig index bf070aab8b34..982f68143b9d 100644 --- a/configs/pinebook_defconfig +++ b/configs/pinebook_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_R_I2C_ENABLE=y CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index d882c0cc8802..905b47d29e6a 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -12,6 +12,7 @@ CONFIG_PINEPHONE_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig index f90cb0d1f818..e20d20a2fd5e 100644 --- a/configs/pinetab_defconfig +++ b/configs/pinetab_defconfig @@ -10,3 +10,4 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 diff --git a/configs/pomelo_defconfig b/configs/pomelo_defconfig index 13b1d7b628b7..515624fd42e9 100644 --- a/configs/pomelo_defconfig +++ b/configs/pomelo_defconfig @@ -18,6 +18,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="pomelo#" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 5b5039e290be..7b024437c2ba 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 1f169e1a34f6..9634d7f77f11 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -13,6 +13,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 6f501a8798c6..1c5a0617aa8d 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -14,6 +14,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index 2bc7b9fbd0f0..2421c9a37194 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index 95dc1b47699d..d5eae95c80fd 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -14,6 +14,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 3eb3ea756e4e..2861d07f97e7 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -17,6 +17,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index e39accf94005..1ecfa27ce29a 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index d14a7adc5df3..50945472315a 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -28,6 +28,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PCI_INIT_R=y CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_DFU=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index a2ef6187f827..5d93bdf148b2 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x13000000 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index 7abb343ad698..87b050f5dc84 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index c06ab641c300..dcececdc315c 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 20ca98821a06..860362e15897 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -28,6 +28,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMTEST=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index c9f62a8ebe54..bc2852f0916f 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -28,6 +28,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMTEST=y diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig index e12a7d850606..79917b0349ac 100644 --- a/configs/seeed_npi_imx6ull_defconfig +++ b/configs/seeed_npi_imx6ull_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index 84bc49c0f23c..99faabaa2ff2 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_CLK=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 02d4e54b0717..c390af26897f 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_PWM=y diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 25a75d1aa5ac..a161c04c64b9 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_MEMTEST=y diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index 8f2d26e43d06..bdfe764d9e41 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -48,6 +48,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2082 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 7ae2b164a02d..e2d869610cf5 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -42,6 +42,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2082 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index 2beadc7ff7ac..6f15b3e9622a 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -49,6 +49,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2082 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 2917ece783da..37c843631881 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -47,6 +47,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2079 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 92d6045c6a7f..5f415b7ad4f9 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -39,6 +39,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2079 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index b9358fcc5d01..a57d54a7f271 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -48,6 +48,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2079 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index 4a244e17bc48..83e24402a887 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -44,6 +44,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 6c8ea81b67b6..6be4210c7d6e 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -47,6 +47,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2085 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 6aff07d77841..07e9f20a41a2 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -43,6 +43,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2085 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 0f4aa9051477..d0c87416efd0 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMDLINE_PS_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 621573653785..60a38abc8e3a 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_REGINFO=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_IMLS=y CONFIG_CMD_DM=y CONFIG_CMD_I2C=y diff --git a/configs/somlabs_visionsom_6ull_defconfig b/configs/somlabs_visionsom_6ull_defconfig index b99266fec74a..bfcadcb8fab0 100644 --- a/configs/somlabs_visionsom_6ull_defconfig +++ b/configs/somlabs_visionsom_6ull_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig index 576e86493a24..55116f72d0d3 100644 --- a/configs/sopine_baseboard_defconfig +++ b/configs/sopine_baseboard_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/stemmy_defconfig b/configs/stemmy_defconfig index 28a312987373..7fc0a39872c9 100644 --- a/configs/stemmy_defconfig +++ b/configs/stemmy_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CONFIG=y CONFIG_CMD_LICENSE=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index cb8c73afd474..c9be056cf624 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyAS1,115200 CONSOLE=/dev/ttyAS1 consoleblank=0 root=/ # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="stih410-b2260 => " CONFIG_SYS_PBSIZE=1058 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig index b5dcec78f516..f5b62628833e 100644 --- a/configs/stm32mp13_defconfig +++ b/configs/stm32mp13_defconfig @@ -18,6 +18,7 @@ CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 76a450952fc1..c70329cd4a69 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index d413d2cac4b6..838fd89eb993 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index dd270975508c..d503c1a36fe7 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 54a5385926f1..c2792aaad301 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index a17dbed6590e..416d92bf1bb6 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 48185d32baa7..3452403c61db 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 178c51687bec..4f478c13120c 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -52,6 +52,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_TARGET="u-boot.itb" CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_EEPROM=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 67a2c249007c..01fbb05123a9 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_TARGET="u-boot.itb" CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_EEPROM=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 7cb430fc3282..e14668042fa2 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index 5e4accf4b127..9ddc80fe17df 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -17,6 +17,7 @@ CONFIG_FIT=y CONFIG_BOOTSTAGE_STASH_SIZE=4096 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=128 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_IMLS=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 31a550031dae..5d0a85443f19 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x10000000 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2071 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADFS=y CONFIG_CMD_FPGA_LOADMK=y diff --git a/configs/tanix_tx6_defconfig b/configs/tanix_tx6_defconfig index d1f12fba9bb0..84dbf106d495 100644 --- a/configs/tanix_tx6_defconfig +++ b/configs/tanix_tx6_defconfig @@ -10,3 +10,4 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index 575bf2dae284..aebaa6ad1476 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="[tb100]:~# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 892d7c60d283..f0ecfd049d65 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_FDT is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig index cd6d825715e8..6f202dc8a434 100644 --- a/configs/teres_i_defconfig +++ b/configs/teres_i_defconfig @@ -11,6 +11,7 @@ CONFIG_I2C0_ENABLE=y CONFIG_PREBOOT="setenv usb_pgood_delay 2000; usb start" CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index 03b6201591f8..71fbf2122cdd 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_PROMPT="ThunderX_88XX> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=544 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index ce12b79ac471..839b93284f8c 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index 8dede27efcc9..886c6a933a7c 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index a11a17905cb9..986368a6dd36 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2077 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index f962f37d7ebe..0db956bd1c4c 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2077 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index dc71856f7204..b0e8ca82e339 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2077 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig index a02ee9278524..febe6eb162d6 100644 --- a/configs/tqma6dl_mba6_mmc_defconfig +++ b/configs/tqma6dl_mba6_mmc_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_GPIO=y diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 8f7e0ac1019f..c6f3eb4900f2 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -22,6 +22,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_GPIO=y diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index 48822f388c8f..53c8bca51939 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_GPIO=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index ed774262aecf..ea551ab85431 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -22,6 +22,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_GPIO=y diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index 9400c6481211..966c412ae9ce 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_GPIO=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index ddbf9a757e6e..719bef506f61 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -22,6 +22,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_GPIO=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 1bd48cb82a14..0d1c99c62c50 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -134,6 +134,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index 8f273da2f1ff..3fe731fd188a 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -156,6 +156,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index a1d2d7f2e475..cc3001fa84aa 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y # CONFIG_CMD_PINMUX is not set diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index e5ba2f3d0902..074fb725aedb 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img" CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y # CONFIG_CMD_PINMUX is not set diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 72306ab25eb8..5de9a6883432 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_CMD_CONFIG=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_GPIO=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index a448d1cb4be3..b6b5ca58c272 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_CMD_CONFIG=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_GPIO=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index db986cf13b84..eccfb0dbb167 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="env exist ${bootdev}preboot && run ${bootdev}preboot" CONFIG_LOGLEVEL=6 CONFIG_CMD_CONFIG=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_GPIO=y diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index 0f9cc8d82d3b..9a0e02d8c784 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 8d87857ba0a4..af55a4b834bc 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -43,6 +43,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index cbaf970e6ad9..516e2cc32b8c 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x8800 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x8000 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 8b0533ce585c..aa81cb4eb27f 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index a50a1c8bc770..9319cd30694c 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -22,6 +22,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 40f9e502e92f..7ec165c423fd 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_MEMTEST=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index 4c9f7051fefc..b722414373aa 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/xenguest_arm64_defconfig b/configs/xenguest_arm64_defconfig index fec124204b73..31fb4fde40e2 100644 --- a/configs/xenguest_arm64_defconfig +++ b/configs/xenguest_arm64_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1051 # CONFIG_CMD_BDI is not set # CONFIG_CMD_BOOTD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_GO is not set # CONFIG_CMD_IMI is not set diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 78a0cc382807..a91fa80e5ff2 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -24,6 +24,7 @@ CONFIG_CLOCKS=y CONFIG_SYS_PROMPT="Versal> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2073 +CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MEMTEST=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 92ef35c64751..aef971fb71f7 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2071 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_IMLS=y CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index 1ae634903063..1784792ce49c 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_PROMPT="ZynqMP r5> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 +CONFIG_SYS_BOOTM_LEN=0x3c00000 # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_EMBED=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 7f0ed8bc2250..b4ba161f3a31 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2073 +CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 14b35d7ef507..c773164c869b 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -78,7 +78,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/* FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 762d1dd94b1c..79448cf44048 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -84,7 +84,6 @@ */ /* Initial Memory map for Linux */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 840d3b4672e6..cac9b24ead8e 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -90,7 +90,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/* FLASH organization */ #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 4f6fc6d8cb9f..292578fc15b9 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -87,7 +87,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 90b0d41078ad..4d8f752777d0 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -92,7 +92,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 6eaa660e11fb..87d3e8fb153b 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -86,7 +86,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 2e3988f6c723..d920587c3790 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -88,7 +88,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index b6621f9a0728..d56d60306abf 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -248,7 +248,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 2eb33812f76a..c3c68071f2f2 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -356,7 +356,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index b5e0e2901f0a..d263999b5a71 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -477,7 +477,6 @@ extern unsigned long get_sdram_size(void); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 27889e3033cf..64f4c244fa21 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -353,7 +353,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index aa80d400bd98..3df6ec6246a5 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -457,7 +457,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 2fb181090b5d..8503fd108793 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -447,7 +447,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Dynamic MTD Partition support with mtdparts diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 84dfc8948194..e981f621c379 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -464,7 +464,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 716e9c3d5566..48cdc75a08df 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -418,7 +418,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index e697d8490c94..c31b0b684156 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -152,7 +152,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index f0a979423dea..4b59759f818e 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -19,8 +19,6 @@ #include <configs/ti_am335x_common.h> #include <linux/sizes.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_16M - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index 356c21a1b0ad..7a9928fba749 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -12,8 +12,6 @@
#include <configs/ti_am335x_common.h>
-#define CONFIG_SYS_BOOTM_LEN (16 << 20) - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index 5964ccc74c26..08bae9b886f2 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -16,8 +16,6 @@
/* settings we don;t want on this board */
-#define CONFIG_SYS_BOOTM_LEN (16 << 20) - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index 4289836bc3f6..7df5f1405512 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -10,8 +10,6 @@
#include <configs/ti_am335x_common.h>
-#define CONFIG_SYS_BOOTM_LEN (16 << 20) - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index c36311e06d79..d8b0531673f1 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -16,8 +16,6 @@
#define CONFIG_IODELAY_RECALIBRATION
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index d8f18d0b9ac9..0345160787ef 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -17,8 +17,6 @@ /* DDR Configuration */ #define CONFIG_SYS_SDRAM_BASE1 0x880000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define PARTS_DEFAULT \ /* Linux partitions */ \ "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 4a3e51d19ef9..c9f876f5da7e 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -63,8 +63,6 @@ /* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */ #define CONFIG_SYS_FSL_USDHC_NUM 3
-#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 754e90961940..daa5cdf5b26b 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -73,7 +73,6 @@ /* Initial Memory map for Linux*/ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Increase max gunzip size */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20)
/* Support autoboot from RAM (kernel image is loaded via debug port) */ #define KERNEL_IMAGE_ADDR "0x2000000 " diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 3e98ce09c720..f2357b5785a1 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -23,8 +23,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_512M
-#define CONFIG_SYS_BOOTM_LEN SZ_128M - /* * UART configuration */ diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 25906e404b1c..266b2ae04b3f 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -24,7 +24,6 @@ #define V_SCLK (V_OSCK)
/* FIT support */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M
#ifdef CONFIG_MTD_RAW_NAND
diff --git a/include/configs/bcm947622.h b/include/configs/bcm947622.h index 3a02806878bf..d0c46a2c823b 100644 --- a/include/configs/bcm947622.h +++ b/include/configs/bcm947622.h @@ -6,8 +6,6 @@ #ifndef __BCM947622_H #define __BCM947622_H
-#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024) - #define CONFIG_SYS_SDRAM_BASE 0x00000000
#define COUNTER_FREQUENCY 50000000 diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 97e1a88f270c..795de469384c 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -32,7 +32,6 @@ * Increase max uncompressed/gunzip size, keeping size same as EMMC linux * partition. */ -#define CONFIG_SYS_BOOTM_LEN 0x01800000
/* Access eMMC Boot_1 and Boot_2 partitions */
diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index ed78b732121f..134a3ec28920 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -91,7 +91,6 @@ extern phys_addr_t prior_stage_fdt_address; /* * Large kernel image bootm configuration. */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* * NS16550 configuration. diff --git a/include/configs/boston.h b/include/configs/boston.h index 3bf85b6c28d1..8b04492753a8 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -9,7 +9,6 @@ /* * General board configuration */ -#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
/* * CPU diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h index 493114836c8e..0c8d352be97c 100644 --- a/include/configs/broadcom_bcm963158.h +++ b/include/configs/broadcom_bcm963158.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } /* Memory usage */ -#define CONFIG_SYS_BOOTM_LEN (16 * 1024 * 1024)
/* * 63158 diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index c046fcb2bec0..789e6a4c9d59 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -16,7 +16,6 @@ #include <linux/stringify.h> /* ------------------------------------------------------------------------- */ /* memory */ -#define CONFIG_SYS_BOOTM_LEN SZ_32M
/* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ diff --git a/include/configs/brsmarc1.h b/include/configs/brsmarc1.h index 8fa5843be5d1..f9908352b0dc 100644 --- a/include/configs/brsmarc1.h +++ b/include/configs/brsmarc1.h @@ -18,7 +18,6 @@ /* ------------------------------------------------------------------------- */
/* memory */ -#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024)
/* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 01f636490536..192da015e188 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -28,6 +28,5 @@ #define DM9000_DATA (CONFIG_DM9000_BASE + 2)
/* Miscellaneous configuration options */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20)
#endif /* __CONFIG_CI20_H__ */ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index fb7de896b75d..5d6449c7f74a 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -96,8 +96,6 @@ /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ #define CONFIG_SYS_FSL_USDHC_NUM 2
-#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index d1a5d866d2d0..f20f4e35e957 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -345,7 +345,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/crs3xx-98dx3236.h b/include/configs/crs3xx-98dx3236.h index 07769c9e0e49..25bcc2a6841c 100644 --- a/include/configs/crs3xx-98dx3236.h +++ b/include/configs/crs3xx-98dx3236.h @@ -10,8 +10,6 @@ * High Level Configuration Options (easy to change) */
-#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* 64 MB */ - /* Environment in SPI NOR flash */
/* Keep device tree and initrd in lower memory so the kernel can access them */ diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index e1d580b1c8f8..c37b4c635b27 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -18,7 +18,6 @@ /* Note: 8 MiB (0x86000000 - 0x86800000) are reserved for tz/smem/hyp/rmtfs/rfsa */ #define PHYS_SDRAM_1_SIZE SZ_1G #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* Environment */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index 705146d04f76..1fa5d05e7b47 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -20,7 +20,6 @@ #define PHYS_SDRAM_2_SIZE 0x5ea4ffff
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_BOOTM_LEN SZ_64M
#include <config_distro_bootcmd.h>
diff --git a/include/configs/durian.h b/include/configs/durian.h index 7971df8c1d3b..8f0e8be43307 100644 --- a/include/configs/durian.h +++ b/include/configs/durian.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* BOOT */ -#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
#define CONFIG_EXTRA_ENV_SETTINGS \ "load_kernel=ext4load scsi 0:1 0x90100000 uImage-2004\0" \ diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 6b1de18bc159..b05846d0b920 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -22,7 +22,6 @@ {9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600}
#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_BOOTM_LEN SZ_32M /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 4a0aaf4da583..82076ff74ff6 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -22,9 +22,6 @@ /* NAND */ #define CONFIG_SYS_MAX_NAND_DEVICE 1
-#undef CONFIG_SYS_BOOTM_LEN -#define CONFIG_SYS_BOOTM_LEN (64 << 20) - /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 33e9aa5ffb45..5be6eb4e766c 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -15,8 +15,6 @@
#define CONFIG_POWER_HI6553
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Physical Memory Map */
/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h index caa6abb9d9d7..ad070439d002 100644 --- a/include/configs/hikey960.h +++ b/include/configs/hikey960.h @@ -9,8 +9,6 @@
#include <linux/sizes.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Physical Memory Map */
/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index 03ca9281c829..4af845ea9c2d 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -25,8 +25,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_1G
-#define CONFIG_SYS_BOOTM_LEN SZ_128M - /* * UART configuration */ diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index 0b8ac78e2794..0ce65e7755ea 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -24,8 +24,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_1G
-#define CONFIG_SYS_BOOTM_LEN SZ_128M - /* * UART configuration */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 60a0c16f9041..c69f2fa19f30 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -11,7 +11,6 @@ #include <asm/arch/imx-regs.h> #include <config_distro_bootcmd.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 5392569a556a..fb05958bdc81 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_128M - #define CONFIG_SYS_MONITOR_LEN SZ_1M
#ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 227e9649f53b..5e9e3e800d8f 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -10,7 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index ec4aea337c93..6b7f3af53a21 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -47,7 +47,6 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ -#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index cfcad110c716..130156045091 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -83,7 +83,6 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_4G -#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* FEC */ #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 63f7da740ef1..a371c5b3832c 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 9de31cfe81c9..ae7fcb1027a0 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index ccf83128f282..c8604e0de592 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index adac387fac92..c43c4da6fbf8 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -79,7 +79,6 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_4G -#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* FEC */ #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 797ea0c7fad2..4b4731c3035b 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_128M - #define CONFIG_SYS_MONITOR_LEN SZ_1M
/* Link Definitions */ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index f161cffb9716..5581c0fac024 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 1d4c057ccc01..17e00f958b6c 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -12,8 +12,6 @@ #include <asm/arch/imx-regs.h> #include <config_distro_bootcmd.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index 51fdcb7d5b19..9f4c1b161f7a 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -79,7 +79,6 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_4G -#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* FEC */ #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index f7a254359c9b..ab74d5b26b6f 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 43328082edc6..ea4305667f24 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index b59502e5895b..6f244df6f9bd 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) - #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 88d38a1dcbd9..308f17fd5959 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -16,8 +16,6 @@ #define USDHC2_BASE_ADDR 0x5B020000 #define USDHC3_BASE_ADDR 0x5B030000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* FUSE command */
/* Boot M4 */ diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index f9080216f1fc..ebfc166b4d46 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -9,7 +9,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (SZ_64M) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h index d379bad0b154..0f6150fc9c7e 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -15,8 +15,6 @@
/* SPL Loader Configuration */
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* U-Boot general configuration */ #define EXTRA_ENV_IOT2050_BOARD_SETTINGS \ "usb_pgood_delay=900\0" diff --git a/include/configs/iot_devkit.h b/include/configs/iot_devkit.h index 0ebb1b526e9f..a2e50c3b8df2 100644 --- a/include/configs/iot_devkit.h +++ b/include/configs/iot_devkit.h @@ -53,8 +53,6 @@ #define CONFIG_SYS_SDRAM_BASE DCCM_BASE #define CONFIG_SYS_SDRAM_SIZE DCCM_SIZE
-#define CONFIG_SYS_BOOTM_LEN SZ_128K - #define ROM_BASE CONFIG_SYS_MONITOR_BASE #define ROM_SIZE SZ_256K
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index ecf876478100..9f54f259994a 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -28,8 +28,6 @@ #define CONFIG_SYS_UBOOT_BASE 0x50080000 #endif
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* HyperFlash related configuration */
/* U-Boot general configuration */ diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 4c3a155a950a..932d7d3c8cb5 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -27,8 +27,6 @@ #define CONFIG_SYS_UBOOT_BASE 0x50080000 #endif
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* U-Boot general configuration */ #define EXTRA_ENV_J721S2_BOARD_SETTINGS \ "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h index a9a6a41f6b78..6becd7cd31a8 100644 --- a/include/configs/km/km-powerpc.h +++ b/include/configs/km/km-powerpc.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
/* Increase max size of compressed kernel */ -#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */
/****************************************************************************** * (PRAM usage) diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index a485c3ac6d1d..eee71db37c2b 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -25,7 +25,6 @@ #include "keymile-common.h"
/* Increase max size of compressed kernel */ -#define CONFIG_SYS_BOOTM_LEN (32 << 20)
#include "asm/arch/config.h"
diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index dd6747388c74..f83739013507 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -249,7 +249,6 @@ "ethrotate=no\0" \ ""
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Increase map for Linux */
#endif diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index ff9d7d59a390..3f22ddc6dd8d 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -409,7 +409,6 @@ int get_scl(void); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 6b591ed7872e..622ab5976247 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -45,8 +45,6 @@ #undef BOOTENV_RUN_NET_USB_START #define BOOTENV_RUN_NET_USB_START
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index bf336b99d6a1..d77e4b4e1009 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -7,8 +7,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * SZ_1K)
/* GUID for capsule updatable firmware image */ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 0c194ee575bf..87eb10db19fd 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -57,8 +57,6 @@ "bootm $kernel_load" #endif
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include <asm/arch/soc.h>
#endif /* __LS1012A_COMMON_H */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 1a46f72a7357..517ade383bee 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -333,6 +333,5 @@ */
#include <asm/fsl_secure_boot.h> -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
#endif diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index e5754c94e0fc..2fbd495e1193 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -162,6 +162,4 @@
/* Environment */
-#define CONFIG_SYS_BOOTM_LEN 0x8000000 /* 128 MB */ - #endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 09dce21aec5f..1aa29e541ec5 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -324,6 +324,5 @@ */
#include <asm/fsl_secure_boot.h> -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
#endif diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 5b0b86b39bee..b104524becb1 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -57,8 +57,6 @@ "run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \ "env exists secureboot && esbc_halt;"
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #define OCRAM_NONSECURE_SIZE 0x00010000 #define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index ed32e20dbf45..95cbcb036eb8 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -217,8 +217,6 @@ #endif #endif
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include <asm/arch/soc.h>
#endif /* __LS1043A_COMMON_H */ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 94118c420e6a..2e48ea0f8aad 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -191,8 +191,6 @@
#endif
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include <asm/arch/soc.h>
#endif /* __LS1046A_COMMON_H */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index ff85f1eb4ac8..4b8462da7bcd 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -153,6 +153,5 @@ unsigned long long get_qixis_addr(void); #endif /* ifdef CONFIG_NXP_ESBC */
#endif -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
#endif /* __LS1088_COMMON_H */ diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index d2978713e6b7..3e86d1bff215 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -139,8 +139,6 @@ unsigned long long get_qixis_addr(void); #endif #define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include <asm/arch/soc.h>
#endif /* __LS2_COMMON_H */ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 77e25822dcd6..b7543731691f 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -96,8 +96,6 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - /* Initial environment variables */ #define XSPI_MC_INIT_CMD \ "sf probe 0:0 && " \ diff --git a/include/configs/malta.h b/include/configs/malta.h index affee0069402..c8b230ab21e9 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -34,8 +34,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
-#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) - /* * Serial driver */ diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 51dd4d706e00..40803ee9da1a 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -30,7 +30,6 @@ #endif
#define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */
/* ROM USB boot support, auto-execute boot.scr at scriptaddr */ #define BOOTENV_DEV_ROMUSB(devtypeu, devtypel, instance) \ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 2adc1f6d86b8..926c229e3a64 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -11,8 +11,6 @@ /* Microblaze is microblaze_0 */ #define XILINX_FSL_NUMBER 3
-#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) - /* uart */ /* The following table includes the supported baudrates */ # define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h index 236db537db73..4c7cfac8af75 100644 --- a/include/configs/microchip_mpfs_icicle.h +++ b/include/configs/microchip_mpfs_icicle.h @@ -11,8 +11,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
/* Environment options */ diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index db4d68d75076..049d9a1b55bb 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -14,8 +14,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
-#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* SPL */
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index 6c681a3c30bb..78d79b7780bc 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -11,7 +11,6 @@
#include <linux/sizes.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Uboot definition */ diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 06367221ebc3..0cd8b08552cf 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -13,8 +13,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Environment */ diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index 4dcfa39350cc..3680c0fe442a 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -14,8 +14,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET 0x80000
-#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) #define CONFIG_SYS_NS16550_MEM32 diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index 87e2251777cb..22d11d014761 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -13,8 +13,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Environment */ diff --git a/include/configs/mt8183.h b/include/configs/mt8183.h index 665a4e44f3f4..c93d70ddf1a6 100644 --- a/include/configs/mt8183.h +++ b/include/configs/mt8183.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_NS16550_COM1 0x11005200 #define CONFIG_SYS_NS16550_CLK 26000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Environment settings */ #include <config_distro_bootcmd.h>
diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h index d4aa279b551c..964c95781338 100644 --- a/include/configs/mt8512.h +++ b/include/configs/mt8512.h @@ -13,9 +13,6 @@
#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
- -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Uboot definition */ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
diff --git a/include/configs/mt8516.h b/include/configs/mt8516.h index 928f4b0dc773..7228f3e42884 100644 --- a/include/configs/mt8516.h +++ b/include/configs/mt8516.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_NS16550_COM1 0x11005000 #define CONFIG_SYS_NS16550_CLK 26000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Environment settings */ #include <config_distro_bootcmd.h>
diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h index e313f6f6afaa..6d4704644e4f 100644 --- a/include/configs/mt8518.h +++ b/include/configs/mt8518.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Uboot definition */
#define ENV_BOOT_READ_IMAGE \ diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 56f640226dd9..51f7e16ece1a 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -15,8 +15,6 @@ /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 500000, 576000, \ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 75bc27d1798b..e416f81e43a1 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -19,8 +19,6 @@ #endif #define CONFIG_MXC_GPT_HCLK
-#define CONFIG_SYS_BOOTM_LEN 0x1000000 - #include <linux/sizes.h> #include <asm/arch/imx-regs.h> #include <asm/mach-imx/gpio.h> diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 9f4dbec07002..4704276a74de 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -17,8 +17,6 @@ #define CONFIG_MXC_GPT_HCLK #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
-#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* Enable iomux-lpsr support */ #define CONFIG_IOMUX_LPSR
diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index c6c3695e5df1..62e8e6299118 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -15,8 +15,6 @@ #include "imx7ulp_spl.h" #endif
-#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE
diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 57fed4ed69ca..e93824928b32 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -11,8 +11,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN 0x1000000 -
/* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE diff --git a/include/configs/nsim.h b/include/configs/nsim.h index 586ac3ebcaad..d469ef83c240 100644 --- a/include/configs/nsim.h +++ b/include/configs/nsim.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_256M
-#define CONFIG_SYS_BOOTM_LEN SZ_32M - /* * Console configuration */ diff --git a/include/configs/octeon_common.h b/include/configs/octeon_common.h index 7e71c83887f3..0fa7490e7de6 100644 --- a/include/configs/octeon_common.h +++ b/include/configs/octeon_common.h @@ -16,6 +16,4 @@
#define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #endif /* __OCTEON_COMMON_H__ */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index f377ba8fa2ec..2c430e8d3762 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -8,7 +8,6 @@ #define __OCTEONTX2_COMMON_H__
/** Maximum size of image supported for bootm (and bootable FIT images) */ -#define CONFIG_SYS_BOOTM_LEN (256 << 20)
/** Memory base address */ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 73a14b25de67..e7a6bd41db05 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -34,7 +34,6 @@ #endif /* ifdef CONFIG_DISTRO_DEFAULTS*/
/** Maximum size of image supported for bootm (and bootable FIT images) */ -#define CONFIG_SYS_BOOTM_LEN (256 << 20)
/** Memory base address */ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index 12bd8fb99cd6..3ff8187b5df7 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -15,7 +15,6 @@
/* Environment options */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* --------------------------------------------------------------------- * Board boot configuration diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 7410c60cbd2a..b0b3ec18d143 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -446,7 +446,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index f8c3e1f10dbd..049d1d74345d 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -11,7 +11,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index dd0b108a89f8..df1716106fe1 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -10,8 +10,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index a587570ea172..d1cc1b9d63fb 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -78,6 +78,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_SYS_BOOTM_LEN SZ_128M - #endif diff --git a/include/configs/pomelo.h b/include/configs/pomelo.h index 647bb3d02a1b..2e206542f8db 100644 --- a/include/configs/pomelo.h +++ b/include/configs/pomelo.h @@ -14,7 +14,6 @@ /* SIZE of malloc pool */
/*BOOT*/ -#define CONFIG_SYS_BOOTM_LEN 0x3c00000
#define BOOT_TARGET_DEVICES(func) \ func(SCSI, scsi, 0) \ diff --git a/include/configs/poplar.h b/include/configs/poplar.h index 4b749b13ee81..c58105597e47 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -16,7 +16,6 @@ /* DRAM banks */
/* SYS */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* ATF bl33.bin load address (must match) */
diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 48c0584d5b34..90f548cc6c13 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -8,8 +8,6 @@ #ifndef __PRESIDIO_ASIC_H #define __PRESIDIO_ASIC_H
-#define CONFIG_SYS_BOOTM_LEN 0x00c00000 - /* Generic Timer Definitions */ #define CONFIG_SYS_TIMER_RATE 25000000 #define CONFIG_SYS_TIMER_COUNTER 0xf4321008 diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 62ed86b29c89..49d1878ebdd7 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -13,13 +13,9 @@ /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */ #define CONFIG_IRAM_BASE 0xff020000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define GICD_BASE 0xff131000 #define GICC_BASE 0xff132000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 #define SDRAM_BANK_SIZE (2UL << 30) diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index 14cae43db3a6..e9f756b13edb 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -12,8 +12,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x40000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* GUIDs for capsule updatable firmware images */ #define QEMU_ARM_UBOOT_IMAGE_GUID \ EFI_GUID(0xf885b085, 0x99f8, 0x45af, 0x84, 0x7d, \ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index ce60a3c7421d..31e94df84df7 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -69,7 +69,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index a81c503d9fd1..d81e5d6c8620 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -10,8 +10,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
#define RISCV_MMODE_TIMERBASE 0x2000000 diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index e80e45dcbd7e..9efda3eeea93 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -32,7 +32,6 @@ #define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE)
#define CONFIG_SYS_MONITOR_LEN (1 * 1024 * 1024) -#define CONFIG_SYS_BOOTM_LEN (64 << 20)
/* ENV setting */
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index d5a4ca26b048..12d4bc65d7e4 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -12,8 +12,6 @@
#define CONFIG_IRAM_BASE 0x10080000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - /* RAW SD card / eMMC locations. */
#define CONFIG_SYS_SDRAM_BASE 0x60000000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index c3279b84d3a4..ec9e9ca1e31a 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -8,8 +8,6 @@ #include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define CONFIG_SYS_HZ_CLOCK 24000000
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 18f4289d29ab..f4b3481115b3 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -9,8 +9,6 @@ #include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64MB */ - #define CONFIG_SYS_HZ_CLOCK 24000000
#define CONFIG_IRAM_BASE 0xff700000 diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index d5aadd5fa803..200b34b35bae 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -11,10 +11,6 @@ #define CONFIG_SYS_NS16550_MEM32
#define CONFIG_IRAM_BASE 0xfff80000 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - - -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
#define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 165b78ff3309..1e214e4ebe15 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -10,8 +10,6 @@
#define CONFIG_IRAM_BASE 0xff090000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - /* FAT sd card locations. */ #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 4db4026ebe56..37e0c1d936c3 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -16,8 +16,6 @@
#define CONFIG_IRAM_BASE 0xff8c0000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00500000\0" \ "pxefile_addr_r=0x00600000\0" \ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 3ca80c8c7c0d..2f9aee58197b 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -15,8 +15,6 @@ /* BSS setup */ #endif
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - /* MMC/SD IP block */ #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index ef4f725b5793..15e815234020 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -10,8 +10,6 @@
#define CONFIG_IRAM_BASE 0xfdcc0000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf0000000
diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 27738ab1933f..4f5025d0da58 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -33,10 +33,6 @@ */ #define CONFIG_SYS_SDRAM_SIZE SZ_128M
-#ifdef CONFIG_ARM64 -#define CONFIG_SYS_BOOTM_LEN SZ_64M -#endif - /* Devices */ /* LCD */
diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index 78347373fca9..3f905bf2d77d 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -11,7 +11,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ -#define CONFIG_SYS_BOOTM_LEN SZ_32M /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 diff --git a/include/configs/sdm845.h b/include/configs/sdm845.h index e1b8c61d0763..af5fe27e68bd 100644 --- a/include/configs/sdm845.h +++ b/include/configs/sdm845.h @@ -22,6 +22,5 @@ "bootcmd=source $prevbl_initrd_start_addr:bootscript\0"
/* Size of malloc() pool */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M
#endif diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index a99d143485c4..2e5592cf94d5 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -13,8 +13,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
#define RISCV_MMODE_TIMERBASE 0x2000000 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index 680caac377bc..9923f3d9c344 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -13,8 +13,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
/* Environment options */ diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 2d654b42d56b..261ae56c1dce 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -23,8 +23,6 @@ */ #define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) - /* Environment settings */
/* diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index a3e8d5492919..06198ddd82a3 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -22,7 +22,6 @@ */
/* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024)
/* * U-Boot run time memory configurations diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index c333c931ab7a..70d9f3607a67 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -11,7 +11,6 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
/* Booting Linux */ -#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */
/* Extra Environment */ #define CONFIG_HOSTNAME "socfpga_vining_fpga" diff --git a/include/configs/stemmy.h b/include/configs/stemmy.h index 4ad55afad869..71b25c23b13c 100644 --- a/include/configs/stemmy.h +++ b/include/configs/stemmy.h @@ -13,7 +13,6 @@ * low-level initialization and rely on configuration provided by the Samsung * bootloader. New images are loaded at the same address for compatibility. */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* FIXME: This should be loaded from device tree... */ #define CONFIG_SYS_L2_PL310 diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 1b8d38f4b52a..b1a011bacb22 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -24,8 +24,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ SZ_256M
-#define CONFIG_SYS_BOOTM_LEN SZ_16M - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ diff --git a/include/configs/stm32mp13_common.h b/include/configs/stm32mp13_common.h index beb56fcb5af8..3ca65ea2a37b 100644 --- a/include/configs/stm32mp13_common.h +++ b/include/configs/stm32mp13_common.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_BOOTMAPSZ SZ_256M
/* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN SZ_32M
/*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 2 diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 1e14e91ea701..56fb4d38e45a 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_BOOTMAPSZ SZ_256M
/* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN SZ_32M
/*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 3 diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 2bf4e58cddf7..0f0ef4f64bbf 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -15,10 +15,6 @@ #include <asm/arch/cpu.h> #include <linux/stringify.h>
-#ifdef CONFIG_ARM64 -#define CONFIG_SYS_BOOTM_LEN (32 << 20) -#endif - /* Serial & console */ #define CONFIG_SYS_NS16550_SERIAL /* ns16550 reg in the low bits of cpu reg */ diff --git a/include/configs/tb100.h b/include/configs/tb100.h index 03aeb4f5d2eb..16bdc39b750e 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_128M
-#define CONFIG_SYS_BOOTM_LEN SZ_32M - /* * UART configuration */ diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index 41297b693cff..4fb3d731c67a 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -11,8 +11,6 @@
/* Link Definitions */
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) - #define UART0_BASE 0x7ff80000
/* PL011 Serial Configuration */ diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index d4aa312da4f4..401627a47a2f 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -8,7 +8,6 @@ #ifndef _CONFIG_TURRIS_MOX_H #define _CONFIG_TURRIS_MOX_H
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 8096b2c89603..15d41fba95cc 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -54,8 +54,6 @@ #define CONFIG_GATEWAYIP 192.168.11.1 #define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_SYS_BOOTM_LEN (32 << 20) - #if defined(CONFIG_ARM64) /* ARM Trusted Firmware */ #define BOOT_IMAGES \ diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h index 43127ae649a6..78a62a8b028c 100644 --- a/include/configs/vcoreiii.h +++ b/include/configs/vcoreiii.h @@ -32,8 +32,6 @@ #error Unknown DDR size - please add! #endif
-#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x81000000\0" \ "spi_image_off=0x00100000\0" \ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 6d77df09fb51..5b5fce9bda17 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 0de249aa96b2..fca40beba18a 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -75,8 +75,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
-#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - /* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index e864b3fee6ae..3705313aec06 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -15,8 +15,6 @@ /* ATF loads u-boot here for BASE_FVP model */ #endif
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - /* CS register bases for the original memory map. */ #ifdef CONFIG_TARGET_VEXPRESS64_BASER_FVP #define V2M_DRAM_BASE 0x00000000 diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 1366f623aa25..42b2cb2fc85a 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -14,7 +14,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_SYS_BOOTM_LEN (16 << 20)
/* Generic TPM interfaced through LPC bus */ #define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 55837e1c5649..971bd69dec8d 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -37,8 +37,6 @@ # define PHY_ANEG_TIMEOUT 20000 #endif
-#define CONFIG_SYS_BOOTM_LEN (100 * 1024 * 1024) - #define ENV_MEM_LAYOUT_SETTINGS \ "fdt_addr_r=0x40000000\0" \ "fdt_size_r=0x400000\0" \ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 4e71a42cd346..f72f3e644768 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -54,8 +54,6 @@ # define PHY_ANEG_TIMEOUT 20000 #endif
-#define CONFIG_SYS_BOOTM_LEN (100 * 1024 * 1024) - #define ENV_MEM_LAYOUT_SETTINGS \ "fdt_addr_r=0x40000000\0" \ "fdt_size_r=0x400000\0" \ diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h index 37750d3d15db..b6bc402a7e97 100644 --- a/include/configs/xilinx_zynqmp_r5.h +++ b/include/configs/xilinx_zynqmp_r5.h @@ -19,6 +19,5 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
/* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
#endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 6a045ec60aeb..1fdde90654f2 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -204,7 +204,6 @@
/* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
/* Boot FreeBSD/vxWorks from an ELF image */ #define CONFIG_SYS_MMC_MAX_DEVICE 1 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index f2181353ea71..5c214632af0d 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -500,7 +500,6 @@ CONFIG_SYS_BOOK3E_HV CONFIG_SYS_BOOTCOUNT_BE CONFIG_SYS_BOOTCOUNT_LE CONFIG_SYS_BOOTMAPSZ -CONFIG_SYS_BOOTM_LEN CONFIG_SYS_BOOT_BLOCK CONFIG_SYS_CACHE_ACR0 CONFIG_SYS_CACHE_ACR1
Hi Tom,
On 25.06.22 17:02, Tom Rini wrote:
This converts the following to Kconfig: CONFIG_SYS_BOOTM_LEN
As part of this, rework error handling in boot/bootm.c so that we pass the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not be available to host tools but we do know the size that we passed to malloc().
Signed-off-by: Tom Rini trini@konsulko.com -- > README | 6 ----- boot/bootm.c | 24 +++++++++---------- cmd/Kconfig | 10 ++++++++ configs/M5208EVBE_defconfig | 1 +
[...]
include/configs/xilinx_zynqmp_r5.h | 1 - include/configs/zynq-common.h | 1 - scripts/config_whitelist.txt | 1 - 555 files changed, 419 insertions(+), 270 deletions(-)
Is it really necessary to create so many additional lines just for a conversion?
diff --git a/README b/README index fb0284d4ecb6..ff0df3797d21 100644 --- a/README +++ b/README @@ -1736,12 +1736,6 @@ Configuration Settings:
Non-cached memory is only supported on 32-bit ARM at present.-- CONFIG_SYS_BOOTM_LEN:
Normally compressed uImages are limited to anuncompressed size of 8 MBytes. If this is not enough,you can define CONFIG_SYS_BOOTM_LEN in your board config fileto adjust this setting to your needs.
- CONFIG_SYS_BOOTMAPSZ: Maximum size of memory mapped by the startup code of the Linux kernel; all data that must be processed by
diff --git a/boot/bootm.c b/boot/bootm.c index dfa65f125e57..86dbfbcfed5b 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -33,11 +33,6 @@ #include <bootm.h> #include <image.h>
-#ifndef CONFIG_SYS_BOOTM_LEN -/* use 8MByte as default max gunzip size */ -#define CONFIG_SYS_BOOTM_LEN 0x800000 -#endif
The old default was 8MiB, OK.
#define MAX_CMDLINE_SIZE SZ_4K
#define IH_INITRD_ARCH IH_ARCH_DEFAULT
[...]
diff --git a/cmd/Kconfig b/cmd/Kconfig index bb956e330750..357b82849f7f 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -335,6 +335,16 @@ config BOOTM_VXWORKS help Support booting VxWorks images via the bootm command.
+config SYS_BOOTM_LEN
- hex "Maximum size of a decompresed OS image"
- depends on CMD_BOOTM || CMD_BOOTI || CMD_BOOTZ
- default 0x4000000 if PPC || ARM64
- default 0x1000000 if X86
- default 0x800000
- help
Normally compressed OS images are limited to an uncompressed size of8 MiB. If this is not enough, increase this setting to fit your needs.
The new default is sad to be 8MiB, too (as the old default was), but this is not true for all architectures. So the help text is misleading.
Besides that, there is probably nothing wrong with the new defaults.
config CMD_BOOTEFI bool "bootefi" depends on EFI_LOADER diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 4ab888f59ed5..858fc5bbfd2e 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y
[...]
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 892d7c60d283..f0ecfd049d65 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000
For tbs2910 there is another value set here - not the old default, not the new one. Why? This looks like a carefully chosen value, but very likely it is not.
Probably also this value is fine for this board, but for me it makes no sense to set a board specific value here.
Regards, Soeren
On Sat, Jun 25, 2022 at 07:59:36PM +0200, Soeren Moch wrote:
Hi Tom,
On 25.06.22 17:02, Tom Rini wrote:
This converts the following to Kconfig: CONFIG_SYS_BOOTM_LEN
As part of this, rework error handling in boot/bootm.c so that we pass the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not be available to host tools but we do know the size that we passed to malloc().
Signed-off-by: Tom Rini trini@konsulko.com -- > README | 6 ----- boot/bootm.c | 24 +++++++++---------- cmd/Kconfig | 10 ++++++++ configs/M5208EVBE_defconfig | 1 +
[...]
include/configs/xilinx_zynqmp_r5.h | 1 - include/configs/zynq-common.h | 1 - scripts/config_whitelist.txt | 1 - 555 files changed, 419 insertions(+), 270 deletions(-)
Is it really necessary to create so many additional lines just for a conversion?
It's about as small as I can get it to without spending a lot of time massaging defaults. As is the case with any of the conversions, arch/SoC maintainers or other knowledgable parties are welcome and encouraged to submit a follow-up to add default X if Y. It's keeping the in-use value for everyone and unfortunately aside from platforms that didn't change from the old default, there's not a lot of consistency, but arguably should be.
diff --git a/README b/README index fb0284d4ecb6..ff0df3797d21 100644 --- a/README +++ b/README @@ -1736,12 +1736,6 @@ Configuration Settings:
Non-cached memory is only supported on 32-bit ARM at present.-- CONFIG_SYS_BOOTM_LEN:
Normally compressed uImages are limited to anuncompressed size of 8 MBytes. If this is not enough,you can define CONFIG_SYS_BOOTM_LEN in your board config fileto adjust this setting to your needs.
- CONFIG_SYS_BOOTMAPSZ: Maximum size of memory mapped by the startup code of the Linux kernel; all data that must be processed by
diff --git a/boot/bootm.c b/boot/bootm.c index dfa65f125e57..86dbfbcfed5b 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -33,11 +33,6 @@ #include <bootm.h> #include <image.h>
-#ifndef CONFIG_SYS_BOOTM_LEN -/* use 8MByte as default max gunzip size */ -#define CONFIG_SYS_BOOTM_LEN 0x800000 -#endif
The old default was 8MiB, OK.
#define MAX_CMDLINE_SIZE SZ_4K
#define IH_INITRD_ARCH IH_ARCH_DEFAULT
[...]
diff --git a/cmd/Kconfig b/cmd/Kconfig index bb956e330750..357b82849f7f 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -335,6 +335,16 @@ config BOOTM_VXWORKS help Support booting VxWorks images via the bootm command.
+config SYS_BOOTM_LEN
- hex "Maximum size of a decompresed OS image"
- depends on CMD_BOOTM || CMD_BOOTI || CMD_BOOTZ
- default 0x4000000 if PPC || ARM64
- default 0x1000000 if X86
- default 0x800000
- help
Normally compressed OS images are limited to an uncompressed size of8 MiB. If this is not enough, increase this setting to fit your needs.The new default is sad to be 8MiB, too (as the old default was), but this is not true for all architectures. So the help text is misleading.
English is an imprecise language. Maybe just not mentioning the size in the help is best.
Besides that, there is probably nothing wrong with the new defaults.
config CMD_BOOTEFI bool "bootefi" depends on EFI_LOADER diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 4ab888f59ed5..858fc5bbfd2e 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y
[...]
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 892d7c60d283..f0ecfd049d65 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000
For tbs2910 there is another value set here - not the old default, not the new one. Why? This looks like a carefully chosen value, but very likely it is not.
Probably also this value is fine for this board, but for me it makes no sense to set a board specific value here.
I don't follow you, sorry. Since tbs2910 isn't X86 or PPC or ARM64, it's using the current value instead. Before this patch include/configs/tbs2910.h includes include/configs/mx6_common.h which sets it to 0x1000000. Which means I probably could put a || ARCH_MX6 in the Kconfig entry and drop out another 84 files (3 MX6 platforms set 0x4000000 instead today).
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 892d7c60d283..f0ecfd049d65 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000
For tbs2910 there is another value set here - not the old default, not the new one. Why? This looks like a carefully chosen value, but very likely it is not.
Probably also this value is fine for this board, but for me it makes no sense to set a board specific value here.
I don't follow you, sorry. Since tbs2910 isn't X86 or PPC or ARM64, it's using the current value instead. Before this patch include/configs/tbs2910.h includes include/configs/mx6_common.h which sets it to 0x1000000.
OK, I missed that part in the long patch, my bad.
As I wrote, all possible values are probably good for this board. I just would prefer to use some default value (as before), since there is no special requirement for this board in particular. To keep the old value in this conversion of course makes sense.
Which means I probably could put a || ARCH_MX6 in the Kconfig entry and drop out another 84 files (3 MX6 platforms set 0x4000000 instead today).
That would make it more obvious that the old default is used for these boards. But if you prefer the board specific defconfig setting, that of course is also a valid solution.
Regards, Soeren
On Sun, Jun 26, 2022 at 12:01:23AM +0200, Soeren Moch wrote:
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 892d7c60d283..f0ecfd049d65 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000
For tbs2910 there is another value set here - not the old default, not the new one. Why? This looks like a carefully chosen value, but very likely it is not.
Probably also this value is fine for this board, but for me it makes no sense to set a board specific value here.
I don't follow you, sorry. Since tbs2910 isn't X86 or PPC or ARM64, it's using the current value instead. Before this patch include/configs/tbs2910.h includes include/configs/mx6_common.h which sets it to 0x1000000.
OK, I missed that part in the long patch, my bad.
As I wrote, all possible values are probably good for this board. I just would prefer to use some default value (as before), since there is no special requirement for this board in particular. To keep the old value in this conversion of course makes sense.
Which means I probably could put a || ARCH_MX6 in the Kconfig entry and drop out another 84 files (3 MX6 platforms set 0x4000000 instead today).
That would make it more obvious that the old default is used for these boards. But if you prefer the board specific defconfig setting, that of course is also a valid solution.
To be clear, here (and unless I otherwise note, all of the other conversions I've been doing) the intention is the same values on every platform, before and after. Many times the patches end up small because I can do a few default A if B lines and cover the vast majority if platforms. Sadly sometimes we get cases like this where in hindsight, a bigger default, or a more consistent default for every architecture should have been used, but wasn't. We can clean it up after but it needs to be separate so that someone can bisect a problem back to when the value was changed, not when it was migrated, if there's a problem.
So this isn't a super platform dependent value, and should probably be something like 96MiB for 32bit ARM (I forget what the practical maximum image size is, I know I talked with rmk about it about a decade ago I think), and some other similar sane maximum for other platforms. But, a follow up to do that.
On 26.06.22 00:44, Tom Rini wrote:
On Sun, Jun 26, 2022 at 12:01:23AM +0200, Soeren Moch wrote:
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 892d7c60d283..f0ecfd049d65 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x1000000
For tbs2910 there is another value set here - not the old default, not the new one. Why? This looks like a carefully chosen value, but very likely it is not.
Probably also this value is fine for this board, but for me it makes no sense to set a board specific value here.
I don't follow you, sorry. Since tbs2910 isn't X86 or PPC or ARM64, it's using the current value instead. Before this patch include/configs/tbs2910.h includes include/configs/mx6_common.h which sets it to 0x1000000.
OK, I missed that part in the long patch, my bad.
As I wrote, all possible values are probably good for this board. I just would prefer to use some default value (as before), since there is no special requirement for this board in particular. To keep the old value in this conversion of course makes sense.
Which means I probably could put a || ARCH_MX6 in the Kconfig entry and drop out another 84 files (3 MX6 platforms set 0x4000000 instead today).
That would make it more obvious that the old default is used for these boards. But if you prefer the board specific defconfig setting, that of course is also a valid solution.
To be clear, here (and unless I otherwise note, all of the other conversions I've been doing) the intention is the same values on every platform, before and after. Many times the patches end up small because I can do a few default A if B lines and cover the vast majority if platforms. Sadly sometimes we get cases like this where in hindsight, a bigger default, or a more consistent default for every architecture should have been used, but wasn't. We can clean it up after but it needs to be separate so that someone can bisect a problem back to when the value was changed, not when it was migrated, if there's a problem.
I totally agree. For me it looked like the default was changed for tbs2910, but it was not. My mistake. In your v2 it is obvious that we use the same defaults, great.
So this isn't a super platform dependent value, and should probably be something like 96MiB for 32bit ARM (I forget what the practical maximum image size is, I know I talked with rmk about it about a decade ago I think),
I _think_ the maximum text size (or image size?) is 16MiB for arm, but I'm not totally sure about this. But this would match with the mx6/mx7 defaults.
and some other similar sane maximum for other platforms. But, a follow up to do that.
Yes, changes should be done in a separate patch. But I do not see any need from my side. And I'm happy that there is no board specific defconfig entry for tbs2910 in your v2.
Thanks, Soeren
This converts the following to Kconfig: CONFIG_SYS_BOOTM_LEN
As part of this, rework error handling in boot/bootm.c so that we pass the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not be available to host tools but we do know the size that we passed to malloc().
Cc: Soeren Moch smoch@web.de Signed-off-by: Tom Rini trini@konsulko.com --- Changes in v2: - Add defaults for mx6/mx7 as Soren noticed they were missing - Reword help to mention a size as Soren noted it was misleading given the various default values. --- README | 6 ----- boot/bootm.c | 24 +++++++++---------- cmd/Kconfig | 10 ++++++++ configs/M5208EVBE_defconfig | 1 + configs/M5235EVB_Flash32_defconfig | 1 + configs/M5235EVB_defconfig | 1 + configs/M5253DEMO_defconfig | 1 + configs/M5275EVB_defconfig | 1 + configs/M53017EVB_defconfig | 1 + configs/M5329AFEE_defconfig | 1 + configs/M5329BFEE_defconfig | 1 + configs/M5373EVB_defconfig | 1 + configs/MCR3000_defconfig | 1 + configs/a3y17lte_defconfig | 1 + configs/a5y17lte_defconfig | 1 + configs/a64-olinuxino-emmc_defconfig | 1 + configs/a64-olinuxino_defconfig | 1 + configs/a7y17lte_defconfig | 1 + configs/ae350_rv32_defconfig | 1 + configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv32_xip_defconfig | 1 + configs/ae350_rv64_defconfig | 1 + configs/ae350_rv64_spl_defconfig | 1 + configs/ae350_rv64_spl_xip_defconfig | 1 + configs/ae350_rv64_xip_defconfig | 1 + configs/am335x_baltos_defconfig | 1 + configs/am335x_boneblack_vboot_defconfig | 1 + configs/am335x_evm_defconfig | 1 + configs/am335x_evm_spiboot_defconfig | 1 + configs/am335x_guardian_defconfig | 1 + configs/am335x_hs_evm_defconfig | 1 + configs/am335x_hs_evm_uart_defconfig | 1 + configs/am335x_shc_defconfig | 1 + configs/am335x_shc_ict_defconfig | 1 + configs/am335x_shc_netboot_defconfig | 1 + configs/am335x_shc_sdboot_defconfig | 1 + configs/am335x_sl50_defconfig | 1 + configs/am57xx_evm_defconfig | 1 + configs/am57xx_hs_evm_defconfig | 1 + configs/am57xx_hs_evm_usb_defconfig | 1 + configs/am62x_evm_a53_defconfig | 1 + configs/am64x_evm_a53_defconfig | 1 + configs/am65x_evm_r5_defconfig | 1 + configs/am65x_evm_r5_usbdfu_defconfig | 1 + configs/am65x_evm_r5_usbmsc_defconfig | 1 + configs/am65x_hs_evm_r5_defconfig | 1 + configs/amarula_a64_relic_defconfig | 1 + configs/apple_m1_defconfig | 1 + ...edev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 1 + configs/axs101_defconfig | 1 + configs/axs103_defconfig | 1 + configs/bananapi_m2_plus_h5_defconfig | 1 + configs/bananapi_m64_defconfig | 1 + configs/bcm7260_defconfig | 1 + configs/bcm7445_defconfig | 1 + configs/bcm947622_defconfig | 1 + configs/bcm963158_ram_defconfig | 1 + configs/bcm968360bg_ram_defconfig | 1 + configs/bcm968580xref_ram_defconfig | 1 + configs/bcm_ns3_defconfig | 1 + configs/beelink_gs1_defconfig | 1 + configs/bitmain_antminer_s9_defconfig | 1 + configs/boston32r2_defconfig | 1 + configs/boston32r2el_defconfig | 1 + configs/boston32r6_defconfig | 1 + configs/boston32r6el_defconfig | 1 + configs/boston64r2_defconfig | 1 + configs/boston64r2el_defconfig | 1 + configs/boston64r6_defconfig | 1 + configs/boston64r6el_defconfig | 1 + configs/brppt1_mmc_defconfig | 1 + configs/brppt1_nand_defconfig | 1 + configs/brppt1_spi_defconfig | 1 + configs/brsmarc1_defconfig | 1 + configs/bubblegum_96_defconfig | 1 + configs/cgtqmx8_defconfig | 1 + configs/chromebit_mickey_defconfig | 1 + configs/chromebook_jerry_defconfig | 1 + configs/chromebook_minnie_defconfig | 1 + configs/chromebook_speedy_defconfig | 1 + configs/ci20_mmc_defconfig | 1 + configs/clearfog_gt_8k_defconfig | 1 + configs/corstone1000_defconfig | 1 + configs/cortina_presidio-asic-base_defconfig | 1 + configs/cortina_presidio-asic-emmc_defconfig | 1 + configs/cortina_presidio-asic-pnand_defconfig | 1 + configs/crs305-1g-4s-bit_defconfig | 1 + configs/crs305-1g-4s_defconfig | 1 + configs/crs326-24g-2s-bit_defconfig | 1 + configs/crs326-24g-2s_defconfig | 1 + configs/crs328-4c-20s-4s-bit_defconfig | 1 + configs/crs328-4c-20s-4s_defconfig | 1 + configs/cubieboard7_defconfig | 1 + configs/deneb_defconfig | 1 + configs/durian_defconfig | 1 + configs/emlid_neutis_n5_devboard_defconfig | 1 + configs/espresso7420_defconfig | 1 + configs/evb-rk3128_defconfig | 1 + configs/evb-rk3229_defconfig | 1 + configs/evb-rk3288_defconfig | 1 + configs/firefly-rk3288_defconfig | 1 + configs/gazerbeam_defconfig | 1 + configs/giedi_defconfig | 1 + configs/gwventana_emmc_defconfig | 1 + configs/gwventana_gw5904_defconfig | 1 + configs/gwventana_nand_defconfig | 1 + configs/hsdk_4xd_defconfig | 1 + configs/hsdk_defconfig | 1 + configs/ids8313_defconfig | 1 + configs/imx8mm-cl-iot-gate-optee_defconfig | 1 + configs/imx8mm-cl-iot-gate_defconfig | 1 + configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 + configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 + configs/imx8mm_beacon_defconfig | 1 + configs/imx8mm_data_modul_edm_sbc_defconfig | 1 + configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_beacon_2g_defconfig | 1 + configs/imx8mn_beacon_defconfig | 1 + configs/imx8mn_bsh_smm_s2_defconfig | 1 + configs/imx8mn_bsh_smm_s2pro_defconfig | 1 + configs/imx8mn_ddr4_evk_defconfig | 1 + configs/imx8mn_evk_defconfig | 1 + configs/imx8mn_var_som_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 + configs/imx8mp_dhcom_pdk2_defconfig | 1 + configs/imx8mp_evk_defconfig | 1 + configs/imx8mp_rsb3720a1_4G_defconfig | 1 + configs/imx8mp_rsb3720a1_6G_defconfig | 1 + configs/imx8mp_venice_defconfig | 1 + configs/imx8mq_cm_defconfig | 1 + configs/imx8mq_phanbell_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/j7200_evm_r5_defconfig | 1 + configs/j721e_evm_r5_defconfig | 1 + configs/j721e_hs_evm_r5_defconfig | 1 + configs/j721s2_evm_r5_defconfig | 1 + configs/km_kirkwood_128m16_defconfig | 1 + configs/km_kirkwood_defconfig | 1 + configs/km_kirkwood_pci_defconfig | 1 + configs/kmcoge5ne_defconfig | 1 + configs/kmcoge5un_defconfig | 1 + configs/kmeter1_defconfig | 1 + configs/kmnusa_defconfig | 1 + configs/kmopti2_defconfig | 1 + configs/kmsupx5_defconfig | 1 + configs/kmsuse2_defconfig | 1 + configs/kmtegr1_defconfig | 1 + configs/kmtepr2_defconfig | 1 + configs/kontron_pitx_imx8m_defconfig | 1 + configs/kontron_sl28_defconfig | 1 + configs/libretech_all_h3_cc_h5_defconfig | 1 + configs/libretech_all_h3_it_h5_defconfig | 1 + configs/libretech_all_h5_cc_h5_defconfig | 1 + configs/ls1021aqds_ddr4_nor_defconfig | 1 + configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 1 + configs/ls1021aqds_nand_defconfig | 1 + configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021aqds_nor_defconfig | 1 + configs/ls1021aqds_nor_lpuart_defconfig | 1 + configs/ls1021aqds_qspi_defconfig | 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + configs/ls1021atsn_qspi_defconfig | 1 + configs/ls1021atsn_sdcard_defconfig | 1 + configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_nor_defconfig | 1 + configs/ls1021atwr_nor_lpuart_defconfig | 1 + configs/ls1021atwr_qspi_defconfig | 1 + ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_defconfig | 1 + configs/ls1021atwr_sdcard_qspi_defconfig | 1 + configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 1 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 1 + configs/microblaze-generic_defconfig | 1 + configs/microchip_mpfs_icicle_defconfig | 1 + configs/miqi-rk3288_defconfig | 1 + configs/mscc_jr2_defconfig | 1 + configs/mscc_luton_defconfig | 1 + configs/mscc_ocelot_defconfig | 1 + configs/mscc_serval_defconfig | 1 + configs/mscc_servalt_defconfig | 1 + configs/mt7620_mt7530_rfb_defconfig | 1 + configs/mt7620_rfb_defconfig | 1 + configs/mt7623a_unielec_u7623_02_defconfig | 1 + configs/mt7623n_bpir2_defconfig | 1 + configs/mt7628_rfb_defconfig | 1 + configs/mt7629_rfb_defconfig | 1 + configs/mvebu_crb_cn9130_defconfig | 1 + configs/mvebu_db_armada8k_defconfig | 1 + configs/mvebu_db_cn9130_defconfig | 1 + configs/mvebu_mcbin-88f8040_defconfig | 1 + configs/mvebu_puzzle-m801-88f8040_defconfig | 1 + configs/mx7ulp_com_defconfig | 1 + configs/mx7ulp_evk_defconfig | 1 + configs/mx7ulp_evk_plugin_defconfig | 1 + configs/nanopi_a64_defconfig | 1 + configs/nanopi_neo2_defconfig | 1 + configs/nanopi_neo_plus2_defconfig | 1 + configs/nanopi_r1s_h5_defconfig | 1 + configs/nsim_700_defconfig | 1 + configs/nsim_700be_defconfig | 1 + configs/nsim_hs38_defconfig | 1 + configs/nsim_hs38be_defconfig | 1 + configs/oceanic_5205_5inmfd_defconfig | 1 + configs/octeon_ebb7304_defconfig | 1 + configs/octeon_nic23_defconfig | 1 + configs/octeontx2_95xx_defconfig | 1 + configs/octeontx2_96xx_defconfig | 1 + configs/octeontx_81xx_defconfig | 1 + configs/octeontx_83xx_defconfig | 1 + configs/openpiton_riscv64_defconfig | 1 + configs/openpiton_riscv64_spl_defconfig | 1 + configs/orangepi_3_defconfig | 1 + configs/orangepi_lite2_defconfig | 1 + configs/orangepi_one_plus_defconfig | 1 + configs/orangepi_pc2_defconfig | 1 + configs/orangepi_prime_defconfig | 1 + configs/orangepi_win_defconfig | 1 + configs/orangepi_zero2_defconfig | 1 + configs/orangepi_zero_plus2_defconfig | 1 + configs/orangepi_zero_plus_defconfig | 1 + configs/p2371-0000_defconfig | 1 + configs/p2371-2180_defconfig | 1 + configs/p2571_defconfig | 1 + configs/p2771-0000-000_defconfig | 1 + configs/p2771-0000-500_defconfig | 1 + configs/p3450-0000_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + configs/phycore-rk3288_defconfig | 1 + configs/pico-imx8mq_defconfig | 1 + configs/pine64-lts_defconfig | 1 + configs/pine64_plus_defconfig | 1 + configs/pine_h64_defconfig | 1 + configs/pinebook_defconfig | 1 + configs/pinephone_defconfig | 1 + configs/pinetab_defconfig | 1 + configs/pomelo_defconfig | 1 + configs/popmetal-rk3288_defconfig | 1 + configs/qemu-riscv32_defconfig | 1 + configs/qemu-riscv32_smode_defconfig | 1 + configs/qemu-riscv32_spl_defconfig | 1 + configs/qemu-riscv64_defconfig | 1 + configs/qemu-riscv64_smode_defconfig | 1 + configs/qemu-riscv64_spl_defconfig | 1 + configs/qemu_arm_defconfig | 1 + configs/rock-pi-n8-rk3288_defconfig | 1 + configs/rock2_defconfig | 1 + configs/sama7g5ek_mmc1_defconfig | 1 + configs/sama7g5ek_mmc_defconfig | 1 + configs/sifive_unleashed_defconfig | 1 + configs/sifive_unmatched_defconfig | 1 + configs/socfpga_agilex_atf_defconfig | 1 + configs/socfpga_agilex_defconfig | 1 + configs/socfpga_agilex_vab_defconfig | 1 + configs/socfpga_n5x_atf_defconfig | 1 + configs/socfpga_n5x_defconfig | 1 + configs/socfpga_n5x_vab_defconfig | 1 + configs/socfpga_secu1_defconfig | 1 + configs/socfpga_stratix10_atf_defconfig | 1 + configs/socfpga_stratix10_defconfig | 1 + configs/socfpga_vining_fpga_defconfig | 1 + configs/socrates_defconfig | 1 + configs/sopine_baseboard_defconfig | 1 + configs/stemmy_defconfig | 1 + configs/stih410-b2260_defconfig | 1 + configs/stm32mp13_defconfig | 1 + ...stm32mp15-icore-stm32mp1-ctouch2_defconfig | 1 + ...tm32mp15-icore-stm32mp1-edimm2.2_defconfig | 1 + ...-microgea-stm32mp1-microdev2-of7_defconfig | 1 + ...mp15-microgea-stm32mp1-microdev2_defconfig | 1 + configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_defconfig | 1 + configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + configs/synquacer_developerbox_defconfig | 1 + configs/syzygy_hub_defconfig | 1 + configs/tanix_tx6_defconfig | 1 + configs/tb100_defconfig | 1 + configs/teres_i_defconfig | 1 + configs/thunderx_88xx_defconfig | 1 + configs/tinker-rk3288_defconfig | 1 + configs/tinker-s-rk3288_defconfig | 1 + configs/topic_miami_defconfig | 1 + configs/topic_miamilite_defconfig | 1 + configs/topic_miamiplus_defconfig | 1 + configs/tuge1_defconfig | 1 + configs/tuxx1_defconfig | 1 + configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_v7_defconfig | 1 + configs/uniphier_v8_defconfig | 1 + configs/vyasa-rk3288_defconfig | 1 + configs/xenguest_arm64_defconfig | 1 + configs/xilinx_versal_virt_defconfig | 1 + configs/xilinx_zynq_virt_defconfig | 1 + configs/xilinx_zynqmp_r5_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + include/configs/M5208EVBE.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/MPC837XERDB.h | 1 - include/configs/MPC8548CDS.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/am335x_evm.h | 2 -- include/configs/am335x_guardian.h | 2 -- include/configs/am335x_shc.h | 2 -- include/configs/am335x_sl50.h | 2 -- include/configs/am57xx_evm.h | 2 -- include/configs/am65x_evm.h | 2 -- include/configs/apalis-imx8.h | 2 -- include/configs/ax25-ae350.h | 1 - include/configs/axs10x.h | 2 -- include/configs/baltos.h | 1 - include/configs/bcm947622.h | 2 -- include/configs/bcm_ns3.h | 1 - include/configs/bcmstb.h | 1 - include/configs/boston.h | 1 - include/configs/broadcom_bcm963158.h | 1 - include/configs/brppt1.h | 1 - include/configs/brsmarc1.h | 1 - include/configs/ci20.h | 1 - include/configs/colibri-imx8x.h | 2 -- include/configs/corenet_ds.h | 1 - include/configs/crs3xx-98dx3236.h | 2 -- include/configs/dragonboard410c.h | 1 - include/configs/dragonboard820c.h | 1 - include/configs/durian.h | 1 - include/configs/exynos78x0-common.h | 1 - include/configs/gw_ventana.h | 3 --- include/configs/hikey.h | 2 -- include/configs/hikey960.h | 2 -- include/configs/hsdk-4xd.h | 2 -- include/configs/hsdk.h | 2 -- include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/imx8mm_data_modul_edm_sbc.h | 2 -- include/configs/imx8mm_evk.h | 1 - include/configs/imx8mm_icore_mx8mm.h | 1 - include/configs/imx8mm_venice.h | 1 - include/configs/imx8mn_bsh_smm_s2_common.h | 2 -- include/configs/imx8mn_evk.h | 2 -- include/configs/imx8mn_var_som.h | 2 -- include/configs/imx8mn_venice.h | 1 - include/configs/imx8mp_dhcom_pdk2.h | 2 -- include/configs/imx8mp_evk.h | 2 -- include/configs/imx8mp_rsb3720.h | 2 -- include/configs/imx8mp_venice.h | 1 - include/configs/imx8mq_cm.h | 2 -- include/configs/imx8mq_evk.h | 2 -- include/configs/imx8qm_mek.h | 2 -- include/configs/imx8qm_rom7720.h | 2 -- include/configs/imx8ulp_evk.h | 1 - include/configs/iot2050.h | 2 -- include/configs/iot_devkit.h | 2 -- include/configs/j721e_evm.h | 2 -- include/configs/j721s2_evm.h | 2 -- include/configs/km/km-powerpc.h | 1 - include/configs/km/km_arm.h | 1 - include/configs/km/pg-wcom-ls102xa.h | 1 - include/configs/kmcent2.h | 1 - include/configs/kontron-sl-mx8mm.h | 2 -- include/configs/kontron_pitx_imx8m.h | 2 -- include/configs/ls1012a_common.h | 2 -- include/configs/ls1021aqds.h | 1 - include/configs/ls1021atsn.h | 2 -- include/configs/ls1021atwr.h | 1 - include/configs/ls1028a_common.h | 2 -- include/configs/ls1043a_common.h | 2 -- include/configs/ls1046a_common.h | 2 -- include/configs/ls1088a_common.h | 1 - include/configs/ls2080a_common.h | 2 -- include/configs/lx2160a_common.h | 2 -- include/configs/malta.h | 2 -- include/configs/meson64.h | 1 - include/configs/microblaze-generic.h | 2 -- include/configs/microchip_mpfs_icicle.h | 2 -- include/configs/mt7620.h | 2 -- include/configs/mt7622.h | 1 - include/configs/mt7623.h | 2 -- include/configs/mt7628.h | 2 -- include/configs/mt7629.h | 2 -- include/configs/mt8183.h | 2 -- include/configs/mt8512.h | 3 --- include/configs/mt8516.h | 2 -- include/configs/mt8518.h | 2 -- include/configs/mvebu_armada-37xx.h | 2 -- include/configs/mx6_common.h | 2 -- include/configs/mx7_common.h | 2 -- include/configs/mx7ulp_com.h | 2 -- include/configs/mx7ulp_evk.h | 2 -- include/configs/nsim.h | 2 -- include/configs/octeon_common.h | 2 -- include/configs/octeontx2_common.h | 1 - include/configs/octeontx_common.h | 1 - include/configs/openpiton-riscv64.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/phycore_imx8mm.h | 1 - include/configs/phycore_imx8mp.h | 2 -- include/configs/pico-imx8mq.h | 2 -- include/configs/pomelo.h | 1 - include/configs/poplar.h | 1 - include/configs/presidio_asic.h | 2 -- include/configs/px30_common.h | 4 ---- include/configs/qemu-arm.h | 2 -- include/configs/qemu-ppce500.h | 1 - include/configs/qemu-riscv.h | 2 -- include/configs/rcar-gen3-common.h | 1 - include/configs/rk3128_common.h | 2 -- include/configs/rk322x_common.h | 2 -- include/configs/rk3288_common.h | 2 -- include/configs/rk3308_common.h | 4 ---- include/configs/rk3328_common.h | 2 -- include/configs/rk3368_common.h | 2 -- include/configs/rk3399_common.h | 2 -- include/configs/rk3568_common.h | 2 -- include/configs/rpi.h | 4 ---- include/configs/sama7g5ek.h | 1 - include/configs/sdm845.h | 1 - include/configs/sifive-unleashed.h | 2 -- include/configs/sifive-unmatched.h | 2 -- include/configs/socfpga_arria5_secu1.h | 2 -- include/configs/socfpga_soc64_common.h | 1 - include/configs/socfpga_vining_fpga.h | 1 - include/configs/stemmy.h | 1 - include/configs/stih410-b2260.h | 2 -- include/configs/stm32mp13_common.h | 1 - include/configs/stm32mp15_common.h | 1 - include/configs/sunxi-common.h | 4 ---- include/configs/tb100.h | 2 -- include/configs/total_compute.h | 2 -- include/configs/turris_mox.h | 1 - include/configs/uniphier.h | 2 -- include/configs/vcoreiii.h | 2 -- include/configs/verdin-imx8mm.h | 2 -- include/configs/verdin-imx8mp.h | 2 -- include/configs/vexpress_aemv8.h | 2 -- include/configs/x86-common.h | 1 - include/configs/xilinx_versal.h | 2 -- include/configs/xilinx_zynqmp.h | 2 -- include/configs/xilinx_zynqmp_r5.h | 1 - include/configs/zynq-common.h | 1 - 456 files changed, 321 insertions(+), 269 deletions(-)
diff --git a/README b/README index fb0284d4ecb6..ff0df3797d21 100644 --- a/README +++ b/README @@ -1736,12 +1736,6 @@ Configuration Settings:
Non-cached memory is only supported on 32-bit ARM at present.
-- CONFIG_SYS_BOOTM_LEN: - Normally compressed uImages are limited to an - uncompressed size of 8 MBytes. If this is not enough, - you can define CONFIG_SYS_BOOTM_LEN in your board config file - to adjust this setting to your needs. - - CONFIG_SYS_BOOTMAPSZ: Maximum size of memory mapped by the startup code of the Linux kernel; all data that must be processed by diff --git a/boot/bootm.c b/boot/bootm.c index dfa65f125e57..86dbfbcfed5b 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -33,11 +33,6 @@ #include <bootm.h> #include <image.h>
-#ifndef CONFIG_SYS_BOOTM_LEN -/* use 8MByte as default max gunzip size */ -#define CONFIG_SYS_BOOTM_LEN 0x800000 -#endif - #define MAX_CMDLINE_SIZE SZ_4K
#define IH_INITRD_ARCH IH_ARCH_DEFAULT @@ -369,10 +364,12 @@ static int bootm_find_other(struct cmd_tbl *cmdtp, int flag, int argc, * * @comp_type: Compression type being used (IH_COMP_...) * @uncomp_size: Number of bytes uncompressed + * @buf_size: Number of bytes the decompresion buffer was * @ret: errno error code received from compression library * Return: Appropriate BOOTM_ERR_ error code */ -static int handle_decomp_error(int comp_type, size_t uncomp_size, int ret) +static int handle_decomp_error(int comp_type, size_t uncomp_size, + size_t buf_size, int ret) { const char *name = genimg_get_comp_name(comp_type);
@@ -380,7 +377,7 @@ static int handle_decomp_error(int comp_type, size_t uncomp_size, int ret) if (ret == -ENOSYS) return BOOTM_ERR_UNIMPLEMENTED;
- if (uncomp_size >= CONFIG_SYS_BOOTM_LEN) + if (uncomp_size >= buf_size) printf("Image too large: increase CONFIG_SYS_BOOTM_LEN\n"); else printf("%s: uncompress error %d\n", name, ret); @@ -420,7 +417,8 @@ static int bootm_load_os(bootm_headers_t *images, int boot_progress) load_buf, image_buf, image_len, CONFIG_SYS_BOOTM_LEN, &load_end); if (err) { - err = handle_decomp_error(os.comp, load_end - load, err); + err = handle_decomp_error(os.comp, load_end - load, + CONFIG_SYS_BOOTM_LEN, err); bootstage_error(BOOTSTAGE_ID_DECOMP_IMAGE); return err; } @@ -1006,7 +1004,7 @@ static int bootm_host_load_image(const void *fit, int req_image_type, ulong data, len; bootm_headers_t images; int noffset; - ulong load_end; + ulong load_end, buf_size; uint8_t image_type; uint8_t imape_comp; void *load_buf; @@ -1032,14 +1030,14 @@ static int bootm_host_load_image(const void *fit, int req_image_type, }
/* Allow the image to expand by a factor of 4, should be safe */ - load_buf = malloc((1 << 20) + len * 4); + buf_size = (1 << 20) + len * 4; + load_buf = malloc(buf_size); ret = image_decomp(imape_comp, 0, data, image_type, load_buf, - (void *)data, len, CONFIG_SYS_BOOTM_LEN, - &load_end); + (void *)data, len, buf_size, &load_end); free(load_buf);
if (ret) { - ret = handle_decomp_error(imape_comp, load_end - 0, ret); + ret = handle_decomp_error(imape_comp, load_end - 0, buf_size, ret); if (ret != BOOTM_ERR_UNIMPLEMENTED) return ret; } diff --git a/cmd/Kconfig b/cmd/Kconfig index bb956e330750..d5f842136cff 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -335,6 +335,16 @@ config BOOTM_VXWORKS help Support booting VxWorks images via the bootm command.
+config SYS_BOOTM_LEN + hex "Maximum size of a decompresed OS image" + depends on CMD_BOOTM || CMD_BOOTI || CMD_BOOTZ + default 0x4000000 if PPC || ARM64 + default 0x1000000 if X86 || ARCH_MX6 || ARCH_MX7 + default 0x800000 + help + This is the maximum size of the buffer that is used to decompress the OS + image in to, if passing a compressed image to bootm/booti/bootz. + config CMD_BOOTEFI bool "bootefi" depends on EFI_LOADER diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 4ab888f59ed5..858fc5bbfd2e 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index 2a7996278418..c7fd5a07a7c5 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 5eeed2d2f313..a14bf427ad0a 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig index b3e6277a7e6d..3ed703a7a793 100644 --- a/configs/M5253DEMO_defconfig +++ b/configs/M5253DEMO_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index 3420934caf71..fe6ffca43c9f 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index cec2520bdd78..28d51eaa9deb 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 9d55d5058e57..c59359b820c7 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index bd0cbddfb89c..ae4add504b1c 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 0a159eb170e2..aead0f45bd30 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MALLOC_BOOTPARAMS=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="-> " CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index 236be1628ce0..6adba431ef09 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_PROMPT="S3K> " CONFIG_SYS_PBSIZE=278 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_LOADB is not set diff --git a/configs/a3y17lte_defconfig b/configs/a3y17lte_defconfig index 67eb7aff1fd0..9c0427236b93 100644 --- a/configs/a3y17lte_defconfig +++ b/configs/a3y17lte_defconfig @@ -20,6 +20,7 @@ CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/a5y17lte_defconfig b/configs/a5y17lte_defconfig index 44915ea5341e..ea0773e7a264 100644 --- a/configs/a5y17lte_defconfig +++ b/configs/a5y17lte_defconfig @@ -20,6 +20,7 @@ CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig index 7d8e7649f2a5..afa0c24b688a 100644 --- a/configs/a64-olinuxino-emmc_defconfig +++ b/configs/a64-olinuxino-emmc_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index 06f51a8f8d31..ccb5abc98452 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/a7y17lte_defconfig b/configs/a7y17lte_defconfig index 58486f6a5715..952c72b760d2 100644 --- a/configs/a7y17lte_defconfig +++ b/configs/a7y17lte_defconfig @@ -20,6 +20,7 @@ CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_DM_I2C_GPIO=y diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index fcfc7b3fe231..b7ea28b1786a 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index cfd857c183fb..fd89ea14e9cb 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 36345fbfdc33..2a0c1abf6e54 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index 01883850f9a4..e85921bcb3ab 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 477329fa67ae..cab5a387e5a9 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index eba12a8f0d40..a5cc75718229 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 6ade12b740e2..dbe5db278fd2 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index 2be91815a8e7..c9dc1d10f821 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index 0ec440917519..bbb987c5edd6 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index ab74bdb2f884..9fe5ac4a1618 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index de13af62be2d..b5801094e8c4 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00080000 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index f0a6b4be43a8..1f28d50a1b3e 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 34bef30edd3b..56da3720d961 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_ETHER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 4d0ee46ac70f..bb03e487f874 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y # CONFIG_SPL_YMODEM_SUPPORT is not set CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index 9a86e869aa1f..ac451026b09a 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_ECC=y CONFIG_SPL_NAND_BASE=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 77593e3e3dcb..070674651ffd 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index 97a361ce4d61..595e7301cf9e 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 2c6fc5496ebd..d5cd182acb83 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -51,6 +51,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index a154a342551a..e9e89f627e20 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 8808e1ff6583..f2385e3d703a 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index a077ef8ae24b..249e6702dd76 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -45,6 +45,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_CMD_SPL=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index e22c11d9807d..aa0b466d9548 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -42,6 +42,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index fc1bc01c0629..1c37b635406a 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index 7ebf3665214f..2c0bd4d2e10c 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_MMC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 49bfc006ddba..0f547526fe62 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -63,6 +63,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_DM=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 2d8add2fbd5e..5232b979709d 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -64,6 +64,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index 05a6a9219ea7..7507128c11e9 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -56,6 +56,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index 37e04483dbdb..e7e222647322 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -56,6 +56,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index fc0c5432dbc3..6e63f0e88078 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -60,6 +60,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/amarula_a64_relic_defconfig b/configs/amarula_a64_relic_defconfig index 0e173c28c12a..72f97cee4de5 100644 --- a/configs/amarula_a64_relic_defconfig +++ b/configs/amarula_a64_relic_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_MUSB_GADGET=y diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig index c4fd80345657..4ba09334d422 100644 --- a/configs/apple_m1_defconfig +++ b/configs/apple_m1_defconfig @@ -8,6 +8,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_LATE_INIT=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_NET is not set CONFIG_APPLE_SPI_KEYB=y # CONFIG_MMC is not set diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 450b2830e56a..bfcbaa59f854 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x8000000 CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2073 +CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADP=y diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index efad458720b3..c744b38cc48b 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AXS# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=278 +CONFIG_SYS_BOOTM_LEN=0x8000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index 0d1764958224..29affdc5e964 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -21,6 +21,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AXS# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=278 +CONFIG_SYS_BOOTM_LEN=0x8000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig index 0fb1bda1c6ef..a68742e9d6a7 100644 --- a/configs/bananapi_m2_plus_h5_defconfig +++ b/configs/bananapi_m2_plus_h5_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 5d1d10a0918c..36aa80a09baa 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index 280422021099..c44e6ba4ffcc 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -22,6 +22,7 @@ CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=536 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index 0382034a4793..bab2c76efb73 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_PROMPT="U-Boot>" CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=536 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y diff --git a/configs/bcm947622_defconfig b/configs/bcm947622_defconfig index af9e0c742c69..c61fbe1848e6 100644 --- a/configs/bcm947622_defconfig +++ b/configs/bcm947622_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_CACHE=y CONFIG_OF_EMBED=y CONFIG_CLK=y diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig index 3bc4ca3ef6e2..424eca7946b8 100644 --- a/configs/bcm963158_ram_defconfig +++ b/configs/bcm963158_ram_defconfig @@ -25,6 +25,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig index d327dc68b110..7f9093c6f6d3 100644 --- a/configs/bcm968360bg_ram_defconfig +++ b/configs/bcm968360bg_ram_defconfig @@ -23,6 +23,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y diff --git a/configs/bcm968580xref_ram_defconfig b/configs/bcm968580xref_ram_defconfig index ef5ae44345e7..a8c7ffa74875 100644 --- a/configs/bcm968580xref_ram_defconfig +++ b/configs/bcm968580xref_ram_defconfig @@ -23,6 +23,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=24 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 9446f8454c1a..9181b9e47743 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_PROMPT="u-boot> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1049 # CONFIG_SYS_XTRACE is not set +CONFIG_SYS_BOOTM_LEN=0x1800000 CONFIG_CMD_GPT=y CONFIG_CMD_GPT_RENAME=y CONFIG_CMD_MMC=y diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig index 6453a72a7d78..2c440e44f5dc 100644 --- a/configs/beelink_gs1_defconfig +++ b/configs/beelink_gs1_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 98d38a89a042..00f604725f51 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_PROMPT="antminer> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2075 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x3c00000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_DM is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig index 691e47c5508d..2be57d2d1ed9 100644 --- a/configs/boston32r2_defconfig +++ b/configs/boston32r2_defconfig @@ -21,6 +21,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig index 3c4aac93d89a..bcd6c05a1141 100644 --- a/configs/boston32r2el_defconfig +++ b/configs/boston32r2el_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig index 30c5356c015b..7bb4e692d6b7 100644 --- a/configs/boston32r6_defconfig +++ b/configs/boston32r6_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig index f1253e6a51cf..a3c6546ebb5b 100644 --- a/configs/boston32r6el_defconfig +++ b/configs/boston32r6el_defconfig @@ -23,6 +23,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig index a7c67805ab1a..4a41e6b5cc64 100644 --- a/configs/boston64r2_defconfig +++ b/configs/boston64r2_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig index 326c757057fb..792341e76f06 100644 --- a/configs/boston64r2el_defconfig +++ b/configs/boston64r2el_defconfig @@ -23,6 +23,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig index d31b92dc3cda..bf7f709524b9 100644 --- a/configs/boston64r6_defconfig +++ b/configs/boston64r6_defconfig @@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig index 72b3649d4a13..f716a4383959 100644 --- a/configs/boston64r6el_defconfig +++ b/configs/boston64r6el_defconfig @@ -23,6 +23,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_ELF is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index b1c8577ab627..f088e0bdc099 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index 5addd4970b2a..7f961ae473cb 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 67683c895d23..5d6dfbd5c449 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 2f7ff524cc1d..0a906ca95517 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -56,6 +56,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig index 0daff7d15054..8dc928a9274e 100644 --- a/configs/bubblegum_96_defconfig +++ b/configs/bubblegum_96_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyOWL5,115200n8" CONFIG_SYS_PROMPT="U-Boot => " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1051 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_CACHE=y diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 17219969f604..5dea71980ba0 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -49,6 +49,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_CLK=y CONFIG_CMD_DM=y diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index 862b37d0fb64..dad3b36b9937 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SPL_CRC32 is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index a0f15f6e7b2d..35d546e63159 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SPL_CRC32 is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 513e5f85e9cb..60fc528a8ce7 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SPL_CRC32 is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 7fc505ee4e36..e6f03faa87e8 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SPL_CRC32 is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 983642dac5c6..07848a5933eb 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1c CONFIG_SPL_MMC_TINY=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DM=y CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index cf35307937f6..baafe3c58c6e 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -26,6 +26,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig index 49a651aba238..ba5cf0308f3a 100644 --- a/configs/corstone1000_defconfig +++ b/configs/corstone1000_defconfig @@ -24,6 +24,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 # CONFIG_CMD_CONSOLE is not set CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_XIMG is not set CONFIG_CMD_LOADM=y # CONFIG_CMD_LOADS is not set diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index 3edc532e31eb..1471deb0a987 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0xc00000 CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index becb1beb1f91..456f26ced3c2 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0xc00000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_WDT=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index 842ec9fa92a7..be3e6a9bd193 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_PROMPT="G3#" CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0xc00000 CONFIG_CMD_MTD=y CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig index 01e784efa85f..1b46ab4bf972 100644 --- a/configs/crs305-1g-4s-bit_defconfig +++ b/configs/crs305-1g-4s-bit_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index 98e10d509dd1..a7a3ffe4812d 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig index dd04bd18a1c3..70f71de6ae09 100644 --- a/configs/crs326-24g-2s-bit_defconfig +++ b/configs/crs326-24g-2s-bit_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig index 8f7b839460b9..5991b62923af 100644 --- a/configs/crs326-24g-2s_defconfig +++ b/configs/crs326-24g-2s_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig index 68a47fc7c219..434e9fb90f39 100644 --- a/configs/crs328-4c-20s-4s-bit_defconfig +++ b/configs/crs328-4c-20s-4s-bit_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig index fbf810136349..8e08cceaac4a 100644 --- a/configs/crs328-4c-20s-4s_defconfig +++ b/configs/crs328-4c-20s-4s_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=96 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTD=y CONFIG_CMD_SPI=y diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig index 223a775387a4..7437d4b4b9d5 100644 --- a/configs/cubieboard7_defconfig +++ b/configs/cubieboard7_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTARGS="console=ttyOWL3,115200n8" CONFIG_SYS_PROMPT="U-Boot => " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1051 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_MMC=y CONFIG_MMC_OWL=y CONFIG_PHY_REALTEK=y diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index 309545be5310..ae1179a11601 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/durian_defconfig b/configs/durian_defconfig index eccf55f895ec..27c8e260d92e 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -22,6 +22,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="durian#" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 +CONFIG_SYS_BOOTM_LEN=0x3c00000 # CONFIG_CMD_LZMADEC is not set # CONFIG_CMD_UNZIP is not set CONFIG_CMD_PCI=y diff --git a/configs/emlid_neutis_n5_devboard_defconfig b/configs/emlid_neutis_n5_devboard_defconfig index d9272eae168f..73121f2f4eb2 100644 --- a/configs/emlid_neutis_n5_devboard_defconfig +++ b/configs/emlid_neutis_n5_devboard_defconfig @@ -10,4 +10,5 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig index 9128fa086a7a..34e5b4e743f2 100644 --- a/configs/espresso7420_defconfig +++ b/configs/espresso7420_defconfig @@ -20,6 +20,7 @@ CONFIG_CONSOLE_MUX=y # CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="ESPRESSO7420 # " CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index ac38d5e78852..6526933274a2 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -18,6 +18,7 @@ CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index f44dec09c278..ebf13c31c5bf 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -36,6 +36,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_OPTEE_IMAGE=y CONFIG_TPL_MAX_SIZE=0x100000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 6587c19c36a1..a2b88169c67d 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_OPTEE_IMAGE=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index c2b3a0e315de..b3198bfa3808 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index c48541a9ec5c..a81aa00f2dba 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -133,6 +133,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=1024 CONFIG_CMD_CPU=y +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_BINOP=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 7e9a7ea7c0b5..016282080bed 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2073 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index ea9e7e2cbf0a..0516176e6d07 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_PROMPT="Ventana > " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=539 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index c0c7c0daf134..63c87f17a5c6 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_PROMPT="Ventana > " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=539 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 7ce02fef8a2c..9d6819f19d30 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_PROMPT="Ventana > " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=539 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL_NAND_OFS=0x1100000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 CONFIG_CMD_UNZIP=y diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index 1d78c17d13b0..8e673545a966 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -23,6 +23,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="hsdk-4xd# " CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2075 +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_ENV_FLAGS=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index f9823af34d4d..3bd6f9314ccb 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -22,6 +22,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="hsdk# " CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2071 +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_ENV_FLAGS=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index b8070e7351a6..74dfc6680420 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -142,6 +142,7 @@ CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_CBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_IMLS=y CONFIG_CMD_ENV_FLAGS=y CONFIG_CMD_I2C=y diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 800559120960..2a209bcfe471 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index dae7ddc20e07..070849881394 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 69ebc6fa325a..7040d782ef64 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index a3c142feb284..0488ec223f0d 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index bf2b6486347a..1a0672879e58 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -46,6 +46,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index 399b388460f4..da59e4c7adf5 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -71,6 +71,7 @@ CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 190209d63256..49b36e0c8f48 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -49,6 +49,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index cadef45028d9..bd177887689c 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 357109e32e5f..738d308f45b3 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index 68c2940456d9..5013dc5895c7 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_FUSE=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index 4bc551210515..74d033eb4035 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index e16c1f60e674..e53e00845edb 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 70d3d83e9a5d..41deb0db7485 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 889bcf7dc58e..927b449e03f9 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_PROMPT="> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2067 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 4a0bf393986c..935de023161a 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 3a41767c1560..f3b69070698b 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -71,6 +71,7 @@ CONFIG_SYS_PBSIZE=2081 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_ERASEENV=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 2b2a025c2b2f..dcee933a1be0 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index 97925196a85f..9f067fc6336e 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -56,6 +56,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index df35dcbb7625..2271f2a14e5e 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -56,6 +56,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index cef5f26d0baa..7fdde41b6da5 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CRC32_VERIFY=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index cd1ee4d9e702..6f59f29dac07 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -44,6 +44,7 @@ CONFIG_SPL_I2C=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index 2c566e068fd9..dc3992b0b45f 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_POWER=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 5c361780267f..f250425e26a6 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2068 CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index a0f9f20f2f5c..9ac6ef167862 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -66,6 +66,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 21ec66d7e4ab..5e25ed620fa9 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -67,6 +67,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index 02a666522386..add8da02056c 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index fb6e69197d11..98d69a18b95f 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -73,6 +73,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 655759b09ce7..054038fdd043 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 65378d3cec16..ac2deeb27c20 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 4d116c3a7adb..80746791fe3a 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 3b73fbc812cb..34ab31565ca4 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -171,6 +171,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 8b54f9c7c842..5766f49d774a 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index 310278d61127..98f23dbbf175 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -141,6 +141,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 8cbde0e178aa..a309acae7dc3 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index 7775b604f570..6a6f20890a76 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -154,6 +154,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 027bb73b57c6..d251eba0d04b 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -134,6 +134,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index 8e27f9f6af3b..de44deb1ad1c 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_PBSIZE=532 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index 19cb1e85b04c..7c0ebefa6982 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -133,6 +133,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index 6670c317a19e..5bb3d9c1160a 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -154,6 +154,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index 27a89f9b1b66..49671e8fb47f 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index aaabb14f91a2..aaca8966c8f9 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x230000 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig index 524138aa2e17..13ff75821244 100644 --- a/configs/libretech_all_h3_cc_h5_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/libretech_all_h3_it_h5_defconfig b/configs/libretech_all_h3_it_h5_defconfig index 1b0833358632..75280ee1e3b2 100644 --- a/configs/libretech_all_h3_it_h5_defconfig +++ b/configs/libretech_all_h3_it_h5_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPI_FLASH_XMC=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h5_cc_h5_defconfig b/configs/libretech_all_h5_cc_h5_defconfig index e0734f96735a..f42747e9466c 100644 --- a/configs/libretech_all_h5_cc_h5_defconfig +++ b/configs/libretech_all_h5_cc_h5_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPI_FLASH_XMC=y CONFIG_SUN8I_EMAC=y CONFIG_SPI=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 165e1a780fd2..92fa4f000ed3 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -38,6 +38,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 13ded158e68e..fcbaf9b685e0 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -38,6 +38,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 1423d732f8ae..19a21f4a0475 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -66,6 +66,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 1e6e650f47b3..727475f62264 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 7cc61213e33b..82c6a1bdc3bc 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -38,6 +38,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 04cb087ad55c..438a8ecf0ae6 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -38,6 +38,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 2d560b2ea6d2..750a5a501e5f 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 8e23ccc78895..cbb7c55944f9 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -64,6 +64,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index ff8fbeb71778..71eff4582f93 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -63,6 +63,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index b368791280ac..4ee30728663e 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -29,6 +29,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 64266afd013a..aad997833111 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x8000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 831c20fc6d96..b86a60fd3264 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -35,6 +35,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index c806309b0938..0410249b316b 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -36,6 +36,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index de025930d85d..82e3b39a522e 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -36,6 +36,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index b5b2cf13f923..9343203eacfd 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -37,6 +37,7 @@ CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 2b76f0a2b960..d247d114f393 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -62,6 +62,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 161fa1eebd6d..855657ca37a0 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -63,6 +63,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 2dc01e19bbc5..a225f1a37bf7 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -64,6 +64,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index be8689071665..e55b4a491455 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 436bae8af87c..2bd6d7c26fd8 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 88c0d5628dee..3aff68b0188f 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -16,6 +16,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 58d31d6a4432..e268fb63743f 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -18,6 +18,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 8ece12630fb2..688f42afdb1f 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_PROMPT="U-Boot-mONStR> " CONFIG_SYS_MAXARGS=15 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=544 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig index 462c8b7f291b..cf093532b192 100644 --- a/configs/microchip_mpfs_icicle_defconfig +++ b/configs/microchip_mpfs_icicle_defconfig @@ -16,6 +16,7 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM_MTD=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 7000b89311a2..34465f99a52f 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig index 04e15c61487b..f3b60e4e4f88 100644 --- a/configs/mscc_jr2_defconfig +++ b/configs/mscc_jr2_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig index b144dd4354c5..dc996936a9fa 100644 --- a/configs/mscc_luton_defconfig +++ b/configs/mscc_luton_defconfig @@ -32,6 +32,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=281 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig index e088f3ca04ad..450ff6e0e174 100644 --- a/configs/mscc_ocelot_defconfig +++ b/configs/mscc_ocelot_defconfig @@ -29,6 +29,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig index a56c5ebdecfe..fe2dcee9742c 100644 --- a/configs/mscc_serval_defconfig +++ b/configs/mscc_serval_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=282 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig index cf1c4db1d384..5819827de03a 100644 --- a/configs/mscc_servalt_defconfig +++ b/configs/mscc_servalt_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=283 # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig index 9e409b60b275..8c64bb740a30 100644 --- a/configs/mt7620_mt7530_rfb_defconfig +++ b/configs/mt7620_mt7530_rfb_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig index f3f5e3a88711..2aa6eb7e2697 100644 --- a/configs/mt7620_rfb_defconfig +++ b/configs/mt7620_rfb_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig index 06e85c2f57d7..c8ac1997ca58 100644 --- a/configs/mt7623a_unielec_u7623_02_defconfig +++ b/configs/mt7623a_unielec_u7623_02_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_MAXARGS=8 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig index 4320fe5bb626..4e8905b68f79 100644 --- a/configs/mt7623n_bpir2_defconfig +++ b/configs/mt7623n_bpir2_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_MAXARGS=8 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig index 7690213ab80c..14fc8b05e3cf 100644 --- a/configs/mt7628_rfb_defconfig +++ b/configs/mt7628_rfb_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_BSS_START_ADDR=0x80010000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SYS_BOOTM_LEN=0x1000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index f5e3c26d66ce..a74c3edbf8e6 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_MAXARGS=8 CONFIG_SYS_PBSIZE=1049 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig index 2541b8a22aee..bcffaefb9b19 100644 --- a/configs/mvebu_crb_cn9130_defconfig +++ b/configs/mvebu_crb_cn9130_defconfig @@ -26,6 +26,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="Marvell>> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=1051 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index d3633d04dcb3..2eee745ed67a 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -25,6 +25,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig index 7563873ef2e4..99d46c1a2a80 100644 --- a/configs/mvebu_db_cn9130_defconfig +++ b/configs/mvebu_db_cn9130_defconfig @@ -28,6 +28,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="Marvell>> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=1051 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index d334c89ed315..8164beb14132 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -26,6 +26,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig index 5cec3d8a682a..25ae690fe600 100644 --- a/configs/mvebu_puzzle-m801-88f8040_defconfig +++ b/configs/mvebu_puzzle-m801-88f8040_defconfig @@ -30,6 +30,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mx7ulp_com_defconfig b/configs/mx7ulp_com_defconfig index 5b3b332f10d1..2b55fbd3b29a 100644 --- a/configs/mx7ulp_com_defconfig +++ b/configs/mx7ulp_com_defconfig @@ -20,6 +20,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index 6a22040c035c..95cd22a59d8f 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_MAXARGS=256 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index ea03eb377171..45cdd74f09ab 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=256 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig index 8f3c242a7a93..226ccaa12ffe 100644 --- a/configs/nanopi_a64_defconfig +++ b/configs/nanopi_a64_defconfig @@ -7,6 +7,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig index 66df94b33b9f..6fedf056ff72 100644 --- a/configs/nanopi_neo2_defconfig +++ b/configs/nanopi_neo2_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig index 60f26318429b..3f834b756dfd 100644 --- a/configs/nanopi_neo_plus2_defconfig +++ b/configs/nanopi_neo_plus2_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_r1s_h5_defconfig b/configs/nanopi_r1s_h5_defconfig index 06c564ec8cd8..a0cf8ff0442f 100644 --- a/configs/nanopi_r1s_h5_defconfig +++ b/configs/nanopi_r1s_h5_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index bcf954aa632d..60809400d263 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 5a09db2f9bf3..e021cc94cca6 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index ad8acec4e085..3c3d1812a791 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -20,6 +20,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="nsim# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_DM=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index 8a63e58263f3..9e1a14845df3 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="nsim# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=279 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig index 21468c426b52..1cd8e9f2b680 100644 --- a/configs/oceanic_5205_5inmfd_defconfig +++ b/configs/oceanic_5205_5inmfd_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig index dc2e215c0502..0a18b94295a6 100644 --- a/configs/octeon_ebb7304_defconfig +++ b/configs/octeon_ebb7304_defconfig @@ -20,6 +20,7 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/octeon_nic23_defconfig b/configs/octeon_nic23_defconfig index 23cdef3316c0..95e98c1161db 100644 --- a/configs/octeon_nic23_defconfig +++ b/configs/octeon_nic23_defconfig @@ -27,6 +27,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index 2b3748b2d049..d4f9f565aef8 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index 0fd5b7212b82..aeb9f8a8b6de 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig index 38ef7f41632d..6fe96f47553d 100644 --- a/configs/octeontx_81xx_defconfig +++ b/configs/octeontx_81xx_defconfig @@ -37,6 +37,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig index 371f61866970..5ba4fc1cad86 100644 --- a/configs/octeontx_83xx_defconfig +++ b/configs/octeontx_83xx_defconfig @@ -35,6 +35,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Marvell> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_MD5SUM=y CONFIG_MD5SUM_VERIFY=y diff --git a/configs/openpiton_riscv64_defconfig b/configs/openpiton_riscv64_defconfig index f75c140cf4d4..98d6818e1be4 100644 --- a/configs/openpiton_riscv64_defconfig +++ b/configs/openpiton_riscv64_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index e9514f3da1de..8ae265f902b7 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x10000000 # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig index 824f017dae45..dbca66d14292 100644 --- a/configs/orangepi_3_defconfig +++ b/configs/orangepi_3_defconfig @@ -10,6 +10,7 @@ CONFIG_BLUETOOTH_DT_DEVICE_FIXUP="brcm,bcm4345c5" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_PHY_SUN50I_USB3=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig index cfce6cb0d478..14c880628122 100644 --- a/configs/orangepi_lite2_defconfig +++ b/configs/orangepi_lite2_defconfig @@ -9,5 +9,6 @@ CONFIG_MMC0_CD_PIN="PF6" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig index 63d3addbdd38..a4336332fc75 100644 --- a/configs/orangepi_one_plus_defconfig +++ b/configs/orangepi_one_plus_defconfig @@ -9,5 +9,6 @@ CONFIG_MMC0_CD_PIN="PF6" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index 7b12bf00ff24..d0cad2a74615 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_SPI_SUNXI=y CONFIG_SPL_STACK=0x54000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index 8c4cb57ef0f9..690a5f195b63 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig index 830cbbaaeba3..7a9ca8e88a80 100644 --- a/configs/orangepi_win_defconfig +++ b/configs/orangepi_win_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index 62117548e2bc..cad7a7bb064f 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_MAX_SIZE=0xbfa0 CONFIG_SPL_STACK=0x58000 CONFIG_SPL_I2C=y CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig index 79040125dcc3..02f70ccf0c09 100644 --- a/configs/orangepi_zero_plus2_defconfig +++ b/configs/orangepi_zero_plus2_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig index 008384e46014..15520955f5ef 100644 --- a/configs/orangepi_zero_plus_defconfig +++ b/configs/orangepi_zero_plus_defconfig @@ -9,6 +9,7 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index dcba51de8e56..3852f7ba07f7 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-0000) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index f8a8407a7f81..bf5872203b3d 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index 031549470f7b..5f57b1c01989 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2571) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2084 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 7b2fd5795a0f..ed23937fed50 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2093 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index 41621970f004..15e07a129429 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2093 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index 7604e8a12231..36a001b83b66 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2089 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index a84e0cdd9eb1..bc58a631bed3 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -46,6 +46,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index f04c3ac61476..5d70160bd3b9 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -44,6 +44,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 4380d8836351..a604d3248f2c 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -46,6 +46,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index ca05e25d47e2..dfd6d627e1c1 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -44,6 +44,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index d791e9dcf8d4..519a705a40ed 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index 8e27f7231429..6d4bebd6dcf2 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -49,6 +49,7 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x8000000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig index c6b4f7bf1438..3f9ea1e329f1 100644 --- a/configs/pine64-lts_defconfig +++ b/configs/pine64-lts_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index 7dbe061790cd..62608f93bdb5 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -8,6 +8,7 @@ CONFIG_PINE64_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 2cddcf58301e..2f511c805173 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pinebook_defconfig b/configs/pinebook_defconfig index bf070aab8b34..982f68143b9d 100644 --- a/configs/pinebook_defconfig +++ b/configs/pinebook_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_R_I2C_ENABLE=y CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index d882c0cc8802..905b47d29e6a 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -12,6 +12,7 @@ CONFIG_PINEPHONE_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig index f90cb0d1f818..e20d20a2fd5e 100644 --- a/configs/pinetab_defconfig +++ b/configs/pinetab_defconfig @@ -10,3 +10,4 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 diff --git a/configs/pomelo_defconfig b/configs/pomelo_defconfig index 13b1d7b628b7..515624fd42e9 100644 --- a/configs/pomelo_defconfig +++ b/configs/pomelo_defconfig @@ -18,6 +18,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_SYS_PROMPT="pomelo#" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 5b5039e290be..7b024437c2ba 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 1f169e1a34f6..9634d7f77f11 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -13,6 +13,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 6f501a8798c6..1c5a0617aa8d 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -14,6 +14,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index 2bc7b9fbd0f0..2421c9a37194 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index 95dc1b47699d..d5eae95c80fd 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -14,6 +14,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 3eb3ea756e4e..2861d07f97e7 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -17,6 +17,7 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index e39accf94005..1ecfa27ce29a 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index d14a7adc5df3..50945472315a 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -28,6 +28,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PCI_INIT_R=y CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_DFU=y diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index 7abb343ad698..87b050f5dc84 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index c06ab641c300..dcececdc315c 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 20ca98821a06..860362e15897 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -28,6 +28,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMTEST=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index c9f62a8ebe54..bc2852f0916f 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -28,6 +28,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_BOOTZ=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_IMI is not set CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMTEST=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index 84bc49c0f23c..99faabaa2ff2 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_CLK=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 02d4e54b0717..c390af26897f 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -38,6 +38,7 @@ CONFIG_SPL_DM_RESET=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_PWM=y diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index 8f2d26e43d06..bdfe764d9e41 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -48,6 +48,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2082 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 7ae2b164a02d..e2d869610cf5 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -42,6 +42,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2082 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index 2beadc7ff7ac..6f15b3e9622a 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -49,6 +49,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2082 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 2917ece783da..37c843631881 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -47,6 +47,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2079 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 92d6045c6a7f..5f415b7ad4f9 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -39,6 +39,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2079 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index b9358fcc5d01..a57d54a7f271 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -48,6 +48,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_N5X # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2079 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index 4a244e17bc48..83e24402a887 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -44,6 +44,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 6c8ea81b67b6..6be4210c7d6e 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -47,6 +47,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2085 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 6aff07d77841..07e9f20a41a2 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -43,6 +43,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2085 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 0f4aa9051477..d0c87416efd0 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -35,6 +35,7 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMDLINE_PS_SUPPORT=y CONFIG_SYS_MAXARGS=32 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 621573653785..60a38abc8e3a 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_REGINFO=y # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_IMLS=y CONFIG_CMD_DM=y CONFIG_CMD_I2C=y diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig index 576e86493a24..55116f72d0d3 100644 --- a/configs/sopine_baseboard_defconfig +++ b/configs/sopine_baseboard_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/stemmy_defconfig b/configs/stemmy_defconfig index 28a312987373..7fc0a39872c9 100644 --- a/configs/stemmy_defconfig +++ b/configs/stemmy_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_CMD_CONFIG=y CONFIG_CMD_LICENSE=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index cb8c73afd474..c9be056cf624 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyAS1,115200 CONSOLE=/dev/ttyAS1 consoleblank=0 root=/ # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="stih410-b2260 => " CONFIG_SYS_PBSIZE=1058 +CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig index b5dcec78f516..f5b62628833e 100644 --- a/configs/stm32mp13_defconfig +++ b/configs/stm32mp13_defconfig @@ -18,6 +18,7 @@ CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 76a450952fc1..c70329cd4a69 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index d413d2cac4b6..838fd89eb993 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index dd270975508c..d503c1a36fe7 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 54a5385926f1..c2792aaad301 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -32,6 +32,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index a17dbed6590e..416d92bf1bb6 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 48185d32baa7..3452403c61db 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -23,6 +23,7 @@ CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 178c51687bec..4f478c13120c 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -52,6 +52,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_TARGET="u-boot.itb" CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_EEPROM=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 67a2c249007c..01fbb05123a9 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_DFU=y CONFIG_SPL_TARGET="u-boot.itb" CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set CONFIG_CMD_EEPROM=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 7cb430fc3282..e14668042fa2 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_FDT_SIMPLEFB=y CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SYS_PBSIZE=1050 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index 5e4accf4b127..9ddc80fe17df 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -17,6 +17,7 @@ CONFIG_FIT=y CONFIG_BOOTSTAGE_STASH_SIZE=4096 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=128 +CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_IMLS=y CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 31a550031dae..5d0a85443f19 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_SPL_ARGS_ADDR=0x10000000 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2071 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADFS=y CONFIG_CMD_FPGA_LOADMK=y diff --git a/configs/tanix_tx6_defconfig b/configs/tanix_tx6_defconfig index d1f12fba9bb0..84dbf106d495 100644 --- a/configs/tanix_tx6_defconfig +++ b/configs/tanix_tx6_defconfig @@ -10,3 +10,4 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_STACK=0x118000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index 575bf2dae284..aebaa6ad1476 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="[tb100]:~# " CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig index cd6d825715e8..6f202dc8a434 100644 --- a/configs/teres_i_defconfig +++ b/configs/teres_i_defconfig @@ -11,6 +11,7 @@ CONFIG_I2C0_ENABLE=y CONFIG_PREBOOT="setenv usb_pgood_delay 2000; usb start" CONFIG_SPL_STACK=0x54000 CONFIG_SYS_PBSIZE=1024 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index 03b6201591f8..71fbf2122cdd 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_PROMPT="ThunderX_88XX> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=544 +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index ce12b79ac471..839b93284f8c 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index 8dede27efcc9..886c6a933a7c 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index a11a17905cb9..986368a6dd36 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2077 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index f962f37d7ebe..0db956bd1c4c 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2077 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index dc71856f7204..b0e8ca82e339 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2077 +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 1bd48cb82a14..0d1c99c62c50 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -134,6 +134,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index 8f273da2f1ff..3fe731fd188a 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -156,6 +156,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 72306ab25eb8..5de9a6883432 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_CMD_CONFIG=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_GPIO=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index a448d1cb4be3..b6b5ca58c272 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_CMD_CONFIG=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_GPIO=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index db986cf13b84..eccfb0dbb167 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -16,6 +16,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="env exist ${bootdev}preboot && run ${bootdev}preboot" CONFIG_LOGLEVEL=6 CONFIG_CMD_CONFIG=y +CONFIG_SYS_BOOTM_LEN=0x2000000 # CONFIG_CMD_XIMG is not set CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_GPIO=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index cbaf970e6ad9..516e2cc32b8c 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -34,6 +34,7 @@ CONFIG_SPL_FALCON_BOOT_MMCSD=y CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x8800 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x8000 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10 +CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_SPL=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/xenguest_arm64_defconfig b/configs/xenguest_arm64_defconfig index fec124204b73..31fb4fde40e2 100644 --- a/configs/xenguest_arm64_defconfig +++ b/configs/xenguest_arm64_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=1051 # CONFIG_CMD_BDI is not set # CONFIG_CMD_BOOTD is not set +CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_ELF is not set # CONFIG_CMD_GO is not set # CONFIG_CMD_IMI is not set diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 78a0cc382807..a91fa80e5ff2 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -24,6 +24,7 @@ CONFIG_CLOCKS=y CONFIG_SYS_PROMPT="Versal> " CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2073 +CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MEMTEST=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 92ef35c64751..aef971fb71f7 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2071 # CONFIG_BOOTM_NETBSD is not set +CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_IMLS=y CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index 1ae634903063..1784792ce49c 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_PROMPT="ZynqMP r5> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=284 +CONFIG_SYS_BOOTM_LEN=0x3c00000 # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_EMBED=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 7f0ed8bc2250..b4ba161f3a31 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2073 +CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 14b35d7ef507..c773164c869b 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -78,7 +78,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/* FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 762d1dd94b1c..79448cf44048 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -84,7 +84,6 @@ */ /* Initial Memory map for Linux */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 840d3b4672e6..cac9b24ead8e 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -90,7 +90,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/* FLASH organization */ #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 4f6fc6d8cb9f..292578fc15b9 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -87,7 +87,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 90b0d41078ad..4d8f752777d0 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -92,7 +92,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 6eaa660e11fb..87d3e8fb153b 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -86,7 +86,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 2e3988f6c723..d920587c3790 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -88,7 +88,6 @@ * the maximum mapped by the Linux kernel during initialization ?? */ #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) -#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
/*----------------------------------------------------------------------- * FLASH organization diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index b6621f9a0728..d56d60306abf 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -248,7 +248,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 2eb33812f76a..c3c68071f2f2 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -356,7 +356,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index b5e0e2901f0a..d263999b5a71 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -477,7 +477,6 @@ extern unsigned long get_sdram_size(void); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 27889e3033cf..64f4c244fa21 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -353,7 +353,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index aa80d400bd98..3df6ec6246a5 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -457,7 +457,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 2fb181090b5d..8503fd108793 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -447,7 +447,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Dynamic MTD Partition support with mtdparts diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 84dfc8948194..e981f621c379 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -464,7 +464,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 716e9c3d5566..48cdc75a08df 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -418,7 +418,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index e697d8490c94..c31b0b684156 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -152,7 +152,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index f0a979423dea..4b59759f818e 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -19,8 +19,6 @@ #include <configs/ti_am335x_common.h> #include <linux/sizes.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_16M - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index 356c21a1b0ad..7a9928fba749 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -12,8 +12,6 @@
#include <configs/ti_am335x_common.h>
-#define CONFIG_SYS_BOOTM_LEN (16 << 20) - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index 5964ccc74c26..08bae9b886f2 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -16,8 +16,6 @@
/* settings we don;t want on this board */
-#define CONFIG_SYS_BOOTM_LEN (16 << 20) - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index 4289836bc3f6..7df5f1405512 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -10,8 +10,6 @@
#include <configs/ti_am335x_common.h>
-#define CONFIG_SYS_BOOTM_LEN (16 << 20) - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index c36311e06d79..d8b0531673f1 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -16,8 +16,6 @@
#define CONFIG_IODELAY_RECALIBRATION
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index d8f18d0b9ac9..0345160787ef 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -17,8 +17,6 @@ /* DDR Configuration */ #define CONFIG_SYS_SDRAM_BASE1 0x880000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define PARTS_DEFAULT \ /* Linux partitions */ \ "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 4a3e51d19ef9..c9f876f5da7e 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -63,8 +63,6 @@ /* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */ #define CONFIG_SYS_FSL_USDHC_NUM 3
-#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 754e90961940..daa5cdf5b26b 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -73,7 +73,6 @@ /* Initial Memory map for Linux*/ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Increase max gunzip size */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20)
/* Support autoboot from RAM (kernel image is loaded via debug port) */ #define KERNEL_IMAGE_ADDR "0x2000000 " diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 3e98ce09c720..f2357b5785a1 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -23,8 +23,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_512M
-#define CONFIG_SYS_BOOTM_LEN SZ_128M - /* * UART configuration */ diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 25906e404b1c..266b2ae04b3f 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -24,7 +24,6 @@ #define V_SCLK (V_OSCK)
/* FIT support */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M
#ifdef CONFIG_MTD_RAW_NAND
diff --git a/include/configs/bcm947622.h b/include/configs/bcm947622.h index 3a02806878bf..d0c46a2c823b 100644 --- a/include/configs/bcm947622.h +++ b/include/configs/bcm947622.h @@ -6,8 +6,6 @@ #ifndef __BCM947622_H #define __BCM947622_H
-#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024) - #define CONFIG_SYS_SDRAM_BASE 0x00000000
#define COUNTER_FREQUENCY 50000000 diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 97e1a88f270c..795de469384c 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -32,7 +32,6 @@ * Increase max uncompressed/gunzip size, keeping size same as EMMC linux * partition. */ -#define CONFIG_SYS_BOOTM_LEN 0x01800000
/* Access eMMC Boot_1 and Boot_2 partitions */
diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index ed78b732121f..134a3ec28920 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -91,7 +91,6 @@ extern phys_addr_t prior_stage_fdt_address; /* * Large kernel image bootm configuration. */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* * NS16550 configuration. diff --git a/include/configs/boston.h b/include/configs/boston.h index 3bf85b6c28d1..8b04492753a8 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -9,7 +9,6 @@ /* * General board configuration */ -#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
/* * CPU diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h index 493114836c8e..0c8d352be97c 100644 --- a/include/configs/broadcom_bcm963158.h +++ b/include/configs/broadcom_bcm963158.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } /* Memory usage */ -#define CONFIG_SYS_BOOTM_LEN (16 * 1024 * 1024)
/* * 63158 diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index c046fcb2bec0..789e6a4c9d59 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -16,7 +16,6 @@ #include <linux/stringify.h> /* ------------------------------------------------------------------------- */ /* memory */ -#define CONFIG_SYS_BOOTM_LEN SZ_32M
/* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ diff --git a/include/configs/brsmarc1.h b/include/configs/brsmarc1.h index 8fa5843be5d1..f9908352b0dc 100644 --- a/include/configs/brsmarc1.h +++ b/include/configs/brsmarc1.h @@ -18,7 +18,6 @@ /* ------------------------------------------------------------------------- */
/* memory */ -#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024)
/* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 01f636490536..192da015e188 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -28,6 +28,5 @@ #define DM9000_DATA (CONFIG_DM9000_BASE + 2)
/* Miscellaneous configuration options */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20)
#endif /* __CONFIG_CI20_H__ */ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index fb7de896b75d..5d6449c7f74a 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -96,8 +96,6 @@ /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ #define CONFIG_SYS_FSL_USDHC_NUM 2
-#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index d1a5d866d2d0..f20f4e35e957 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -345,7 +345,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/crs3xx-98dx3236.h b/include/configs/crs3xx-98dx3236.h index 07769c9e0e49..25bcc2a6841c 100644 --- a/include/configs/crs3xx-98dx3236.h +++ b/include/configs/crs3xx-98dx3236.h @@ -10,8 +10,6 @@ * High Level Configuration Options (easy to change) */
-#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* 64 MB */ - /* Environment in SPI NOR flash */
/* Keep device tree and initrd in lower memory so the kernel can access them */ diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index e1d580b1c8f8..c37b4c635b27 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -18,7 +18,6 @@ /* Note: 8 MiB (0x86000000 - 0x86800000) are reserved for tz/smem/hyp/rmtfs/rfsa */ #define PHYS_SDRAM_1_SIZE SZ_1G #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* Environment */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index 705146d04f76..1fa5d05e7b47 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -20,7 +20,6 @@ #define PHYS_SDRAM_2_SIZE 0x5ea4ffff
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_BOOTM_LEN SZ_64M
#include <config_distro_bootcmd.h>
diff --git a/include/configs/durian.h b/include/configs/durian.h index 7971df8c1d3b..8f0e8be43307 100644 --- a/include/configs/durian.h +++ b/include/configs/durian.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* BOOT */ -#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
#define CONFIG_EXTRA_ENV_SETTINGS \ "load_kernel=ext4load scsi 0:1 0x90100000 uImage-2004\0" \ diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 6b1de18bc159..b05846d0b920 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -22,7 +22,6 @@ {9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600}
#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_BOOTM_LEN SZ_32M /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 4a0aaf4da583..82076ff74ff6 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -22,9 +22,6 @@ /* NAND */ #define CONFIG_SYS_MAX_NAND_DEVICE 1
-#undef CONFIG_SYS_BOOTM_LEN -#define CONFIG_SYS_BOOTM_LEN (64 << 20) - /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 33e9aa5ffb45..5be6eb4e766c 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -15,8 +15,6 @@
#define CONFIG_POWER_HI6553
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Physical Memory Map */
/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h index caa6abb9d9d7..ad070439d002 100644 --- a/include/configs/hikey960.h +++ b/include/configs/hikey960.h @@ -9,8 +9,6 @@
#include <linux/sizes.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Physical Memory Map */
/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index 03ca9281c829..4af845ea9c2d 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -25,8 +25,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_1G
-#define CONFIG_SYS_BOOTM_LEN SZ_128M - /* * UART configuration */ diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index 0b8ac78e2794..0ce65e7755ea 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -24,8 +24,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_1G
-#define CONFIG_SYS_BOOTM_LEN SZ_128M - /* * UART configuration */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 60a0c16f9041..c69f2fa19f30 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -11,7 +11,6 @@ #include <asm/arch/imx-regs.h> #include <config_distro_bootcmd.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 5392569a556a..fb05958bdc81 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_128M - #define CONFIG_SYS_MONITOR_LEN SZ_1M
#ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 227e9649f53b..5e9e3e800d8f 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -10,7 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index ec4aea337c93..6b7f3af53a21 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -47,7 +47,6 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ -#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index cfcad110c716..130156045091 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -83,7 +83,6 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_4G -#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* FEC */ #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 63f7da740ef1..a371c5b3832c 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 9de31cfe81c9..ae7fcb1027a0 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index ccf83128f282..c8604e0de592 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index adac387fac92..c43c4da6fbf8 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -79,7 +79,6 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_4G -#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* FEC */ #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 797ea0c7fad2..4b4731c3035b 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_128M - #define CONFIG_SYS_MONITOR_LEN SZ_1M
/* Link Definitions */ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index f161cffb9716..5581c0fac024 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 1d4c057ccc01..17e00f958b6c 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -12,8 +12,6 @@ #include <asm/arch/imx-regs.h> #include <config_distro_bootcmd.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index 51fdcb7d5b19..9f4c1b161f7a 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -79,7 +79,6 @@ /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_4G -#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* FEC */ #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index f7a254359c9b..ab74d5b26b6f 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 43328082edc6..ea4305667f24 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#ifdef CONFIG_SPL_BUILD diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index b59502e5895b..6f244df6f9bd 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) - #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 88d38a1dcbd9..308f17fd5959 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -16,8 +16,6 @@ #define USDHC2_BASE_ADDR 0x5B020000 #define USDHC3_BASE_ADDR 0x5B030000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* FUSE command */
/* Boot M4 */ diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index f9080216f1fc..ebfc166b4d46 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -9,7 +9,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (SZ_64M) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h index d379bad0b154..0f6150fc9c7e 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -15,8 +15,6 @@
/* SPL Loader Configuration */
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* U-Boot general configuration */ #define EXTRA_ENV_IOT2050_BOARD_SETTINGS \ "usb_pgood_delay=900\0" diff --git a/include/configs/iot_devkit.h b/include/configs/iot_devkit.h index 0ebb1b526e9f..a2e50c3b8df2 100644 --- a/include/configs/iot_devkit.h +++ b/include/configs/iot_devkit.h @@ -53,8 +53,6 @@ #define CONFIG_SYS_SDRAM_BASE DCCM_BASE #define CONFIG_SYS_SDRAM_SIZE DCCM_SIZE
-#define CONFIG_SYS_BOOTM_LEN SZ_128K - #define ROM_BASE CONFIG_SYS_MONITOR_BASE #define ROM_SIZE SZ_256K
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index ecf876478100..9f54f259994a 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -28,8 +28,6 @@ #define CONFIG_SYS_UBOOT_BASE 0x50080000 #endif
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* HyperFlash related configuration */
/* U-Boot general configuration */ diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 4c3a155a950a..932d7d3c8cb5 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -27,8 +27,6 @@ #define CONFIG_SYS_UBOOT_BASE 0x50080000 #endif
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* U-Boot general configuration */ #define EXTRA_ENV_J721S2_BOARD_SETTINGS \ "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h index a9a6a41f6b78..6becd7cd31a8 100644 --- a/include/configs/km/km-powerpc.h +++ b/include/configs/km/km-powerpc.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
/* Increase max size of compressed kernel */ -#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */
/****************************************************************************** * (PRAM usage) diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index a485c3ac6d1d..eee71db37c2b 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -25,7 +25,6 @@ #include "keymile-common.h"
/* Increase max size of compressed kernel */ -#define CONFIG_SYS_BOOTM_LEN (32 << 20)
#include "asm/arch/config.h"
diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index dd6747388c74..f83739013507 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -249,7 +249,6 @@ "ethrotate=no\0" \ ""
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Increase map for Linux */
#endif diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index ff9d7d59a390..3f22ddc6dd8d 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -409,7 +409,6 @@ int get_scl(void); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 6b591ed7872e..622ab5976247 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -45,8 +45,6 @@ #undef BOOTENV_RUN_NET_USB_START #define BOOTENV_RUN_NET_USB_START
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index bf336b99d6a1..d77e4b4e1009 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -7,8 +7,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) - #define CONFIG_SYS_MONITOR_LEN (512 * SZ_1K)
/* GUID for capsule updatable firmware image */ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 0c194ee575bf..87eb10db19fd 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -57,8 +57,6 @@ "bootm $kernel_load" #endif
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include <asm/arch/soc.h>
#endif /* __LS1012A_COMMON_H */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 1a46f72a7357..517ade383bee 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -333,6 +333,5 @@ */
#include <asm/fsl_secure_boot.h> -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
#endif diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index e5754c94e0fc..2fbd495e1193 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -162,6 +162,4 @@
/* Environment */
-#define CONFIG_SYS_BOOTM_LEN 0x8000000 /* 128 MB */ - #endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 09dce21aec5f..1aa29e541ec5 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -324,6 +324,5 @@ */
#include <asm/fsl_secure_boot.h> -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
#endif diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 5b0b86b39bee..b104524becb1 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -57,8 +57,6 @@ "run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \ "env exists secureboot && esbc_halt;"
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #define OCRAM_NONSECURE_SIZE 0x00010000 #define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index ed32e20dbf45..95cbcb036eb8 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -217,8 +217,6 @@ #endif #endif
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include <asm/arch/soc.h>
#endif /* __LS1043A_COMMON_H */ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 94118c420e6a..2e48ea0f8aad 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -191,8 +191,6 @@
#endif
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include <asm/arch/soc.h>
#endif /* __LS1046A_COMMON_H */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index ff85f1eb4ac8..4b8462da7bcd 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -153,6 +153,5 @@ unsigned long long get_qixis_addr(void); #endif /* ifdef CONFIG_NXP_ESBC */
#endif -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
#endif /* __LS1088_COMMON_H */ diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index d2978713e6b7..3e86d1bff215 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -139,8 +139,6 @@ unsigned long long get_qixis_addr(void); #endif #define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - #include <asm/arch/soc.h>
#endif /* __LS2_COMMON_H */ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 77e25822dcd6..b7543731691f 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -96,8 +96,6 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - /* Initial environment variables */ #define XSPI_MC_INIT_CMD \ "sf probe 0:0 && " \ diff --git a/include/configs/malta.h b/include/configs/malta.h index affee0069402..c8b230ab21e9 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -34,8 +34,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
-#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) - /* * Serial driver */ diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 51dd4d706e00..40803ee9da1a 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -30,7 +30,6 @@ #endif
#define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */
/* ROM USB boot support, auto-execute boot.scr at scriptaddr */ #define BOOTENV_DEV_ROMUSB(devtypeu, devtypel, instance) \ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 2adc1f6d86b8..926c229e3a64 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -11,8 +11,6 @@ /* Microblaze is microblaze_0 */ #define XILINX_FSL_NUMBER 3
-#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) - /* uart */ /* The following table includes the supported baudrates */ # define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h index 236db537db73..4c7cfac8af75 100644 --- a/include/configs/microchip_mpfs_icicle.h +++ b/include/configs/microchip_mpfs_icicle.h @@ -11,8 +11,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
/* Environment options */ diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index db4d68d75076..049d9a1b55bb 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -14,8 +14,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
-#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* SPL */
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index 6c681a3c30bb..78d79b7780bc 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -11,7 +11,6 @@
#include <linux/sizes.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Uboot definition */ diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 06367221ebc3..0cd8b08552cf 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -13,8 +13,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Environment */ diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index 4dcfa39350cc..3680c0fe442a 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -14,8 +14,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET 0x80000
-#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) #define CONFIG_SYS_NS16550_MEM32 diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index 87e2251777cb..22d11d014761 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -13,8 +13,6 @@
/* Miscellaneous configurable options */
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
/* Environment */ diff --git a/include/configs/mt8183.h b/include/configs/mt8183.h index 665a4e44f3f4..c93d70ddf1a6 100644 --- a/include/configs/mt8183.h +++ b/include/configs/mt8183.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_NS16550_COM1 0x11005200 #define CONFIG_SYS_NS16550_CLK 26000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Environment settings */ #include <config_distro_bootcmd.h>
diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h index d4aa279b551c..964c95781338 100644 --- a/include/configs/mt8512.h +++ b/include/configs/mt8512.h @@ -13,9 +13,6 @@
#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
- -#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Uboot definition */ #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
diff --git a/include/configs/mt8516.h b/include/configs/mt8516.h index 928f4b0dc773..7228f3e42884 100644 --- a/include/configs/mt8516.h +++ b/include/configs/mt8516.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_NS16550_COM1 0x11005000 #define CONFIG_SYS_NS16550_CLK 26000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Environment settings */ #include <config_distro_bootcmd.h>
diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h index e313f6f6afaa..6d4704644e4f 100644 --- a/include/configs/mt8518.h +++ b/include/configs/mt8518.h @@ -18,8 +18,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* Uboot definition */
#define ENV_BOOT_READ_IMAGE \ diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 56f640226dd9..51f7e16ece1a 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -15,8 +15,6 @@ /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 500000, 576000, \ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 75bc27d1798b..e416f81e43a1 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -19,8 +19,6 @@ #endif #define CONFIG_MXC_GPT_HCLK
-#define CONFIG_SYS_BOOTM_LEN 0x1000000 - #include <linux/sizes.h> #include <asm/arch/imx-regs.h> #include <asm/mach-imx/gpio.h> diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 9f4dbec07002..4704276a74de 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -17,8 +17,6 @@ #define CONFIG_MXC_GPT_HCLK #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
-#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* Enable iomux-lpsr support */ #define CONFIG_IOMUX_LPSR
diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index c6c3695e5df1..62e8e6299118 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -15,8 +15,6 @@ #include "imx7ulp_spl.h" #endif
-#define CONFIG_SYS_BOOTM_LEN 0x1000000 - /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE
diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 57fed4ed69ca..e93824928b32 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -11,8 +11,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN 0x1000000 -
/* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE diff --git a/include/configs/nsim.h b/include/configs/nsim.h index 586ac3ebcaad..d469ef83c240 100644 --- a/include/configs/nsim.h +++ b/include/configs/nsim.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_256M
-#define CONFIG_SYS_BOOTM_LEN SZ_32M - /* * Console configuration */ diff --git a/include/configs/octeon_common.h b/include/configs/octeon_common.h index 7e71c83887f3..0fa7490e7de6 100644 --- a/include/configs/octeon_common.h +++ b/include/configs/octeon_common.h @@ -16,6 +16,4 @@
#define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #endif /* __OCTEON_COMMON_H__ */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index f377ba8fa2ec..2c430e8d3762 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -8,7 +8,6 @@ #define __OCTEONTX2_COMMON_H__
/** Maximum size of image supported for bootm (and bootable FIT images) */ -#define CONFIG_SYS_BOOTM_LEN (256 << 20)
/** Memory base address */ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 73a14b25de67..e7a6bd41db05 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -34,7 +34,6 @@ #endif /* ifdef CONFIG_DISTRO_DEFAULTS*/
/** Maximum size of image supported for bootm (and bootable FIT images) */ -#define CONFIG_SYS_BOOTM_LEN (256 << 20)
/** Memory base address */ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index 12bd8fb99cd6..3ff8187b5df7 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -15,7 +15,6 @@
/* Environment options */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* --------------------------------------------------------------------- * Board boot configuration diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 7410c60cbd2a..b0b3ec18d143 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -446,7 +446,6 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index f8c3e1f10dbd..049d1d74345d 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -11,7 +11,6 @@ #include <linux/stringify.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index dd0b108a89f8..df1716106fe1 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -10,8 +10,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index a587570ea172..d1cc1b9d63fb 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -78,6 +78,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_SYS_BOOTM_LEN SZ_128M - #endif diff --git a/include/configs/pomelo.h b/include/configs/pomelo.h index 647bb3d02a1b..2e206542f8db 100644 --- a/include/configs/pomelo.h +++ b/include/configs/pomelo.h @@ -14,7 +14,6 @@ /* SIZE of malloc pool */
/*BOOT*/ -#define CONFIG_SYS_BOOTM_LEN 0x3c00000
#define BOOT_TARGET_DEVICES(func) \ func(SCSI, scsi, 0) \ diff --git a/include/configs/poplar.h b/include/configs/poplar.h index 4b749b13ee81..c58105597e47 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -16,7 +16,6 @@ /* DRAM banks */
/* SYS */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* ATF bl33.bin load address (must match) */
diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 48c0584d5b34..90f548cc6c13 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -8,8 +8,6 @@ #ifndef __PRESIDIO_ASIC_H #define __PRESIDIO_ASIC_H
-#define CONFIG_SYS_BOOTM_LEN 0x00c00000 - /* Generic Timer Definitions */ #define CONFIG_SYS_TIMER_RATE 25000000 #define CONFIG_SYS_TIMER_COUNTER 0xf4321008 diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 62ed86b29c89..49d1878ebdd7 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -13,13 +13,9 @@ /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */ #define CONFIG_IRAM_BASE 0xff020000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define GICD_BASE 0xff131000 #define GICC_BASE 0xff132000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 #define SDRAM_BANK_SIZE (2UL << 30) diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index 14cae43db3a6..e9f756b13edb 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -12,8 +12,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x40000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - /* GUIDs for capsule updatable firmware images */ #define QEMU_ARM_UBOOT_IMAGE_GUID \ EFI_GUID(0xf885b085, 0x99f8, 0x45af, 0x84, 0x7d, \ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index ce60a3c7421d..31e94df84df7 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -69,7 +69,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* * Environment Configuration diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index a81c503d9fd1..d81e5d6c8620 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -10,8 +10,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
#define RISCV_MMODE_TIMERBASE 0x2000000 diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index e80e45dcbd7e..9efda3eeea93 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -32,7 +32,6 @@ #define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE)
#define CONFIG_SYS_MONITOR_LEN (1 * 1024 * 1024) -#define CONFIG_SYS_BOOTM_LEN (64 << 20)
/* ENV setting */
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index d5a4ca26b048..12d4bc65d7e4 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -12,8 +12,6 @@
#define CONFIG_IRAM_BASE 0x10080000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - /* RAW SD card / eMMC locations. */
#define CONFIG_SYS_SDRAM_BASE 0x60000000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index c3279b84d3a4..ec9e9ca1e31a 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -8,8 +8,6 @@ #include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define CONFIG_SYS_HZ_CLOCK 24000000
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 18f4289d29ab..f4b3481115b3 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -9,8 +9,6 @@ #include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64MB */ - #define CONFIG_SYS_HZ_CLOCK 24000000
#define CONFIG_IRAM_BASE 0xff700000 diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index d5aadd5fa803..200b34b35bae 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -11,10 +11,6 @@ #define CONFIG_SYS_NS16550_MEM32
#define CONFIG_IRAM_BASE 0xfff80000 -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - - -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
#define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 165b78ff3309..1e214e4ebe15 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -10,8 +10,6 @@
#define CONFIG_IRAM_BASE 0xff090000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - /* FAT sd card locations. */ #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 4db4026ebe56..37e0c1d936c3 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -16,8 +16,6 @@
#define CONFIG_IRAM_BASE 0xff8c0000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00500000\0" \ "pxefile_addr_r=0x00600000\0" \ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 3ca80c8c7c0d..2f9aee58197b 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -15,8 +15,6 @@ /* BSS setup */ #endif
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - /* MMC/SD IP block */ #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index ef4f725b5793..15e815234020 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -10,8 +10,6 @@
#define CONFIG_IRAM_BASE 0xfdcc0000
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ - #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf0000000
diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 27738ab1933f..4f5025d0da58 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -33,10 +33,6 @@ */ #define CONFIG_SYS_SDRAM_SIZE SZ_128M
-#ifdef CONFIG_ARM64 -#define CONFIG_SYS_BOOTM_LEN SZ_64M -#endif - /* Devices */ /* LCD */
diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index 78347373fca9..3f905bf2d77d 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -11,7 +11,6 @@
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ -#define CONFIG_SYS_BOOTM_LEN SZ_32M /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 diff --git a/include/configs/sdm845.h b/include/configs/sdm845.h index e1b8c61d0763..af5fe27e68bd 100644 --- a/include/configs/sdm845.h +++ b/include/configs/sdm845.h @@ -22,6 +22,5 @@ "bootcmd=source $prevbl_initrd_start_addr:bootscript\0"
/* Size of malloc() pool */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M
#endif diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index a99d143485c4..2e5592cf94d5 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -13,8 +13,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
#define RISCV_MMODE_TIMERBASE 0x2000000 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index 680caac377bc..9923f3d9c344 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -13,8 +13,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
/* Environment options */ diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 2d654b42d56b..261ae56c1dce 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -23,8 +23,6 @@ */ #define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) - /* Environment settings */
/* diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index a3e8d5492919..06198ddd82a3 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -22,7 +22,6 @@ */
/* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024)
/* * U-Boot run time memory configurations diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index c333c931ab7a..70d9f3607a67 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -11,7 +11,6 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
/* Booting Linux */ -#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */
/* Extra Environment */ #define CONFIG_HOSTNAME "socfpga_vining_fpga" diff --git a/include/configs/stemmy.h b/include/configs/stemmy.h index 4ad55afad869..71b25c23b13c 100644 --- a/include/configs/stemmy.h +++ b/include/configs/stemmy.h @@ -13,7 +13,6 @@ * low-level initialization and rely on configuration provided by the Samsung * bootloader. New images are loaded at the same address for compatibility. */ -#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* FIXME: This should be loaded from device tree... */ #define CONFIG_SYS_L2_PL310 diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 1b8d38f4b52a..b1a011bacb22 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -24,8 +24,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ SZ_256M
-#define CONFIG_SYS_BOOTM_LEN SZ_16M - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ diff --git a/include/configs/stm32mp13_common.h b/include/configs/stm32mp13_common.h index beb56fcb5af8..3ca65ea2a37b 100644 --- a/include/configs/stm32mp13_common.h +++ b/include/configs/stm32mp13_common.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_BOOTMAPSZ SZ_256M
/* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN SZ_32M
/*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 2 diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 1e14e91ea701..56fb4d38e45a 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_BOOTMAPSZ SZ_256M
/* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN SZ_32M
/*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 3 diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 2bf4e58cddf7..0f0ef4f64bbf 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -15,10 +15,6 @@ #include <asm/arch/cpu.h> #include <linux/stringify.h>
-#ifdef CONFIG_ARM64 -#define CONFIG_SYS_BOOTM_LEN (32 << 20) -#endif - /* Serial & console */ #define CONFIG_SYS_NS16550_SERIAL /* ns16550 reg in the low bits of cpu reg */ diff --git a/include/configs/tb100.h b/include/configs/tb100.h index 03aeb4f5d2eb..16bdc39b750e 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -16,8 +16,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_128M
-#define CONFIG_SYS_BOOTM_LEN SZ_32M - /* * UART configuration */ diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index 41297b693cff..4fb3d731c67a 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -11,8 +11,6 @@
/* Link Definitions */
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) - #define UART0_BASE 0x7ff80000
/* PL011 Serial Configuration */ diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index d4aa312da4f4..401627a47a2f 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -8,7 +8,6 @@ #ifndef _CONFIG_TURRIS_MOX_H #define _CONFIG_TURRIS_MOX_H
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 8096b2c89603..15d41fba95cc 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -54,8 +54,6 @@ #define CONFIG_GATEWAYIP 192.168.11.1 #define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_SYS_BOOTM_LEN (32 << 20) - #if defined(CONFIG_ARM64) /* ARM Trusted Firmware */ #define BOOT_IMAGES \ diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h index 43127ae649a6..78a62a8b028c 100644 --- a/include/configs/vcoreiii.h +++ b/include/configs/vcoreiii.h @@ -32,8 +32,6 @@ #error Unknown DDR size - please add! #endif
-#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x81000000\0" \ "spi_image_off=0x00100000\0" \ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 6d77df09fb51..5b5fce9bda17 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-#define CONFIG_SYS_BOOTM_LEN SZ_64M - #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 0de249aa96b2..fca40beba18a 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -75,8 +75,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
-#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - /* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index e864b3fee6ae..3705313aec06 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -15,8 +15,6 @@ /* ATF loads u-boot here for BASE_FVP model */ #endif
-#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - /* CS register bases for the original memory map. */ #ifdef CONFIG_TARGET_VEXPRESS64_BASER_FVP #define V2M_DRAM_BASE 0x00000000 diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 1366f623aa25..42b2cb2fc85a 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -14,7 +14,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_SYS_BOOTM_LEN (16 << 20)
/* Generic TPM interfaced through LPC bus */ #define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 55837e1c5649..971bd69dec8d 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -37,8 +37,6 @@ # define PHY_ANEG_TIMEOUT 20000 #endif
-#define CONFIG_SYS_BOOTM_LEN (100 * 1024 * 1024) - #define ENV_MEM_LAYOUT_SETTINGS \ "fdt_addr_r=0x40000000\0" \ "fdt_size_r=0x400000\0" \ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 4e71a42cd346..f72f3e644768 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -54,8 +54,6 @@ # define PHY_ANEG_TIMEOUT 20000 #endif
-#define CONFIG_SYS_BOOTM_LEN (100 * 1024 * 1024) - #define ENV_MEM_LAYOUT_SETTINGS \ "fdt_addr_r=0x40000000\0" \ "fdt_size_r=0x400000\0" \ diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h index 37750d3d15db..b6bc402a7e97 100644 --- a/include/configs/xilinx_zynqmp_r5.h +++ b/include/configs/xilinx_zynqmp_r5.h @@ -19,6 +19,5 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
/* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
#endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 6a045ec60aeb..1fdde90654f2 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -204,7 +204,6 @@
/* Extend size of kernel image for uncompression */ -#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
/* Boot FreeBSD/vxWorks from an ELF image */ #define CONFIG_SYS_MMC_MAX_DEVICE 1
On Sat, Jun 25, 2022 at 11:02:31AM -0400, Tom Rini wrote:
This converts the following to Kconfig: CONFIG_SYS_OHCI_SWAP_REG_ACCESS CONFIG_SYS_USB_OHCI_CPU_INIT CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS CONFIG_SYS_USB_OHCI_SLOT_NAME CONFIG_USB_ATMEL CONFIG_USB_ATMEL_CLK_SEL_PLLB CONFIG_USB_ATMEL_CLK_SEL_UPLL CONFIG_USB_OHCI_LPC32XX CONFIG_USB_OHCI_NEW
Signed-off-by: Tom Rini trini@konsulko.com
For the series (and v2 on 20/20), applied to u-boot/next, thanks!
participants (5)
-
Heiko Schocher -
Holger Brunck -
Simon Glass -
Soeren Moch -
Tom Rini