[PATCH] configs: evb-px30_defconfig: Drop TPL_MAX_SIZE definition
The max size is defined at architectural level
Signed-off-by: Michael Trimarchi michael@amarulasolutions.com --- configs/evb-px30_defconfig | 1 - 1 file changed, 1 deletion(-)
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 240a044b2a..4f88879e18 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 -CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
On Fri, Sep 23, 2022 at 08:07:36PM +0200, Michael Trimarchi wrote:
The max size is defined at architectural level
Signed-off-by: Michael Trimarchi michael@amarulasolutions.com
configs/evb-px30_defconfig | 1 - 1 file changed, 1 deletion(-)
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 240a044b2a..4f88879e18 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 -CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
All of the PX30 boards are wrong, so we should fix them all at once. And a sanity check on the rest of the rockchip boards is in order too. Can you please do this? Or do you want me to?
HI Tom
On Fri, Sep 23, 2022 at 8:08 PM Tom Rini trini@konsulko.com wrote:
On Fri, Sep 23, 2022 at 08:07:36PM +0200, Michael Trimarchi wrote:
The max size is defined at architectural level
Signed-off-by: Michael Trimarchi michael@amarulasolutions.com
configs/evb-px30_defconfig | 1 - 1 file changed, 1 deletion(-)
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 240a044b2a..4f88879e18 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 -CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
All of the PX30 boards are wrong, so we should fix them all at once. And a sanity check on the rest of the rockchip boards is in order too. Can you please do this? Or do you want me to?
Yes I will tonight and I will send a revision of this patch.
Michael
-- Tom
Hi Tom
On Fri, Sep 23, 2022 at 8:18 PM Michael Nazzareno Trimarchi michael@amarulasolutions.com wrote:
HI Tom
On Fri, Sep 23, 2022 at 8:08 PM Tom Rini trini@konsulko.com wrote:
On Fri, Sep 23, 2022 at 08:07:36PM +0200, Michael Trimarchi wrote:
The max size is defined at architectural level
Signed-off-by: Michael Trimarchi michael@amarulasolutions.com
configs/evb-px30_defconfig | 1 - 1 file changed, 1 deletion(-)
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 240a044b2a..4f88879e18 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 -CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
All of the PX30 boards are wrong, so we should fix them all at once. And a sanity check on the rest of the rockchip boards is in order too. Can you please do this? Or do you want me to?
Yes I will tonight and I will send a revision of this patch.
Trying to recheck other values. I will send tomorrow morning
Michael
Michael
-- Tom
-- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 michael@amarulasolutions.com __________________________________
Amarula Solutions BV Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 info@amarulasolutions.com www.amarulasolutions.com
On Fri, Sep 23, 2022 at 10:54:40PM +0200, Michael Nazzareno Trimarchi wrote:
Hi Tom
On Fri, Sep 23, 2022 at 8:18 PM Michael Nazzareno Trimarchi michael@amarulasolutions.com wrote:
HI Tom
On Fri, Sep 23, 2022 at 8:08 PM Tom Rini trini@konsulko.com wrote:
On Fri, Sep 23, 2022 at 08:07:36PM +0200, Michael Trimarchi wrote:
The max size is defined at architectural level
Signed-off-by: Michael Trimarchi michael@amarulasolutions.com
configs/evb-px30_defconfig | 1 - 1 file changed, 1 deletion(-)
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 240a044b2a..4f88879e18 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 -CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
All of the PX30 boards are wrong, so we should fix them all at once. And a sanity check on the rest of the rockchip boards is in order too. Can you please do this? Or do you want me to?
Yes I will tonight and I will send a revision of this patch.
Trying to recheck other values. I will send tomorrow morning
Great, thanks for reporting this and dealing with the fallout!
participants (3)
-
Michael Nazzareno Trimarchi -
Michael Trimarchi
-
Tom Rini