[U-Boot] [PATCH 1/5] am335x evm: Initial support for AM335x GP EVM Profiles
The AM335x GP EVM can have one of 8 different profiles selected. Each profile has a different set of peripherals and requires different pinmux configurations that conflict with other profiles. i2c1 is an example of a conflicted mux currently.
Signed-off-by: Tom Rini trini@ti.com --- board/ti/am335x/mux.c | 46 ++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 42 insertions(+), 4 deletions(-)
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index c7460eb..5e902ab 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -17,6 +17,7 @@ #include <asm/arch/sys_proto.h> #include <asm/arch/hardware.h> #include <asm/io.h> +#include <i2c.h>
#define MUX_CFG(value, offset) \ __raw_writel(value, (CTRL_BASE + offset)); @@ -364,22 +365,59 @@ void enable_i2c0_pin_mux(void) configure_module_pin_mux(i2c0_pin_mux); }
-void enable_board_pin_mux(struct am335x_baseboard_id *header) +/* + * The AM335x GP EVM, if daughter card(s) are connected, can have 8 + * different profiles. These profiles determine what peripherals are + * valid and need pinmux to be configured. + */ +#define PROFILE_NONE 0x0 +#define PROFILE_0 (1 << 0) +#define PROFILE_1 (1 << 1) +#define PROFILE_2 (1 << 2) +#define PROFILE_3 (1 << 3) +#define PROFILE_4 (1 << 4) +#define PROFILE_5 (1 << 5) +#define PROFILE_6 (1 << 6) +#define PROFILE_7 (1 << 7) +#define PROFILE_MASK 0x7 +#define PROFILE_ALL 0xFF + +/* CPLD registers */ +#define I2C_CPLD_ADDR 0x35 +#define CFG_REG 0x10 + +static unsigned short detect_daughter_board_profile(void) { - /* Enable pinmux that is common to all TI boards. */ - configure_module_pin_mux(i2c1_pin_mux); + unsigned short val; + + if (i2c_probe(I2C_CPLD_ADDR)) + return PROFILE_NONE;
- /* Now do board-specific muxes. */ + if (i2c_read(I2C_CPLD_ADDR, CFG_REG, 1, (unsigned char *)(&val), 2)) + return PROFILE_NONE; + + return (1 << (val & PROFILE_MASK)); +} + +void enable_board_pin_mux(struct am335x_baseboard_id *header) +{ + /* Do board-specific muxes. */ if (!strncmp(header->name, "A335BONE", HDR_NAME_LEN)) { /* Beaglebone pinmux */ + configure_module_pin_mux(i2c1_pin_mux); configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mmc0_pin_mux); } else if (!strncmp(header->config, "SKU#01", 6)) { /* General Purpose EVM */ + unsigned short profile = detect_daughter_board_profile(); configure_module_pin_mux(rgmii1_pin_mux); configure_module_pin_mux(mmc0_pin_mux); + /* In profile #2 i2c1 and spi0 conflict. */ + if (profile & ~PROFILE_2) + configure_module_pin_mux(i2c1_pin_mux); } else if (!strncmp(header->name, "A335X_SK", HDR_NAME_LEN)) { /* Starter Kit EVM */ + configure_module_pin_mux(i2c1_pin_mux); configure_module_pin_mux(gpio0_7_pin_mux); configure_module_pin_mux(rgmii1_pin_mux); configure_module_pin_mux(mmc0_pin_mux_sk_evm);
- Correct the MMC1 base offset - Remove MMC2 (that area is reserved and not MMC2). - Add the real BOOT_DEVICE_MMC2 value
Signed-off-by: Tom Rini trini@ti.com --- arch/arm/cpu/armv7/am33xx/board.c | 8 +++++++- arch/arm/include/asm/arch-am33xx/mmc_host_def.h | 3 +-- arch/arm/include/asm/omap_common.h | 2 +- 3 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 2ca4ca7..b387ac2 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -211,7 +211,13 @@ void s_init(void) #if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - return omap_mmc_init(0, 0, 0); + int ret; + + ret = omap_mmc_init(0, 0, 0); + if (ret) + return ret; + + return omap_mmc_init(1, 0, 0); } #endif
diff --git a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h index 26cc300..1f597c0 100644 --- a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h +++ b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h @@ -20,8 +20,7 @@ * OMAP HSMMC register definitions */ #define OMAP_HSMMC1_BASE 0x48060100 -#define OMAP_HSMMC2_BASE 0x481D8000 -#define OMAP_HSMMC3_BASE 0x47C24000 +#define OMAP_HSMMC2_BASE 0x481D8100
typedef struct hsmmc { unsigned char res1[0x10]; diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 4e95eee..71ef9b0 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -67,7 +67,7 @@ void preloader_console_init(void); #elif defined(CONFIG_AM33XX) /* AM33XX */ #define BOOT_DEVICE_NAND 5 #define BOOT_DEVICE_MMC1 8 -#define BOOT_DEVICE_MMC2 0 +#define BOOT_DEVICE_MMC2 9 /* eMMC or daughter card */ #define BOOT_DEVICE_UART 65 #define BOOT_DEVICE_MMC2_2 0xFF #endif
MMC1 is available in profile 2 on the GP EVM and is exposed on the expansion header on beaglebone.
Signed-off-by: Tom Rini trini@ti.com --- board/ti/am335x/mux.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 5e902ab..992f9ba 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -282,6 +282,18 @@ static struct module_pin_mux mmc0_pin_mux_sk_evm[] = { {-1}, };
+static struct module_pin_mux mmc1_pin_mux[] = { + {OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */ + {OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */ + {OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */ + {OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT0 */ + {OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CLK */ + {OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CMD */ + {OFFSET(gpmc_csn0), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* MMC1_WP */ + {OFFSET(gpmc_advn_ale), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* MMC1_CD */ + {-1}, +}; + static struct module_pin_mux i2c0_pin_mux[] = { {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ @@ -407,6 +419,7 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header) configure_module_pin_mux(i2c1_pin_mux); configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mmc0_pin_mux); + configure_module_pin_mux(mmc1_pin_mux); } else if (!strncmp(header->config, "SKU#01", 6)) { /* General Purpose EVM */ unsigned short profile = detect_daughter_board_profile(); @@ -415,6 +428,9 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header) /* In profile #2 i2c1 and spi0 conflict. */ if (profile & ~PROFILE_2) configure_module_pin_mux(i2c1_pin_mux); + else if (profile == PROFILE_2) { + configure_module_pin_mux(mmc1_pin_mux); + } } else if (!strncmp(header->name, "A335X_SK", HDR_NAME_LEN)) { /* Starter Kit EVM */ configure_module_pin_mux(i2c1_pin_mux);
Signed-off-by: Tom Rini trini@ti.com --- arch/arm/cpu/armv7/am33xx/clock.c | 5 +++++ drivers/spi/omap3_spi.c | 6 ++++++ drivers/spi/omap3_spi.h | 5 +++++ 3 files changed, 16 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 1071f92..2b19506 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -148,6 +148,11 @@ static void enable_per_clocks(void) writel(PRCM_MOD_EN, &cmper->cpgmac0clkctrl); while ((readl(&cmper->cpgmac0clkctrl) & CPGMAC0_IDLE) != PRCM_FUNCTL) ; + + /* spi0 */ + writel(PRCM_MOD_EN, &cmper->spi0clkctrl); + while (readl(&cmper->spi0clkctrl) != PRCM_MOD_EN) + ; }
static void mpu_pll_config(void) diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index 9346c0b..47f9e56 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -86,15 +86,21 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, case 0: ds->regs = (struct mcspi *)OMAP3_MCSPI1_BASE; break; +#ifdef OMAP3_MCSPI2_BASE case 1: ds->regs = (struct mcspi *)OMAP3_MCSPI2_BASE; break; +#endif +#ifdef OMAP3_MCSPI3_BASE case 2: ds->regs = (struct mcspi *)OMAP3_MCSPI3_BASE; break; +#endif +#ifdef OMAP3_MCSPI4_BASE case 3: ds->regs = (struct mcspi *)OMAP3_MCSPI4_BASE; break; +#endif default: printf("SPI error: unsupported bus %i. \ Supported busses 0 - 3\n", bus); diff --git a/drivers/spi/omap3_spi.h b/drivers/spi/omap3_spi.h index 0ac801c..bffa43c 100644 --- a/drivers/spi/omap3_spi.h +++ b/drivers/spi/omap3_spi.h @@ -30,10 +30,15 @@ #ifndef _OMAP3_SPI_H_ #define _OMAP3_SPI_H_
+#ifdef CONFIG_AM33XX +#define OMAP3_MCSPI1_BASE 0x48030100 +#define OMAP3_MCSPI2_BASE 0x481A0100 +#else #define OMAP3_MCSPI1_BASE 0x48098000 #define OMAP3_MCSPI2_BASE 0x4809A000 #define OMAP3_MCSPI3_BASE 0x480B8000 #define OMAP3_MCSPI4_BASE 0x480BA000 +#endif
#define OMAP3_MCSPI_MAX_FREQ 48000000
Signed-off-by: Tom Rini trini@ti.com --- board/ti/am335x/mux.c | 11 +++++++++++ drivers/spi/omap3_spi.c | 10 ++++++++++ include/configs/am335x_evm.h | 9 +++++++++ 3 files changed, 30 insertions(+)
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 992f9ba..80becd5 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -310,6 +310,16 @@ static struct module_pin_mux i2c1_pin_mux[] = { {-1}, };
+static struct module_pin_mux spi0_pin_mux[] = { + {OFFSET(spi0_sclk), (MODE(0) | RXACTIVE | PULLUDEN)}, /* SPI0_SCLK */ + {OFFSET(spi0_d0), (MODE(0) | RXACTIVE | + PULLUDEN | PULLUP_EN)}, /* SPI0_D0 */ + {OFFSET(spi0_d1), (MODE(0) | RXACTIVE | PULLUDEN)}, /* SPI0_D1 */ + {OFFSET(spi0_cs0), (MODE(0) | RXACTIVE | + PULLUDEN | PULLUP_EN)}, /* SPI0_CS0 */ + {-1}, +}; + static struct module_pin_mux gpio0_7_pin_mux[] = { {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN)}, /* GPIO0_7 */ {-1}, @@ -430,6 +440,7 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header) configure_module_pin_mux(i2c1_pin_mux); else if (profile == PROFILE_2) { configure_module_pin_mux(mmc1_pin_mux); + configure_module_pin_mux(spi0_pin_mux); } } else if (!strncmp(header->name, "A335X_SK", HDR_NAME_LEN)) { /* Starter Kit EVM */ diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index 47f9e56..e40a632 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -173,8 +173,18 @@ int spi_claim_bus(struct spi_slave *slave) /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS * REVISIT: this controller could support SPI_3WIRE mode. */ +#ifdef CONFIG_AM33XX + /* + * The reference design on AM33xx has D0 and D1 wired up opposite + * of how it has been done on previous platforms. We assume that + * custom hardware will also follow this convention. + */ + conf &= OMAP3_MCSPI_CHCONF_DPE0; + conf |= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); +#else conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); conf |= OMAP3_MCSPI_CHCONF_DPE0; +#endif
/* wordlength */ conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK; diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index c827ebf..2bfe8c6 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -134,6 +134,14 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2
+#define CONFIG_SPI +#define CONFIG_OMAP3_SPI +#define CONFIG_MTD_DEVICE +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED (24000000) + /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ @@ -163,6 +171,7 @@ #define CONFIG_I2C_MULTI_BUS #define CONFIG_DRIVER_OMAP24XX_I2C #define CONFIG_CMD_EEPROM +#define CONFIG_ENV_EEPROM_IS_ON_I2C #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 #define CONFIG_SYS_I2C_MULTI_EEPROMS
participants (1)
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Tom Rini