[U-Boot] [PATCH 1/6] include/config_cmd_default.h cleanup
arranged configurations in alphabetical order CONFIG_CMD_FLASH moved under ifndef CONFIG_SYS_NO_FLASH
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com --- include/config_cmd_default.h | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/config_cmd_default.h b/include/config_cmd_default.h index 0376e44..a5d87a6 100644 --- a/include/config_cmd_default.h +++ b/include/config_cmd_default.h @@ -20,14 +20,13 @@ #define CONFIG_CMD_BOOTD /* bootd */ #define CONFIG_CMD_CONSOLE /* coninfo */ #define CONFIG_CMD_ECHO /* echo arguments */ -#define CONFIG_CMD_SAVEENV /* saveenv */ -#define CONFIG_CMD_FLASH /* flinfo, erase, protect */ #define CONFIG_CMD_FPGA /* FPGA configuration Support */ #define CONFIG_CMD_IMI /* iminfo */ +#define CONFIG_CMD_ITEST /* Integer (and string) test */ #ifndef CONFIG_SYS_NO_FLASH +#define CONFIG_CMD_FLASH /* flinfo, erase, protect */ #define CONFIG_CMD_IMLS /* List all found images */ #endif -#define CONFIG_CMD_ITEST /* Integer (and string) test */ #define CONFIG_CMD_LOADB /* loadb */ #define CONFIG_CMD_LOADS /* loads */ #define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */ @@ -35,6 +34,7 @@ #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_NFS /* NFS support */ #define CONFIG_CMD_RUN /* run command in env variable */ +#define CONFIG_CMD_SAVEENV /* saveenv */ #define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ #define CONFIG_CMD_SOURCE /* "source" command support */ #define CONFIG_CMD_XIMG /* Load part of Multi Image */
Reference: http://plugcomputer.org/ http://openplug.org/plugwiki/index.php/Das_U-boot_plug_support
This patch is tested for- 1. Boot from DRAM/NAND flash 2. File transfer using tftp 3. NAND flash read/write/erase 4. Linux kernel and RFS Boot from NAND 5. Enabled USB PHY init for kernel need 6. Boot from USB supported
Note: to boot Kirkwood kernel with USB support, you should add "usb start" in the boot sequence
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com --- Change log: v2: updated as per feedback for v1
v3: updated as per feedback for v2
v4: removed PHY driver dependency, coded in sheevaplug.c
v5: USB support added
v6: config_cmd_default.h used in board config
v7: sheevaplug.h alligned as per cleanup in config_cmd_default.h
MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 4 +- board/Marvell/sheevaplug/Makefile | 51 +++++++++ board/Marvell/sheevaplug/config.mk | 25 ++++ board/Marvell/sheevaplug/sheevaplug.c | 155 ++++++++++++++++++++++++++ board/Marvell/sheevaplug/sheevaplug.h | 41 +++++++ include/configs/sheevaplug.h | 195 +++++++++++++++++++++++++++++++++ 8 files changed, 475 insertions(+), 1 deletions(-) create mode 100644 board/Marvell/sheevaplug/Makefile create mode 100644 board/Marvell/sheevaplug/config.mk create mode 100644 board/Marvell/sheevaplug/sheevaplug.c create mode 100644 board/Marvell/sheevaplug/sheevaplug.h create mode 100644 include/configs/sheevaplug.h
diff --git a/MAINTAINERS b/MAINTAINERS index 705bac5..2f3b63c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -673,6 +673,10 @@ Hugo Villeneuve hugo.villeneuve@lyrtech.com
SFFSDR ARM926EJS
+Prafulla Wadaskar prafulla@marvell.com + + sheevaplug ARM926EJS (Kirkwood SoC) + Richard Woodruff r-woodruff2@ti.com
omap2420h4 ARM1136EJS diff --git a/MAKEALL b/MAKEALL index 41f1445..e987d4a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -522,6 +522,7 @@ LIST_ARM9=" \ omap730p2 \ sbc2410x \ scb9328 \ + sheevaplug \ smdk2400 \ smdk2410 \ trab \ diff --git a/Makefile b/Makefile index d427760..a66c4c7 100644 --- a/Makefile +++ b/Makefile @@ -2924,6 +2924,9 @@ sbc2410x_config: unconfig scb9328_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t scb9328 NULL imx
+sheevaplug_config: unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood + smdk2400_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t smdk2400 samsung s3c24x0
@@ -3168,7 +3171,6 @@ omap2420h4_config : unconfig qong_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 qong davedenx mx31
- ######################################################################### ## ARM1176 Systems ######################################################################### diff --git a/board/Marvell/sheevaplug/Makefile b/board/Marvell/sheevaplug/Makefile new file mode 100644 index 0000000..e378b5b --- /dev/null +++ b/board/Marvell/sheevaplug/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar prafulla@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := sheevaplug.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/Marvell/sheevaplug/config.mk b/board/Marvell/sheevaplug/config.mk new file mode 100644 index 0000000..a4ea769 --- /dev/null +++ b/board/Marvell/sheevaplug/config.mk @@ -0,0 +1,25 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar prafulla@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +TEXT_BASE = 0x00600000 diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c new file mode 100644 index 0000000..547126a --- /dev/null +++ b/board/Marvell/sheevaplug/sheevaplug.c @@ -0,0 +1,155 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar prafulla@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <miiphy.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include "sheevaplug.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(SHEEVAPLUG_OE_VAL_LOW, + SHEEVAPLUG_OE_VAL_HIGH, + SHEEVAPLUG_OE_LOW, SHEEVAPLUG_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_UART0_RTS, + MPP9_UART0_CTS, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP12_SD_CLK, + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GPIO, + MPP21_GPIO, + MPP22_GPIO, + MPP23_GPIO, + MPP24_GPIO, + MPP25_GPIO, + MPP26_GPIO, + MPP27_GPIO, + MPP28_GPIO, + MPP29_TSMP9, + MPP30_GPIO, + MPP31_GPIO, + MPP32_GPIO, + MPP33_GPIO, + MPP34_GPIO, + MPP35_GPIO, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_GPIO, + MPP41_GPIO, + MPP42_GPIO, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, + MPP48_GPIO, + MPP49_GPIO, + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + + /* + * arch number of board + */ + gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +int dram_init(void) +{ + int i; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + gd->bd->bi_dram[i].start = kw_sdram_bar(i); + gd->bd->bi_dram[i].size = kw_sdram_bs(i); + } + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +/* Configure and enable MV88E1116 PHY */ +void reset_phy(void) +{ + u16 reg; + u16 devadr; + char *name = "egiga0"; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __FUNCTION__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + miiphy_reset(name, devadr); + + printf("88E1116 Initialized on %s\n", name); +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/sheevaplug/sheevaplug.h b/board/Marvell/sheevaplug/sheevaplug.h new file mode 100644 index 0000000..3ed5b7f --- /dev/null +++ b/board/Marvell/sheevaplug/sheevaplug.h @@ -0,0 +1,41 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar prafulla@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __SHEEVAPLUG_H +#define __SHEEVAPLUG_H + +#define SHEEVAPLUG_OE_LOW (~(0)) +#define SHEEVAPLUG_OE_HIGH (~(0)) +#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */ +#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */ + +/* PHY related */ +#define MV88E1116_LED_FCTRL_REG 10 +#define MV88E1116_CPRSP_CR3_REG 21 +#define MV88E1116_MAC_CTRL_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +#endif /* __SHEEVAPLUG_H */ diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h new file mode 100644 index 0000000..fc401a8 --- /dev/null +++ b/include/configs/sheevaplug.h @@ -0,0 +1,195 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar prafulla@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CONFIG_SHEEVAPLUG_H +#define _CONFIG_SHEEVAPLUG_H + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING "\nMarvell-Sheevaplug" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_MARVELL 1 +#define CONFIG_ARM926EJS 1 /* Basic Architecture */ +#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_MACH_SHEEVAPLUG /* Machine type */ + +#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ +#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ + +/* + * CLKs configurations + */ +#define CONFIG_SYS_HZ 1000 + +/* + * NS16550 Configuration + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE + +/* + * Serial Port configuration + * The following definitions let you select what serial you want to use + * for your console driver. + */ + +#define CONFIG_CONS_INDEX 1 /*Console on UART0 */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ + 115200,230400, 460800, 921600 } +/* auto boot */ +#define CONFIG_BOOTDELAY 3 /* default enable autoboot */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ +#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ + +#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ + +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#include <config_cmd_default.h> +#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FAT +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* + * NAND configuration + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_KIRKWOOD +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS 1 +#define CONFIG_SYS_NAND_BASE 0xD8000000 /* KW_DEFADR_NANDF */ +#define NAND_ALLOW_ERASE_ALL 1 +#endif + +/* + * Environment variables configurations + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */ +#else +#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ +#endif +/* + * max 4k env size is enough, but in case of nand + * it has to be rounded to sector size + */ +#define CONFIG_ENV_SIZE 0x20000 /* 128k */ +#define CONFIG_ENV_ADDR 0x40000 +#define CONFIG_ENV_OFFSET 0x40000 /* env starts here */ + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \ + "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ + "${x_bootcmd_usb}; bootm 0x6400000;" + +#define CONFIG_MTDPARTS "orion_nand:512k(uboot)," \ + "3m@1m(kernel),1m@4m(psm),13m@5m(rootfs) rw\0" + +#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ + "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS \ + "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x300000\0" \ + "x_bootcmd_usb=usb start\0" \ + "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0" + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */ +/* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * Other required minimal configurations + */ +#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ +#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ +#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ +#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ +#define CONFIG_NR_DRAM_BANKS 4 +#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ +#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ +#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ +#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ +#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_NETCONSOLE /* include NetConsole support */ +#define CONFIG_NET_MULTI /* specify more that one ports available */ +#define CONFIG_MII /* expose smi ove miiphy interface */ +#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ +#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0} /* enable port 0 only */ +#define CONFIG_PHY_BASE_ADR 0 +#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ +#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ +#endif /* CONFIG_CMD_NET */ + +/* + * USB/EHCI + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI /* Enable EHCI USB support */ +#define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */ +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_ISO_PARTITION +#define CONFIG_SUPPORT_VFAT +#endif /* CONFIG_CMD_USB */ + +#endif /* _CONFIG_SHEEVAPLUG_H */
This is Marvell's 88F6281_A0 based custom board developed for wireless access point product
This patch is tested for- 1. Boot from DRAM/SPI flash/NFS 2. File transfer using tftp and loadb 3. SPI flash read/write/erase 4. Booting Linux kernel and RFS from SPI flash 5. Boot from USB supported
Reviewed-by: Ronen Shitrit rshitrit@marvell.com Signed-off-by: Prafulla Wadaskar prafulla@marvell.com --- Change log v2: updated as per first review comments debug_prints updated to debug
v3: updaed as per review comments for v2 added mv88f6281gtw_ge.h file removed BITxx macros
v4: updated as per review comments for v3 arch_misc_init support is added and used from kirkwood
v5: updated as per review comments for v4 CONFIG_MACH_MV88F6281GTW_GE added more comments added and serial configuration removed from mv88f6281gtw_ge.c
V6: clean switch configuration using netdev.h
v7: Marvell copyright removed from u-boot.lds Maintainer added for this board
v8: u-boot.lds removed finetuned for cosmetic and switch related changes
v9: new mpp configuration used CONFIG_ARCH_LOWLEVEL_INIT defination removed
v10: CONFIG_ENV_SIZE set to 4kb CONFIG_SYS_MALLOC_LEN set to 128kb
v11: updated as per feedback for v10 copyright statement corrected mtdparts definition corrected all code lines checked for max len 80 chars
v12: config_cmd_default.h used in board config entry in MAINTAINERS list added
v13: mv88f6281gtw_ge.h allgined as per cleanup in config_cmd_default.h
MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 3 + board/Marvell/mv88f6281gtw_ge/Makefile | 51 ++++++ board/Marvell/mv88f6281gtw_ge/config.mk | 25 +++ board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 141 ++++++++++++++++ board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h | 36 ++++ include/configs/mv88f6281gtw_ge.h | 200 +++++++++++++++++++++++ 8 files changed, 458 insertions(+), 0 deletions(-) create mode 100644 board/Marvell/mv88f6281gtw_ge/Makefile create mode 100644 board/Marvell/mv88f6281gtw_ge/config.mk create mode 100644 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c create mode 100644 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h create mode 100644 include/configs/mv88f6281gtw_ge.h
diff --git a/MAINTAINERS b/MAINTAINERS index 2f3b63c..76268b4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -675,6 +675,7 @@ Hugo Villeneuve hugo.villeneuve@lyrtech.com
Prafulla Wadaskar prafulla@marvell.com
+ mv88f6281gtw_ge ARM926EJS (Kirkwood SoC) sheevaplug ARM926EJS (Kirkwood SoC)
Richard Woodruff r-woodruff2@ti.com diff --git a/MAKEALL b/MAKEALL index e987d4a..4e1f431 100755 --- a/MAKEALL +++ b/MAKEALL @@ -510,6 +510,7 @@ LIST_ARM9=" \ cp946es \ cp966 \ lpd7a400 \ + mv88f6281gtw_ge \ mx1ads \ mx1fs2 \ netstar \ diff --git a/Makefile b/Makefile index a66c4c7..b4d8c80 100644 --- a/Makefile +++ b/Makefile @@ -2853,6 +2853,9 @@ lpd7a400_config \ lpd7a404_config: unconfig @$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
+mv88f6281gtw_ge_config: unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood + mx1ads_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t mx1ads NULL imx
diff --git a/board/Marvell/mv88f6281gtw_ge/Makefile b/board/Marvell/mv88f6281gtw_ge/Makefile new file mode 100644 index 0000000..92d0b47 --- /dev/null +++ b/board/Marvell/mv88f6281gtw_ge/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar prafulla@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := mv88f6281gtw_ge.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/Marvell/mv88f6281gtw_ge/config.mk b/board/Marvell/mv88f6281gtw_ge/config.mk new file mode 100644 index 0000000..a4ea769 --- /dev/null +++ b/board/Marvell/mv88f6281gtw_ge/config.mk @@ -0,0 +1,25 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar prafulla@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +TEXT_BASE = 0x00600000 diff --git a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c new file mode 100644 index 0000000..c959bf8 --- /dev/null +++ b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c @@ -0,0 +1,141 @@ +/* + * Maintainer : Prafulla Wadaskar prafulla@marvell.com + * + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar prafulla@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <netdev.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include "mv88f6281gtw_ge.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(MV88F6281GTW_GE_OE_VAL_LOW, + MV88F6281GTW_GE_OE_VAL_HIGH, + MV88F6281GTW_GE_OE_LOW, MV88F6281GTW_GE_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_SPI_SCn, + MPP1_SPI_MOSI, + MPP2_SPI_SCK, + MPP3_SPI_MISO, + MPP4_GPIO, + MPP5_GPO, + MPP6_SYSRST_OUTn, + MPP7_SPI_SCn, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP12_GPO, + MPP13_GPIO, + MPP14_GPIO, + MPP15_GPIO, + MPP16_GPIO, + MPP17_GPIO, + MPP18_GPO, + MPP19_GPO, + MPP20_GPIO, + MPP21_GPIO, + MPP22_GPIO, + MPP23_GPIO, + MPP24_GPIO, + MPP25_GPIO, + MPP26_GPIO, + MPP27_GPIO, + MPP28_GPIO, + MPP29_GPIO, + MPP30_GPIO, + MPP31_GPIO, + MPP32_GPIO, + MPP33_GPIO, + MPP34_GPIO, + MPP35_GPIO, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_GPIO, + MPP41_GPIO, + MPP42_GPIO, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, + MPP48_GPIO, + MPP49_GPIO, + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + + /* + * arch number of board + */ + gd->bd->bi_arch_number = MACH_TYPE_MV88F6281GTW_GE; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +int dram_init(void) +{ + int i; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + gd->bd->bi_dram[i].start = kw_sdram_bar(i); + gd->bd->bi_dram[i].size = kw_sdram_bs(i); + } + return 0; +} + +#ifdef CONFIG_MV88E61XX_SWITCH +void reset_phy(void) +{ + /* configure and initialize switch */ + struct mv88e61xx_config swcfg = { + .name = "egiga0", + .vlancfg = MV88E61XX_VLANCFG_ROUTER, + .rgmii_delay = MV88E61XX_RGMII_DELAY_EN, + .led_init = MV88E61XX_LED_INIT_EN, + .mdip = MV88E61XX_MDIP_REVERSE, + .portstate = MV88E61XX_PORTSTT_FORWARDING, + .cpuport = (1 << 5), + .ports_enabled = 0x3f + }; + + mv88e61xx_switch_initialize(&swcfg); +} +#endif /* CONFIG_MV88E61XX_SWITCH */ diff --git a/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h new file mode 100644 index 0000000..65b925d --- /dev/null +++ b/board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h @@ -0,0 +1,36 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar prafulla@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __MV88F6281GTW_GE_H +#define __MV88F6281GTW_GE_H + +#define MV88F6281GTW_GE_OE_LOW (~((1 << 7) | (1 << 12) \ + |(1 << 20) | (1 << 21))) /*enable GLED,RLED */ +#define MV88F6281GTW_GE_OE_HIGH (~((1 << 4)|(1 << 6)|(1 << 7)|(1 << 12) \ + |(1 << 13)|(1 << 16)|(1 << 17))) +#define MV88F6281GTW_GE_OE_VAL_LOW (1 << 20) /*make GLED on */ +#define MV88F6281GTW_GE_OE_VAL_HIGH ((1 << 6)|(1 << 13)|(1 << 16)|(1 << 17)) + + +#endif /* __MV88F6281GTW_GE_H */ diff --git a/include/configs/mv88f6281gtw_ge.h b/include/configs/mv88f6281gtw_ge.h new file mode 100644 index 0000000..96b4d1c --- /dev/null +++ b/include/configs/mv88f6281gtw_ge.h @@ -0,0 +1,200 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar prafulla@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CONFIG_MV88F6281GTW_GE_H +#define _CONFIG_MV88F6281GTW_GE_H + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING "\nMarvell-MV88F6281GTW_GE" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_MARVELL 1 +#define CONFIG_ARM926EJS 1 /* Basic Architecture */ +#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_MACH_MV88F6281GTW_GE /* Machine type */ + +#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ +#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ +#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ + +/* + * CLKs configurations + */ +#define CONFIG_SYS_HZ 1000 + +/* + * NS16550 Configuration + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE + +/* + * Serial Port configuration + * The following definitions let you select what serial you want to use + * for your console driver. + */ + +#define CONFIG_CONS_INDEX 1 /*Console on UART0 */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ + 115200,230400, 460800, 921600 } +/* auto boot */ +#define CONFIG_BOOTDELAY 3 /* default enable autoboot */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ +#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ + +#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ + +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#include <config_cmd_default.h> +#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FAT +#define CONFIG_CMD_PING +#define CONFIG_CMD_SF +#define CONFIG_CMD_USB + +/* + * Flash configuration + */ +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH 1 +#define CONFIG_HARD_SPI 1 +#define CONFIG_KIRKWOOD_SPI 1 +#define CONFIG_SPI_FLASH_MACRONIX 1 +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 50000000 /*50Mhz */ +#endif + +/* + * Environment variables configurations + */ +#ifdef CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K */ +#else +#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ +#endif +#define CONFIG_ENV_SIZE 0x1000 /* 4k */ +#define CONFIG_ENV_ADDR 0x30000 +#define CONFIG_ENV_OFFSET 0x30000 /* env starts here */ + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \ + "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ + "${x_bootcmd_usb}; bootm 0x6400000;" + +#define CONFIG_MTDPARTS "spi0.0:512k(uboot)," \ + "512k@512k(psm),2m@1m(kernel),13m@3m(rootfs)\0" + +#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ + "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS \ + "x_bootcmd_kernel=cp.b 0xE8100000 0x6400000 0x200000\0" \ + "x_bootcmd_usb=usb start\0" \ + "x_bootargs_root=root=/dev/mtdblock3 ro rootfstype=squashfs\0" + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */ +/* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * Other required minimal configurations + */ +#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ +#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ +#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ +#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ +#define CONFIG_NR_DRAM_BANKS 4 +#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ +#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ +#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ +#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ +#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_NETCONSOLE /* include NetConsole support */ +#define CONFIG_NET_MULTI /* specify more that one ports available */ +#define CONFIG_MII /* expose smi ove miiphy interface */ +#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ +#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0} /* enable port 0 only */ +#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ +#endif /* CONFIG_CMD_NET */ + +/* + * Marvell 88Exxxx Switch configurations + */ +#define CONFIG_RESET_PHY_R /* use reset_phy() to init phy/swtich */ +#define CONFIG_MV88E61XX_SWITCH /* Enable mv88e61xx switch driver */ + +/* + * USB/EHCI + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI /* Enable EHCI USB support */ +#define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */ +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_ISO_PARTITION +#define CONFIG_SUPPORT_VFAT +#endif /* CONFIG_CMD_USB */ + +#endif /* _CONFIG_MV88F6281GTW_GE_H */
With these fixes, this driver works properly for multi chip addressging mode
Bugfixes: 1. Build error fixed for function mv88e61xx_busychk_multic-fixed 2. PHY dev address error detection- fixed 3. wrong busy bit was refered in function mv88e61xx_busychk -fixed 4. invalid data read ptr was refered for RD_PHY in case of multichip addressing mode -fixed
The Multichip Address mode is tested with RD6281A board having MV88E6165 switch on it
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com --- drivers/net/phy/mv88e61xx.c | 18 +++++++++--------- drivers/net/phy/mv88e61xx.h | 2 +- 2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index ec47286..29630f5 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -36,7 +36,7 @@ * By default single chip mode is configured * multichip mode operation can be configured in board header */ -static int mv88e61xx_busychk_multic(u32 devaddr) +static int mv88e61xx_busychk_multic(char *name, u32 devaddr) { u32 reg = 0; u32 timeout = MV88E61XX_PHY_TIMEOUT; @@ -58,11 +58,11 @@ static void mv88e61xx_wr_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 data) u32 mii_dev_addr;
/* command to read PHY dev address */ - if (!miiphy_read(name, 0xEE, 0xEE, &mii_dev_addr)) { + if (miiphy_read(name, 0xEE, 0xEE, &mii_dev_addr)) { printf("Error..could not read PHY dev address\n"); return; } - mv88e61xx_busychk_multic(mii_dev_addr); + mv88e61xx_busychk_multic(name, mii_dev_addr); /* Write data to Switch indirect data register */ miiphy_write(name, mii_dev_addr, 0x1, data); /* Write command to Switch indirect command register (write) */ @@ -77,18 +77,18 @@ static void mv88e61xx_rd_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 * data) u32 mii_dev_addr;
/* command to read PHY dev address */ - if (!miiphy_read(name, 0xEE, 0xEE, &mii_dev_addr)) { + if (miiphy_read(name, 0xEE, 0xEE, &mii_dev_addr)) { printf("Error..could not read PHY dev address\n"); return; } - mv88e61xx_busychk_multic(mii_dev_addr); + mv88e61xx_busychk_multic(name, mii_dev_addr); /* Write command to Switch indirect command register (read) */ miiphy_write(name, mii_dev_addr, 0x0, - reg_ofs | (phy_adr << 5) | (1 << 10) | (1 << 12) | (1 << + reg_ofs | (phy_adr << 5) | (1 << 11) | (1 << 12) | (1 << 15)); - mv88e61xx_busychk_multic(mii_dev_addr); + mv88e61xx_busychk_multic(name, mii_dev_addr); /* Read data from Switch indirect data register */ - miiphy_read(name, mii_dev_addr, 0x1, (u16 *) & data); + miiphy_read(name, mii_dev_addr, 0x1, data); } #endif /* CONFIG_MV88E61XX_MULTICHIP_ADRMODE */
@@ -212,7 +212,7 @@ static int mv88e61xx_busychk(char *name) printf("SMI busy timeout\n"); return -1; } - } while (reg & 1 << 28); /* busy mask */ + } while (reg & 1 << 15); /* busy mask */ return 0; }
diff --git a/drivers/net/phy/mv88e61xx.h b/drivers/net/phy/mv88e61xx.h index 4279464..57762b6 100644 --- a/drivers/net/phy/mv88e61xx.h +++ b/drivers/net/phy/mv88e61xx.h @@ -49,7 +49,7 @@ #define MV88E61XX_ADDR_OFST 5
#ifdef CONFIG_MV88E61XX_MULTICHIP_ADRMODE -static int mv88e61xx_busychk_multic(u32 devaddr); +static int mv88e61xx_busychk_multic(char *name, u32 devaddr); static void mv88e61xx_wr_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 data); static void mv88e61xx_rd_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 * data); #define WR_PHY mv88e61xx_wr_phy
By default Auto Negotiation is enabled for interface speed but on some platforms like RD6281A it does not work. If you want to forced program it to desired speed, this patch helps-
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
This patch is tested on RD6281A Kirkwood board
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com --- drivers/net/kirkwood_egiga.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/drivers/net/kirkwood_egiga.c b/drivers/net/kirkwood_egiga.c index 3c5db19..1dfd567 100644 --- a/drivers/net/kirkwood_egiga.c +++ b/drivers/net/kirkwood_egiga.c @@ -415,7 +415,31 @@ static int kwgbe_init(struct eth_device *dev) /* Assign port configuration and command. */ KWGBEREG_WR(regs->pxc, PRT_CFG_VAL); KWGBEREG_WR(regs->pxcx, PORT_CFG_EXTEND_VALUE); + /* + * Forced 10/100/1000BASE-T interface speed configuration + * By default Auto Negotiation of interface speed is enabled + * This can be forced disabled and desired speed can be configured + */ +#ifdef CONFIG_DIS_AUTO_NEG_SPEED_GMII +#if (!defined (CONFIG_PHY_SPEED) || (CONFIG_PHY_SPEED == _1000BASET)) + KWGBEREG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE + | KWGBE_DIS_AUTO_NEG_SPEED_GMII + | KWGBE_SET_GMII_SPEED_TO_1000); +#elif (CONFIG_PHY_SPEED == _100BASET) + KWGBEREG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE + | KWGBE_DIS_AUTO_NEG_SPEED_GMII + | KWGBE_SET_GMII_SPEED_TO_10_100 + | KWGBE_SET_MII_SPEED_TO_100); +#elif (CONFIG_PHY_SPEED == _10BASET) + KWGBEREG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE + | KWGBE_DIS_AUTO_NEG_SPEED_GMII + | KWGBE_SET_GMII_SPEED_TO_10_100 + | KWGBE_SET_MII_SPEED_TO_10); +#endif /* CONFIG_PHY_SPEED == _10BASET */ +#else KWGBEREG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE); +#endif /* CONFIG_DIS_AUTO_NEG_SPEED_GMII */ + /* Disable port initially */ KWGBEREG_BITS_SET(regs->psc0, KWGBE_SERIAL_PORT_EN);
Hi Prafulla, hi Marvell engineers,
By default Auto Negotiation is enabled for interface speed but on some platforms like RD6281A it does not work. If you want to forced program it to desired speed, this patch helps-
do you have some information why auto negotiation doesn't work on RD6281A? I'm working on custom hardware and don't want to do the same mistake :)
Many thanks, Dieter
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
This patch is tested on RD6281A Kirkwood board
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
drivers/net/kirkwood_egiga.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/drivers/net/kirkwood_egiga.c b/drivers/net/kirkwood_egiga.c index 3c5db19..1dfd567 100644 --- a/drivers/net/kirkwood_egiga.c +++ b/drivers/net/kirkwood_egiga.c @@ -415,7 +415,31 @@ static int kwgbe_init(struct eth_device *dev) /* Assign port configuration and command. */ KWGBEREG_WR(regs->pxc, PRT_CFG_VAL); KWGBEREG_WR(regs->pxcx, PORT_CFG_EXTEND_VALUE);
- /*
* Forced 10/100/1000BASE-T interface speed configuration* By default Auto Negotiation of interface speed is enabled* This can be forced disabled and desired speed can be configured*/+#ifdef CONFIG_DIS_AUTO_NEG_SPEED_GMII +#if (!defined (CONFIG_PHY_SPEED) || (CONFIG_PHY_SPEED == _1000BASET))
- KWGBEREG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE
| KWGBE_DIS_AUTO_NEG_SPEED_GMII| KWGBE_SET_GMII_SPEED_TO_1000);+#elif (CONFIG_PHY_SPEED == _100BASET)
- KWGBEREG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE
| KWGBE_DIS_AUTO_NEG_SPEED_GMII| KWGBE_SET_GMII_SPEED_TO_10_100| KWGBE_SET_MII_SPEED_TO_100);+#elif (CONFIG_PHY_SPEED == _10BASET)
- KWGBEREG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE
| KWGBE_DIS_AUTO_NEG_SPEED_GMII| KWGBE_SET_GMII_SPEED_TO_10_100| KWGBE_SET_MII_SPEED_TO_10);+#endif /* CONFIG_PHY_SPEED == _10BASET */ +#else KWGBEREG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE); +#endif /* CONFIG_DIS_AUTO_NEG_SPEED_GMII */
- /* Disable port initially */ KWGBEREG_BITS_SET(regs->psc0, KWGBE_SERIAL_PORT_EN);
-----Original Message----- From: Dieter Kiermaier [mailto:dk-arm-linux@gmx.de] Sent: Thursday, July 16, 2009 8:15 PM To: u-boot@lists.denx.de Cc: Prafulla Wadaskar; Manas Saksena; Ronen Shitrit; Nicolas Pitre; Ashish Karkare; Prabhanjan Sarnaik; Lennert Buijtenhek Subject: Re: [U-Boot] [PATCH 5/6] net: Kirkwood_egiga: forced interface speed config support
Hi Prafulla, hi Marvell engineers,
By default Auto Negotiation is enabled for interface speed
but on some
platforms like RD6281A it does not work. If you want to forced program it to desired speed, this patch helps-
do you have some information why auto negotiation doesn't work on RD6281A?
Hi Dieter I do not have good answer for this with me :-( On RD6281A I thought Auto negotiation should work, but it did not. During my debugging, I performed several trial and error methods and forcing PHY interface speed to 1000BPs worked for me.
So I exposed this configuration through this patch.
I will certainly look for better answer for you
Regards.. Prafulla . .
I'm working on custom hardware and don't want to do the same mistake :)
Many thanks, Dieter
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
This patch is tested on RD6281A Kirkwood board
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
drivers/net/kirkwood_egiga.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/drivers/net/kirkwood_egiga.c b/drivers/net/kirkwood_egiga.c index 3c5db19..1dfd567 100644 --- a/drivers/net/kirkwood_egiga.c +++ b/drivers/net/kirkwood_egiga.c @@ -415,7 +415,31 @@ static int kwgbe_init(struct eth_device *dev) /* Assign port configuration and command. */ KWGBEREG_WR(regs->pxc, PRT_CFG_VAL); KWGBEREG_WR(regs->pxcx, PORT_CFG_EXTEND_VALUE);
- /*
* Forced 10/100/1000BASE-T interface speed configuration* By default Auto Negotiation of interface speed is enabled* This can be forced disabled and desired speed can beconfigured
*/+#ifdef CONFIG_DIS_AUTO_NEG_SPEED_GMII #if (!defined +(CONFIG_PHY_SPEED) || (CONFIG_PHY_SPEED == _1000BASET))
- KWGBEREG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE
| KWGBE_DIS_AUTO_NEG_SPEED_GMII| KWGBE_SET_GMII_SPEED_TO_1000);+#elif (CONFIG_PHY_SPEED == _100BASET)
- KWGBEREG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE
| KWGBE_DIS_AUTO_NEG_SPEED_GMII| KWGBE_SET_GMII_SPEED_TO_10_100| KWGBE_SET_MII_SPEED_TO_100);+#elif (CONFIG_PHY_SPEED == _10BASET)
- KWGBEREG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE
| KWGBE_DIS_AUTO_NEG_SPEED_GMII| KWGBE_SET_GMII_SPEED_TO_10_100| KWGBE_SET_MII_SPEED_TO_10);+#endif /* CONFIG_PHY_SPEED == _10BASET */ #else KWGBEREG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE); +#endif /* CONFIG_DIS_AUTO_NEG_SPEED_GMII */
- /* Disable port initially */ KWGBEREG_BITS_SET(regs->psc0, KWGBE_SERIAL_PORT_EN);
This is Marvell's 88F6281_A0 based reference design board
This patch is tested for- 1. Boot from DRAM/NAND flash/NFS 2. File transfer using tftp and loadb 3. NAND flash read/write/erase
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com --- MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 3 + board/Marvell/rd6281a/Makefile | 51 ++++++++++ board/Marvell/rd6281a/config.mk | 25 +++++ board/Marvell/rd6281a/rd6281a.c | 179 +++++++++++++++++++++++++++++++++ board/Marvell/rd6281a/rd6281a.h | 41 ++++++++ include/configs/rd6281a.h | 209 +++++++++++++++++++++++++++++++++++++++ 8 files changed, 510 insertions(+), 0 deletions(-) create mode 100644 board/Marvell/rd6281a/Makefile create mode 100644 board/Marvell/rd6281a/config.mk create mode 100644 board/Marvell/rd6281a/rd6281a.c create mode 100644 board/Marvell/rd6281a/rd6281a.h create mode 100644 include/configs/rd6281a.h
diff --git a/MAINTAINERS b/MAINTAINERS index 76268b4..ff587e1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -676,6 +676,7 @@ Hugo Villeneuve hugo.villeneuve@lyrtech.com Prafulla Wadaskar prafulla@marvell.com
mv88f6281gtw_ge ARM926EJS (Kirkwood SoC) + rd6281a ARM926EJS (Kirkwood SoC) sheevaplug ARM926EJS (Kirkwood SoC)
Richard Woodruff r-woodruff2@ti.com diff --git a/MAKEALL b/MAKEALL index 4e1f431..3d7e4da 100755 --- a/MAKEALL +++ b/MAKEALL @@ -521,6 +521,7 @@ LIST_ARM9=" \ omap1610inn \ omap5912osk \ omap730p2 \ + rd6281a \ sbc2410x \ scb9328 \ sheevaplug \ diff --git a/Makefile b/Makefile index b4d8c80..3a011c8 100644 --- a/Makefile +++ b/Makefile @@ -2921,6 +2921,9 @@ omap730p2_cs3boot_config : unconfig fi; @$(MKCONFIG) -a $(call xtract_omap730p2,$@) arm arm926ejs omap730p2 NULL omap
+rd6281a_config: unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood + sbc2410x_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm920t sbc2410x NULL s3c24x0
diff --git a/board/Marvell/rd6281a/Makefile b/board/Marvell/rd6281a/Makefile new file mode 100644 index 0000000..907dd7d --- /dev/null +++ b/board/Marvell/rd6281a/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar prafulla@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := rd6281a.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/Marvell/rd6281a/config.mk b/board/Marvell/rd6281a/config.mk new file mode 100644 index 0000000..a4ea769 --- /dev/null +++ b/board/Marvell/rd6281a/config.mk @@ -0,0 +1,25 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar prafulla@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +TEXT_BASE = 0x00600000 diff --git a/board/Marvell/rd6281a/rd6281a.c b/board/Marvell/rd6281a/rd6281a.c new file mode 100644 index 0000000..8713a3c --- /dev/null +++ b/board/Marvell/rd6281a/rd6281a.c @@ -0,0 +1,179 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar prafulla@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <miiphy.h> +#include <netdev.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include "rd6281a.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(RD6281A_OE_VAL_LOW, + RD6281A_OE_VAL_HIGH, + RD6281A_OE_LOW, RD6281A_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP12_SD_CLK, + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GPIO, + MPP29_GPIO, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GE1_14, + MPP35_GPIO, + MPP36_AUDIO_SPDIFI, + MPP37_AUDIO_SPDIFO, + MPP38_GPIO, + MPP39_TDM_SPI_CS0, + MPP40_TDM_SPI_SCK, + MPP41_TDM_SPI_MISO, + MPP42_TDM_SPI_MOSI, + MPP43_TDM_CODEC_INTn, + MPP44_GPIO, + MPP45_TDM_PCLK, + MPP46_TDM_FS, + MPP47_TDM_DRX, + MPP48_TDM_DTX, + MPP49_GPIO, + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + + /* + * arch number of board + */ + gd->bd->bi_arch_number = MACH_TYPE_RD88F6281; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +int dram_init(void) +{ + int i; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + gd->bd->bi_dram[i].start = kw_sdram_bar(i); + gd->bd->bi_dram[i].size = kw_sdram_bs(i); + } + return 0; +} + +void mv_phy_88e1116_init(char *name) +{ + u16 reg; + u16 devadr; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __FUNCTION__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + if (miiphy_read (name, devadr, PHY_BMCR, ®) != 0) { + printf("Err..(%s) PHY status read failed\n", __FUNCTION__); + return; + } + if (miiphy_write (name, devadr, PHY_BMCR, reg | 0x8000) != 0) { + printf("Err..(%s) PHY reset failed\n", __FUNCTION__); + return; + } + + printf("88E1116 Initialized on %s\n", name); +} + +/* Configure and enable Switch and PHY */ +void reset_phy(void) +{ + /* configure and initialize switch */ + struct mv88e61xx_config swcfg = { + .name = "egiga0", + .vlancfg = MV88E61XX_VLANCFG_ROUTER, + .rgmii_delay = MV88E61XX_RGMII_DELAY_EN, + .led_init = MV88E61XX_LED_INIT_EN, + .portstate = MV88E61XX_PORTSTT_FORWARDING, + .cpuport = (1 << 5), + .ports_enabled = 0x3f, + }; + + mv88e61xx_switch_initialize(&swcfg); + + /* configure and initialize PHY */ + mv_phy_88e1116_init("egiga1"); +} diff --git a/board/Marvell/rd6281a/rd6281a.h b/board/Marvell/rd6281a/rd6281a.h new file mode 100644 index 0000000..c978bef --- /dev/null +++ b/board/Marvell/rd6281a/rd6281a.h @@ -0,0 +1,41 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar prafulla@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __RD6281A_H +#define __RD6281A_H + +#define RD6281A_OE_LOW (~(1 << 7)) +#define RD6281A_OE_HIGH (~(1 << 2 | 1 << 12)) +#define RD6281A_OE_VAL_LOW (0) +#define RD6281A_OE_VAL_HIGH (1 << 12) + +/* PHY related */ +#define MV88E1116_LED_FCTRL_REG 10 +#define MV88E1116_CPRSP_CR3_REG 21 +#define MV88E1116_MAC_CTRL_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +#endif /* __RD6281A_H */ diff --git a/include/configs/rd6281a.h b/include/configs/rd6281a.h new file mode 100644 index 0000000..065e4aa --- /dev/null +++ b/include/configs/rd6281a.h @@ -0,0 +1,209 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar prafulla@marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CONFIG_RD6281A_H +#define _CONFIG_RD6281A_H + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING "\nMarvell-Sheevaplug" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_MARVELL 1 +#define CONFIG_ARM926EJS 1 /* Basic Architecture */ +#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_MACH_RD6281A /* Machine type */ + +#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ +#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ + +/* + * CLKs configurations + */ +#define CONFIG_SYS_HZ 1000 + +/* + * NS16550 Configuration + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE + +/* + * Serial Port configuration + * The following definitions let you select what serial you want to use + * for your console driver. + */ + +#define CONFIG_CONS_INDEX 1 /*Console on UART0 */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ + 115200,230400, 460800, 921600 } +/* auto boot */ +#define CONFIG_BOOTDELAY 3 /* default enable autoboot */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ +#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ + +#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ + +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ +/* + * Commands configuration + */ +#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_BOOTD +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FAT +#define CONFIG_CMD_LOADB +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_RUN +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_USB + +/* + * Flash configuration + */ +#ifndef CONFIG_CMD_FLASH +#define CONFIG_SYS_NO_FLASH 1 /* Declare no flash (NOR/SPI) */ +#endif + +/* + * NAND configuration + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_KIRKWOOD +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS 1 +#define CONFIG_SYS_NAND_BASE 0xD8000000 /* KW_DEFADR_NANDF */ +#define NAND_ALLOW_ERASE_ALL 1 +#endif + +/* + * Environment variables configurations + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */ +#else +#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ +#endif +/* + * max 4k env size is enough, but in case of nand + * it has to be rounded to sector size + */ +#define CONFIG_ENV_SIZE 0x20000 /* 128k */ +#define CONFIG_ENV_ADDR 0x40000 +#define CONFIG_ENV_OFFSET 0x40000 /* env starts here */ + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \ + "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ + "${x_bootcmd_usb}; bootm 0x6400000;" + +#define CONFIG_MTDPARTS "orion_nand:512k(uboot)," \ + "3m@1m(kernel),1m@4m(psm),13m@5m(rootfs) rw\0" + +#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ + "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS \ + "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x300000\0" \ + "x_bootcmd_usb=usb start\0" \ + "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0" + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */ +/* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * Other required minimal configurations + */ +#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ +#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ +#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ +#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ +#define CONFIG_NR_DRAM_BANKS 4 +#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ +#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ +#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ +#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ +#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_NETCONSOLE /* include NetConsole support */ +#define CONFIG_NET_MULTI /* specify more that one ports available */ +#define CONFIG_MII /* expose smi ove miiphy interface */ +#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ +#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,1} /* enable both ports */ +#define CONFIG_MV88E61XX_MULTICHIP_ADRMODE +#define CONFIG_DIS_AUTO_NEG_SPEED_GMII /*Disable Auto speed negociation */ +#define CONFIG_PHY_SPEED _1000BASET /*Force PHYspeed to 1GBPs */ +#define CONFIG_PHY_BASE_ADR 0x0A +#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ +#define CONFIG_RESET_PHY_R /* use reset_phy() to init switch and PHY */ +#define CONFIG_MV88E61XX_SWITCH /* Enable MV88E61XX switch driver */ +#endif /* CONFIG_CMD_NET */ + +/* + * USB/EHCI + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI /* Enable EHCI USB support */ +#define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */ +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_ISO_PARTITION +#define CONFIG_SUPPORT_VFAT +#endif /* CONFIG_CMD_USB */ + +#endif /* _CONFIG_RD6281A_H */
diff --git a/include/configs/rd6281a.h b/include/configs/rd6281a.h new file mode 100644 index 0000000..065e4aa --- /dev/null +++ b/include/configs/rd6281a.h @@ -0,0 +1,209 @@ +/*
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- MA 02110-1301 USA
- */
+#ifndef _CONFIG_RD6281A_H +#define _CONFIG_RD6281A_H
+/*
- Version number information
- */
+#define CONFIG_IDENT_STRING "\nMarvell-Sheevaplug"
??? Sheevaplug?
Best Regards, J.
-----Original Message----- From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagnioj@jcrosoft.com] Sent: Sunday, July 19, 2009 12:18 AM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Manas Saksena; Ronen Shitrit; Nicolas Pitre; Ashish Karkare; Prabhanjan Sarnaik; Lennert Buijtenhek Subject: Re: [U-Boot] [PATCH 6/6] Marvell RD6281A Board support
diff --git a/include/configs/rd6281a.h
b/include/configs/rd6281a.h new
file mode 100644 index 0000000..065e4aa --- /dev/null +++ b/include/configs/rd6281a.h @@ -0,0 +1,209 @@ +/*
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General
Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- MA 02110-1301 USA
- */
+#ifndef _CONFIG_RD6281A_H +#define _CONFIG_RD6281A_H
+/*
- Version number information
- */
+#define CONFIG_IDENT_STRING "\nMarvell-Sheevaplug"
??? Sheevaplug?
Sorry.. I observed this after git-send :-) , patch already reposted Reference: http://lists.denx.de/pipermail/u-boot/2009-July/056438.html
Regards.. Prafulla . .
Best Regards, J.
On 20:58 Thu 16 Jul , Prafulla Wadaskar wrote:
By default Auto Negotiation is enabled for interface speed but on some platforms like RD6281A it does not work. If you want to forced program it to desired speed, this patch helps-
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
This patch is tested on RD6281A Kirkwood board
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
drivers/net/kirkwood_egiga.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/drivers/net/kirkwood_egiga.c b/drivers/net/kirkwood_egiga.c index 3c5db19..1dfd567 100644 --- a/drivers/net/kirkwood_egiga.c +++ b/drivers/net/kirkwood_egiga.c @@ -415,7 +415,31 @@ static int kwgbe_init(struct eth_device *dev) /* Assign port configuration and command. */ KWGBEREG_WR(regs->pxc, PRT_CFG_VAL); KWGBEREG_WR(regs->pxcx, PORT_CFG_EXTEND_VALUE);
- /*
* Forced 10/100/1000BASE-T interface speed configuration* By default Auto Negotiation of interface speed is enabled* This can be forced disabled and desired speed can be configured*/+#ifdef CONFIG_DIS_AUTO_NEG_SPEED_GMII +#if (!defined (CONFIG_PHY_SPEED) || (CONFIG_PHY_SPEED == _1000BASET))
Could you find a better config taht _1000BASET & co
Best Regards, J.
-----Original Message----- From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagnioj@jcrosoft.com] Sent: Sunday, July 19, 2009 12:14 AM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Manas Saksena; Ronen Shitrit; Nicolas Pitre; Ashish Karkare; Prabhanjan Sarnaik; Lennert Buijtenhek Subject: Re: [U-Boot] [PATCH 5/6] net: Kirkwood_egiga: forced interface speed config support
On 20:58 Thu 16 Jul , Prafulla Wadaskar wrote:
By default Auto Negotiation is enabled for interface speed
but on some
platforms like RD6281A it does not work. If you want to forced program it to desired speed, this patch helps-
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
This patch is tested on RD6281A Kirkwood board
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
drivers/net/kirkwood_egiga.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/drivers/net/kirkwood_egiga.c b/drivers/net/kirkwood_egiga.c index 3c5db19..1dfd567 100644 --- a/drivers/net/kirkwood_egiga.c +++ b/drivers/net/kirkwood_egiga.c @@ -415,7 +415,31 @@ static int kwgbe_init(struct eth_device *dev) /* Assign port configuration and command. */ KWGBEREG_WR(regs->pxc, PRT_CFG_VAL); KWGBEREG_WR(regs->pxcx, PORT_CFG_EXTEND_VALUE);
- /*
* Forced 10/100/1000BASE-T interface speed configuration* By default Auto Negotiation of interface speed is enabled* This can be forced disabled and desired speed can beconfigured
*/+#ifdef CONFIG_DIS_AUTO_NEG_SPEED_GMII #if (!defined +(CONFIG_PHY_SPEED) || (CONFIG_PHY_SPEED == _1000BASET))
Could you find a better config taht _1000BASET & co
Hi Jean, I have reused it from include/miiphy.h which is relevant too.
Regards.. Prafulla . .
Best Regards, J.
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 20:58 Thu 16 Jul , Prafulla Wadaskar wrote:
By default Auto Negotiation is enabled for interface speed but on some platforms like RD6281A it does not work. If you want to forced program it to desired speed, this patch helps-
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
This patch is tested on RD6281A Kirkwood board
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
drivers/net/kirkwood_egiga.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/drivers/net/kirkwood_egiga.c b/drivers/net/kirkwood_egiga.c index 3c5db19..1dfd567 100644 --- a/drivers/net/kirkwood_egiga.c +++ b/drivers/net/kirkwood_egiga.c @@ -415,7 +415,31 @@ static int kwgbe_init(struct eth_device *dev) /* Assign port configuration and command. */ KWGBEREG_WR(regs->pxc, PRT_CFG_VAL); KWGBEREG_WR(regs->pxcx, PORT_CFG_EXTEND_VALUE);
- /*
* Forced 10/100/1000BASE-T interface speed configuration* By default Auto Negotiation of interface speed is enabled* This can be forced disabled and desired speed can be configured*/+#ifdef CONFIG_DIS_AUTO_NEG_SPEED_GMII +#if (!defined (CONFIG_PHY_SPEED) || (CONFIG_PHY_SPEED == _1000BASET))
Could you find a better config taht _1000BASET & co
Global configs for this type of thing are a bad idea (what if you want one interface @ 1000 and one @ 100? I guess this will have to do for now, but let's ensure that it's temporary.
Best Regards, J.
regards, Ben
Dear Ben Warren,
In message 4A655EAA.4000401@gmail.com you wrote:
By default Auto Negotiation is enabled for interface speed but on some platforms like RD6281A it does not work.
What exactly is the reason that it doesn't work?
Is it some deficiency of the board hardware that always exaists, or a problem only present in combination with certain switches. or what exactly?
If you want to forced program it to desired speed, this patch helps-
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
I'm not sure if it's really a good idea to do hard-code this as a compile-time option.
+#if (!defined (CONFIG_PHY_SPEED) || (CONFIG_PHY_SPEED == _1000BASET))
Could you find a better config taht _1000BASET & co
Global configs for this type of thing are a bad idea (what if you want one interface @ 1000 and one @ 100? I guess this will have to do for now, but let's ensure that it's temporary.
I am not convinced that such a patch should go in at all.
Foir the boards that really need such a configuration, it should be possible to set this for example using a standard "mii" command as part of a "preboot" environment setting.
This way the user can disable it at runtime (if he doesn;t need it), and we don't need to change the code.
Best regards,
Wolfgang Denk
-----Original Message----- From: Ben Warren [mailto:biggerbadderben@gmail.com] Sent: Tuesday, July 21, 2009 11:53 AM To: Jean-Christophe PLAGNIOL-VILLARD Cc: Prafulla Wadaskar; Manas Saksena; Ronen Shitrit; Nicolas Pitre; u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik; Lennert Buijtenhek Subject: Re: [U-Boot] [PATCH 5/6] net: Kirkwood_egiga: forced interface speed config support
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 20:58 Thu 16 Jul , Prafulla Wadaskar wrote:
By default Auto Negotiation is enabled for interface speed but on some platforms like RD6281A it does not work. If you want to forced program it to desired speed, this
patch helps-
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
This patch is tested on RD6281A Kirkwood board
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
drivers/net/kirkwood_egiga.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/drivers/net/kirkwood_egiga.c b/drivers/net/kirkwood_egiga.c index 3c5db19..1dfd567 100644 --- a/drivers/net/kirkwood_egiga.c +++ b/drivers/net/kirkwood_egiga.c @@ -415,7 +415,31 @@ static int kwgbe_init(struct eth_device *dev) /* Assign port configuration and command. */ KWGBEREG_WR(regs->pxc, PRT_CFG_VAL); KWGBEREG_WR(regs->pxcx, PORT_CFG_EXTEND_VALUE);
- /*
* Forced 10/100/1000BASE-T interface speed configuration* By default Auto Negotiation of interface speed is enabled* This can be forced disabled and desired speed can beconfigured
*/+#ifdef CONFIG_DIS_AUTO_NEG_SPEED_GMII #if (!defined +(CONFIG_PHY_SPEED) || (CONFIG_PHY_SPEED == _1000BASET))
Could you find a better config taht _1000BASET & co
Global configs for this type of thing are a bad idea (what if you want one interface @ 1000 and one @ 100? I guess this will have to do for now, but let's ensure that it's temporary.
I agree. I will find better way to configure this stuff.
Regards.. Prafulla ..
Best Regards, J.
regards, Ben
Prafulla,
Prafulla Wadaskar wrote:
By default Auto Negotiation is enabled for interface speed but on some platforms like RD6281A it does not work. If you want to forced program it to desired speed, this patch helps-
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
This patch is tested on RD6281A Kirkwood board
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
Applied to net repo.
thanks, Ben
Dear Ben Warren,
In message 4A656563.9020207@gmail.com you wrote:
Prafulla Wadaskar wrote:
By default Auto Negotiation is enabled for interface speed but on some platforms like RD6281A it does not work. If you want to forced program it to desired speed, this patch helps-
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
This patch is tested on RD6281A Kirkwood board
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
Applied to net repo.
Please reconsider - see my previous comment. [Sorry it came so late.]
Best regards,
Wolfgang Denk
Wolfgang Denk wrote:
Dear Ben Warren,
In message 4A656563.9020207@gmail.com you wrote:
Prafulla Wadaskar wrote:
By default Auto Negotiation is enabled for interface speed but on some platforms like RD6281A it does not work. If you want to forced program it to desired speed, this patch helps-
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
This patch is tested on RD6281A Kirkwood board
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
Applied to net repo.
Please reconsider - see my previous comment. [Sorry it came so late.]
Best regards,
Wolfgang Denk
No problem. I assumed it was a chip erratum but should have looked closer. Let's wait for Prafulla's response.
regards, Ben
-----Original Message----- From: Ben Warren [mailto:biggerbadderben@gmail.com] Sent: Tuesday, July 21, 2009 1:14 PM To: Wolfgang Denk Cc: Prafulla Wadaskar; Manas Saksena; Ronen Shitrit; Nicolas Pitre; u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik; Lennert Buijtenhek Subject: Re: [U-Boot] [PATCH 5/6] net: Kirkwood_egiga: forced interface speed config support
Wolfgang Denk wrote:
Dear Ben Warren,
In message 4A656563.9020207@gmail.com you wrote:
Prafulla Wadaskar wrote:
By default Auto Negotiation is enabled for interface speed but on some platforms like RD6281A it does not work. If you want to forced program it to desired speed, this
patch helps-
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
This patch is tested on RD6281A Kirkwood board
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
Applied to net repo.
Please reconsider - see my previous comment. [Sorry it came
so late.]
Best regards,
Wolfgang Denk
No problem. I assumed it was a chip erratum but should have looked closer. Let's wait for Prafulla's response.
Ideally auto negotiation must work, but :-( I don't think this is not for SoC/PHY erratum since both are working okay with other boards. Only the difference is on RD6281A the multichip mode is used, I am discovering why it is not working.
Meanwhile this patch does not harm anything, it enables RD6281A usecase We can undo it latter if I could positively discover the fix ;-D
Regards.. Prafulla . .
regards, Ben
Wolfgang Denk
No problem. I assumed it was a chip erratum but should have looked closer. Let's wait for Prafulla's response.
Ideally auto negotiation must work, but :-( I don't think this is not for SoC/PHY erratum since both are working okay with other boards. Only the difference is on RD6281A the multichip mode is used, I am discovering why it is not working.
Meanwhile this patch does not harm anything, it enables RD6281A usecase We can undo it latter if I could positively discover the fix ;-D
I agree that need to be debug and fix but until Prafulla will found the bug, it will a least make the network working
maybe we could forced it at the runtime instead
Best Regards, J.
On Tue, Jul 21, 2009 at 12:01:49PM -0700, Prafulla Wadaskar wrote:
By default Auto Negotiation is enabled for interface speed but on some platforms like RD6281A it does not work. If you want to forced program it to desired speed, this
patch helps-
Through this patch Auto negotiation can be disabled and desired interface speed can be configured
This patch is tested on RD6281A Kirkwood board
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
Applied to net repo.
Please reconsider - see my previous comment. [Sorry it came
so late.]
Best regards,
Wolfgang Denk
No problem. I assumed it was a chip erratum but should have looked closer. Let's wait for Prafulla's response.
Ideally auto negotiation must work, but :-( I don't think this is not for SoC/PHY erratum since both are working okay with other boards. Only the difference is on RD6281A the multichip mode is used, I am discovering why it is not working.
Isn't it just because on the RD6281A, the first ethernet MAC of the CPU is connected to an ethernet switch chip instead of an ethernet PHY, and therefore there is no negotiation to be done? (The second MAC is connected to a PHY directly, so that one should just use autoneg.)
Even on the RD6281Z, we should just force the ethernet MAC to a fixed speed/duplex, since even though PHY polling might work there, we'll be talking to the PHY corresponding to the first switch port, which means that you might not be able to tftp from the second switch port or so if there's nothing plugged into the first one.
FWIW, the linux kernel port also forces 1000/full on the CPU MACs where a switch chip is connected. On those CPU MACs where there is a switch chip connected, the (R)(G)MII interface becomes purely a bus to transport packets into and out of the crossbar, one that is always up.
Prafulla,
Prafulla Wadaskar wrote:
With these fixes, this driver works properly for multi chip addressging mode
Bugfixes:
- Build error fixed for function mv88e61xx_busychk_multic-fixed
- PHY dev address error detection- fixed
- wrong busy bit was refered in function mv88e61xx_busychk -fixed
- invalid data read ptr was refered for RD_PHY in case of multichip addressing mode -fixed
The Multichip Address mode is tested with RD6281A board having MV88E6165 switch on it
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
Applied to net repo.
thanks, Ben
Dear Prafulla Wadaskar,
In message 1247758084-12296-4-git-send-email-prafulla@marvell.com you wrote:
With these fixes, this driver works properly for multi chip addressging mode
Bugfixes:
- Build error fixed for function mv88e61xx_busychk_multic-fixed
- PHY dev address error detection- fixed
- wrong busy bit was refered in function mv88e61xx_busychk -fixed
- invalid data read ptr was refered for RD_PHY in case of multichip addressing mode -fixed
The Multichip Address mode is tested with RD6281A board having MV88E6165 switch on it
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
drivers/net/phy/mv88e61xx.c | 18 +++++++++--------- drivers/net/phy/mv88e61xx.h | 2 +- 2 files changed, 10 insertions(+), 10 deletions(-)
This patch causes compiler warnings:
mv88e61xx.c: In function 'mv88e61xx_busychk_multic': mv88e61xx.c:46: warning: passing argument 4 of 'miiphy_read' from incompatible pointer type mv88e61xx.c: In function 'mv88e61xx_wr_phy': mv88e61xx.c:61: warning: passing argument 4 of 'miiphy_read' from incompatible pointer type mv88e61xx.c:57: warning: unused variable 'reg' mv88e61xx.c: In function 'mv88e61xx_rd_phy': mv88e61xx.c:80: warning: passing argument 4 of 'miiphy_read' from incompatible pointer type mv88e61xx.c:76: warning: unused variable 'reg'
(when building for the rd6281a board using ELDK 4.2, i. e. gcc-4.2.2)
Also, the rd6281a board throws this warning:
nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output!
Could you please provide fixes?
Thanks in advance.
Best regards,
Wolfgang Denk
Dear Prafulla Wadaskar,
In message 1247758084-12296-4-git-send-email-prafulla@marvell.com you wrote:
With these fixes, this driver works properly for multi chip addressging mode
Bugfixes:
- Build error fixed for function mv88e61xx_busychk_multic-fixed
- PHY dev address error detection- fixed
- wrong busy bit was refered in function mv88e61xx_busychk -fixed
- invalid data read ptr was refered for RD_PHY in case of multichip addressing mode -fixed
The Multichip Address mode is tested with RD6281A board having MV88E6165 switch on it
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
drivers/net/phy/mv88e61xx.c | 18 +++++++++--------- drivers/net/phy/mv88e61xx.h | 2 +- 2 files changed, 10 insertions(+), 10 deletions(-)
With ELDK 4.1 (gcc 4.0.0) I also get this compiler warning:
mv88e61xx.c: In function 'mv88e61xx_switch_initialize': mv88e61xx.c:346: warning: 'idstr' may be used uninitialized in this function
when building for the mv88f6281gtw_ge board.
This looks reasonabme, as
361 if (reg == 0x1610) 362 idstr = "88E6161"; 363 if (reg == 0x1650) 364 idstr = "88E6165"; 365 if (reg == 0x1210) { 366 idstr = "88E6123"; 367 /* ports 2,3,4 not available */ 368 swconfig->ports_enabled &= 0x023; 369 }
may ideed leave "idstr" uninitialized; you may want to change this into a switch() construct and add a default: case.
Best regards,
Wolfgang Denk
-----Original Message----- From: Wolfgang Denk [mailto:wd@denx.de] Sent: Monday, August 10, 2009 1:56 PM To: Prafulla Wadaskar Cc: Manas Saksena; Ronen Shitrit; Nicolas Pitre; Ben Warren; u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik; Lennert Buijtenhek Subject: Re: [U-Boot] [PATCH 4/6] net: phy: bugfixes: mv88E61xx multichip addressing support
Dear Prafulla Wadaskar,
In message 1247758084-12296-4-git-send-email-prafulla@marvell.com you wrote:
With these fixes, this driver works properly for multi chip addressging mode
Bugfixes:
- Build error fixed for function mv88e61xx_busychk_multic-fixed 2.
PHY dev address error detection- fixed 3. wrong busy bit
was refered
in function mv88e61xx_busychk -fixed 4. invalid data read ptr was refered for RD_PHY in case of multichip addressing mode -fixed
The Multichip Address mode is tested with RD6281A board having MV88E6165 switch on it
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
drivers/net/phy/mv88e61xx.c | 18 +++++++++--------- drivers/net/phy/mv88e61xx.h | 2 +- 2 files changed, 10 insertions(+), 10 deletions(-)
With ELDK 4.1 (gcc 4.0.0) I also get this compiler warning:
mv88e61xx.c: In function 'mv88e61xx_switch_initialize': mv88e61xx.c:346: warning: 'idstr' may be used uninitialized in this function
when building for the mv88f6281gtw_ge board.
This looks reasonabme, as
361 if (reg == 0x1610) 362 idstr = "88E6161"; 363 if (reg == 0x1650) 364 idstr = "88E6165"; 365 if (reg == 0x1210) { 366 idstr = "88E6123"; 367 /* ports 2,3,4 not available */ 368 swconfig->ports_enabled &= 0x023; 369 }
may ideed leave "idstr" uninitialized; you may want to change this into a switch() construct and add a default: case.
Thanks Bugfix patch posted for this Regards.. Prafulla . .
Best regards,
Wolfgang Denk
-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de Always try to do things in chronological order; it's less confusing that way.
1. mv88E61xx driver compiler warnings fixed 2. idstr if-else statements changed to switch() construct and added default case too. This fixed idstr may be uninitialized warning
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com --- drivers/net/phy/mv88e61xx.c | 23 ++++++++++++++--------- 1 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index 29630f5..3754e8b 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -38,7 +38,7 @@ */ static int mv88e61xx_busychk_multic(char *name, u32 devaddr) { - u32 reg = 0; + u16 reg = 0; u32 timeout = MV88E61XX_PHY_TIMEOUT;
/* Poll till SMIBusy bit is clear */ @@ -54,8 +54,7 @@ static int mv88e61xx_busychk_multic(char *name, u32 devaddr)
static void mv88e61xx_wr_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 data) { - u16 reg; - u32 mii_dev_addr; + u16 mii_dev_addr;
/* command to read PHY dev address */ if (miiphy_read(name, 0xEE, 0xEE, &mii_dev_addr)) { @@ -73,8 +72,7 @@ static void mv88e61xx_wr_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 data)
static void mv88e61xx_rd_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 * data) { - u16 reg; - u32 mii_dev_addr; + u16 mii_dev_addr;
/* command to read PHY dev address */ if (miiphy_read(name, 0xEE, 0xEE, &mii_dev_addr)) { @@ -357,15 +355,22 @@ int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig) }
RD_PHY(name, MV88E61XX_PRT_OFST, PHY_PHYIDR2, ®); - reg &= 0xfff0; - if (reg == 0x1610) + switch (reg &= 0xfff0) { + case 0x1610: idstr = "88E6161"; - if (reg == 0x1650) + break; + case 0x1650: idstr = "88E6165"; - if (reg == 0x1210) { + break; + case 0x1210: idstr = "88E6123"; /* ports 2,3,4 not available */ swconfig->ports_enabled &= 0x023; + break; + default: + /* Could not detect switch id */ + idstr = "88E61??"; + break; }
/* Port based VLANs configuration */
Prafulla,
Prafulla Wadaskar wrote:
- mv88E61xx driver compiler warnings fixed
- idstr if-else statements changed to switch() construct and added default case too. This fixed idstr may be uninitialized warning
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
Applied to net repo.
thanks, Ben
-----Original Message----- From: Wolfgang Denk [mailto:wd@denx.de] Sent: Monday, August 10, 2009 1:39 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Manas Saksena; Ronen Shitrit; Nicolas Pitre; Ashish Karkare; Prabhanjan Sarnaik; Lennert Buijtenhek; Ben Warren; Jean-Christophe Plagniol-Villard Subject: Re: [U-Boot] [PATCH 4/6] net: phy: bugfixes: mv88E61xx multichip addressing support
Dear Prafulla Wadaskar,
In message 1247758084-12296-4-git-send-email-prafulla@marvell.com you wrote:
With these fixes, this driver works properly for multi chip addressging mode
<snip..>
Also, the rd6281a board throws this warning:
nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output!
Patch posted for this Regards.. Prafulla . .
Could you please provide fixes?
Thanks in advance.
Best regards,
Wolfgang Denk
-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de "One thing they don't tell you about doing experimental physics is that sometimes you must work under adverse conditions... like a state of sheer terror." - W. K. Hartmann
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF for NAND specific warning removal, same is done in this patch
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com --- include/configs/rd6281a.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/configs/rd6281a.h b/include/configs/rd6281a.h index 3d8e25c..3f4d42c 100644 --- a/include/configs/rd6281a.h +++ b/include/configs/rd6281a.h @@ -107,6 +107,7 @@ #define NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE 0xD8000000 /* KW_DEFADR_NANDF */ #define NAND_ALLOW_ERASE_ALL 1 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif
/*
Dear Prafulla Wadaskar,
In message 1249910754-18169-1-git-send-email-prafulla@marvell.com you wrote:
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF for NAND specific warning removal, same is done in this patch
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
include/configs/rd6281a.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
On 20:58 Thu 16 Jul , Prafulla Wadaskar wrote:
This is Marvell's 88F6281_A0 based custom board developed for wireless access point product
This patch is tested for-
- Boot from DRAM/SPI flash/NFS
- File transfer using tftp and loadb
- SPI flash read/write/erase
- Booting Linux kernel and RFS from SPI flash
- Boot from USB supported
Reviewed-by: Ronen Shitrit rshitrit@marvell.com Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
applied to u-boot-arm
Best Regards, J.
-----Original Message----- From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagnioj@jcrosoft.com] Sent: Sunday, July 19, 2009 12:11 AM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Manas Saksena; Ronen Shitrit; Nicolas Pitre; Ashish Karkare; Prabhanjan Sarnaik; Lennert Buijtenhek Subject: Re: [U-Boot] [PATCH v13 3/6] Marvell MV88F6281GTW_GE Board support
On 20:58 Thu 16 Jul , Prafulla Wadaskar wrote:
This is Marvell's 88F6281_A0 based custom board developed
for wireless
access point product
This patch is tested for-
- Boot from DRAM/SPI flash/NFS
- File transfer using tftp and loadb
- SPI flash read/write/erase
- Booting Linux kernel and RFS from SPI flash 5. Boot from USB
supported
Reviewed-by: Ronen Shitrit rshitrit@marvell.com Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
applied to u-boot-arm
Thanks Jean.. Regards.. Prafulla . .
Best Regards, J.
On 20:58 Thu 16 Jul , Prafulla Wadaskar wrote:
Reference: http://plugcomputer.org/ http://openplug.org/plugwiki/index.php/Das_U-boot_plug_support
This patch is tested for-
- Boot from DRAM/NAND flash
- File transfer using tftp
- NAND flash read/write/erase
- Linux kernel and RFS Boot from NAND
- Enabled USB PHY init for kernel need
- Boot from USB supported
Note: to boot Kirkwood kernel with USB support, you should add "usb start" in the boot sequence
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
Applied to u-boot-arm
Best Regards, J.
-----Original Message----- From: Jean-Christophe PLAGNIOL-VILLARD [mailto:plagnioj@jcrosoft.com] Sent: Saturday, July 18, 2009 11:11 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Manas Saksena; Ronen Shitrit; Nicolas Pitre; Ashish Karkare; Prabhanjan Sarnaik; Lennert Buijtenhek Subject: Re: [U-Boot] [PATCH v7 2/6] Marvell Sheevaplug Board support
On 20:58 Thu 16 Jul , Prafulla Wadaskar wrote:
Reference: http://plugcomputer.org/ http://openplug.org/plugwiki/index.php/Das_U-boot_plug_support
This patch is tested for-
- Boot from DRAM/NAND flash
- File transfer using tftp
- NAND flash read/write/erase
- Linux kernel and RFS Boot from NAND 5. Enabled USB PHY init for
kernel need 6. Boot from USB supported
Note: to boot Kirkwood kernel with USB support, you should add "usb start" in the boot sequence
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
Applied to u-boot-arm
Thank you Jean.. Regards.. Prafulla . .
Best Regards, J.
Dear Prafulla Wadaskar,
In message 1247758084-12296-1-git-send-email-prafulla@marvell.com you wrote:
arranged configurations in alphabetical order CONFIG_CMD_FLASH moved under ifndef CONFIG_SYS_NO_FLASH
Signed-off-by: Prafulla Wadaskar prafulla@marvell.com
include/config_cmd_default.h | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
participants (6)
-
Ben Warren -
Dieter Kiermaier -
Jean-Christophe PLAGNIOL-VILLARD -
Lennert Buytenhek -
Prafulla Wadaskar -
Wolfgang Denk