Thanks, after a long google I figured it out. Will write a post about it on my blog.

On 9/19/13, Simon Glass sjg@chromium.org wrote:

Hi MJ,

On Mon, Sep 16, 2013 at 8:23 PM, MJ embd mj.embd@gmail.com wrote:

...

PS: Last message was sent without body, please ignore

0 down vote favorite

I am trying to understand a second level makefile of uboot (this makefile was in a sub directory)

a) What is the difference between $(COBJS:.o=.c) and COBJS := test_main.o

$(COBJS:.o=.c) means to evaluate $(COBJS) but replace every .o with .c

COBJS := test_main.o means that COBJS is assigned the value test_main.o

...

b) What is the meaning of $(call cmd_link_o_target, $(OBJS)). What is the cmd_link_o_target and what is the call statement doing

This is linking the object files together with a partial link (ld -r). See config.mk for the definition.

...

c) Does this line creating 2 targets ?

ALL := $(obj).depend $(LIB)

It defines variable ALL to be those two things (the depend file and the library). So that

all: $(ALL)

means that we need to build the depend file and the library.

...

===================================Makefile===================

include $(TOPDIR)/config.mk

LIB = $(obj)libtest.o

SOBJS := test.o

COBJS := test_main.o COBJS += diagnostic.o

SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))

ALL := $(obj).depend $(LIB)

all: $(ALL)

$(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS))

#########################################################################

# defines $(obj).depend target include $(SRCTREE)/rules.mk

sinclude $(obj).depend

#########################################################################

This might help a bit:

http://www.gnu.org/software/make/manual/make.html

Regards, Simon