[U-Boot] [PATCH v2 00/32] spi: DM_SPI migration timeout, remainder(2)
This series fix, build issues and comments from previous series [1].
We have not heard any positive feed back about dm-conversion on spi drivers along with no response for the work done by Akash and me.
Plan is to send the same series remainder recursively based on the dm conversion updates and finally merged into v2019.04 MW.
So expecting inputs from relevant developers to move their board/drivers to support DM_SPI.
- cf_spi, lpc32xx_ssp, mxs_spi, sh_spi, soft_spi_legacy, fsl_espi drivers are drooped with their respective CONFIG items. the spi/spi-flash usage commands still build but the used spi core function calls return 0. - non-dm code in davinci, kirkwood, ti_qspi, mpc8xxx, mxc, omap3, atmel, fsl_dspi drivers were drooped and u-boot build system will trigger warning for the same.
Note: - Let's discuss if any foot-print issues?
Any inputs, Jagan.
[1] https://patchwork.ozlabs.org/cover/1000444/
Jagan Teki (15): spi: davinci: Full dm conversion spi: kirkwood: Full dm conversion spi: ti_qspi: Full dm conversion spi: mpc8xxx: Convert to DM spi: Zap cf_spi driver-related code spi: Zap lpc32xx_ssp driver-related code spi: Zap mxs_spi driver-related code spi: Zap sh_spi driver-related code spi: Zap soft_spi_legacy driver-related code spi: mxc: Drop non-dm code spi: omap3: Drop non-dm code spi: atmel: Drop non-dm code spi: Zap fsl_espi driver-related code spi: fsl_dspi: Drop non-dm code dm: MIGRATION: spi: Update SPI driver status
Mario Six (17): spi: mpc8xxx: Use short type names spi: mpc8xxx: Fix comments spi: mpc8xxx: Rename camel-case variables spi: mpc8xxx: Fix space after cast spi: mpc8xxx: Fix function names in strings spi: mpc8xxx: Replace defines with enums spi: mpc8xxx: Use IO accessors spi: mpc8xxx: Simplify if spi: mpc8xxx: Get rid of is_read spi: mpc8xxx: Simplify logic a bit spi: mpc8xxx: Reduce scope of loop variables spi: mpc8xxx: Make code more readable spi: mpc8xxx: Rename variable spi: mpc8xxx: Document LEN setting better spi: mpc8xxx: Re-order transfer setup spi: mpc8xxx: Fix if check spi: mpc8xxx: Use get_timer
Makefile | 11 + arch/m68k/cpu/mcf5227x/cpu_init.c | 54 -- arch/m68k/cpu/mcf5445x/cpu_init.c | 113 ---- board/Arcturus/ucp1020/ucp1020.c | 6 + configs/M52277EVB_defconfig | 1 - configs/M52277EVB_stmicro_defconfig | 1 - configs/M54418TWR_defconfig | 1 - configs/M54418TWR_nand_mii_defconfig | 1 - configs/M54418TWR_nand_rmii_defconfig | 1 - configs/M54418TWR_nand_rmii_lowfreq_defconfig | 1 - configs/M54418TWR_serial_mii_defconfig | 1 - configs/M54418TWR_serial_rmii_defconfig | 1 - configs/M54451EVB_defconfig | 1 - configs/M54451EVB_stmicro_defconfig | 1 - configs/M54455EVB_a66_defconfig | 1 - configs/M54455EVB_defconfig | 1 - configs/M54455EVB_i66_defconfig | 1 - configs/M54455EVB_intel_defconfig | 1 - configs/M54455EVB_stm33_defconfig | 1 - configs/bg0900_defconfig | 1 - configs/devkit3250_defconfig | 1 - configs/mx28evk_auart_console_defconfig | 1 - configs/mx28evk_defconfig | 1 - configs/mx28evk_nand_defconfig | 1 - configs/mx28evk_spi_defconfig | 1 - configs/sh7752evb_defconfig | 1 - configs/sh7753evb_defconfig | 1 - configs/sh7757lcr_defconfig | 1 - configs/stmark2_defconfig | 1 - configs/work_92105_defconfig | 1 - doc/driver-model/MIGRATION.txt | 18 +- drivers/spi/Kconfig | 42 +- drivers/spi/Makefile | 22 +- drivers/spi/atmel_spi.c | 198 ------- drivers/spi/cf_spi.c | 335 ------------ drivers/spi/davinci_spi.c | 157 ------ drivers/spi/fsl_dspi.c | 132 ----- drivers/spi/fsl_espi.c | 383 -------------- drivers/spi/kirkwood_spi.c | 218 ++------ drivers/spi/lpc32xx_ssp.c | 134 ----- drivers/spi/mpc8xxx_spi.c | 279 ++++++---- drivers/spi/mxc_spi.c | 123 +---- drivers/spi/mxs_spi.c | 358 ------------- drivers/spi/omap3_spi.c | 126 ----- drivers/spi/sh_spi.c | 249 --------- drivers/spi/sh_spi.h | 67 --- drivers/spi/soft_spi_legacy.c | 168 ------ drivers/spi/spi.c | 38 ++ drivers/spi/ti_qspi.c | 490 +++++++----------- include/configs/M52277EVB.h | 1 - include/configs/M54418TWR.h | 1 - include/configs/M54451EVB.h | 1 - include/configs/M54455EVB.h | 1 - include/configs/MPC8349EMDS.h | 3 - include/configs/devkit3250.h | 5 - include/configs/sh7752evb.h | 3 - include/configs/sh7753evb.h | 3 - include/configs/sh7757lcr.h | 3 - include/configs/stmark2.h | 1 - include/configs/work_92105.h | 5 - include/configs/zipitz2.h | 1 - include/dm/platform_data/spi_kirkwood.h | 15 + include/dm/platform_data/spi_ti_qspi.h | 19 + scripts/config_whitelist.txt | 3 - 64 files changed, 502 insertions(+), 3310 deletions(-) delete mode 100644 drivers/spi/cf_spi.c delete mode 100644 drivers/spi/fsl_espi.c delete mode 100644 drivers/spi/lpc32xx_ssp.c delete mode 100644 drivers/spi/mxs_spi.c delete mode 100644 drivers/spi/sh_spi.c delete mode 100644 drivers/spi/sh_spi.h delete mode 100644 drivers/spi/soft_spi_legacy.c create mode 100644 include/dm/platform_data/spi_kirkwood.h create mode 100644 include/dm/platform_data/spi_ti_qspi.h
davinci_spi now support dt along with platform data, respective boards need to switch into dm for the same.
Cc: Adam Ford aford173@gmail.com Cc: Vitaly Andrianov vitalya@ti.com Cc: Stefano Babic sbabic@denx.de Cc: Peter Howard phoward@gme.net.au Cc: Tom Rini trini@konsulko.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Makefile | 9 +++ drivers/spi/Makefile | 2 +- drivers/spi/davinci_spi.c | 157 -------------------------------------- drivers/spi/spi.c | 38 +++++++++ 4 files changed, 48 insertions(+), 158 deletions(-)
diff --git a/Makefile b/Makefile index 552687db53..d06cb5c287 100644 --- a/Makefile +++ b/Makefile @@ -917,6 +917,15 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) @echo "(possibly in a subsequent patch in your series)" @echo "before sending patches to the mailing list." @echo "====================================================" +endif +ifeq ($(CONFIG_DM_SPI),) +ifeq ($(CONFIG_DAVINCI_SPI),y) + @echo "===================== WARNING ======================" + @echo "This board uses SPI driver from drivers/spi/ without" + @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" + @echo "otherwise SPI on this board, cannot work." + @echo "====================================================" +endif endif @# Check that this build does not use CONFIG options that we do not @# know about unless they are in Kconfig. All the existing CONFIG diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 7242ea7e40..cf5a5cccc0 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -6,6 +6,7 @@ # There are many options which enable SPI, so make this library available ifdef CONFIG_DM_SPI obj-y += spi-uclass.o +obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o @@ -22,7 +23,6 @@ obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o obj-$(CONFIG_CF_SPI) += cf_spi.o -obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 4d2c106440..c1646f6cdc 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -52,41 +52,6 @@ /* SPIDEF */ #define SPIDEF_CSDEF0_MASK BIT(0)
-#ifndef CONFIG_DM_SPI -#define SPI0_BUS 0 -#define SPI0_BASE CONFIG_SYS_SPI_BASE -/* - * Define default SPI0_NUM_CS as 1 for existing platforms that uses this - * driver. Platform can configure number of CS using CONFIG_SYS_SPI0_NUM_CS - * if more than one CS is supported and by defining CONFIG_SYS_SPI0. - */ -#ifndef CONFIG_SYS_SPI0 -#define SPI0_NUM_CS 1 -#else -#define SPI0_NUM_CS CONFIG_SYS_SPI0_NUM_CS -#endif - -/* - * define CONFIG_SYS_SPI1 when platform has spi-1 device (bus #1) and - * CONFIG_SYS_SPI1_NUM_CS defines number of CS on this bus - */ -#ifdef CONFIG_SYS_SPI1 -#define SPI1_BUS 1 -#define SPI1_NUM_CS CONFIG_SYS_SPI1_NUM_CS -#define SPI1_BASE CONFIG_SYS_SPI1_BASE -#endif - -/* - * define CONFIG_SYS_SPI2 when platform has spi-2 device (bus #2) and - * CONFIG_SYS_SPI2_NUM_CS defines number of CS on this bus - */ -#ifdef CONFIG_SYS_SPI2 -#define SPI2_BUS 2 -#define SPI2_NUM_CS CONFIG_SYS_SPI2_NUM_CS -#define SPI2_BASE CONFIG_SYS_SPI2_BASE -#endif -#endif - DECLARE_GLOBAL_DATA_PTR;
/* davinci spi register set */ @@ -119,9 +84,6 @@ struct davinci_spi_regs {
/* davinci spi slave */ struct davinci_spi_slave { -#ifndef CONFIG_DM_SPI - struct spi_slave slave; -#endif struct davinci_spi_regs *regs; unsigned int freq; /* current SPI bus frequency */ unsigned int mode; /* current SPI mode used */ @@ -343,124 +305,6 @@ out: return 0; }
-#ifndef CONFIG_DM_SPI - -static inline struct davinci_spi_slave *to_davinci_spi(struct spi_slave *slave) -{ - return container_of(slave, struct davinci_spi_slave, slave); -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - int ret = 0; - - switch (bus) { - case SPI0_BUS: - if (cs < SPI0_NUM_CS) - ret = 1; - break; -#ifdef CONFIG_SYS_SPI1 - case SPI1_BUS: - if (cs < SPI1_NUM_CS) - ret = 1; - break; -#endif -#ifdef CONFIG_SYS_SPI2 - case SPI2_BUS: - if (cs < SPI2_NUM_CS) - ret = 1; - break; -#endif - default: - /* Invalid bus number. Do nothing */ - break; - } - return ret; -} - -void spi_cs_activate(struct spi_slave *slave) -{ - /* do nothing */ -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - /* do nothing */ -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct davinci_spi_slave *ds; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - ds = spi_alloc_slave(struct davinci_spi_slave, bus, cs); - if (!ds) - return NULL; - - switch (bus) { - case SPI0_BUS: - ds->regs = (struct davinci_spi_regs *)SPI0_BASE; - break; -#ifdef CONFIG_SYS_SPI1 - case SPI1_BUS: - ds->regs = (struct davinci_spi_regs *)SPI1_BASE; - break; -#endif -#ifdef CONFIG_SYS_SPI2 - case SPI2_BUS: - ds->regs = (struct davinci_spi_regs *)SPI2_BASE; - break; -#endif - default: /* Invalid bus number */ - return NULL; - } - - ds->freq = max_hz; - ds->mode = mode; - - return &ds->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct davinci_spi_slave *ds = to_davinci_spi(slave); - - free(ds); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct davinci_spi_slave *ds = to_davinci_spi(slave); - - ds->cur_cs = slave->cs; - - return __davinci_spi_xfer(ds, bitlen, dout, din, flags); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct davinci_spi_slave *ds = to_davinci_spi(slave); - -#ifdef CONFIG_SPI_HALF_DUPLEX - ds->half_duplex = true; -#else - ds->half_duplex = false; -#endif - return __davinci_spi_claim_bus(ds, ds->slave.cs); -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct davinci_spi_slave *ds = to_davinci_spi(slave); - - __davinci_spi_release_bus(ds); -} - -#else static int davinci_spi_set_speed(struct udevice *bus, uint max_hz) { struct davinci_spi_slave *ds = dev_get_priv(bus); @@ -579,4 +423,3 @@ U_BOOT_DRIVER(davinci_spi) = { .ops = &davinci_spi_ops, .priv_auto_alloc_size = sizeof(struct davinci_spi_slave), }; -#endif diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 22910de0dd..4d1ade797b 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -38,3 +38,41 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
return ptr; } + +/** + * These are non-dm spi core operations, will remove once all driver + * converted into full driver model. + */ +__weak void spi_cs_activate(struct spi_slave *slave) +{ +} + +__weak void spi_cs_deactivate(struct spi_slave *slave) +{ +} + +__weak struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, + unsigned int mode) +{ + return NULL; +} + +__weak void spi_free_slave(struct spi_slave *slave) +{ +} + +__weak int spi_xfer(struct spi_slave *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + return 0; +} + +__weak int spi_claim_bus(struct spi_slave *slave) +{ + return 0; +} + +__weak void spi_release_bus(struct spi_slave *slave) +{ +}
On Sun, Nov 25, 2018 at 11:29 AM Jagan Teki jagan@amarulasolutions.com wrote:
davinci_spi now support dt along with platform data, respective boards need to switch into dm for the same.
Cc: Adam Ford aford173@gmail.com Cc: Vitaly Andrianov vitalya@ti.com Cc: Stefano Babic sbabic@denx.de Cc: Peter Howard phoward@gme.net.au Cc: Tom Rini trini@konsulko.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
Jagan,
I tried to apply the entire series against a clean origin/master, but it's not applying cleanly.
adam
Makefile | 9 +++ drivers/spi/Makefile | 2 +- drivers/spi/davinci_spi.c | 157 -------------------------------------- drivers/spi/spi.c | 38 +++++++++ 4 files changed, 48 insertions(+), 158 deletions(-)
diff --git a/Makefile b/Makefile index 552687db53..d06cb5c287 100644 --- a/Makefile +++ b/Makefile @@ -917,6 +917,15 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) @echo "(possibly in a subsequent patch in your series)" @echo "before sending patches to the mailing list." @echo "====================================================" +endif +ifeq ($(CONFIG_DM_SPI),) +ifeq ($(CONFIG_DAVINCI_SPI),y)
@echo "===================== WARNING ======================"@echo "This board uses SPI driver from drivers/spi/ without"@echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI"@echo "otherwise SPI on this board, cannot work."@echo "===================================================="+endif endif @# Check that this build does not use CONFIG options that we do not @# know about unless they are in Kconfig. All the existing CONFIG diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 7242ea7e40..cf5a5cccc0 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -6,6 +6,7 @@ # There are many options which enable SPI, so make this library available ifdef CONFIG_DM_SPI obj-y += spi-uclass.o +obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o @@ -22,7 +23,6 @@ obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o obj-$(CONFIG_CF_SPI) += cf_spi.o -obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 4d2c106440..c1646f6cdc 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -52,41 +52,6 @@ /* SPIDEF */ #define SPIDEF_CSDEF0_MASK BIT(0)
-#ifndef CONFIG_DM_SPI -#define SPI0_BUS 0 -#define SPI0_BASE CONFIG_SYS_SPI_BASE -/*
- Define default SPI0_NUM_CS as 1 for existing platforms that uses this
- driver. Platform can configure number of CS using CONFIG_SYS_SPI0_NUM_CS
- if more than one CS is supported and by defining CONFIG_SYS_SPI0.
- */
-#ifndef CONFIG_SYS_SPI0 -#define SPI0_NUM_CS 1 -#else -#define SPI0_NUM_CS CONFIG_SYS_SPI0_NUM_CS -#endif
-/*
- define CONFIG_SYS_SPI1 when platform has spi-1 device (bus #1) and
- CONFIG_SYS_SPI1_NUM_CS defines number of CS on this bus
- */
-#ifdef CONFIG_SYS_SPI1 -#define SPI1_BUS 1 -#define SPI1_NUM_CS CONFIG_SYS_SPI1_NUM_CS -#define SPI1_BASE CONFIG_SYS_SPI1_BASE -#endif
-/*
- define CONFIG_SYS_SPI2 when platform has spi-2 device (bus #2) and
- CONFIG_SYS_SPI2_NUM_CS defines number of CS on this bus
- */
-#ifdef CONFIG_SYS_SPI2 -#define SPI2_BUS 2 -#define SPI2_NUM_CS CONFIG_SYS_SPI2_NUM_CS -#define SPI2_BASE CONFIG_SYS_SPI2_BASE -#endif -#endif
DECLARE_GLOBAL_DATA_PTR;
/* davinci spi register set */ @@ -119,9 +84,6 @@ struct davinci_spi_regs {
/* davinci spi slave */ struct davinci_spi_slave { -#ifndef CONFIG_DM_SPI
struct spi_slave slave;-#endif struct davinci_spi_regs *regs; unsigned int freq; /* current SPI bus frequency */ unsigned int mode; /* current SPI mode used */ @@ -343,124 +305,6 @@ out: return 0; }
-#ifndef CONFIG_DM_SPI
-static inline struct davinci_spi_slave *to_davinci_spi(struct spi_slave *slave) -{
return container_of(slave, struct davinci_spi_slave, slave);-}
-int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{
int ret = 0;switch (bus) {case SPI0_BUS:if (cs < SPI0_NUM_CS)ret = 1;break;-#ifdef CONFIG_SYS_SPI1
case SPI1_BUS:if (cs < SPI1_NUM_CS)ret = 1;break;-#endif -#ifdef CONFIG_SYS_SPI2
case SPI2_BUS:if (cs < SPI2_NUM_CS)ret = 1;break;-#endif
default:/* Invalid bus number. Do nothing */break;}return ret;-}
-void spi_cs_activate(struct spi_slave *slave) -{
/* do nothing */-}
-void spi_cs_deactivate(struct spi_slave *slave) -{
/* do nothing */-}
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)-{
struct davinci_spi_slave *ds;if (!spi_cs_is_valid(bus, cs))return NULL;ds = spi_alloc_slave(struct davinci_spi_slave, bus, cs);if (!ds)return NULL;switch (bus) {case SPI0_BUS:ds->regs = (struct davinci_spi_regs *)SPI0_BASE;break;-#ifdef CONFIG_SYS_SPI1
case SPI1_BUS:ds->regs = (struct davinci_spi_regs *)SPI1_BASE;break;-#endif -#ifdef CONFIG_SYS_SPI2
case SPI2_BUS:ds->regs = (struct davinci_spi_regs *)SPI2_BASE;break;-#endif
default: /* Invalid bus number */return NULL;}ds->freq = max_hz;ds->mode = mode;return &ds->slave;-}
-void spi_free_slave(struct spi_slave *slave) -{
struct davinci_spi_slave *ds = to_davinci_spi(slave);free(ds);-}
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout, void *din, unsigned long flags)-{
struct davinci_spi_slave *ds = to_davinci_spi(slave);ds->cur_cs = slave->cs;return __davinci_spi_xfer(ds, bitlen, dout, din, flags);-}
-int spi_claim_bus(struct spi_slave *slave) -{
struct davinci_spi_slave *ds = to_davinci_spi(slave);-#ifdef CONFIG_SPI_HALF_DUPLEX
ds->half_duplex = true;-#else
ds->half_duplex = false;-#endif
return __davinci_spi_claim_bus(ds, ds->slave.cs);-}
-void spi_release_bus(struct spi_slave *slave) -{
struct davinci_spi_slave *ds = to_davinci_spi(slave);__davinci_spi_release_bus(ds);-}
-#else static int davinci_spi_set_speed(struct udevice *bus, uint max_hz) { struct davinci_spi_slave *ds = dev_get_priv(bus); @@ -579,4 +423,3 @@ U_BOOT_DRIVER(davinci_spi) = { .ops = &davinci_spi_ops, .priv_auto_alloc_size = sizeof(struct davinci_spi_slave), }; -#endif diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 22910de0dd..4d1ade797b 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -38,3 +38,41 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
return ptr;}
+/**
- These are non-dm spi core operations, will remove once all driver
- converted into full driver model.
- */
+__weak void spi_cs_activate(struct spi_slave *slave) +{ +}
+__weak void spi_cs_deactivate(struct spi_slave *slave) +{ +}
+__weak struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz,unsigned int mode)+{
return NULL;+}
+__weak void spi_free_slave(struct spi_slave *slave) +{ +}
+__weak int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout, void *din, unsigned long flags)+{
return 0;+}
+__weak int spi_claim_bus(struct spi_slave *slave) +{
return 0;+}
+__weak void spi_release_bus(struct spi_slave *slave) +{
+}
2.18.0.321.gffc6fa0e3
On Mon, Nov 26, 2018 at 7:03 PM Adam Ford aford173@gmail.com wrote:
On Sun, Nov 25, 2018 at 11:29 AM Jagan Teki jagan@amarulasolutions.com wrote:
davinci_spi now support dt along with platform data, respective boards need to switch into dm for the same.
Cc: Adam Ford aford173@gmail.com Cc: Vitaly Andrianov vitalya@ti.com Cc: Stefano Babic sbabic@denx.de Cc: Peter Howard phoward@gme.net.au Cc: Tom Rini trini@konsulko.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
Jagan,
I tried to apply the entire series against a clean origin/master, but it's not applying cleanly.
Yeah.. I have few patches before. anyway use spi-dm-migrate branch.
On Mon, Nov 26, 2018 at 12:20 PM Jagan Teki jagan@amarulasolutions.com wrote:
On Mon, Nov 26, 2018 at 7:03 PM Adam Ford aford173@gmail.com wrote:
On Sun, Nov 25, 2018 at 11:29 AM Jagan Teki jagan@amarulasolutions.com wrote:
davinci_spi now support dt along with platform data, respective boards need to switch into dm for the same.
Cc: Adam Ford aford173@gmail.com Cc: Vitaly Andrianov vitalya@ti.com Cc: Stefano Babic sbabic@denx.de Cc: Peter Howard phoward@gme.net.au Cc: Tom Rini trini@konsulko.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
Jagan,
I tried to apply the entire series against a clean origin/master, but it's not applying cleanly.
Yeah.. I have few patches before. anyway use spi-dm-migrate branch.
I had to apply a pending patch [1] to make it work. Scripts/get_maintainer didn't flag you as a CC, but since I have your attention, can you pull in [1]? With that, I can read/write to SPI Flash again.
[1] - https://patchwork.ozlabs.org/patch/1000533/
With that other patch applied, go ahead and add
Tested-by: Adam Ford aford173@gmail.com #da850_evm
kirkwood now support dt along with platform data, respective boards need to switch into dm for the same.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Makefile | 2 +- drivers/spi/Makefile | 2 +- drivers/spi/kirkwood_spi.c | 218 ++++-------------------- include/dm/platform_data/spi_kirkwood.h | 15 ++ 4 files changed, 47 insertions(+), 190 deletions(-) create mode 100644 include/dm/platform_data/spi_kirkwood.h
diff --git a/Makefile b/Makefile index d06cb5c287..214f1bcdbf 100644 --- a/Makefile +++ b/Makefile @@ -919,7 +919,7 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) @echo "====================================================" endif ifeq ($(CONFIG_DM_SPI),) -ifeq ($(CONFIG_DAVINCI_SPI),y) +ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index cf5a5cccc0..3c74418992 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -7,6 +7,7 @@ ifdef CONFIG_DM_SPI obj-y += spi-uclass.o obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o +obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o @@ -29,7 +30,6 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o obj-$(CONFIG_ICH_SPI) += ich.o -obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 5dd1ad67cf..c8b2a5a07b 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -13,31 +13,41 @@ #include <spi.h> #include <asm/io.h> #include <asm/arch/soc.h> -#ifdef CONFIG_KIRKWOOD -#include <asm/arch/mpp.h> -#endif #include <asm/arch-mvebu/spi.h>
-static void _spi_cs_activate(struct kwspi_registers *reg) +#include <dm/platform_data/spi_kirkwood.h> + +struct mvebu_spi_dev { + bool is_errata_50mhz_ac; +}; + +struct mvebu_spi_priv { + struct kwspi_registers *spireg; +}; + +static void spi_cs_activate(struct kwspi_registers *reg) { setbits_le32(®->ctrl, KWSPI_CSN_ACT); }
-static void _spi_cs_deactivate(struct kwspi_registers *reg) +static void spi_cs_deactivate(struct kwspi_registers *reg) { clrbits_le32(®->ctrl, KWSPI_CSN_ACT); }
-static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) +static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) { + struct udevice *bus = dev->parent; + struct mvebu_spi_platdata *plat = dev_get_platdata(bus); + struct kwspi_registers *reg = plat->spireg; unsigned int tmpdout, tmpdin; int tm, isread = 0;
- debug("spi_xfer: dout %p din %p bitlen %u\n", dout, din, bitlen); + debug("%s: dout %p din %p bitlen %u\n", __func__, dout, din, bitlen);
if (flags & SPI_XFER_BEGIN) - _spi_cs_activate(reg); + spi_cs_activate(reg);
/* * handle data in 8-bit chunks @@ -55,8 +65,8 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen,
clrbits_le32(®->irq_cause, KWSPI_SMEMRDIRQ); writel(tmpdout, ®->dout); /* Write the data out */ - debug("*** spi_xfer: ... %08x written, bitlen %d\n", - tmpdout, bitlen); + debug("%s: ... %08x written, bitlen %d\n", + __func__, tmpdout, bitlen);
/* * Wait for SPI transmit to get out @@ -67,8 +77,8 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, if (readl(®->irq_cause) & KWSPI_SMEMRDIRQ) { isread = 1; tmpdin = readl(®->din); - debug("spi_xfer: din %p..%08x read\n", - din, tmpdin); + debug("%s: din %p..%08x read\n", + __func__, din, tmpdin);
if (din) { *((u8 *)din) = (u8)tmpdin; @@ -82,179 +92,17 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, break; } if (tm >= KWSPI_TIMEOUT) - printf("*** spi_xfer: Time out during SPI transfer\n"); + printf("%s: Time out during SPI transfer\n", __func__);
debug("loopend bitlen %d\n", bitlen); }
if (flags & SPI_XFER_END) - _spi_cs_deactivate(reg); - - return 0; -} - -#ifndef CONFIG_DM_SPI - -static struct kwspi_registers *spireg = - (struct kwspi_registers *)MVEBU_SPI_BASE; - -#ifdef CONFIG_KIRKWOOD -static u32 cs_spi_mpp_back[2]; -#endif - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct spi_slave *slave; - u32 data; -#ifdef CONFIG_KIRKWOOD - static const u32 kwspi_mpp_config[2][2] = { - { MPP0_SPI_SCn, 0 }, /* if cs == 0 */ - { MPP7_SPI_SCn, 0 } /* if cs != 0 */ - }; -#endif - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - slave = spi_alloc_slave_base(bus, cs); - if (!slave) - return NULL; - - writel(KWSPI_SMEMRDY, &spireg->ctrl); + spi_cs_deactivate(reg);
- /* calculate spi clock prescaller using max_hz */ - data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10; - data = data < KWSPI_CLKPRESCL_MIN ? KWSPI_CLKPRESCL_MIN : data; - data = data > KWSPI_CLKPRESCL_MASK ? KWSPI_CLKPRESCL_MASK : data; - - /* program spi clock prescaller using max_hz */ - writel(KWSPI_ADRLEN_3BYTE | data, &spireg->cfg); - debug("data = 0x%08x\n", data); - - writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause); - writel(KWSPI_IRQMASK, &spireg->irq_mask); - -#ifdef CONFIG_KIRKWOOD - /* program mpp registers to select SPI_CSn */ - kirkwood_mpp_conf(kwspi_mpp_config[cs ? 1 : 0], cs_spi_mpp_back); -#endif - - return slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ -#ifdef CONFIG_KIRKWOOD - kirkwood_mpp_conf(cs_spi_mpp_back, NULL); -#endif - free(slave); -} - -#if defined(CONFIG_SYS_KW_SPI_MPP) -u32 spi_mpp_backup[4]; -#endif - -__attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave) -{ return 0; }
-int spi_claim_bus(struct spi_slave *slave) -{ -#if defined(CONFIG_SYS_KW_SPI_MPP) - u32 config; - u32 spi_mpp_config[4]; - - config = CONFIG_SYS_KW_SPI_MPP; - - if (config & MOSI_MPP6) - spi_mpp_config[0] = MPP6_SPI_MOSI; - else - spi_mpp_config[0] = MPP1_SPI_MOSI; - - if (config & SCK_MPP10) - spi_mpp_config[1] = MPP10_SPI_SCK; - else - spi_mpp_config[1] = MPP2_SPI_SCK; - - if (config & MISO_MPP11) - spi_mpp_config[2] = MPP11_SPI_MISO; - else - spi_mpp_config[2] = MPP3_SPI_MISO; - - spi_mpp_config[3] = 0; - spi_mpp_backup[3] = 0; - - /* set new spi mpp and save current mpp config */ - kirkwood_mpp_conf(spi_mpp_config, spi_mpp_backup); -#endif - - return board_spi_claim_bus(slave); -} - -__attribute__((weak)) void board_spi_release_bus(struct spi_slave *slave) -{ -} - -void spi_release_bus(struct spi_slave *slave) -{ -#if defined(CONFIG_SYS_KW_SPI_MPP) - kirkwood_mpp_conf(spi_mpp_backup, NULL); -#endif - - board_spi_release_bus(slave); -} - -#ifndef CONFIG_SPI_CS_IS_VALID -/* - * you can define this function board specific - * define above CONFIG in board specific config file and - * provide the function in board specific src file - */ -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return bus == 0 && (cs == 0 || cs == 1); -} -#endif - -void spi_init(void) -{ -} - -void spi_cs_activate(struct spi_slave *slave) -{ - _spi_cs_activate(spireg); -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - _spi_cs_deactivate(spireg); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - return _spi_xfer(spireg, bitlen, dout, din, flags); -} - -#else - -/* Here now the DM part */ - -struct mvebu_spi_dev { - bool is_errata_50mhz_ac; -}; - -struct mvebu_spi_platdata { - struct kwspi_registers *spireg; - bool is_errata_50mhz_ac; -}; - -struct mvebu_spi_priv { - struct kwspi_registers *spireg; -}; - static int mvebu_spi_set_speed(struct udevice *bus, uint hz) { struct mvebu_spi_platdata *plat = dev_get_platdata(bus); @@ -329,15 +177,6 @@ static int mvebu_spi_set_mode(struct udevice *bus, uint mode) return 0; }
-static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct udevice *bus = dev->parent; - struct mvebu_spi_platdata *plat = dev_get_platdata(bus); - - return _spi_xfer(plat->spireg, bitlen, dout, din, flags); -} - static int mvebu_spi_claim_bus(struct udevice *dev) { struct udevice *bus = dev->parent; @@ -363,6 +202,7 @@ static int mvebu_spi_probe(struct udevice *bus) return 0; }
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) static int mvebu_spi_ofdata_to_platdata(struct udevice *bus) { struct mvebu_spi_platdata *plat = dev_get_platdata(bus); @@ -421,15 +261,17 @@ static const struct udevice_id mvebu_spi_ids[] = { }, { } }; +#endif
U_BOOT_DRIVER(mvebu_spi) = { .name = "mvebu_spi", .id = UCLASS_SPI, +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .of_match = mvebu_spi_ids, - .ops = &mvebu_spi_ops, .ofdata_to_platdata = mvebu_spi_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct mvebu_spi_platdata), +#endif + .ops = &mvebu_spi_ops, .priv_auto_alloc_size = sizeof(struct mvebu_spi_priv), .probe = mvebu_spi_probe, }; -#endif diff --git a/include/dm/platform_data/spi_kirkwood.h b/include/dm/platform_data/spi_kirkwood.h new file mode 100644 index 0000000000..ae9b2783a9 --- /dev/null +++ b/include/dm/platform_data/spi_kirkwood.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __spi_kirkwood_h +#define __spi_kirkwood_h + +struct mvebu_spi_platdata { + struct kwspi_registers *spireg; + bool is_errata_50mhz_ac; +}; + +#endif /* __spi_kirkwood_h */
ti_qspi now support dt along with platform data, respective boards need to switch into dm for the same.
Cc: Tom Rini trini@konsulko.com Cc: Vitaly Andrianov vitalya@ti.com Cc: Peter Howard phoward@gme.net.au Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Makefile | 2 +- drivers/spi/Makefile | 2 +- drivers/spi/ti_qspi.c | 490 +++++++++---------------- include/dm/platform_data/spi_ti_qspi.h | 19 + 4 files changed, 198 insertions(+), 315 deletions(-) create mode 100644 include/dm/platform_data/spi_ti_qspi.h
diff --git a/Makefile b/Makefile index 214f1bcdbf..efa68e7343 100644 --- a/Makefile +++ b/Makefile @@ -919,7 +919,7 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) @echo "====================================================" endif ifeq ($(CONFIG_DM_SPI),) -ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI),y),y) +ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_TI_QSPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 3c74418992..748d9a90ab 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o +obj-$(CONFIG_TI_QSPI) += ti_qspi.o else obj-y += spi.o obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o @@ -52,7 +53,6 @@ obj-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o obj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o obj-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o obj-$(CONFIG_TEGRA210_QSPI) += tegra210_qspi.o -obj-$(CONFIG_TI_QSPI) += ti_qspi.o obj-$(CONFIG_XILINX_SPI) += xilinx_spi.o obj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o obj-$(CONFIG_ZYNQ_QSPI) += zynq_qspi.o diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 2dcce66de0..7235554003 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -19,6 +19,8 @@ #include <regmap.h> #include <syscon.h>
+#include <dm/platform_data/spi_ti_qspi.h> + DECLARE_GLOBAL_DATA_PTR;
/* ti qpsi register bit masks */ @@ -33,17 +35,17 @@ DECLARE_GLOBAL_DATA_PTR; #define QSPI_CLK_DIV_MAX 0xffff /* command */ #define QSPI_EN_CS(n) (n << 28) -#define QSPI_WLEN(n) ((n-1) << 19) +#define QSPI_WLEN(n) ((n - 1) << 19) #define QSPI_3_PIN BIT(18) #define QSPI_RD_SNGL BIT(16) #define QSPI_WR_SNGL (2 << 16) #define QSPI_INVAL (4 << 16) #define QSPI_RD_QUAD (7 << 16) /* device control */ -#define QSPI_DD(m, n) (m << (3 + n*8)) -#define QSPI_CKPHA(n) (1 << (2 + n*8)) -#define QSPI_CSPOL(n) (1 << (1 + n*8)) -#define QSPI_CKPOL(n) (1 << (n*8)) +#define QSPI_DD(m, n) (m << (3 + n * 8)) +#define QSPI_CKPHA(n) (1 << (2 + n * 8)) +#define QSPI_CSPOL(n) (1 << (1 + n * 8)) +#define QSPI_CKPOL(n) (1 << (n * 8)) /* status */ #define QSPI_WC BIT(1) #define QSPI_BUSY BIT(0) @@ -98,13 +100,9 @@ struct ti_qspi_regs {
/* ti qspi priv */ struct ti_qspi_priv { -#ifndef CONFIG_DM_SPI - struct spi_slave slave; -#else void *memory_map; uint max_hz; u32 num_cs; -#endif struct ti_qspi_regs *base; void *ctrl_mod_mmap; ulong fclk; @@ -113,37 +111,113 @@ struct ti_qspi_priv { u32 dc; };
-static void ti_spi_set_speed(struct ti_qspi_priv *priv, uint hz) +/* TODO: control from sf layer to here through dm-spi */ +#if defined(CONFIG_TI_EDMA3) && !defined(CONFIG_DMA) +void spi_flash_copy_mmap(void *data, void *offset, size_t len) +{ + unsigned int addr = (unsigned int)(data); + unsigned int edma_slot_num = 1; + + /* Invalidate the area, so no writeback into the RAM races with DMA */ + invalidate_dcache_range(addr, addr + roundup(len, ARCH_DMA_MINALIGN)); + + /* enable edma3 clocks */ + enable_edma3_clocks(); + + /* Call edma3 api to do actual DMA transfer */ + edma3_transfer(EDMA3_BASE, edma_slot_num, data, offset, len); + + /* disable edma3 clocks */ + disable_edma3_clocks(); + + *((unsigned int *)offset) += len; +} +#endif + +static void ti_qspi_cs_deactivate(struct ti_qspi_priv *priv) +{ + writel(priv->cmd | QSPI_INVAL, &priv->base->cmd); + /* dummy readl to ensure bus sync */ + readl(&priv->base->cmd); +} + +static void ti_qspi_ctrl_mode_mmap(void *ctrl_mod_mmap, int cs, bool enable) +{ + u32 val; + + val = readl(ctrl_mod_mmap); + if (enable) + val |= MEM_CS(cs); + else + val &= MEM_CS_UNSELECT; + writel(val, ctrl_mod_mmap); +} + +static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, + struct spi_slave *slave, + bool enable) +{ + u32 memval; + u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL); + + if (!enable) { + writel(0, &priv->base->setup0); + return; + } + + memval = QSPI_SETUP0_NUM_A_BYTES | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS; + + switch (mode) { + case SPI_RX_QUAD: + memval |= QSPI_CMD_READ_QUAD; + memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; + memval |= QSPI_SETUP0_READ_QUAD; + slave->mode |= SPI_RX_QUAD; + break; + case SPI_RX_DUAL: + memval |= QSPI_CMD_READ_DUAL; + memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; + memval |= QSPI_SETUP0_READ_DUAL; + break; + default: + memval |= QSPI_CMD_READ; + memval |= QSPI_SETUP0_NUM_D_BYTES_NO_BITS; + memval |= QSPI_SETUP0_READ_NORMAL; + break; + } + + writel(memval, &priv->base->setup0); +} + +static int ti_qspi_set_speed(struct udevice *bus, uint max_hz) { + struct ti_qspi_priv *priv = dev_get_priv(bus); uint clk_div;
- if (!hz) + if (!max_hz) clk_div = 0; else - clk_div = DIV_ROUND_UP(priv->fclk, hz) - 1; + clk_div = DIV_ROUND_UP(priv->fclk, max_hz) - 1;
/* truncate clk_div value to QSPI_CLK_DIV_MAX */ if (clk_div > QSPI_CLK_DIV_MAX) clk_div = QSPI_CLK_DIV_MAX;
- debug("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div); + debug("%s: max_hz: %d, clock divider %d\n", __func__, max_hz, clk_div);
/* disable SCLK */ writel(readl(&priv->base->clk_ctrl) & ~QSPI_CLK_EN, &priv->base->clk_ctrl); /* enable SCLK and program the clk divider */ writel(QSPI_CLK_EN | clk_div, &priv->base->clk_ctrl); -}
-static void ti_qspi_cs_deactivate(struct ti_qspi_priv *priv) -{ - writel(priv->cmd | QSPI_INVAL, &priv->base->cmd); - /* dummy readl to ensure bus sync */ - readl(&priv->base->cmd); + return 0; }
-static int __ti_qspi_set_mode(struct ti_qspi_priv *priv, unsigned int mode) +static int ti_qspi_set_mode(struct udevice *bus, uint mode) { + struct ti_qspi_priv *priv = dev_get_priv(bus); + priv->dc = 0; if (mode & SPI_CPHA) priv->dc |= QSPI_CKPHA(0); @@ -155,57 +229,83 @@ static int __ti_qspi_set_mode(struct ti_qspi_priv *priv, unsigned int mode) return 0; }
-static int __ti_qspi_claim_bus(struct ti_qspi_priv *priv, int cs) +static int ti_qspi_claim_bus(struct udevice *dev) { + struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); + struct spi_slave *slave = dev_get_parent_priv(dev); + struct ti_qspi_priv *priv; + struct udevice *bus; + + bus = dev->parent; + priv = dev_get_priv(bus); + + if (slave_plat->cs > priv->num_cs) { + debug("invalid qspi chip select\n"); + return -EINVAL; + } + + __ti_qspi_setup_memorymap(priv, slave, true); + writel(priv->dc, &priv->base->dc); writel(0, &priv->base->cmd); writel(0, &priv->base->data);
- priv->dc <<= cs * 8; + priv->dc <<= slave_plat->cs * 8; writel(priv->dc, &priv->base->dc);
return 0; }
-static void __ti_qspi_release_bus(struct ti_qspi_priv *priv) +static int ti_qspi_release_bus(struct udevice *dev) { + struct spi_slave *slave = dev_get_parent_priv(dev); + struct ti_qspi_priv *priv; + struct udevice *bus; + + bus = dev->parent; + priv = dev_get_priv(bus); + + __ti_qspi_setup_memorymap(priv, slave, false); + writel(0, &priv->base->dc); writel(0, &priv->base->cmd); writel(0, &priv->base->data); -} - -static void ti_qspi_ctrl_mode_mmap(void *ctrl_mod_mmap, int cs, bool enable) -{ - u32 val;
- val = readl(ctrl_mod_mmap); - if (enable) - val |= MEM_CS(cs); - else - val &= MEM_CS_UNSELECT; - writel(val, ctrl_mod_mmap); + return 0; }
-static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen, - const void *dout, void *din, unsigned long flags, - u32 cs) +static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) { - uint words = bitlen >> 3; /* fixed 8-bit word length */ const uchar *txp = dout; + struct dm_spi_slave_platdata *slave = dev_get_parent_platdata(dev); + uint words = bitlen >> 3; /* fixed 8-bit word length */ uchar *rxp = din; + struct ti_qspi_priv *priv; + struct udevice *bus; uint status; int timeout;
+ bus = dev->parent; + priv = dev_get_priv(bus); + + if (slave->cs > priv->num_cs) { + debug("invalid qspi chip select\n"); + return -EINVAL; + } + /* Setup mmap flags */ if (flags & SPI_XFER_MMAP) { writel(MM_SWITCH, &priv->base->memswitch); if (priv->ctrl_mod_mmap) - ti_qspi_ctrl_mode_mmap(priv->ctrl_mod_mmap, cs, true); + ti_qspi_ctrl_mode_mmap(priv->ctrl_mod_mmap, + slave->cs, true); return 0; } else if (flags & SPI_XFER_MMAP_END) { writel(~MM_SWITCH, &priv->base->memswitch); if (priv->ctrl_mod_mmap) - ti_qspi_ctrl_mode_mmap(priv->ctrl_mod_mmap, cs, false); + ti_qspi_ctrl_mode_mmap(priv->ctrl_mod_mmap, + slave->cs, false); return 0; }
@@ -220,7 +320,7 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen, /* Setup command reg */ priv->cmd = 0; priv->cmd |= QSPI_WLEN(8); - priv->cmd |= QSPI_EN_CS(cs); + priv->cmd |= QSPI_EN_CS(slave->cs); if (priv->mode & SPI_3WIRE) priv->cmd |= QSPI_3_PIN; priv->cmd |= 0xfff; @@ -281,7 +381,7 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen, *rxp++ = readl(&priv->base->data); xfer_len = 1; debug("rx done, status %08x, read %02x\n", - status, *(rxp-1)); + status, *(rxp - 1)); } words -= xfer_len; } @@ -293,263 +393,40 @@ static int __ti_qspi_xfer(struct ti_qspi_priv *priv, unsigned int bitlen, return 0; }
-/* TODO: control from sf layer to here through dm-spi */ -#if defined(CONFIG_TI_EDMA3) && !defined(CONFIG_DMA) -void spi_flash_copy_mmap(void *data, void *offset, size_t len) -{ - unsigned int addr = (unsigned int) (data); - unsigned int edma_slot_num = 1; - - /* Invalidate the area, so no writeback into the RAM races with DMA */ - invalidate_dcache_range(addr, addr + roundup(len, ARCH_DMA_MINALIGN)); - - /* enable edma3 clocks */ - enable_edma3_clocks(); - - /* Call edma3 api to do actual DMA transfer */ - edma3_transfer(EDMA3_BASE, edma_slot_num, data, offset, len); - - /* disable edma3 clocks */ - disable_edma3_clocks(); - - *((unsigned int *)offset) += len; -} -#endif - -#ifndef CONFIG_DM_SPI - -static inline struct ti_qspi_priv *to_ti_qspi_priv(struct spi_slave *slave) -{ - return container_of(slave, struct ti_qspi_priv, slave); -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return 1; -} - -void spi_cs_activate(struct spi_slave *slave) -{ - /* CS handled in xfer */ - return; -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - struct ti_qspi_priv *priv = to_ti_qspi_priv(slave); - ti_qspi_cs_deactivate(priv); -} - -void spi_init(void) -{ - /* nothing to do */ -} - -static void ti_spi_setup_spi_register(struct ti_qspi_priv *priv) -{ - u32 memval = 0; - -#ifdef CONFIG_QSPI_QUAD_SUPPORT - struct spi_slave *slave = &priv->slave; - memval |= (QSPI_CMD_READ_QUAD | QSPI_SETUP0_NUM_A_BYTES | - QSPI_SETUP0_NUM_D_BYTES_8_BITS | - QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | - QSPI_NUM_DUMMY_BITS); - slave->mode |= SPI_RX_QUAD; -#else - memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | - QSPI_SETUP0_NUM_D_BYTES_NO_BITS | - QSPI_SETUP0_READ_NORMAL | QSPI_CMD_WRITE | - QSPI_NUM_DUMMY_BITS; -#endif - - writel(memval, &priv->base->setup0); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct ti_qspi_priv *priv; - -#ifdef CONFIG_AM43XX - gpio_request(CONFIG_QSPI_SEL_GPIO, "qspi_gpio"); - gpio_direction_output(CONFIG_QSPI_SEL_GPIO, 1); -#endif - - priv = spi_alloc_slave(struct ti_qspi_priv, bus, cs); - if (!priv) { - printf("SPI_error: Fail to allocate ti_qspi_priv\n"); - return NULL; - } - - priv->base = (struct ti_qspi_regs *)QSPI_BASE; - priv->mode = mode; -#if defined(CONFIG_DRA7XX) - priv->ctrl_mod_mmap = (void *)CORE_CTRL_IO; - priv->slave.memory_map = (void *)MMAP_START_ADDR_DRA; - priv->fclk = QSPI_DRA7XX_FCLK; -#else - priv->slave.memory_map = (void *)MMAP_START_ADDR_AM43x; - priv->fclk = QSPI_FCLK; -#endif - - ti_spi_set_speed(priv, max_hz); - -#ifdef CONFIG_TI_SPI_MMAP - ti_spi_setup_spi_register(priv); -#endif - - return &priv->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct ti_qspi_priv *priv = to_ti_qspi_priv(slave); - free(priv); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct ti_qspi_priv *priv = to_ti_qspi_priv(slave); - - debug("%s: bus:%i cs:%i\n", __func__, priv->slave.bus, priv->slave.cs); - __ti_qspi_set_mode(priv, priv->mode); - return __ti_qspi_claim_bus(priv, priv->slave.cs); -} -void spi_release_bus(struct spi_slave *slave) -{ - struct ti_qspi_priv *priv = to_ti_qspi_priv(slave); - - debug("%s: bus:%i cs:%i\n", __func__, priv->slave.bus, priv->slave.cs); - __ti_qspi_release_bus(priv); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct ti_qspi_priv *priv = to_ti_qspi_priv(slave); - - debug("spi_xfer: bus:%i cs:%i bitlen:%i flags:%lx\n", - priv->slave.bus, priv->slave.cs, bitlen, flags); - return __ti_qspi_xfer(priv, bitlen, dout, din, flags, priv->slave.cs); -} - -#else /* CONFIG_DM_SPI */ - -static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, - struct spi_slave *slave, - bool enable) -{ - u32 memval; - u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL); - - if (!enable) { - writel(0, &priv->base->setup0); - return; - } - - memval = QSPI_SETUP0_NUM_A_BYTES | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS; - - switch (mode) { - case SPI_RX_QUAD: - memval |= QSPI_CMD_READ_QUAD; - memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; - memval |= QSPI_SETUP0_READ_QUAD; - slave->mode |= SPI_RX_QUAD; - break; - case SPI_RX_DUAL: - memval |= QSPI_CMD_READ_DUAL; - memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; - memval |= QSPI_SETUP0_READ_DUAL; - break; - default: - memval |= QSPI_CMD_READ; - memval |= QSPI_SETUP0_NUM_D_BYTES_NO_BITS; - memval |= QSPI_SETUP0_READ_NORMAL; - break; - } - - writel(memval, &priv->base->setup0); -} - +static const struct dm_spi_ops ti_qspi_ops = { + .claim_bus = ti_qspi_claim_bus, + .release_bus = ti_qspi_release_bus, + .xfer = ti_qspi_xfer, + .set_speed = ti_qspi_set_speed, + .set_mode = ti_qspi_set_mode, +};
-static int ti_qspi_set_speed(struct udevice *bus, uint max_hz) +static int ti_qspi_probe(struct udevice *bus) { + struct ti_qspi_platdata *plat = bus->platdata; struct ti_qspi_priv *priv = dev_get_priv(bus);
- ti_spi_set_speed(priv, max_hz); + priv->fclk = plat->fclk; + priv->ctrl_mod_mmap = plat->ctrl_mod_mmap; + priv->base = plat->base; + priv->memory_map = plat->memory_map; + priv->max_hz = plat->max_hz; + priv->num_cs = plat->num_cs;
return 0; }
-static int ti_qspi_set_mode(struct udevice *bus, uint mode) -{ - struct ti_qspi_priv *priv = dev_get_priv(bus); - return __ti_qspi_set_mode(priv, mode); -} - -static int ti_qspi_claim_bus(struct udevice *dev) -{ - struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); - struct spi_slave *slave = dev_get_parent_priv(dev); - struct ti_qspi_priv *priv; - struct udevice *bus; - - bus = dev->parent; - priv = dev_get_priv(bus); - - if (slave_plat->cs > priv->num_cs) { - debug("invalid qspi chip select\n"); - return -EINVAL; - } - - __ti_qspi_setup_memorymap(priv, slave, true); - - return __ti_qspi_claim_bus(priv, slave_plat->cs); -} - -static int ti_qspi_release_bus(struct udevice *dev) +static int ti_qspi_child_pre_probe(struct udevice *dev) { struct spi_slave *slave = dev_get_parent_priv(dev); - struct ti_qspi_priv *priv; - struct udevice *bus; - - bus = dev->parent; - priv = dev_get_priv(bus); - - __ti_qspi_setup_memorymap(priv, slave, false); - __ti_qspi_release_bus(priv); - - return 0; -} - -static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct dm_spi_slave_platdata *slave = dev_get_parent_platdata(dev); - struct ti_qspi_priv *priv; - struct udevice *bus; - - bus = dev->parent; - priv = dev_get_priv(bus); - - if (slave->cs > priv->num_cs) { - debug("invalid qspi chip select\n"); - return -EINVAL; - } - - return __ti_qspi_xfer(priv, bitlen, dout, din, flags, slave->cs); -} - -static int ti_qspi_probe(struct udevice *bus) -{ + struct udevice *bus = dev_get_parent(dev); struct ti_qspi_priv *priv = dev_get_priv(bus);
- priv->fclk = dev_get_driver_data(bus); - + slave->memory_map = priv->memory_map; return 0; }
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) static void *map_syscon_chipselects(struct udevice *bus) { #if CONFIG_IS_ENABLED(SYSCON) @@ -575,7 +452,7 @@ static void *map_syscon_chipselects(struct udevice *bus)
cell = fdt_getprop(gd->fdt_blob, dev_of_offset(bus), "syscon-chipselects", &len); - if (len < 2*sizeof(fdt32_t)) { + if (len < 2 * sizeof(fdt32_t)) { debug("%s: offset not available\n", __func__); return NULL; } @@ -583,6 +460,7 @@ static void *map_syscon_chipselects(struct udevice *bus) return fdtdec_get_number(cell + 1, 1) + regmap_get_range(regmap, 0); #else fdt_addr_t addr; + addr = devfdt_get_addr_index(bus, 2); return (addr == FDT_ADDR_T_NONE) ? NULL : map_physmem(addr, 0, MAP_NOCACHE); @@ -591,61 +469,47 @@ static void *map_syscon_chipselects(struct udevice *bus)
static int ti_qspi_ofdata_to_platdata(struct udevice *bus) { - struct ti_qspi_priv *priv = dev_get_priv(bus); + struct ti_qspi_platdata *plat = bus->platdata; const void *blob = gd->fdt_blob; int node = dev_of_offset(bus);
- priv->ctrl_mod_mmap = map_syscon_chipselects(bus); - priv->base = map_physmem(devfdt_get_addr(bus), + plat->fclk = dev_get_driver_data(bus); + plat->ctrl_mod_mmap = map_syscon_chipselects(bus); + plat->base = map_physmem(devfdt_get_addr(bus), sizeof(struct ti_qspi_regs), MAP_NOCACHE); - priv->memory_map = map_physmem(devfdt_get_addr_index(bus, 1), 0, + plat->memory_map = map_physmem(devfdt_get_addr_index(bus, 1), 0, MAP_NOCACHE);
- priv->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", -1); - if (priv->max_hz < 0) { + plat->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", -1); + if (plat->max_hz < 0) { debug("Error: Max frequency missing\n"); return -ENODEV; } - priv->num_cs = fdtdec_get_int(blob, node, "num-cs", 4); + plat->num_cs = fdtdec_get_int(blob, node, "num-cs", 4);
debug("%s: regs=<0x%x>, max-frequency=%d\n", __func__, - (int)priv->base, priv->max_hz); + (int)plat->base, plat->max_hz);
return 0; }
-static int ti_qspi_child_pre_probe(struct udevice *dev) -{ - struct spi_slave *slave = dev_get_parent_priv(dev); - struct udevice *bus = dev_get_parent(dev); - struct ti_qspi_priv *priv = dev_get_priv(bus); - - slave->memory_map = priv->memory_map; - return 0; -} - -static const struct dm_spi_ops ti_qspi_ops = { - .claim_bus = ti_qspi_claim_bus, - .release_bus = ti_qspi_release_bus, - .xfer = ti_qspi_xfer, - .set_speed = ti_qspi_set_speed, - .set_mode = ti_qspi_set_mode, -}; - static const struct udevice_id ti_qspi_ids[] = { { .compatible = "ti,dra7xxx-qspi", .data = QSPI_DRA7XX_FCLK}, { .compatible = "ti,am4372-qspi", .data = QSPI_FCLK}, { } }; +#endif
U_BOOT_DRIVER(ti_qspi) = { .name = "ti_qspi", .id = UCLASS_SPI, +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .of_match = ti_qspi_ids, - .ops = &ti_qspi_ops, .ofdata_to_platdata = ti_qspi_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct ti_qspi_platdata), +#endif + .ops = &ti_qspi_ops, .priv_auto_alloc_size = sizeof(struct ti_qspi_priv), .probe = ti_qspi_probe, .child_pre_probe = ti_qspi_child_pre_probe, }; -#endif /* CONFIG_DM_SPI */ diff --git a/include/dm/platform_data/spi_ti_qspi.h b/include/dm/platform_data/spi_ti_qspi.h new file mode 100644 index 0000000000..3f5355284e --- /dev/null +++ b/include/dm/platform_data/spi_ti_qspi.h @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __spi_ti_qspi_h +#define __spi_ti_qspi_h + +struct ti_qspi_platdata { + struct ti_qspi_regs *base; + void *ctrl_mod_mmap; + ulong fclk; + void *memory_map; + uint max_hz; + u32 num_cs; +}; + +#endif /* __spi_ti_qspi_h */
From: Mario Six mario.six@gdsys.cc
The function signatures in the driver are quite long as is. Use short type names (uint etc.) to make them more readable.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 8d6d86d2b0..0c77f95159 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -20,8 +20,7 @@
#define SPI_TIMEOUT 1000
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) +struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode) { struct spi_slave *slave;
@@ -68,17 +67,16 @@ int spi_claim_bus(struct spi_slave *slave)
void spi_release_bus(struct spi_slave *slave) { - }
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) +int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, + ulong flags) { volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; - unsigned int tmpdout, tmpdin, event; + uint tmpdout, tmpdin, event; int numBlks = DIV_ROUND_UP(bitlen, 32); int tm, isRead = 0; - unsigned char charSize = 32; + uchar charSize = 32;
debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
From: Mario Six mario.six@gdsys.cc
There are some comments on the same line as the code they document. Put comments above the code lines they document, so the line length is not unnecessarily increased.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 0c77f95159..3016cfe2ca 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -53,11 +53,14 @@ void spi_init(void) * some registers */ spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; - spi->mode = (spi->mode & 0xfff0ffff) | BIT(16); /* Use SYSCLK / 8 - (16.67MHz typ.) */ - spi->event = 0xffffffff; /* Clear all SPI events */ - spi->mask = 0x00000000; /* Mask all SPI interrupts */ - spi->com = 0; /* LST bit doesn't do anything, so disregard */ + /* Use SYSCLK / 8 (16.67MHz typ.) */ + spi->mode = (spi->mode & 0xfff0ffff) | BIT(16); + /* Clear all SPI events */ + spi->event = 0xffffffff; + /* Mask all SPI interrupts */ + spi->mask = 0x00000000; + /* LST bit doesn't do anything, so disregard */ + spi->com = 0; }
int spi_claim_bus(struct spi_slave *slave) @@ -84,9 +87,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, if (flags & SPI_XFER_BEGIN) spi_cs_activate(slave);
- spi->event = 0xffffffff; /* Clear all SPI events */ + /* Clear all SPI events */ + spi->event = 0xffffffff;
- /* handle data in 32-bit chunks */ + /* Handle data in 32-bit chunks */ while (numBlks--) { tmpdout = 0; charSize = (bitlen >= 32 ? 32 : bitlen); @@ -120,7 +124,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
spi->mode |= SPI_MODE_EN;
- spi->tx = tmpdout; /* Write the data out */ + /* Write the data out */ + spi->tx = tmpdout; + debug("*** spi_xfer: ... %08x written\n", tmpdout);
/*
From: Mario Six mario.six@gdsys.cc
There are three variables that have camel-case names, which is not the preferred naming style.
Give those variables more compliant names instead.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 3016cfe2ca..0393765b6f 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -77,9 +77,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, { volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; uint tmpdout, tmpdin, event; - int numBlks = DIV_ROUND_UP(bitlen, 32); - int tm, isRead = 0; - uchar charSize = 32; + int num_blks = DIV_ROUND_UP(bitlen, 32); + int tm, is_read = 0; + uchar char_size = 32;
debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen); @@ -91,12 +91,12 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, spi->event = 0xffffffff;
/* Handle data in 32-bit chunks */ - while (numBlks--) { + while (num_blks--) { tmpdout = 0; - charSize = (bitlen >= 32 ? 32 : bitlen); + char_size = (bitlen >= 32 ? 32 : bitlen);
/* Shift data so it's msb-justified */ - tmpdout = *(u32 *) dout >> (32 - charSize); + tmpdout = *(u32 *) dout >> (32 - char_size);
/* The LEN field of the SPMODE register is set as follows: * @@ -134,15 +134,15 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * or time out (1 second = 1000 ms) * The NE event must be read and cleared first */ - for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) { + for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) { event = spi->event; if (event & SPI_EV_NE) { tmpdin = spi->rx; spi->event |= SPI_EV_NE; - isRead = 1; + is_read = 1;
- *(u32 *) din = (tmpdin << (32 - charSize)); - if (charSize == 32) { + *(u32 *) din = (tmpdin << (32 - char_size)); + if (char_size == 32) { /* Advance output buffer by 32 bits */ din += 4; } @@ -153,7 +153,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * in the future put an arbitrary delay after writing * the device. Arbitrary delays suck, though... */ - if (isRead && (event & SPI_EV_NF)) + if (is_read && (event & SPI_EV_NF)) break; } if (tm >= SPI_TIMEOUT)
From: Mario Six mario.six@gdsys.cc
Fix all "superfluous space after case" style errors.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 0393765b6f..1424e7febe 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -82,7 +82,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, uchar char_size = 32;
debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", - slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen); + slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen);
if (flags & SPI_XFER_BEGIN) spi_cs_activate(slave); @@ -96,7 +96,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, char_size = (bitlen >= 32 ? 32 : bitlen);
/* Shift data so it's msb-justified */ - tmpdout = *(u32 *) dout >> (32 - char_size); + tmpdout = *(u32 *)dout >> (32 - char_size);
/* The LEN field of the SPMODE register is set as follows: * @@ -141,7 +141,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, spi->event |= SPI_EV_NE; is_read = 1;
- *(u32 *) din = (tmpdin << (32 - char_size)); + *(u32 *)din = (tmpdin << (32 - char_size)); if (char_size == 32) { /* Advance output buffer by 32 bits */ din += 4;
From: Mario Six mario.six@gdsys.cc
Replace the function name with a "%s" format string and the __func__ variable in debug statements (as proposed by checkpatch).
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 1424e7febe..91b639f1e6 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -81,7 +81,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, int tm, is_read = 0; uchar char_size = 32;
- debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", + debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__, slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen);
if (flags & SPI_XFER_BEGIN) @@ -127,7 +127,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, /* Write the data out */ spi->tx = tmpdout;
- debug("*** spi_xfer: ... %08x written\n", tmpdout); + debug("*** %s: ... %08x written\n", __func__, tmpdout);
/* * Wait for SPI transmit to get out @@ -157,9 +157,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, break; } if (tm >= SPI_TIMEOUT) - puts("*** spi_xfer: Time out during SPI transfer"); + debug("*** %s: Time out during SPI transfer\n", + __func__);
- debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin); + debug("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin); }
if (flags & SPI_XFER_END)
From: Mario Six mario.six@gdsys.cc
Replace pre-processor defines with proper enums, and use the BIT macro where applicable.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 91b639f1e6..7b2ab1e4af 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -10,13 +10,25 @@ #include <spi.h> #include <asm/mpc8xxx_spi.h>
-#define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */ -#define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */ - -#define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */ -#define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */ -#define SPI_MODE_MS (0x80000000 >> 6) /* Always master */ -#define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */ +enum { + SPI_EV_NE = BIT(31 - 22), /* Receiver Not Empty */ + SPI_EV_NF = BIT(31 - 23), /* Transmitter Not Full */ +}; + +enum { + SPI_MODE_LOOP = BIT(31 - 1), /* Loopback mode */ + SPI_MODE_CI = BIT(31 - 2), /* Clock invert */ + SPI_MODE_CP = BIT(31 - 3), /* Clock phase */ + SPI_MODE_DIV16 = BIT(31 - 4), /* Divide clock source by 16 */ + SPI_MODE_REV = BIT(31 - 5), /* Reverse mode - MSB first */ + SPI_MODE_MS = BIT(31 - 6), /* Always master */ + SPI_MODE_EN = BIT(31 - 7), /* Enable interface */ + + SPI_MODE_LEN_MASK = 0xf00000, + SPI_MODE_PM_MASK = 0xf0000, + + SPI_COM_LST = BIT(31 - 9), +};
#define SPI_TIMEOUT 1000
From: Mario Six mario.six@gdsys.cc
Accesses to the register map are currently done by directly reading and writing the structure.
Switch to the appropriate IO accessors instead.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 7b2ab1e4af..da9e1e3f98 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -58,21 +58,21 @@ void spi_free_slave(struct spi_slave *slave)
void spi_init(void) { - volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; + spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
/* * SPI pins on the MPC83xx are not muxed, so all we do is initialize * some registers */ - spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; + out_be32(&spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN); /* Use SYSCLK / 8 (16.67MHz typ.) */ - spi->mode = (spi->mode & 0xfff0ffff) | BIT(16); + clrsetbits_be32(&spi->mode, 0x000f0000, BIT(16)); /* Clear all SPI events */ - spi->event = 0xffffffff; + setbits_be32(&spi->event, 0xffffffff); /* Mask all SPI interrupts */ - spi->mask = 0x00000000; + clrbits_be32(&spi->mask, 0xffffffff); /* LST bit doesn't do anything, so disregard */ - spi->com = 0; + out_be32(&spi->com, 0); }
int spi_claim_bus(struct spi_slave *slave) @@ -87,7 +87,7 @@ void spi_release_bus(struct spi_slave *slave) int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, ulong flags) { - volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; + spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi; uint tmpdout, tmpdin, event; int num_blks = DIV_ROUND_UP(bitlen, 32); int tm, is_read = 0; @@ -100,7 +100,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, spi_cs_activate(slave);
/* Clear all SPI events */ - spi->event = 0xffffffff; + setbits_be32(&spi->event, 0xffffffff);
/* Handle data in 32-bit chunks */ while (num_blks--) { @@ -118,26 +118,26 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * len > 16 0 */
- spi->mode &= ~SPI_MODE_EN; + clrbits_be32(&spi->mode, SPI_MODE_EN);
if (bitlen <= 16) { if (bitlen <= 4) - spi->mode = (spi->mode & 0xff0fffff) | - (3 << 20); + clrsetbits_be32(&spi->mode, 0x00f00000, + (3 << 20)); else - spi->mode = (spi->mode & 0xff0fffff) | - ((bitlen - 1) << 20); + clrsetbits_be32(&spi->mode, 0x00f00000, + ((bitlen - 1) << 20)); } else { - spi->mode = (spi->mode & 0xff0fffff); + clrbits_be32(&spi->mode, 0x00f00000); /* Set up the next iteration if sending > 32 bits */ bitlen -= 32; dout += 4; }
- spi->mode |= SPI_MODE_EN; + setbits_be32(&spi->mode, SPI_MODE_EN);
/* Write the data out */ - spi->tx = tmpdout; + out_be32(&spi->tx, tmpdout);
debug("*** %s: ... %08x written\n", __func__, tmpdout);
@@ -147,10 +147,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * The NE event must be read and cleared first */ for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) { - event = spi->event; + event = in_be32(&spi->event); if (event & SPI_EV_NE) { - tmpdin = spi->rx; - spi->event |= SPI_EV_NE; + tmpdin = in_be32(&spi->rx); + setbits_be32(&spi->event, SPI_EV_NE); is_read = 1;
*(u32 *)din = (tmpdin << (32 - char_size));
From: Mario Six mario.six@gdsys.cc
Instead of having a nested if block, just have two branches within the overarching if block to eliminate one nesting level.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index da9e1e3f98..ca34570901 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -120,13 +120,11 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
clrbits_be32(&spi->mode, SPI_MODE_EN);
- if (bitlen <= 16) { - if (bitlen <= 4) - clrsetbits_be32(&spi->mode, 0x00f00000, - (3 << 20)); - else - clrsetbits_be32(&spi->mode, 0x00f00000, - ((bitlen - 1) << 20)); + if (bitlen <= 4) { + clrsetbits_be32(&spi->mode, 0x00f00000, (3 << 20)); + } else if (bitlen <= 16) { + clrsetbits_be32(&spi->mode, 0x00f00000, + ((bitlen - 1) << 20)); } else { clrbits_be32(&spi->mode, 0x00f00000); /* Set up the next iteration if sending > 32 bits */
From: Mario Six mario.six@gdsys.cc
Get rid of the is_read variable, and just keep the state of the "not empty" and "not full" events in two boolean variables within the loop body.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index ca34570901..962ef710f8 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -90,7 +90,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi; uint tmpdout, tmpdin, event; int num_blks = DIV_ROUND_UP(bitlen, 32); - int tm, is_read = 0; + int tm; uchar char_size = 32;
debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__, @@ -144,12 +144,14 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * or time out (1 second = 1000 ms) * The NE event must be read and cleared first */ - for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) { + for (tm = 0; tm < SPI_TIMEOUT; ++tm) { event = in_be32(&spi->event); - if (event & SPI_EV_NE) { + bool have_ne = event & SPI_EV_NE; + bool have_nf = event & SPI_EV_NF; + + if (have_ne) { tmpdin = in_be32(&spi->rx); setbits_be32(&spi->event, SPI_EV_NE); - is_read = 1;
*(u32 *)din = (tmpdin << (32 - char_size)); if (char_size == 32) { @@ -163,7 +165,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * in the future put an arbitrary delay after writing * the device. Arbitrary delays suck, though... */ - if (is_read && (event & SPI_EV_NF)) + if (have_ne && have_nf) break; } if (tm >= SPI_TIMEOUT)
From: Mario Six mario.six@gdsys.cc
We do nothing in the loop if the "not empty" event was not detected. To simplify the logic, check if this is the case, and skip the execution of the loop early to reduce the nesting level and flag checking.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 962ef710f8..a2e698ea17 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -149,25 +149,28 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, bool have_ne = event & SPI_EV_NE; bool have_nf = event & SPI_EV_NF;
- if (have_ne) { - tmpdin = in_be32(&spi->rx); - setbits_be32(&spi->event, SPI_EV_NE); - - *(u32 *)din = (tmpdin << (32 - char_size)); - if (char_size == 32) { - /* Advance output buffer by 32 bits */ - din += 4; - } + if (!have_ne) + continue; + + tmpdin = in_be32(&spi->rx); + setbits_be32(&spi->event, SPI_EV_NE); + + *(u32 *)din = (tmpdin << (32 - char_size)); + if (char_size == 32) { + /* Advance output buffer by 32 bits */ + din += 4; } + /* * Only bail when we've had both NE and NF events. * This will cause timeouts on RO devices, so maybe * in the future put an arbitrary delay after writing * the device. Arbitrary delays suck, though... */ - if (have_ne && have_nf) + if (have_nf) break; } + if (tm >= SPI_TIMEOUT) debug("*** %s: Time out during SPI transfer\n", __func__);
From: Mario Six mario.six@gdsys.cc
The transmission loop starts with setting some variables, which are only used inside the loop. Reduce the scope to the loop to make the declaration and initialization of these variables coincide.
In the case of char_size this also always initializes the variable immediately with the final value actually used in the loop (instead of the placeholder value 32).
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index a2e698ea17..2a0f3cc06a 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -88,10 +88,8 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, ulong flags) { spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi; - uint tmpdout, tmpdin, event; + u32 tmpdin; int num_blks = DIV_ROUND_UP(bitlen, 32); - int tm; - uchar char_size = 32;
debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__, slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen); @@ -104,8 +102,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
/* Handle data in 32-bit chunks */ while (num_blks--) { - tmpdout = 0; - char_size = (bitlen >= 32 ? 32 : bitlen); + int tm; + u32 tmpdout = 0; + uchar char_size = (bitlen >= 32 ? 32 : bitlen);
/* Shift data so it's msb-justified */ tmpdout = *(u32 *)dout >> (32 - char_size); @@ -145,7 +144,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * The NE event must be read and cleared first */ for (tm = 0; tm < SPI_TIMEOUT; ++tm) { - event = in_be32(&spi->event); + u32 event = in_be32(&spi->event); bool have_ne = event & SPI_EV_NE; bool have_nf = event & SPI_EV_NF;
From: Mario Six mario.six@gdsys.cc
Introduce the to_prescale_mod and set_char_len inline functions to make the code more readable.
Note that the added "if (bitlen > 16)" check does not change the semantics of the current code, and hence only preserves the current error (this will be fixed in a later patch in the series).
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 2a0f3cc06a..83fd8b3cc1 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -30,6 +30,16 @@ enum { SPI_COM_LST = BIT(31 - 9), };
+static inline u32 to_prescale_mod(u32 val) +{ + return (min(val, (u32)15) << 16); +} + +static void set_char_len(spi8xxx_t *spi, u32 val) +{ + clrsetbits_be32(&spi->mode, SPI_MODE_LEN_MASK, (val << 20)); +} + #define SPI_TIMEOUT 1000
struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode) @@ -66,7 +76,7 @@ void spi_init(void) */ out_be32(&spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN); /* Use SYSCLK / 8 (16.67MHz typ.) */ - clrsetbits_be32(&spi->mode, 0x000f0000, BIT(16)); + clrsetbits_be32(&spi->mode, SPI_MODE_PM_MASK, to_prescale_mod(1)); /* Clear all SPI events */ setbits_be32(&spi->event, 0xffffffff); /* Mask all SPI interrupts */ @@ -119,13 +129,14 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
clrbits_be32(&spi->mode, SPI_MODE_EN);
- if (bitlen <= 4) { - clrsetbits_be32(&spi->mode, 0x00f00000, (3 << 20)); - } else if (bitlen <= 16) { - clrsetbits_be32(&spi->mode, 0x00f00000, - ((bitlen - 1) << 20)); - } else { - clrbits_be32(&spi->mode, 0x00f00000); + if (bitlen <= 4) + set_char_len(spi, 3); + else if (bitlen <= 16) + set_char_len(spi, bitlen - 1); + else + set_char_len(spi, 0); + + if (bitlen > 16) { /* Set up the next iteration if sending > 32 bits */ bitlen -= 32; dout += 4;
From: Mario Six mario.six@gdsys.cc
The variable "char_size" holds the number of bits to be transferred in the current loop iteration. A better name would be "xfer_bitlen", which we rename this variable to.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 83fd8b3cc1..63d956a295 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -114,10 +114,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, while (num_blks--) { int tm; u32 tmpdout = 0; - uchar char_size = (bitlen >= 32 ? 32 : bitlen); + uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen);
/* Shift data so it's msb-justified */ - tmpdout = *(u32 *)dout >> (32 - char_size); + tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);
/* The LEN field of the SPMODE register is set as follows: * @@ -165,8 +165,8 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, tmpdin = in_be32(&spi->rx); setbits_be32(&spi->event, SPI_EV_NE);
- *(u32 *)din = (tmpdin << (32 - char_size)); - if (char_size == 32) { + *(u32 *)din = (tmpdin << (32 - xfer_bitlen)); + if (xfer_bitlen == 32) { /* Advance output buffer by 32 bits */ din += 4; }
From: Mario Six mario.six@gdsys.cc
Instead of having a table right before the code implementing the length setting for documentation, have inline comments for the if branches actually implementing the length setting described table's entries (which is readable thanks to the set_char_len function).
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 63d956a295..1dd5bd9799 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -119,21 +119,15 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, /* Shift data so it's msb-justified */ tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);
- /* The LEN field of the SPMODE register is set as follows: - * - * Bit length setting - * len <= 4 3 - * 4 < len <= 16 len - 1 - * len > 16 0 - */ - clrbits_be32(&spi->mode, SPI_MODE_EN);
- if (bitlen <= 4) + /* Set up length for this transfer */ + + if (bitlen <= 4) /* 4 bits or less */ set_char_len(spi, 3); - else if (bitlen <= 16) + else if (bitlen <= 16) /* at most 16 bits */ set_char_len(spi, bitlen - 1); - else + else /* more than 16 bits -> full 32 bit transfer */ set_char_len(spi, 0);
if (bitlen > 16) {
From: Mario Six mario.six@gdsys.cc
Minize the time the adapter is disabled (via SPI_MODE_EN clearing/setting) to just the character length setting, and only set up the temporary data writing variable right before we need it, so there is a more clear distinction between setting up the SPI adapter, and setting up the data to be written.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 1dd5bd9799..1e7c0144c2 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -116,9 +116,6 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, u32 tmpdout = 0; uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen);
- /* Shift data so it's msb-justified */ - tmpdout = *(u32 *)dout >> (32 - xfer_bitlen); - clrbits_be32(&spi->mode, SPI_MODE_EN);
/* Set up length for this transfer */ @@ -130,14 +127,17 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, else /* more than 16 bits -> full 32 bit transfer */ set_char_len(spi, 0);
+ setbits_be32(&spi->mode, SPI_MODE_EN); + + /* Shift data so it's msb-justified */ + tmpdout = *(u32 *)dout >> (32 - xfer_bitlen); + if (bitlen > 16) { /* Set up the next iteration if sending > 32 bits */ bitlen -= 32; dout += 4; }
- setbits_be32(&spi->mode, SPI_MODE_EN); - /* Write the data out */ out_be32(&spi->tx, tmpdout);
From: Mario Six mario.six@gdsys.cc
Decreasing the bit length and increasing the write data pointer should be done when there are more than 32 bit of data, not 16 bit.
This did not produce incorrect behavior, because the only time where the two checks produce different outcomes is the case of 16 < bitlen < 32, and in this case the subsequent transmission is the last one regardless, hence the additional bit length decrease and write data pointer increase has no effect anyway.
Still, the correct check is the check for "bitlen > 32", so correct this behavior.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 1e7c0144c2..e09e91c8e9 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -132,7 +132,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, /* Shift data so it's msb-justified */ tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);
- if (bitlen > 16) { + if (bitlen > 32) { /* Set up the next iteration if sending > 32 bits */ bitlen -= 32; dout += 4;
From: Mario Six mario.six@gdsys.cc
The comment before the transmission loop in conjunction with the definition of SPI_TIMEOUT as 1000 implies that the loop is supposed to have a timeout value of 1000 ms. But since there is no mdelay(1) or similar in the loop body, the loop just runs 1000 times, without regard for the time elapsed.
To correct this, use the standard get_timer functionality to properly time out the loop after 1000 ms.
Signed-off-by: Mario Six mario.six@gdsys.cc --- drivers/spi/mpc8xxx_spi.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index e09e91c8e9..63e1a150f8 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -112,9 +112,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
/* Handle data in 32-bit chunks */ while (num_blks--) { - int tm; u32 tmpdout = 0; uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen); + ulong start;
clrbits_be32(&spi->mode, SPI_MODE_EN);
@@ -148,7 +148,8 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, * or time out (1 second = 1000 ms) * The NE event must be read and cleared first */ - for (tm = 0; tm < SPI_TIMEOUT; ++tm) { + start = get_timer(0); + do { u32 event = in_be32(&spi->event); bool have_ne = event & SPI_EV_NE; bool have_nf = event & SPI_EV_NF; @@ -173,9 +174,11 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, */ if (have_nf) break; - }
- if (tm >= SPI_TIMEOUT) + mdelay(1); + } while (get_timer(start) < SPI_TIMEOUT); + + if (get_timer(start) >= SPI_TIMEOUT) debug("*** %s: Time out during SPI transfer\n", __func__);
Support DM in the MPC8xxx SPI driver, and remove the legacy SPI interface.
Signed-off-by: Mario Six mario.six@gdsys.cc [jagan: build for board which doesn't enable DM_SPI] Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Makefile | 3 +- drivers/spi/Makefile | 2 +- drivers/spi/mpc8xxx_spi.c | 144 ++++++++++++++++++++++++++++---------- 3 files changed, 110 insertions(+), 39 deletions(-)
diff --git a/Makefile b/Makefile index efa68e7343..7c1d934493 100644 --- a/Makefile +++ b/Makefile @@ -919,7 +919,8 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) @echo "====================================================" endif ifeq ($(CONFIG_DM_SPI),) -ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_TI_QSPI),y),y) +ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_MPC8XXX_SPI) \ + $(CONFIG_TI_QSPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 748d9a90ab..19aa95b2ca 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -8,6 +8,7 @@ ifdef CONFIG_DM_SPI obj-y += spi-uclass.o obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o +obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o @@ -33,7 +34,6 @@ obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o obj-$(CONFIG_ICH_SPI) += ich.o obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o -obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o obj-$(CONFIG_MXC_SPI) += mxc_spi.o diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 63e1a150f8..1c7bf10f91 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -5,10 +5,12 @@ */
#include <common.h> - +#include <dm.h> +#include <errno.h> #include <malloc.h> #include <spi.h> #include <asm/mpc8xxx_spi.h> +#include <asm-generic/gpio.h>
enum { SPI_EV_NE = BIT(31 - 22), /* Receiver Not Empty */ @@ -30,6 +32,12 @@ enum { SPI_COM_LST = BIT(31 - 9), };
+struct mpc8xxx_priv { + spi8xxx_t *spi; + struct gpio_desc gpios[16]; + int max_cs; +}; + static inline u32 to_prescale_mod(u32 val) { return (min(val, (u32)15) << 16); @@ -42,70 +50,90 @@ static void set_char_len(spi8xxx_t *spi, u32 val)
#define SPI_TIMEOUT 1000
-struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode) +static int __spi_set_speed(spi8xxx_t *spi, uint speed) { - struct spi_slave *slave; + /* TODO(mario.six@gdsys.cc): This only ever sets one fixed speed */
- if (!spi_cs_is_valid(bus, cs)) - return NULL; - - slave = spi_alloc_slave_base(bus, cs); - if (!slave) - return NULL; - - /* - * TODO: Some of the code in spi_init() should probably move - * here, or into spi_claim_bus() below. - */ + /* Use SYSCLK / 8 (16.67MHz typ.) */ + clrsetbits_be32(&spi->mode, SPI_MODE_PM_MASK, to_prescale_mod(1));
- return slave; + return 0; }
-void spi_free_slave(struct spi_slave *slave) +static int mpc8xxx_spi_ofdata_to_platdata(struct udevice *dev) { - free(slave); + struct mpc8xxx_priv *priv = dev_get_priv(dev); + int ret; + + priv->spi = (spi8xxx_t *)dev_read_addr(dev); + + /* TODO(mario.six@gdsys.cc): Read clock and save the value */ + + ret = gpio_request_list_by_name(dev, "gpios", priv->gpios, + ARRAY_SIZE(priv->gpios), GPIOD_IS_OUT | GPIOD_ACTIVE_LOW); + if (ret < 0) + return -EINVAL; + + priv->max_cs = ret; + + return 0; }
-void spi_init(void) +static int mpc8xxx_spi_probe(struct udevice *dev) { - spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi; + struct mpc8xxx_priv *priv = dev_get_priv(dev);
/* * SPI pins on the MPC83xx are not muxed, so all we do is initialize * some registers */ - out_be32(&spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN); - /* Use SYSCLK / 8 (16.67MHz typ.) */ - clrsetbits_be32(&spi->mode, SPI_MODE_PM_MASK, to_prescale_mod(1)); + out_be32(&priv->spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN); + + __spi_set_speed(priv->spi, 16666667); + /* Clear all SPI events */ - setbits_be32(&spi->event, 0xffffffff); + setbits_be32(&priv->spi->event, 0xffffffff); /* Mask all SPI interrupts */ - clrbits_be32(&spi->mask, 0xffffffff); + clrbits_be32(&priv->spi->mask, 0xffffffff); /* LST bit doesn't do anything, so disregard */ - out_be32(&spi->com, 0); + out_be32(&priv->spi->com, 0); + + return 0; }
-int spi_claim_bus(struct spi_slave *slave) +static void mpc8xxx_spi_cs_activate(struct udevice *dev) { - return 0; + struct mpc8xxx_priv *priv = dev_get_priv(dev->parent); + struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev); + + dm_gpio_set_dir_flags(&priv->gpios[platdata->cs], GPIOD_IS_OUT); + dm_gpio_set_value(&priv->gpios[platdata->cs], 0); }
-void spi_release_bus(struct spi_slave *slave) +static void mpc8xxx_spi_cs_deactivate(struct udevice *dev) { + struct mpc8xxx_priv *priv = dev_get_priv(dev->parent); + struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev); + + dm_gpio_set_dir_flags(&priv->gpios[platdata->cs], GPIOD_IS_OUT); + dm_gpio_set_value(&priv->gpios[platdata->cs], 1); }
-int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, - ulong flags) +static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen, + const void *dout, void *din, ulong flags) { - spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi; - u32 tmpdin; + struct udevice *bus = dev->parent; + struct mpc8xxx_priv *priv = dev_get_priv(bus); + spi8xxx_t *spi = priv->spi; + struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev); + u32 tmpdin = 0; int num_blks = DIV_ROUND_UP(bitlen, 32);
- debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__, - slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen); + debug("%s: slave %s:%u dout %08X din %08X bitlen %u\n", __func__, + bus->name, platdata->cs, *(uint *)dout, *(uint *)din, bitlen);
if (flags & SPI_XFER_BEGIN) - spi_cs_activate(slave); + mpc8xxx_spi_cs_activate(dev);
/* Clear all SPI events */ setbits_be32(&spi->event, 0xffffffff); @@ -178,15 +206,57 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din, mdelay(1); } while (get_timer(start) < SPI_TIMEOUT);
- if (get_timer(start) >= SPI_TIMEOUT) + if (get_timer(start) >= SPI_TIMEOUT) { debug("*** %s: Time out during SPI transfer\n", __func__); + return -ETIMEDOUT; + }
debug("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin); }
if (flags & SPI_XFER_END) - spi_cs_deactivate(slave); + mpc8xxx_spi_cs_deactivate(dev); + + return 0; +} + +static int mpc8xxx_spi_set_speed(struct udevice *dev, uint speed) +{ + struct mpc8xxx_priv *priv = dev_get_priv(dev); + + return __spi_set_speed(priv->spi, speed); +}
+static int mpc8xxx_spi_set_mode(struct udevice *dev, uint mode) +{ + /* TODO(mario.six@gdsys.cc): Using SPI_CPHA (for clock phase) and + * SPI_CPOL (for clock polarity) should work + */ return 0; } + +static const struct dm_spi_ops mpc8xxx_spi_ops = { + .xfer = mpc8xxx_spi_xfer, + .set_speed = mpc8xxx_spi_set_speed, + .set_mode = mpc8xxx_spi_set_mode, + /* + * cs_info is not needed, since we require all chip selects to be + * in the device tree explicitly + */ +}; + +static const struct udevice_id mpc8xxx_spi_ids[] = { + { .compatible = "fsl,spi" }, + { } +}; + +U_BOOT_DRIVER(mpc8xxx_spi) = { + .name = "mpc8xxx_spi", + .id = UCLASS_SPI, + .of_match = mpc8xxx_spi_ids, + .ops = &mpc8xxx_spi_ops, + .ofdata_to_platdata = mpc8xxx_spi_ofdata_to_platdata, + .probe = mpc8xxx_spi_probe, + .priv_auto_alloc_size = sizeof(struct mpc8xxx_priv), +};
Dropped - cf_spi driver - CF_DSPI code - CONFIG_CF_SPI, CF_DSPI items
Dropped becuase - no active usage - no dm conversion - multiple pings for asking dm-conversion - driver-model migration expiry
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/m68k/cpu/mcf5227x/cpu_init.c | 54 --- arch/m68k/cpu/mcf5445x/cpu_init.c | 113 ------ configs/M52277EVB_defconfig | 1 - configs/M52277EVB_stmicro_defconfig | 1 - configs/M54418TWR_defconfig | 1 - configs/M54418TWR_nand_mii_defconfig | 1 - configs/M54418TWR_nand_rmii_defconfig | 1 - configs/M54418TWR_nand_rmii_lowfreq_defconfig | 1 - configs/M54418TWR_serial_mii_defconfig | 1 - configs/M54418TWR_serial_rmii_defconfig | 1 - configs/M54451EVB_defconfig | 1 - configs/M54451EVB_stmicro_defconfig | 1 - configs/M54455EVB_a66_defconfig | 1 - configs/M54455EVB_defconfig | 1 - configs/M54455EVB_i66_defconfig | 1 - configs/M54455EVB_intel_defconfig | 1 - configs/M54455EVB_stm33_defconfig | 1 - configs/stmark2_defconfig | 1 - drivers/spi/Kconfig | 6 - drivers/spi/Makefile | 1 - drivers/spi/cf_spi.c | 335 ------------------ include/configs/M52277EVB.h | 1 - include/configs/M54418TWR.h | 1 - include/configs/M54451EVB.h | 1 - include/configs/M54455EVB.h | 1 - include/configs/stmark2.h | 1 - scripts/config_whitelist.txt | 1 - 27 files changed, 531 deletions(-) delete mode 100644 drivers/spi/cf_spi.c
diff --git a/arch/m68k/cpu/mcf5227x/cpu_init.c b/arch/m68k/cpu/mcf5227x/cpu_init.c index 0d6a484a45..76f4fb34bc 100644 --- a/arch/m68k/cpu/mcf5227x/cpu_init.c +++ b/arch/m68k/cpu/mcf5227x/cpu_init.c @@ -137,57 +137,3 @@ void uart_port_conf(int port) break; } } - -#ifdef CONFIG_CF_DSPI -void cfspi_port_conf(void) -{ - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - - out_8(&gpio->par_dspi, - GPIO_PAR_DSPI_SIN_SIN | GPIO_PAR_DSPI_SOUT_SOUT | - GPIO_PAR_DSPI_SCK_SCK); -} - -int cfspi_claim_bus(uint bus, uint cs) -{ - dspi_t *dspi = (dspi_t *) MMAP_DSPI; - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - - if ((in_be32(&dspi->sr) & DSPI_SR_TXRXS) != DSPI_SR_TXRXS) - return -1; - - /* Clear FIFO and resume transfer */ - clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF); - - switch (cs) { - case 0: - clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_UNMASK); - setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); - break; - case 2: - clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK); - setbits_8(&gpio->par_timer, GPIO_PAR_TIMER_T2IN_DSPIPCS2); - break; - } - - return 0; -} - -void cfspi_release_bus(uint bus, uint cs) -{ - dspi_t *dspi = (dspi_t *) MMAP_DSPI; - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - - /* Clear FIFO */ - clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF); - - switch (cs) { - case 0: - clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); - break; - case 2: - clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK); - break; - } -} -#endif diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c index 7632d9262c..39a54f4546 100644 --- a/arch/m68k/cpu/mcf5445x/cpu_init.c +++ b/arch/m68k/cpu/mcf5445x/cpu_init.c @@ -432,116 +432,3 @@ int fecpin_setclear(struct eth_device *dev, int setclear) return 0; } #endif - -#ifdef CONFIG_CF_DSPI -void cfspi_port_conf(void) -{ - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - -#ifdef CONFIG_MCF5445x - out_8(&gpio->par_dspi, - GPIO_PAR_DSPI_SIN_SIN | - GPIO_PAR_DSPI_SOUT_SOUT | - GPIO_PAR_DSPI_SCK_SCK); -#endif - -#ifdef CONFIG_MCF5441x - pm_t *pm = (pm_t *) MMAP_PM; - - out_8(&gpio->par_dspi0, - GPIO_PAR_DSPI0_SIN_DSPI0SIN | GPIO_PAR_DSPI0_SOUT_DSPI0SOUT | - GPIO_PAR_DSPI0_SCK_DSPI0SCK); - out_8(&gpio->srcr_dspiow, 3); - - /* DSPI0 */ - out_8(&pm->pmcr0, 23); -#endif -} - -int cfspi_claim_bus(uint bus, uint cs) -{ - dspi_t *dspi = (dspi_t *) MMAP_DSPI; - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - - if ((in_be32(&dspi->sr) & DSPI_SR_TXRXS) != DSPI_SR_TXRXS) - return -1; - - /* Clear FIFO and resume transfer */ - clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF); - -#ifdef CONFIG_MCF5445x - switch (cs) { - case 0: - clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); - setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); - break; - case 1: - clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1); - setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1); - break; - case 2: - clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2); - setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2); - break; - case 3: - clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK); - setbits_8(&gpio->par_dma, GPIO_PAR_DMA_DACK0_PCS3); - break; - case 5: - clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5); - setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5); - break; - } -#endif - -#ifdef CONFIG_MCF5441x - switch (cs) { - case 0: - clrbits_8(&gpio->par_dspi0, ~GPIO_PAR_DSPI0_PCS0_MASK); - setbits_8(&gpio->par_dspi0, GPIO_PAR_DSPI0_PCS0_DSPI0PCS0); - break; - case 1: - clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1); - setbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1); - break; - } -#endif - - return 0; -} - -void cfspi_release_bus(uint bus, uint cs) -{ - dspi_t *dspi = (dspi_t *) MMAP_DSPI; - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - - /* Clear FIFO */ - clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF); - -#ifdef CONFIG_MCF5445x - switch (cs) { - case 0: - clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); - break; - case 1: - clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1); - break; - case 2: - clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2); - break; - case 3: - clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK); - break; - case 5: - clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5); - break; - } -#endif - -#ifdef CONFIG_MCF5441x - if (cs == 1) - clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1); -#endif -} - -#endif diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig index efa5e7102b..882aefd78c 100644 --- a/configs/M52277EVB_defconfig +++ b/configs/M52277EVB_defconfig @@ -25,4 +25,3 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig index 3628729a48..f8be2e322e 100644 --- a/configs/M52277EVB_stmicro_defconfig +++ b/configs/M52277EVB_stmicro_defconfig @@ -24,4 +24,3 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig index f69f405d5a..d204066232 100644 --- a/configs/M54418TWR_defconfig +++ b/configs/M54418TWR_defconfig @@ -24,4 +24,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig index 04ca3a8114..c37a79b9a3 100644 --- a/configs/M54418TWR_nand_mii_defconfig +++ b/configs/M54418TWR_nand_mii_defconfig @@ -23,4 +23,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig index f6acf6019d..0db0e3a836 100644 --- a/configs/M54418TWR_nand_rmii_defconfig +++ b/configs/M54418TWR_nand_rmii_defconfig @@ -23,4 +23,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig index 6b631d6d4b..7e01cd78be 100644 --- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig +++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig @@ -23,4 +23,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig index b2266a0577..01c572782c 100644 --- a/configs/M54418TWR_serial_mii_defconfig +++ b/configs/M54418TWR_serial_mii_defconfig @@ -24,4 +24,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig index f69f405d5a..d204066232 100644 --- a/configs/M54418TWR_serial_rmii_defconfig +++ b/configs/M54418TWR_serial_rmii_defconfig @@ -24,4 +24,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig index 8448b6cfbf..f3ecbfe952 100644 --- a/configs/M54451EVB_defconfig +++ b/configs/M54451EVB_defconfig @@ -30,4 +30,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig index ce5f65666c..b8c3cb1cf0 100644 --- a/configs/M54451EVB_stmicro_defconfig +++ b/configs/M54451EVB_stmicro_defconfig @@ -29,4 +29,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig index f9be1c3773..af375de1a0 100644 --- a/configs/M54455EVB_a66_defconfig +++ b/configs/M54455EVB_a66_defconfig @@ -34,4 +34,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig index abb69a966a..cd6aca9923 100644 --- a/configs/M54455EVB_defconfig +++ b/configs/M54455EVB_defconfig @@ -35,4 +35,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig index 6050df5d51..a9815ae702 100644 --- a/configs/M54455EVB_i66_defconfig +++ b/configs/M54455EVB_i66_defconfig @@ -34,4 +34,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig index 686c00e318..99ae04ead3 100644 --- a/configs/M54455EVB_intel_defconfig +++ b/configs/M54455EVB_intel_defconfig @@ -34,4 +34,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig index fc19de50d1..e122bdf724 100644 --- a/configs/M54455EVB_stm33_defconfig +++ b/configs/M54455EVB_stm33_defconfig @@ -34,4 +34,3 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y CONFIG_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index 48e851d4a4..613b7af1dd 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -26,5 +26,4 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MTD=y CONFIG_SPI=y -CONFIG_CF_SPI=y CONFIG_REGEX=y diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 56f5d30c74..ed72f401ca 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -278,12 +278,6 @@ config SOFT_SPI Enable Soft SPI driver. This driver is to use GPIO simulate the SPI protocol.
-config CF_SPI - bool "ColdFire SPI driver" - help - Enable the ColdFire SPI driver. This driver can be used on - some m68k SoCs. - config FSL_ESPI bool "Freescale eSPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 19aa95b2ca..890e919f49 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -25,7 +25,6 @@ obj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o -obj-$(CONFIG_CF_SPI) += cf_spi.o obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c deleted file mode 100644 index 522631cbbf..0000000000 --- a/drivers/spi/cf_spi.c +++ /dev/null @@ -1,335 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Copyright (C) 2004-2009 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -#include <common.h> -#include <spi.h> -#include <malloc.h> -#include <asm/immap.h> - -struct cf_spi_slave { - struct spi_slave slave; - uint baudrate; - int charbit; -}; - -extern void cfspi_port_conf(void); -extern int cfspi_claim_bus(uint bus, uint cs); -extern void cfspi_release_bus(uint bus, uint cs); - -DECLARE_GLOBAL_DATA_PTR; - -#ifndef CONFIG_SPI_IDLE_VAL -#if defined(CONFIG_SPI_MMC) -#define CONFIG_SPI_IDLE_VAL 0xFFFF -#else -#define CONFIG_SPI_IDLE_VAL 0x0 -#endif -#endif - -#if defined(CONFIG_CF_DSPI) -/* DSPI specific mode */ -#define SPI_MODE_MOD 0x00200000 -#define SPI_DBLRATE 0x00100000 - -static inline struct cf_spi_slave *to_cf_spi_slave(struct spi_slave *slave) -{ - return container_of(slave, struct cf_spi_slave, slave); -} - -static void cfspi_init(void) -{ - volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI; - - cfspi_port_conf(); /* port configuration */ - - dspi->mcr = DSPI_MCR_MSTR | DSPI_MCR_CSIS7 | DSPI_MCR_CSIS6 | - DSPI_MCR_CSIS5 | DSPI_MCR_CSIS4 | DSPI_MCR_CSIS3 | - DSPI_MCR_CSIS2 | DSPI_MCR_CSIS1 | DSPI_MCR_CSIS0 | - DSPI_MCR_CRXF | DSPI_MCR_CTXF; - - /* Default setting in platform configuration */ -#ifdef CONFIG_SYS_DSPI_CTAR0 - dspi->ctar[0] = CONFIG_SYS_DSPI_CTAR0; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR1 - dspi->ctar[1] = CONFIG_SYS_DSPI_CTAR1; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR2 - dspi->ctar[2] = CONFIG_SYS_DSPI_CTAR2; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR3 - dspi->ctar[3] = CONFIG_SYS_DSPI_CTAR3; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR4 - dspi->ctar[4] = CONFIG_SYS_DSPI_CTAR4; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR5 - dspi->ctar[5] = CONFIG_SYS_DSPI_CTAR5; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR6 - dspi->ctar[6] = CONFIG_SYS_DSPI_CTAR6; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR7 - dspi->ctar[7] = CONFIG_SYS_DSPI_CTAR7; -#endif -} - -static void cfspi_tx(u32 ctrl, u16 data) -{ - volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI; - - while ((dspi->sr & 0x0000F000) >= 4) ; - - dspi->tfr = (ctrl | data); -} - -static u16 cfspi_rx(void) -{ - volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI; - - while ((dspi->sr & 0x000000F0) == 0) ; - - return (dspi->rfr & 0xFFFF); -} - -static int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, - void *din, ulong flags) -{ - struct cf_spi_slave *cfslave = to_cf_spi_slave(slave); - u16 *spi_rd16 = NULL, *spi_wr16 = NULL; - u8 *spi_rd = NULL, *spi_wr = NULL; - static u32 ctrl = 0; - uint len = bitlen >> 3; - - if (cfslave->charbit == 16) { - bitlen >>= 1; - spi_wr16 = (u16 *) dout; - spi_rd16 = (u16 *) din; - } else { - spi_wr = (u8 *) dout; - spi_rd = (u8 *) din; - } - - if ((flags & SPI_XFER_BEGIN) == SPI_XFER_BEGIN) - ctrl |= DSPI_TFR_CONT; - - ctrl = (ctrl & 0xFF000000) | ((1 << slave->cs) << 16); - - if (len > 1) { - int tmp_len = len - 1; - while (tmp_len--) { - if (dout != NULL) { - if (cfslave->charbit == 16) - cfspi_tx(ctrl, *spi_wr16++); - else - cfspi_tx(ctrl, *spi_wr++); - cfspi_rx(); - } - - if (din != NULL) { - cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL); - if (cfslave->charbit == 16) - *spi_rd16++ = cfspi_rx(); - else - *spi_rd++ = cfspi_rx(); - } - } - - len = 1; /* remaining byte */ - } - - if ((flags & SPI_XFER_END) == SPI_XFER_END) - ctrl &= ~DSPI_TFR_CONT; - - if (len) { - if (dout != NULL) { - if (cfslave->charbit == 16) - cfspi_tx(ctrl, *spi_wr16); - else - cfspi_tx(ctrl, *spi_wr); - cfspi_rx(); - } - - if (din != NULL) { - cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL); - if (cfslave->charbit == 16) - *spi_rd16 = cfspi_rx(); - else - *spi_rd = cfspi_rx(); - } - } else { - /* dummy read */ - cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL); - cfspi_rx(); - } - - return 0; -} - -static struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, - uint mode) -{ - /* - * bit definition for mode: - * bit 31 - 28: Transfer size 3 to 16 bits - * 27 - 26: PCS to SCK delay prescaler - * 25 - 24: After SCK delay prescaler - * 23 - 22: Delay after transfer prescaler - * 21 : Allow overwrite for bit 31-22 and bit 20-8 - * 20 : Double baud rate - * 19 - 16: PCS to SCK delay scaler - * 15 - 12: After SCK delay scaler - * 11 - 8: Delay after transfer scaler - * 7 - 0: SPI_CPHA, SPI_CPOL, SPI_LSB_FIRST - */ - volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI; - int prescaler[] = { 2, 3, 5, 7 }; - int scaler[] = { - 2, 4, 6, 8, - 16, 32, 64, 128, - 256, 512, 1024, 2048, - 4096, 8192, 16384, 32768 - }; - int i, j, pbrcnt, brcnt, diff, tmp, dbr = 0; - int best_i, best_j, bestmatch = 0x7FFFFFFF, baud_speed; - u32 bus_setup = 0; - - tmp = (prescaler[3] * scaler[15]); - /* Maximum and minimum baudrate it can handle */ - if ((cfslave->baudrate > (gd->bus_clk >> 1)) || - (cfslave->baudrate < (gd->bus_clk / tmp))) { - printf("Exceed baudrate limitation: Max %d - Min %d\n", - (int)(gd->bus_clk >> 1), (int)(gd->bus_clk / tmp)); - return NULL; - } - - /* Activate Double Baud when it exceed 1/4 the bus clk */ - if ((CONFIG_SYS_DSPI_CTAR0 & DSPI_CTAR_DBR) || - (cfslave->baudrate > (gd->bus_clk / (prescaler[0] * scaler[0])))) { - bus_setup |= DSPI_CTAR_DBR; - dbr = 1; - } - - if (mode & SPI_CPOL) - bus_setup |= DSPI_CTAR_CPOL; - if (mode & SPI_CPHA) - bus_setup |= DSPI_CTAR_CPHA; - if (mode & SPI_LSB_FIRST) - bus_setup |= DSPI_CTAR_LSBFE; - - /* Overwrite default value set in platform configuration file */ - if (mode & SPI_MODE_MOD) { - - if ((mode & 0xF0000000) == 0) - bus_setup |= - dspi->ctar[cfslave->slave.bus] & 0x78000000; - else - bus_setup |= ((mode & 0xF0000000) >> 1); - - /* - * Check to see if it is enabled by default in platform - * config, or manual setting passed by mode parameter - */ - if (mode & SPI_DBLRATE) { - bus_setup |= DSPI_CTAR_DBR; - dbr = 1; - } - bus_setup |= (mode & 0x0FC00000) >> 4; /* PSCSCK, PASC, PDT */ - bus_setup |= (mode & 0x000FFF00) >> 4; /* CSSCK, ASC, DT */ - } else - bus_setup |= (dspi->ctar[cfslave->slave.bus] & 0x78FCFFF0); - - cfslave->charbit = - ((dspi->ctar[cfslave->slave.bus] & 0x78000000) == - 0x78000000) ? 16 : 8; - - pbrcnt = sizeof(prescaler) / sizeof(int); - brcnt = sizeof(scaler) / sizeof(int); - - /* baudrate calculation - to closer value, may not be exact match */ - for (best_i = 0, best_j = 0, i = 0; i < pbrcnt; i++) { - baud_speed = gd->bus_clk / prescaler[i]; - for (j = 0; j < brcnt; j++) { - tmp = (baud_speed / scaler[j]) * (1 + dbr); - - if (tmp > cfslave->baudrate) - diff = tmp - cfslave->baudrate; - else - diff = cfslave->baudrate - tmp; - - if (diff < bestmatch) { - bestmatch = diff; - best_i = i; - best_j = j; - } - } - } - bus_setup |= (DSPI_CTAR_PBR(best_i) | DSPI_CTAR_BR(best_j)); - dspi->ctar[cfslave->slave.bus] = bus_setup; - - return &cfslave->slave; -} -#endif /* CONFIG_CF_DSPI */ - -#ifdef CONFIG_CMD_SPI -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - if (((cs >= 0) && (cs < 8)) && ((bus >= 0) && (bus < 8))) - return 1; - else - return 0; -} - -void spi_init(void) -{ - cfspi_init(); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct cf_spi_slave *cfslave; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - cfslave = spi_alloc_slave(struct cf_spi_slave, bus, cs); - if (!cfslave) - return NULL; - - cfslave->baudrate = max_hz; - - /* specific setup */ - return cfspi_setup_slave(cfslave, mode); -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct cf_spi_slave *cfslave = to_cf_spi_slave(slave); - - free(cfslave); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - return cfspi_claim_bus(slave->bus, slave->cs); -} - -void spi_release_bus(struct spi_slave *slave) -{ - cfspi_release_bus(slave->bus, slave->cs); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - return cfspi_xfer(slave, bitlen, dout, din, flags); -} -#endif /* CONFIG_CMD_SPI */ diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 83d774527a..fbaef5ffa9 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -101,7 +101,6 @@ #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/* DSPI and Serial Flash */ -#define CONFIG_CF_DSPI #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI # define CONFIG_SYS_DSPI_CS2 diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index 4b8ef38c0b..ea416c4aa1 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -149,7 +149,6 @@ #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/* DSPI and Serial Flash */ -#define CONFIG_CF_DSPI #define CONFIG_SERIAL_FLASH #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index 87cdbae1db..158d0f6f84 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -114,7 +114,6 @@ #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/* DSPI and Serial Flash */ -#define CONFIG_CF_DSPI #define CONFIG_SERIAL_FLASH #define CONFIG_SYS_SBFHDR_SIZE 0x7 #ifdef CONFIG_CMD_SPI diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index d41b7c4492..54af5790ab 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -141,7 +141,6 @@ #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/* DSPI and Serial Flash */ -#define CONFIG_CF_DSPI #define CONFIG_SYS_SBFHDR_SIZE 0x13 #ifdef CONFIG_CMD_SPI
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 33ddc67bf4..4b069543ec 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -63,7 +63,6 @@ #undef CONFIG_MCFPIT
/* DSPI and Serial Flash */ -#define CONFIG_CF_DSPI #define CONFIG_SF_DEFAULT_SPEED 50000000 #define CONFIG_SERIAL_FLASH #define CONFIG_ENV_SPI_BUS 0 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 1404fd855b..760d5e05dc 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -198,7 +198,6 @@ CONFIG_CDP_TRIGGER CONFIG_CDP_VERSION CONFIG_CFG_DATA_SECTOR CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS -CONFIG_CF_DSPI CONFIG_CF_SBF CONFIG_CF_V2 CONFIG_CF_V3
Dropped - lpc32xx_ssp driver - CONFIG_LPC32XX_SSP, LPC32XX_SSP_TIMEOUT items
Dropped becuase - no active updates - no dm conversion - multiple pings for asking dm-conversion - no reponse for dm converted patch - driver-model migration expiry
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- configs/devkit3250_defconfig | 1 - configs/work_92105_defconfig | 1 - drivers/spi/Kconfig | 5 -- drivers/spi/Makefile | 1 - drivers/spi/lpc32xx_ssp.c | 134 ----------------------------------- include/configs/devkit3250.h | 5 -- include/configs/work_92105.h | 5 -- scripts/config_whitelist.txt | 1 - 8 files changed, 153 deletions(-) delete mode 100644 drivers/spi/lpc32xx_ssp.c
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index b739f27803..8fc7763c3a 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -42,7 +42,6 @@ CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR=31 CONFIG_SYS_NS16550=y CONFIG_SPI=y -CONFIG_LPC32XX_SSP=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 105e51a400..61863abeb7 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -38,4 +38,3 @@ CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_SYS_NS16550=y CONFIG_SPI=y -CONFIG_LPC32XX_SSP=y diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index ed72f401ca..ebe3ba3bcc 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -322,11 +322,6 @@ config KIRKWOOD_SPI Enable support for SPI on various Marvell SoCs, such as Kirkwood and Armada 375.
-config LPC32XX_SSP - bool "LPC32XX SPI Driver" - help - Enable support for SPI on LPC32xx - config MPC8XX_SPI bool "MPC8XX SPI Driver" depends on MPC8xx diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 890e919f49..7d676988fd 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -31,7 +31,6 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o obj-$(CONFIG_ICH_SPI) += ich.o -obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o diff --git a/drivers/spi/lpc32xx_ssp.c b/drivers/spi/lpc32xx_ssp.c deleted file mode 100644 index 4b09366317..0000000000 --- a/drivers/spi/lpc32xx_ssp.c +++ /dev/null @@ -1,134 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * LPC32xx SSP interface (SPI mode) - * - * (C) Copyright 2014 DENX Software Engineering GmbH - * Written-by: Albert ARIBAUD albert.aribaud@3adev.fr - */ - -#include <common.h> -#include <linux/compat.h> -#include <asm/io.h> -#include <malloc.h> -#include <spi.h> -#include <asm/arch/clk.h> - -/* SSP chip registers */ -struct ssp_regs { - u32 cr0; - u32 cr1; - u32 data; - u32 sr; - u32 cpsr; - u32 imsc; - u32 ris; - u32 mis; - u32 icr; - u32 dmacr; -}; - -/* CR1 register defines */ -#define SSP_CR1_SSP_ENABLE 0x0002 - -/* SR register defines */ -#define SSP_SR_TNF 0x0002 -/* SSP status RX FIFO not empty bit */ -#define SSP_SR_RNE 0x0004 - -/* lpc32xx spi slave */ -struct lpc32xx_spi_slave { - struct spi_slave slave; - struct ssp_regs *regs; -}; - -static inline struct lpc32xx_spi_slave *to_lpc32xx_spi_slave( - struct spi_slave *slave) -{ - return container_of(slave, struct lpc32xx_spi_slave, slave); -} - -/* the following is called in sequence by do_spi_xfer() */ - -struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode) -{ - struct lpc32xx_spi_slave *lslave; - - /* we only set up SSP0 for now, so ignore bus */ - - if (mode & SPI_3WIRE) { - pr_err("3-wire mode not supported"); - return NULL; - } - - if (mode & SPI_SLAVE) { - pr_err("slave mode not supported\n"); - return NULL; - } - - if (mode & SPI_PREAMBLE) { - pr_err("preamble byte skipping not supported\n"); - return NULL; - } - - lslave = spi_alloc_slave(struct lpc32xx_spi_slave, bus, cs); - if (!lslave) { - printf("SPI_error: Fail to allocate lpc32xx_spi_slave\n"); - return NULL; - } - - lslave->regs = (struct ssp_regs *)SSP0_BASE; - - /* - * 8 bit frame, SPI fmt, 500kbps -> clock divider is 26. - * Set SCR to 0 and CPSDVSR to 26. - */ - - writel(0x7, &lslave->regs->cr0); /* 8-bit chunks, SPI, 1 clk/bit */ - writel(26, &lslave->regs->cpsr); /* SSP clock = HCLK/26 = 500kbps */ - writel(0, &lslave->regs->imsc); /* do not raise any interrupts */ - writel(0, &lslave->regs->icr); /* clear any pending interrupt */ - writel(0, &lslave->regs->dmacr); /* do not do DMAs */ - writel(SSP_CR1_SSP_ENABLE, &lslave->regs->cr1); /* enable SSP0 */ - return &lslave->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct lpc32xx_spi_slave *lslave = to_lpc32xx_spi_slave(slave); - - debug("(lpc32xx) spi_free_slave: 0x%08x\n", (u32)lslave); - free(lslave); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - /* only one bus and slave so far, always available */ - return 0; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct lpc32xx_spi_slave *lslave = to_lpc32xx_spi_slave(slave); - int bytelen = bitlen >> 3; - int idx_out = 0; - int idx_in = 0; - int start_time; - - start_time = get_timer(0); - while ((idx_out < bytelen) || (idx_in < bytelen)) { - int status = readl(&lslave->regs->sr); - if ((idx_out < bytelen) && (status & SSP_SR_TNF)) - writel(((u8 *)dout)[idx_out++], &lslave->regs->data); - if ((idx_in < bytelen) && (status & SSP_SR_RNE)) - ((u8 *)din)[idx_in++] = readl(&lslave->regs->data); - if (get_timer(start_time) >= CONFIG_LPC32XX_SSP_TIMEOUT) - return -1; - } - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - /* do nothing */ -} diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 2f8c655b2c..e1f729a854 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -58,11 +58,6 @@ */ #define CONFIG_LPC32XX_GPIO
-/* - * SSP/SPI - */ -#define CONFIG_LPC32XX_SSP_TIMEOUT 100000 - /* * Ethernet */ diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 67b5e9aa11..9d9a53ef09 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -109,11 +109,6 @@
#define CONFIG_LPC32XX_GPIO
-/* - * SSP/SPI/DISPLAY - */ - -#define CONFIG_LPC32XX_SSP_TIMEOUT 100000 /* * Environment */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 760d5e05dc..6b8c1ddb35 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1170,7 +1170,6 @@ CONFIG_LPC32XX_NAND_SLC_WDR_CLKS CONFIG_LPC32XX_NAND_SLC_WHOLD CONFIG_LPC32XX_NAND_SLC_WSETUP CONFIG_LPC32XX_NAND_SLC_WWIDTH -CONFIG_LPC32XX_SSP_TIMEOUT CONFIG_LPC_BASE CONFIG_LPC_IO_BASE CONFIG_LPUART
Dropped - mxs_spi driver - CONFIG_MXS_SPI
Dropped becuase - no active updates - no dm conversion - multiple pings for asking dm-conversion - no reponse for dm converted patch - driver-model migration expiry
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- configs/bg0900_defconfig | 1 - configs/mx28evk_auart_console_defconfig | 1 - configs/mx28evk_defconfig | 1 - configs/mx28evk_nand_defconfig | 1 - configs/mx28evk_spi_defconfig | 1 - drivers/spi/Kconfig | 6 - drivers/spi/Makefile | 1 - drivers/spi/mxs_spi.c | 358 ------------------------ 8 files changed, 370 deletions(-) delete mode 100644 drivers/spi/mxs_spi.c
diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig index 6de81621cd..1883e28dee 100644 --- a/configs/bg0900_defconfig +++ b/configs/bg0900_defconfig @@ -37,5 +37,4 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_SPI=y -CONFIG_MXS_SPI=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index d0572212f1..c9a2a7daf8 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -47,7 +47,6 @@ CONFIG_SPI_FLASH_SST=y CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_SPI=y -CONFIG_MXS_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index ab59d7599b..c2fbbfe6ec 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -47,7 +47,6 @@ CONFIG_SPI_FLASH_SST=y CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_SPI=y -CONFIG_MXS_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index 6b774cf248..80e82a7c4b 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -46,7 +46,6 @@ CONFIG_SPI_FLASH_SST=y CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_SPI=y -CONFIG_MXS_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 0a77e6e9f7..77123153cb 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -46,7 +46,6 @@ CONFIG_SPI_FLASH_SST=y CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_SPI=y -CONFIG_MXS_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index ebe3ba3bcc..797ca80be7 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -334,12 +334,6 @@ config MXC_SPI Enable the MXC SPI controller driver. This driver can be used on various i.MX SoCs such as i.MX31/35/51/6/7.
-config MXS_SPI - bool "MXS SPI Driver" - help - Enable the MXS SPI controller driver. This driver can be used - on the i.MX23 and i.MX28 SoCs. - config OMAP3_SPI bool "McSPI driver for OMAP" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 7d676988fd..c4c9d2f393 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -35,7 +35,6 @@ obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o obj-$(CONFIG_MXC_SPI) += mxc_spi.o -obj-$(CONFIG_MXS_SPI) += mxs_spi.o obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_PIC32_SPI) += pic32_spi.o diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c deleted file mode 100644 index 5065e407f8..0000000000 --- a/drivers/spi/mxs_spi.c +++ /dev/null @@ -1,358 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Freescale i.MX28 SPI driver - * - * Copyright (C) 2011 Marek Vasut marek.vasut@gmail.com - * on behalf of DENX Software Engineering GmbH - * - * NOTE: This driver only supports the SPI-controller chipselects, - * GPIO driven chipselects are not supported. - */ - -#include <common.h> -#include <malloc.h> -#include <memalign.h> -#include <spi.h> -#include <linux/errno.h> -#include <asm/io.h> -#include <asm/arch/clock.h> -#include <asm/arch/imx-regs.h> -#include <asm/arch/sys_proto.h> -#include <asm/mach-imx/dma.h> - -#define MXS_SPI_MAX_TIMEOUT 1000000 -#define MXS_SPI_PORT_OFFSET 0x2000 -#define MXS_SSP_CHIPSELECT_MASK 0x00300000 -#define MXS_SSP_CHIPSELECT_SHIFT 20 - -#define MXSSSP_SMALL_TRANSFER 512 - -struct mxs_spi_slave { - struct spi_slave slave; - uint32_t max_khz; - uint32_t mode; - struct mxs_ssp_regs *regs; -}; - -static inline struct mxs_spi_slave *to_mxs_slave(struct spi_slave *slave) -{ - return container_of(slave, struct mxs_spi_slave, slave); -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - /* MXS SPI: 4 ports and 3 chip selects maximum */ - if (!mxs_ssp_bus_id_valid(bus) || cs > 2) - return 0; - else - return 1; -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct mxs_spi_slave *mxs_slave; - - if (!spi_cs_is_valid(bus, cs)) { - printf("mxs_spi: invalid bus %d / chip select %d\n", bus, cs); - return NULL; - } - - mxs_slave = spi_alloc_slave(struct mxs_spi_slave, bus, cs); - if (!mxs_slave) - return NULL; - - if (mxs_dma_init_channel(MXS_DMA_CHANNEL_AHB_APBH_SSP0 + bus)) - goto err_init; - - mxs_slave->max_khz = max_hz / 1000; - mxs_slave->mode = mode; - mxs_slave->regs = mxs_ssp_regs_by_bus(bus); - - return &mxs_slave->slave; - -err_init: - free(mxs_slave); - return NULL; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave); - free(mxs_slave); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave); - struct mxs_ssp_regs *ssp_regs = mxs_slave->regs; - uint32_t reg = 0; - - mxs_reset_block(&ssp_regs->hw_ssp_ctrl0_reg); - - writel((slave->cs << MXS_SSP_CHIPSELECT_SHIFT) | - SSP_CTRL0_BUS_WIDTH_ONE_BIT, - &ssp_regs->hw_ssp_ctrl0); - - reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS; - reg |= (mxs_slave->mode & SPI_CPOL) ? SSP_CTRL1_POLARITY : 0; - reg |= (mxs_slave->mode & SPI_CPHA) ? SSP_CTRL1_PHASE : 0; - writel(reg, &ssp_regs->hw_ssp_ctrl1); - - writel(0, &ssp_regs->hw_ssp_cmd0); - - mxs_set_ssp_busclock(slave->bus, mxs_slave->max_khz); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ -} - -static void mxs_spi_start_xfer(struct mxs_ssp_regs *ssp_regs) -{ - writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_set); - writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_clr); -} - -static void mxs_spi_end_xfer(struct mxs_ssp_regs *ssp_regs) -{ - writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_clr); - writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set); -} - -static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave, - char *data, int length, int write, unsigned long flags) -{ - struct mxs_ssp_regs *ssp_regs = slave->regs; - - if (flags & SPI_XFER_BEGIN) - mxs_spi_start_xfer(ssp_regs); - - while (length--) { - /* We transfer 1 byte */ -#if defined(CONFIG_MX23) - writel(SSP_CTRL0_XFER_COUNT_MASK, &ssp_regs->hw_ssp_ctrl0_clr); - writel(1, &ssp_regs->hw_ssp_ctrl0_set); -#elif defined(CONFIG_MX28) - writel(1, &ssp_regs->hw_ssp_xfer_size); -#endif - - if ((flags & SPI_XFER_END) && !length) - mxs_spi_end_xfer(ssp_regs); - - if (write) - writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_clr); - else - writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_set); - - writel(SSP_CTRL0_RUN, &ssp_regs->hw_ssp_ctrl0_set); - - if (mxs_wait_mask_set(&ssp_regs->hw_ssp_ctrl0_reg, - SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) { - printf("MXS SPI: Timeout waiting for start\n"); - return -ETIMEDOUT; - } - - if (write) - writel(*data++, &ssp_regs->hw_ssp_data); - - writel(SSP_CTRL0_DATA_XFER, &ssp_regs->hw_ssp_ctrl0_set); - - if (!write) { - if (mxs_wait_mask_clr(&ssp_regs->hw_ssp_status_reg, - SSP_STATUS_FIFO_EMPTY, MXS_SPI_MAX_TIMEOUT)) { - printf("MXS SPI: Timeout waiting for data\n"); - return -ETIMEDOUT; - } - - *data = readl(&ssp_regs->hw_ssp_data); - data++; - } - - if (mxs_wait_mask_clr(&ssp_regs->hw_ssp_ctrl0_reg, - SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) { - printf("MXS SPI: Timeout waiting for finish\n"); - return -ETIMEDOUT; - } - } - - return 0; -} - -static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave, - char *data, int length, int write, unsigned long flags) -{ - const int xfer_max_sz = 0xff00; - const int desc_count = DIV_ROUND_UP(length, xfer_max_sz) + 1; - struct mxs_ssp_regs *ssp_regs = slave->regs; - struct mxs_dma_desc *dp; - uint32_t ctrl0; - uint32_t cache_data_count; - const uint32_t dstart = (uint32_t)data; - int dmach; - int tl; - int ret = 0; - -#if defined(CONFIG_MX23) - const int mxs_spi_pio_words = 1; -#elif defined(CONFIG_MX28) - const int mxs_spi_pio_words = 4; -#endif - - ALLOC_CACHE_ALIGN_BUFFER(struct mxs_dma_desc, desc, desc_count); - - memset(desc, 0, sizeof(struct mxs_dma_desc) * desc_count); - - ctrl0 = readl(&ssp_regs->hw_ssp_ctrl0); - ctrl0 |= SSP_CTRL0_DATA_XFER; - - if (flags & SPI_XFER_BEGIN) - ctrl0 |= SSP_CTRL0_LOCK_CS; - if (!write) - ctrl0 |= SSP_CTRL0_READ; - - if (length % ARCH_DMA_MINALIGN) - cache_data_count = roundup(length, ARCH_DMA_MINALIGN); - else - cache_data_count = length; - - /* Flush data to DRAM so DMA can pick them up */ - if (write) - flush_dcache_range(dstart, dstart + cache_data_count); - - /* Invalidate the area, so no writeback into the RAM races with DMA */ - invalidate_dcache_range(dstart, dstart + cache_data_count); - - dmach = MXS_DMA_CHANNEL_AHB_APBH_SSP0 + slave->slave.bus; - - dp = desc; - while (length) { - dp->address = (dma_addr_t)dp; - dp->cmd.address = (dma_addr_t)data; - - /* - * This is correct, even though it does indeed look insane. - * I hereby have to, wholeheartedly, thank Freescale Inc., - * for always inventing insane hardware and keeping me busy - * and employed ;-) - */ - if (write) - dp->cmd.data = MXS_DMA_DESC_COMMAND_DMA_READ; - else - dp->cmd.data = MXS_DMA_DESC_COMMAND_DMA_WRITE; - - /* - * The DMA controller can transfer large chunks (64kB) at - * time by setting the transfer length to 0. Setting tl to - * 0x10000 will overflow below and make .data contain 0. - * Otherwise, 0xff00 is the transfer maximum. - */ - if (length >= 0x10000) - tl = 0x10000; - else - tl = min(length, xfer_max_sz); - - dp->cmd.data |= - ((tl & 0xffff) << MXS_DMA_DESC_BYTES_OFFSET) | - (mxs_spi_pio_words << MXS_DMA_DESC_PIO_WORDS_OFFSET) | - MXS_DMA_DESC_HALT_ON_TERMINATE | - MXS_DMA_DESC_TERMINATE_FLUSH; - - data += tl; - length -= tl; - - if (!length) { - dp->cmd.data |= MXS_DMA_DESC_IRQ | MXS_DMA_DESC_DEC_SEM; - - if (flags & SPI_XFER_END) { - ctrl0 &= ~SSP_CTRL0_LOCK_CS; - ctrl0 |= SSP_CTRL0_IGNORE_CRC; - } - } - - /* - * Write CTRL0, CMD0, CMD1 and XFER_SIZE registers in - * case of MX28, write only CTRL0 in case of MX23 due - * to the difference in register layout. It is utterly - * essential that the XFER_SIZE register is written on - * a per-descriptor basis with the same size as is the - * descriptor! - */ - dp->cmd.pio_words[0] = ctrl0; -#ifdef CONFIG_MX28 - dp->cmd.pio_words[1] = 0; - dp->cmd.pio_words[2] = 0; - dp->cmd.pio_words[3] = tl; -#endif - - mxs_dma_desc_append(dmach, dp); - - dp++; - } - - if (mxs_dma_go(dmach)) - ret = -EINVAL; - - /* The data arrived into DRAM, invalidate cache over them */ - if (!write) - invalidate_dcache_range(dstart, dstart + cache_data_count); - - return ret; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave); - struct mxs_ssp_regs *ssp_regs = mxs_slave->regs; - int len = bitlen / 8; - char dummy; - int write = 0; - char *data = NULL; - int dma = 1; - - if (bitlen == 0) { - if (flags & SPI_XFER_END) { - din = (void *)&dummy; - len = 1; - } else - return 0; - } - - /* Half-duplex only */ - if (din && dout) - return -EINVAL; - /* No data */ - if (!din && !dout) - return 0; - - if (dout) { - data = (char *)dout; - write = 1; - } else if (din) { - data = (char *)din; - write = 0; - } - - /* - * Check for alignment, if the buffer is aligned, do DMA transfer, - * PIO otherwise. This is a temporary workaround until proper bounce - * buffer is in place. - */ - if (dma) { - if (((uint32_t)data) & (ARCH_DMA_MINALIGN - 1)) - dma = 0; - if (((uint32_t)len) & (ARCH_DMA_MINALIGN - 1)) - dma = 0; - } - - if (!dma || (len < MXSSSP_SMALL_TRANSFER)) { - writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_clr); - return mxs_spi_xfer_pio(mxs_slave, data, len, write, flags); - } else { - writel(SSP_CTRL1_DMA_ENABLE, &ssp_regs->hw_ssp_ctrl1_set); - return mxs_spi_xfer_dma(mxs_slave, data, len, write, flags); - } -}
Dropped - sh_spi driver - CONFIG_SH_SPI,SH_SPI_BASE
Dropped becuase - no active updates - no dm conversion - multiple pings for asking dm-conversion - no reponse for dm converted patch - driver-model migration expiry
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- configs/sh7752evb_defconfig | 1 - configs/sh7753evb_defconfig | 1 - configs/sh7757lcr_defconfig | 1 - drivers/spi/Kconfig | 6 - drivers/spi/Makefile | 1 - drivers/spi/sh_spi.c | 249 ----------------------------------- drivers/spi/sh_spi.h | 67 ---------- include/configs/sh7752evb.h | 3 - include/configs/sh7753evb.h | 3 - include/configs/sh7757lcr.h | 3 - scripts/config_whitelist.txt | 1 - 11 files changed, 336 deletions(-) delete mode 100644 drivers/spi/sh_spi.c delete mode 100644 drivers/spi/sh_spi.h
diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig index b34709d1ea..425f194c95 100644 --- a/configs/sh7752evb_defconfig +++ b/configs/sh7752evb_defconfig @@ -38,5 +38,4 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_SPI=y -CONFIG_SH_SPI=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig index 857e90b86a..3904e1b39d 100644 --- a/configs/sh7753evb_defconfig +++ b/configs/sh7753evb_defconfig @@ -37,5 +37,4 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_SPI=y -CONFIG_SH_SPI=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig index 8314435b93..d4a132f50b 100644 --- a/configs/sh7757lcr_defconfig +++ b/configs/sh7757lcr_defconfig @@ -39,5 +39,4 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_SPI=y -CONFIG_SH_SPI=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 797ca80be7..1d0d7b7bb9 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -298,12 +298,6 @@ config DAVINCI_SPI help Enable the Davinci SPI driver
-config SH_SPI - bool "SuperH SPI driver" - help - Enable the SuperH SPI controller driver. This driver can be used - on various SuperH SoCs, such as SH7757. - config SH_QSPI bool "Renesas Quad SPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index c4c9d2f393..b531ebbf83 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -42,7 +42,6 @@ obj-$(CONFIG_PL022_SPI) += pl022_spi.o obj-$(CONFIG_RENESAS_RPC_SPI) += renesas_rpc_spi.o obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o -obj-$(CONFIG_SH_SPI) += sh_spi.o obj-$(CONFIG_SH_QSPI) += sh_qspi.o obj-$(CONFIG_STM32_QSPI) += stm32_qspi.o obj-$(CONFIG_SUN4I_SPI) += sun4i_spi.o diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c deleted file mode 100644 index c58fd0ebc4..0000000000 --- a/drivers/spi/sh_spi.c +++ /dev/null @@ -1,249 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * SH SPI driver - * - * Copyright (C) 2011-2012 Renesas Solutions Corp. - */ - -#include <common.h> -#include <console.h> -#include <malloc.h> -#include <spi.h> -#include <asm/io.h> -#include "sh_spi.h" - -static void sh_spi_write(unsigned long data, unsigned long *reg) -{ - writel(data, reg); -} - -static unsigned long sh_spi_read(unsigned long *reg) -{ - return readl(reg); -} - -static void sh_spi_set_bit(unsigned long val, unsigned long *reg) -{ - unsigned long tmp; - - tmp = sh_spi_read(reg); - tmp |= val; - sh_spi_write(tmp, reg); -} - -static void sh_spi_clear_bit(unsigned long val, unsigned long *reg) -{ - unsigned long tmp; - - tmp = sh_spi_read(reg); - tmp &= ~val; - sh_spi_write(tmp, reg); -} - -static void clear_fifo(struct sh_spi *ss) -{ - sh_spi_set_bit(SH_SPI_RSTF, &ss->regs->cr2); - sh_spi_clear_bit(SH_SPI_RSTF, &ss->regs->cr2); -} - -static int recvbuf_wait(struct sh_spi *ss) -{ - while (sh_spi_read(&ss->regs->cr1) & SH_SPI_RBE) { - if (ctrlc()) - return 1; - udelay(10); - } - return 0; -} - -static int write_fifo_empty_wait(struct sh_spi *ss) -{ - while (!(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBE)) { - if (ctrlc()) - return 1; - udelay(10); - } - return 0; -} - -static void sh_spi_set_cs(struct sh_spi *ss, unsigned int cs) -{ - unsigned long val = 0; - - if (cs & 0x01) - val |= SH_SPI_SSS0; - if (cs & 0x02) - val |= SH_SPI_SSS1; - - sh_spi_clear_bit(SH_SPI_SSS0 | SH_SPI_SSS1, &ss->regs->cr4); - sh_spi_set_bit(val, &ss->regs->cr4); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct sh_spi *ss; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - ss = spi_alloc_slave(struct sh_spi, bus, cs); - if (!ss) - return NULL; - - ss->regs = (struct sh_spi_regs *)CONFIG_SH_SPI_BASE; - - /* SPI sycle stop */ - sh_spi_write(0xfe, &ss->regs->cr1); - /* CR1 init */ - sh_spi_write(0x00, &ss->regs->cr1); - /* CR3 init */ - sh_spi_write(0x00, &ss->regs->cr3); - sh_spi_set_cs(ss, cs); - - clear_fifo(ss); - - /* 1/8 clock */ - sh_spi_write(sh_spi_read(&ss->regs->cr2) | 0x07, &ss->regs->cr2); - udelay(10); - - return &ss->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct sh_spi *spi = to_sh_spi(slave); - - free(spi); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct sh_spi *ss = to_sh_spi(slave); - - sh_spi_write(sh_spi_read(&ss->regs->cr1) & - ~(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD), &ss->regs->cr1); -} - -static int sh_spi_send(struct sh_spi *ss, const unsigned char *tx_data, - unsigned int len, unsigned long flags) -{ - int i, cur_len, ret = 0; - int remain = (int)len; - - if (len >= SH_SPI_FIFO_SIZE) - sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); - - while (remain > 0) { - cur_len = (remain < SH_SPI_FIFO_SIZE) ? - remain : SH_SPI_FIFO_SIZE; - for (i = 0; i < cur_len && - !(sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) && - !(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBF); - i++) - sh_spi_write(tx_data[i], &ss->regs->tbr_rbr); - - cur_len = i; - - if (sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) { - /* Abort the transaction */ - flags |= SPI_XFER_END; - sh_spi_set_bit(SH_SPI_WPABRT, &ss->regs->cr4); - ret = 1; - break; - } - - remain -= cur_len; - tx_data += cur_len; - - if (remain > 0) - write_fifo_empty_wait(ss); - } - - if (flags & SPI_XFER_END) { - sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1); - sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); - udelay(100); - write_fifo_empty_wait(ss); - } - - return ret; -} - -static int sh_spi_receive(struct sh_spi *ss, unsigned char *rx_data, - unsigned int len, unsigned long flags) -{ - int i; - - if (len > SH_SPI_MAX_BYTE) - sh_spi_write(SH_SPI_MAX_BYTE, &ss->regs->cr3); - else - sh_spi_write(len, &ss->regs->cr3); - - sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1); - sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); - - for (i = 0; i < len; i++) { - if (recvbuf_wait(ss)) - return 0; - - rx_data[i] = (unsigned char)sh_spi_read(&ss->regs->tbr_rbr); - } - sh_spi_write(0, &ss->regs->cr3); - - return 0; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct sh_spi *ss = to_sh_spi(slave); - const unsigned char *tx_data = dout; - unsigned char *rx_data = din; - unsigned int len = bitlen / 8; - int ret = 0; - - if (flags & SPI_XFER_BEGIN) - sh_spi_write(sh_spi_read(&ss->regs->cr1) & ~SH_SPI_SSA, - &ss->regs->cr1); - - if (tx_data) - ret = sh_spi_send(ss, tx_data, len, flags); - - if (ret == 0 && rx_data) - ret = sh_spi_receive(ss, rx_data, len, flags); - - if (flags & SPI_XFER_END) { - sh_spi_set_bit(SH_SPI_SSD, &ss->regs->cr1); - udelay(100); - - sh_spi_clear_bit(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD, - &ss->regs->cr1); - clear_fifo(ss); - } - - return ret; -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - if (!bus && cs < SH_SPI_NUM_CS) - return 1; - else - return 0; -} - -void spi_cs_activate(struct spi_slave *slave) -{ - -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - -} diff --git a/drivers/spi/sh_spi.h b/drivers/spi/sh_spi.h deleted file mode 100644 index 33a4630c8d..0000000000 --- a/drivers/spi/sh_spi.h +++ /dev/null @@ -1,67 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * SH SPI driver - * - * Copyright (C) 2011 Renesas Solutions Corp. - */ - -#ifndef __SH_SPI_H__ -#define __SH_SPI_H__ - -#include <spi.h> - -struct sh_spi_regs { - unsigned long tbr_rbr; - unsigned long resv1; - unsigned long cr1; - unsigned long resv2; - unsigned long cr2; - unsigned long resv3; - unsigned long cr3; - unsigned long resv4; - unsigned long cr4; -}; - -/* CR1 */ -#define SH_SPI_TBE 0x80 -#define SH_SPI_TBF 0x40 -#define SH_SPI_RBE 0x20 -#define SH_SPI_RBF 0x10 -#define SH_SPI_PFONRD 0x08 -#define SH_SPI_SSDB 0x04 -#define SH_SPI_SSD 0x02 -#define SH_SPI_SSA 0x01 - -/* CR2 */ -#define SH_SPI_RSTF 0x80 -#define SH_SPI_LOOPBK 0x40 -#define SH_SPI_CPOL 0x20 -#define SH_SPI_CPHA 0x10 -#define SH_SPI_L1M0 0x08 - -/* CR3 */ -#define SH_SPI_MAX_BYTE 0xFF - -/* CR4 */ -#define SH_SPI_TBEI 0x80 -#define SH_SPI_TBFI 0x40 -#define SH_SPI_RBEI 0x20 -#define SH_SPI_RBFI 0x10 -#define SH_SPI_SSS1 0x08 -#define SH_SPI_WPABRT 0x04 -#define SH_SPI_SSS0 0x01 - -#define SH_SPI_FIFO_SIZE 32 -#define SH_SPI_NUM_CS 4 - -struct sh_spi { - struct spi_slave slave; - struct sh_spi_regs *regs; -}; - -static inline struct sh_spi *to_sh_spi(struct spi_slave *slave) -{ - return container_of(slave, struct sh_spi, slave); -} - -#endif diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index 1f29e3d221..c52d0f64de 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -55,9 +55,6 @@ #define SH7752EVB_ETHERNET_MAC_SIZE 17 #define SH7752EVB_ETHERNET_NUM_CH 2
-/* SPI */ -#define CONFIG_SH_SPI_BASE 0xfe002000 - /* MMCIF */ #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 #define CONFIG_SH_MMCIF_CLK 48000000 diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h index 0693fb5a3c..c6da7a2848 100644 --- a/include/configs/sh7753evb.h +++ b/include/configs/sh7753evb.h @@ -55,9 +55,6 @@ #define SH7753EVB_ETHERNET_MAC_SIZE 17 #define SH7753EVB_ETHERNET_NUM_CH 2
-/* SPI */ -#define CONFIG_SH_SPI_BASE 0xfe002000 - /* MMCIF */ #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 #define CONFIG_SH_MMCIF_CLK 48000000 diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index 05b2f01c15..2bd430f5d1 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -59,9 +59,6 @@ /* Gigabit Ether */ #define SH7757LCR_GIGA_ETHERNET_NUM_CH 2
-/* SPI */ -#define CONFIG_SH_SPI_BASE 0xfe002000 - /* MMCIF */ #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 #define CONFIG_SH_MMCIF_CLK 48000000 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 6b8c1ddb35..5f20ad1a12 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1767,7 +1767,6 @@ CONFIG_SH_QSPI_BASE CONFIG_SH_SCIF_CLK_FREQ CONFIG_SH_SDHI_FREQ CONFIG_SH_SDRAM_OFFSET -CONFIG_SH_SPI_BASE CONFIG_SIEMENS_MACH_TYPE CONFIG_SIMU CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION
On 11/25/2018 06:28 PM, Jagan Teki wrote:
(trimming the insane and utterly useless To: list)
Dropped
- sh_spi driver
- CONFIG_SH_SPI,SH_SPI_BASE
Dropped becuase
- no active updates
- no dm conversion
- multiple pings for asking dm-conversion
I haven't received a single notification, this is even worse than the horrible botched handling of BLK conversion series.
- no reponse for dm converted patch
- driver-model migration expiry
NAK, this patch breaks multiple boards which are in active use. The SPL on those boards has size limitations which do not permit DM.
On Sun, Nov 25, 2018 at 11:36 PM Marek Vasut marek.vasut@gmail.com wrote:
On 11/25/2018 06:28 PM, Jagan Teki wrote:
(trimming the insane and utterly useless To: list)
Dropped
- sh_spi driver
- CONFIG_SH_SPI,SH_SPI_BASE
Dropped becuase
- no active updates
- no dm conversion
- multiple pings for asking dm-conversion
I haven't received a single notification, this is even worse than the horrible botched handling of BLK conversion series.
On Sun, Nov 25, 2018 at 11:36 PM Marek Vasut marek.vasut@gmail.com wrote:
On 11/25/2018 06:28 PM, Jagan Teki wrote:
(trimming the insane and utterly useless To: list)
Dropped
- sh_spi driver
- CONFIG_SH_SPI,SH_SPI_BASE
Dropped becuase
- no active updates
- no dm conversion
- multiple pings for asking dm-conversion
I haven't received a single notification, this is even worse than the horrible botched handling of BLK conversion series.
Been in ML [1] since from last May.
- no reponse for dm converted patch
- driver-model migration expiry
NAK, this patch breaks multiple boards which are in active use. The SPL on those boards has size limitations which do not permit DM.
What about using platdata in above patch?
Dropped - soft_spi_legacy driver - CONFIG_SOFT_SPI
Dropped becuase - no active updates - no dm conversion - multiple pings for asking dm-conversion - driver-model migration expiry
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/spi/Kconfig | 12 +-- drivers/spi/Makefile | 1 - drivers/spi/soft_spi_legacy.c | 168 ---------------------------------- include/configs/MPC8349EMDS.h | 3 - include/configs/zipitz2.h | 1 - 5 files changed, 6 insertions(+), 179 deletions(-) delete mode 100644 drivers/spi/soft_spi_legacy.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 1d0d7b7bb9..faed69bd03 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -194,6 +194,12 @@ config SANDBOX_SPI }; };
+config SOFT_SPI + bool "Soft SPI driver" + help + Enable Soft SPI driver. This driver is to use GPIO simulate + the SPI protocol. + config STM32_QSPI bool "STM32F7 QSPI driver" depends on STM32F7 @@ -272,12 +278,6 @@ config ZYNQMP_GQSPI
endif # if DM_SPI
-config SOFT_SPI - bool "Soft SPI driver" - help - Enable Soft SPI driver. This driver is to use GPIO simulate - the SPI protocol. - config FSL_ESPI bool "Freescale eSPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index b531ebbf83..49e614e124 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -15,7 +15,6 @@ obj-$(CONFIG_SPI_MEM) += spi-mem.o obj-$(CONFIG_TI_QSPI) += ti_qspi.o else obj-y += spi.o -obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o endif
obj-$(CONFIG_ALTERA_SPI) += altera_spi.o diff --git a/drivers/spi/soft_spi_legacy.c b/drivers/spi/soft_spi_legacy.c deleted file mode 100644 index cc5ab5f991..0000000000 --- a/drivers/spi/soft_spi_legacy.c +++ /dev/null @@ -1,168 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2002 - * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. - * - * Influenced by code from: - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - */ - -#include <common.h> -#include <spi.h> - -#include <malloc.h> - -/*----------------------------------------------------------------------- - * Definitions - */ - -#ifdef DEBUG_SPI -#define PRINTD(fmt,args...) printf (fmt ,##args) -#else -#define PRINTD(fmt,args...) -#endif - -struct soft_spi_slave { - struct spi_slave slave; - unsigned int mode; -}; - -static inline struct soft_spi_slave *to_soft_spi(struct spi_slave *slave) -{ - return container_of(slave, struct soft_spi_slave, slave); -} - -/*=====================================================================*/ -/* Public Functions */ -/*=====================================================================*/ - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct soft_spi_slave *ss; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - ss = spi_alloc_slave(struct soft_spi_slave, bus, cs); - if (!ss) - return NULL; - - ss->mode = mode; - - /* TODO: Use max_hz to limit the SCK rate */ - - return &ss->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct soft_spi_slave *ss = to_soft_spi(slave); - - free(ss); -} - -int spi_claim_bus(struct spi_slave *slave) -{ -#ifdef CONFIG_SYS_IMMR - volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; -#endif - struct soft_spi_slave *ss = to_soft_spi(slave); - - /* - * Make sure the SPI clock is in idle state as defined for - * this slave. - */ - if (ss->mode & SPI_CPOL) - SPI_SCL(1); - else - SPI_SCL(0); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - /* Nothing to do */ -} - -/*----------------------------------------------------------------------- - * SPI transfer - * - * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks - * "bitlen" bits in the SPI MISO port. That's just the way SPI works. - * - * The source of the outgoing bits is the "dout" parameter and the - * destination of the input bits is the "din" parameter. Note that "dout" - * and "din" can point to the same memory location, in which case the - * input data overwrites the output data (since both are buffered by - * temporary variables, this is OK). - */ -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ -#ifdef CONFIG_SYS_IMMR - volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; -#endif - struct soft_spi_slave *ss = to_soft_spi(slave); - uchar tmpdin = 0; - uchar tmpdout = 0; - const u8 *txd = dout; - u8 *rxd = din; - int cpol = ss->mode & SPI_CPOL; - int cpha = ss->mode & SPI_CPHA; - unsigned int j; - - PRINTD("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", - slave->bus, slave->cs, *(uint *)txd, *(uint *)rxd, bitlen); - - if (flags & SPI_XFER_BEGIN) - spi_cs_activate(slave); - - for(j = 0; j < bitlen; j++) { - /* - * Check if it is time to work on a new byte. - */ - if ((j % 8) == 0) { - if (txd) - tmpdout = *txd++; - else - tmpdout = 0; - if(j != 0) { - if (rxd) - *rxd++ = tmpdin; - } - tmpdin = 0; - } - - if (!cpha) - SPI_SCL(!cpol); - SPI_SDA(tmpdout & 0x80); - SPI_DELAY; - if (cpha) - SPI_SCL(!cpol); - else - SPI_SCL(cpol); - tmpdin <<= 1; - tmpdin |= SPI_READ; - tmpdout <<= 1; - SPI_DELAY; - if (cpha) - SPI_SCL(cpol); - } - /* - * If the number of bits isn't a multiple of 8, shift the last - * bits over to left-justify them. Then store the last byte - * read in. - */ - if (rxd) { - if ((bitlen % 8) != 0) - tmpdin <<= 8 - (bitlen % 8); - *rxd++ = tmpdin; - } - - if (flags & SPI_XFER_END) - spi_cs_deactivate(slave); - - return(0); -} diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index bda477cc16..a54f4ca251 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -320,9 +320,6 @@ #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
-/* SPI */ -#undef CONFIG_SOFT_SPI /* SPI bit-banged */ - /* GPIOs. Used as SPI chip selects */ #define CONFIG_SYS_GPIO1_PRELIM #define CONFIG_SYS_GPIO1_DIR 0xC0000000 /* SPI CS on 0, LED on 1 */ diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 24fea68a11..baf3e6e130 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -59,7 +59,6 @@ * SPI and LCD */ #ifdef CONFIG_CMD_SPI -#define CONFIG_SOFT_SPI #define CONFIG_LCD_ROTATION #define CONFIG_PXA_LCD #define CONFIG_LMS283GF05
Drop the non-dm code, those board which uses non-dm need to define DM_SPI. u-boot build trigger the warning for the same.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Makefile | 2 +- drivers/spi/Makefile | 2 +- drivers/spi/mxc_spi.c | 123 ++---------------------------------------- 3 files changed, 5 insertions(+), 122 deletions(-)
diff --git a/Makefile b/Makefile index 7c1d934493..3be3bb3118 100644 --- a/Makefile +++ b/Makefile @@ -920,7 +920,7 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) endif ifeq ($(CONFIG_DM_SPI),) ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_MPC8XXX_SPI) \ - $(CONFIG_TI_QSPI),y),y) + $(CONFIG_MXC_SPI) $(CONFIG_TI_QSPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 49e614e124..c682b014e7 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -9,6 +9,7 @@ obj-y += spi-uclass.o obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o +obj-$(CONFIG_MXC_SPI) += mxc_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o @@ -33,7 +34,6 @@ obj-$(CONFIG_ICH_SPI) += ich.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o -obj-$(CONFIG_MXC_SPI) += mxc_spi.o obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_PIC32_SPI) += pic32_spi.o diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index b2636909ce..f6c6685e7e 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -57,26 +57,6 @@ static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave) return container_of(slave, struct mxc_spi_slave, slave); }
-static void mxc_spi_cs_activate(struct mxc_spi_slave *mxcs) -{ - if (CONFIG_IS_ENABLED(DM_SPI)) { - dm_gpio_set_value(&mxcs->ss, 1); - } else { - if (mxcs->gpio > 0) - gpio_set_value(mxcs->gpio, mxcs->ss_pol); - } -} - -static void mxc_spi_cs_deactivate(struct mxc_spi_slave *mxcs) -{ - if (CONFIG_IS_ENABLED(DM_SPI)) { - dm_gpio_set_value(&mxcs->ss, 0); - } else { - if (mxcs->gpio > 0) - gpio_set_value(mxcs->gpio, !(mxcs->ss_pol)); - } -} - u32 get_cspi_div(u32 div) { int i; @@ -345,7 +325,7 @@ static int mxc_spi_xfer_internal(struct mxc_spi_slave *mxcs, return -EINVAL;
if (flags & SPI_XFER_BEGIN) - mxc_spi_cs_activate(mxcs); + dm_gpio_set_value(&mxcs->ss, 1);
while (n_bytes > 0) { if (n_bytes < MAX_SPI_BYTES) @@ -366,9 +346,8 @@ static int mxc_spi_xfer_internal(struct mxc_spi_slave *mxcs, n_bytes -= blk_size; }
- if (flags & SPI_XFER_END) { - mxc_spi_cs_deactivate(mxcs); - } + if (flags & SPI_XFER_END) + dm_gpio_set_value(&mxcs->ss, 0);
return 0; } @@ -391,101 +370,6 @@ static int mxc_spi_claim_bus_internal(struct mxc_spi_slave *mxcs, int cs) return 0; }
-#ifndef CONFIG_DM_SPI -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); - - return mxc_spi_xfer_internal(mxcs, bitlen, dout, din, flags); -} - -/* - * Some SPI devices require active chip-select over multiple - * transactions, we achieve this using a GPIO. Still, the SPI - * controller has to be configured to use one of its own chipselects. - * To use this feature you have to implement board_spi_cs_gpio() to assign - * a gpio value for each cs (-1 if cs doesn't need to use gpio). - * You must use some unused on this SPI controller cs between 0 and 3. - */ -static int setup_cs_gpio(struct mxc_spi_slave *mxcs, - unsigned int bus, unsigned int cs) -{ - int ret; - - mxcs->gpio = board_spi_cs_gpio(bus, cs); - if (mxcs->gpio == -1) - return 0; - - gpio_request(mxcs->gpio, "spi-cs"); - ret = gpio_direction_output(mxcs->gpio, !(mxcs->ss_pol)); - if (ret) { - printf("mxc_spi: cannot setup gpio %d\n", mxcs->gpio); - return -EINVAL; - } - - return 0; -} - -static unsigned long spi_bases[] = { - MXC_SPI_BASE_ADDRESSES -}; - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct mxc_spi_slave *mxcs; - int ret; - - if (bus >= ARRAY_SIZE(spi_bases)) - return NULL; - - if (max_hz == 0) { - printf("Error: desired clock is 0\n"); - return NULL; - } - - mxcs = spi_alloc_slave(struct mxc_spi_slave, bus, cs); - if (!mxcs) { - puts("mxc_spi: SPI Slave not allocated !\n"); - return NULL; - } - - mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0; - - ret = setup_cs_gpio(mxcs, bus, cs); - if (ret < 0) { - free(mxcs); - return NULL; - } - - mxcs->base = spi_bases[bus]; - mxcs->max_hz = max_hz; - mxcs->mode = mode; - - return &mxcs->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); - - free(mxcs); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); - - return mxc_spi_claim_bus_internal(mxcs, slave->cs); -} - -void spi_release_bus(struct spi_slave *slave) -{ - /* TODO: Shut the controller down */ -} -#else - static int mxc_spi_probe(struct udevice *bus) { struct mxc_spi_slave *plat = bus->platdata; @@ -575,4 +459,3 @@ U_BOOT_DRIVER(mxc_spi) = { .platdata_auto_alloc_size = sizeof(struct mxc_spi_slave), .probe = mxc_spi_probe, }; -#endif
Drop the non-dm code, those board which uses non-dm need to define DM_SPI. u-boot build trigger the warning for the same.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Makefile | 2 +- drivers/spi/Makefile | 2 +- drivers/spi/omap3_spi.c | 126 ---------------------------------------- 3 files changed, 2 insertions(+), 128 deletions(-)
diff --git a/Makefile b/Makefile index 3be3bb3118..00f0117b16 100644 --- a/Makefile +++ b/Makefile @@ -920,7 +920,7 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) endif ifeq ($(CONFIG_DM_SPI),) ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_MPC8XXX_SPI) \ - $(CONFIG_MXC_SPI) $(CONFIG_TI_QSPI),y),y) + $(CONFIG_MXC_SPI) $(CONFIG_OMAP3_SPI) $(CONFIG_TI_QSPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index c682b014e7..6b8b92434c 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o obj-$(CONFIG_MXC_SPI) += mxc_spi.o +obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o @@ -35,7 +36,6 @@ obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o -obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_PIC32_SPI) += pic32_spi.o obj-$(CONFIG_PL022_SPI) += pl022_spi.o obj-$(CONFIG_RENESAS_RPC_SPI) += renesas_rpc_spi.o diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index c7fcf050a5..5e267d88d7 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -108,9 +108,6 @@ struct mcspi { };
struct omap3_spi_priv { -#ifndef CONFIG_DM_SPI - struct spi_slave slave; -#endif struct mcspi *regs; unsigned int cs; unsigned int freq; @@ -454,128 +451,6 @@ static void _omap3_spi_claim_bus(struct omap3_spi_priv *priv) writel(conf, &priv->regs->modulctrl); }
-#ifndef CONFIG_DM_SPI - -static inline struct omap3_spi_priv *to_omap3_spi(struct spi_slave *slave) -{ - return container_of(slave, struct omap3_spi_priv, slave); -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - free(priv); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - spi_reset(priv->regs); - - _omap3_spi_claim_bus(priv); - _omap3_spi_set_wordlen(priv); - _omap3_spi_set_mode(priv); - _omap3_spi_set_speed(priv); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - writel(OMAP3_MCSPI_MODULCTRL_MS, &priv->regs->modulctrl); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct omap3_spi_priv *priv; - struct mcspi *regs; - - /* - * OMAP3 McSPI (MultiChannel SPI) has 4 busses (modules) - * with different number of chip selects (CS, channels): - * McSPI1 has 4 CS (bus 0, cs 0 - 3) - * McSPI2 has 2 CS (bus 1, cs 0 - 1) - * McSPI3 has 2 CS (bus 2, cs 0 - 1) - * McSPI4 has 1 CS (bus 3, cs 0) - */ - - switch (bus) { - case 0: - regs = (struct mcspi *)OMAP3_MCSPI1_BASE; - break; -#ifdef OMAP3_MCSPI2_BASE - case 1: - regs = (struct mcspi *)OMAP3_MCSPI2_BASE; - break; -#endif -#ifdef OMAP3_MCSPI3_BASE - case 2: - regs = (struct mcspi *)OMAP3_MCSPI3_BASE; - break; -#endif -#ifdef OMAP3_MCSPI4_BASE - case 3: - regs = (struct mcspi *)OMAP3_MCSPI4_BASE; - break; -#endif - default: - printf("SPI error: unsupported bus %i. Supported busses 0 - 3\n", bus); - return NULL; - } - - if (((bus == 0) && (cs > 3)) || - ((bus == 1) && (cs > 1)) || - ((bus == 2) && (cs > 1)) || - ((bus == 3) && (cs > 0))) { - printf("SPI error: unsupported chip select %i on bus %i\n", cs, bus); - return NULL; - } - - if (max_hz > OMAP3_MCSPI_MAX_FREQ) { - printf("SPI error: unsupported frequency %i Hz. Max frequency is 48 MHz\n", - max_hz); - return NULL; - } - - if (mode > SPI_MODE_3) { - printf("SPI error: unsupported SPI mode %i\n", mode); - return NULL; - } - - priv = spi_alloc_slave(struct omap3_spi_priv, bus, cs); - if (!priv) { - printf("SPI error: malloc of SPI structure failed\n"); - return NULL; - } - - priv->regs = regs; - priv->cs = cs; - priv->freq = max_hz; - priv->mode = mode; - priv->wordlen = priv->slave.wordlen; -#if 0 - /* Please migrate to DM_SPI support for this feature. */ - priv->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN; -#endif - - return &priv->slave; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct omap3_spi_priv *priv = to_omap3_spi(slave); - - return _spi_xfer(priv, bitlen, dout, din, flags); -} - -#else - static int omap3_spi_claim_bus(struct udevice *dev) { struct udevice *bus = dev->parent; @@ -700,4 +575,3 @@ U_BOOT_DRIVER(omap3_spi) = { .ops = &omap3_spi_ops, .priv_auto_alloc_size = sizeof(struct omap3_spi_priv), }; -#endif
On Sun, Nov 25, 2018 at 11:39 AM Jagan Teki jagan@amarulasolutions.com wrote:
Drop the non-dm code, those board which uses non-dm need to define DM_SPI. u-boot build trigger the warning for the same.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
I don't have a good way to read/write SPI, but my omap3_logic board shows the SPI bus in the 'dm tree' so from that perspective, I am not seeing any issues with SPI.
Tested-by: Adam Ford aford173@gmail.com #omap3_logic
Makefile | 2 +- drivers/spi/Makefile | 2 +- drivers/spi/omap3_spi.c | 126 ---------------------------------------- 3 files changed, 2 insertions(+), 128 deletions(-)
diff --git a/Makefile b/Makefile index 3be3bb3118..00f0117b16 100644 --- a/Makefile +++ b/Makefile @@ -920,7 +920,7 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) endif ifeq ($(CONFIG_DM_SPI),) ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_MPC8XXX_SPI) \
$(CONFIG_MXC_SPI) $(CONFIG_TI_QSPI),y),y)
$(CONFIG_MXC_SPI) $(CONFIG_OMAP3_SPI) $(CONFIG_TI_QSPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI"diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index c682b014e7..6b8b92434c 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o obj-$(CONFIG_MXC_SPI) += mxc_spi.o +obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SPI_MEM) += spi-mem.o @@ -35,7 +36,6 @@ obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MT7621_SPI) += mt7621_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o -obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_PIC32_SPI) += pic32_spi.o obj-$(CONFIG_PL022_SPI) += pl022_spi.o obj-$(CONFIG_RENESAS_RPC_SPI) += renesas_rpc_spi.o diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index c7fcf050a5..5e267d88d7 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -108,9 +108,6 @@ struct mcspi { };
struct omap3_spi_priv { -#ifndef CONFIG_DM_SPI
struct spi_slave slave;-#endif struct mcspi *regs; unsigned int cs; unsigned int freq; @@ -454,128 +451,6 @@ static void _omap3_spi_claim_bus(struct omap3_spi_priv *priv) writel(conf, &priv->regs->modulctrl); }
-#ifndef CONFIG_DM_SPI
-static inline struct omap3_spi_priv *to_omap3_spi(struct spi_slave *slave) -{
return container_of(slave, struct omap3_spi_priv, slave);-}
-void spi_free_slave(struct spi_slave *slave) -{
struct omap3_spi_priv *priv = to_omap3_spi(slave);free(priv);-}
-int spi_claim_bus(struct spi_slave *slave) -{
struct omap3_spi_priv *priv = to_omap3_spi(slave);spi_reset(priv->regs);_omap3_spi_claim_bus(priv);_omap3_spi_set_wordlen(priv);_omap3_spi_set_mode(priv);_omap3_spi_set_speed(priv);return 0;-}
-void spi_release_bus(struct spi_slave *slave) -{
struct omap3_spi_priv *priv = to_omap3_spi(slave);writel(OMAP3_MCSPI_MODULCTRL_MS, &priv->regs->modulctrl);-}
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)-{
struct omap3_spi_priv *priv;struct mcspi *regs;/** OMAP3 McSPI (MultiChannel SPI) has 4 busses (modules)* with different number of chip selects (CS, channels):* McSPI1 has 4 CS (bus 0, cs 0 - 3)* McSPI2 has 2 CS (bus 1, cs 0 - 1)* McSPI3 has 2 CS (bus 2, cs 0 - 1)* McSPI4 has 1 CS (bus 3, cs 0)*/switch (bus) {case 0:regs = (struct mcspi *)OMAP3_MCSPI1_BASE;break;-#ifdef OMAP3_MCSPI2_BASE
case 1:regs = (struct mcspi *)OMAP3_MCSPI2_BASE;break;-#endif -#ifdef OMAP3_MCSPI3_BASE
case 2:regs = (struct mcspi *)OMAP3_MCSPI3_BASE;break;-#endif -#ifdef OMAP3_MCSPI4_BASE
case 3:regs = (struct mcspi *)OMAP3_MCSPI4_BASE;break;-#endif
default:printf("SPI error: unsupported bus %i. Supported busses 0 - 3\n", bus);return NULL;}if (((bus == 0) && (cs > 3)) ||((bus == 1) && (cs > 1)) ||((bus == 2) && (cs > 1)) ||((bus == 3) && (cs > 0))) {printf("SPI error: unsupported chip select %i on bus %i\n", cs, bus);return NULL;}if (max_hz > OMAP3_MCSPI_MAX_FREQ) {printf("SPI error: unsupported frequency %i Hz. Max frequency is 48 MHz\n",max_hz);return NULL;}if (mode > SPI_MODE_3) {printf("SPI error: unsupported SPI mode %i\n", mode);return NULL;}priv = spi_alloc_slave(struct omap3_spi_priv, bus, cs);if (!priv) {printf("SPI error: malloc of SPI structure failed\n");return NULL;}priv->regs = regs;priv->cs = cs;priv->freq = max_hz;priv->mode = mode;priv->wordlen = priv->slave.wordlen;-#if 0
/* Please migrate to DM_SPI support for this feature. */priv->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN;-#endif
return &priv->slave;-}
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout, void *din, unsigned long flags)-{
struct omap3_spi_priv *priv = to_omap3_spi(slave);return _spi_xfer(priv, bitlen, dout, din, flags);-}
-#else
static int omap3_spi_claim_bus(struct udevice *dev) { struct udevice *bus = dev->parent; @@ -700,4 +575,3 @@ U_BOOT_DRIVER(omap3_spi) = { .ops = &omap3_spi_ops, .priv_auto_alloc_size = sizeof(struct omap3_spi_priv), };
-#endif
2.18.0.321.gffc6fa0e3
Drop the non-dm code, those board which uses non-dm need to define DM_SPI. u-boot build trigger the warning for the same.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Makefile | 5 +- drivers/spi/Makefile | 2 +- drivers/spi/atmel_spi.c | 198 ---------------------------------------- 3 files changed, 4 insertions(+), 201 deletions(-)
diff --git a/Makefile b/Makefile index 00f0117b16..502a8e15f8 100644 --- a/Makefile +++ b/Makefile @@ -919,8 +919,9 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) @echo "====================================================" endif ifeq ($(CONFIG_DM_SPI),) -ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) $(CONFIG_MPC8XXX_SPI) \ - $(CONFIG_MXC_SPI) $(CONFIG_OMAP3_SPI) $(CONFIG_TI_QSPI),y),y) +ifeq ($(filter $(CONFIG_ATMEL_SPI) $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) \ + $(CONFIG_MPC8XXX_SPI) $(CONFIG_MXC_SPI) $(CONFIG_OMAP3_SPI) \ + $(CONFIG_TI_QSPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 6b8b92434c..e2c6435402 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -6,6 +6,7 @@ # There are many options which enable SPI, so make this library available ifdef CONFIG_DM_SPI obj-y += spi-uclass.o +obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o @@ -21,7 +22,6 @@ endif
obj-$(CONFIG_ALTERA_SPI) += altera_spi.o obj-$(CONFIG_ATH79_SPI) += ath79_spi.o -obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o obj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c index cf4de9ee1a..fad67137b9 100644 --- a/drivers/spi/atmel_spi.c +++ b/drivers/spi/atmel_spi.c @@ -14,210 +14,13 @@
#include <asm/arch/clk.h> #include <asm/arch/hardware.h> -#ifdef CONFIG_DM_SPI #include <asm/arch/at91_spi.h> -#endif #ifdef CONFIG_DM_GPIO #include <asm/gpio.h> #endif
#include "atmel_spi.h"
-#ifndef CONFIG_DM_SPI - -static int spi_has_wdrbt(struct atmel_spi_slave *slave) -{ - unsigned int ver; - - ver = spi_readl(slave, VERSION); - - return (ATMEL_SPI_VERSION_REV(ver) >= 0x210); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct atmel_spi_slave *as; - unsigned int scbr; - u32 csrx; - void *regs; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - switch (bus) { - case 0: - regs = (void *)ATMEL_BASE_SPI0; - break; -#ifdef ATMEL_BASE_SPI1 - case 1: - regs = (void *)ATMEL_BASE_SPI1; - break; -#endif -#ifdef ATMEL_BASE_SPI2 - case 2: - regs = (void *)ATMEL_BASE_SPI2; - break; -#endif -#ifdef ATMEL_BASE_SPI3 - case 3: - regs = (void *)ATMEL_BASE_SPI3; - break; -#endif - default: - return NULL; - } - - - scbr = (get_spi_clk_rate(bus) + max_hz - 1) / max_hz; - if (scbr > ATMEL_SPI_CSRx_SCBR_MAX) - /* Too low max SCK rate */ - return NULL; - if (scbr < 1) - scbr = 1; - - csrx = ATMEL_SPI_CSRx_SCBR(scbr); - csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8); - if (!(mode & SPI_CPHA)) - csrx |= ATMEL_SPI_CSRx_NCPHA; - if (mode & SPI_CPOL) - csrx |= ATMEL_SPI_CSRx_CPOL; - - as = spi_alloc_slave(struct atmel_spi_slave, bus, cs); - if (!as) - return NULL; - - as->regs = regs; - as->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS - | ATMEL_SPI_MR_PCS(~(1 << cs) & 0xf); - if (spi_has_wdrbt(as)) - as->mr |= ATMEL_SPI_MR_WDRBT; - - spi_writel(as, CSR(cs), csrx); - - return &as->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct atmel_spi_slave *as = to_atmel_spi(slave); - - free(as); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct atmel_spi_slave *as = to_atmel_spi(slave); - - /* Enable the SPI hardware */ - spi_writel(as, CR, ATMEL_SPI_CR_SPIEN); - - /* - * Select the slave. This should set SCK to the correct - * initial state, etc. - */ - spi_writel(as, MR, as->mr); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct atmel_spi_slave *as = to_atmel_spi(slave); - - /* Disable the SPI hardware */ - spi_writel(as, CR, ATMEL_SPI_CR_SPIDIS); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct atmel_spi_slave *as = to_atmel_spi(slave); - unsigned int len_tx; - unsigned int len_rx; - unsigned int len; - u32 status; - const u8 *txp = dout; - u8 *rxp = din; - u8 value; - - if (bitlen == 0) - /* Finish any previously submitted transfers */ - goto out; - - /* - * TODO: The controller can do non-multiple-of-8 bit - * transfers, but this driver currently doesn't support it. - * - * It's also not clear how such transfers are supposed to be - * represented as a stream of bytes...this is a limitation of - * the current SPI interface. - */ - if (bitlen % 8) { - /* Errors always terminate an ongoing transfer */ - flags |= SPI_XFER_END; - goto out; - } - - len = bitlen / 8; - - /* - * The controller can do automatic CS control, but it is - * somewhat quirky, and it doesn't really buy us much anyway - * in the context of U-Boot. - */ - if (flags & SPI_XFER_BEGIN) { - spi_cs_activate(slave); - /* - * sometimes the RDR is not empty when we get here, - * in theory that should not happen, but it DOES happen. - * Read it here to be on the safe side. - * That also clears the OVRES flag. Required if the - * following loop exits due to OVRES! - */ - spi_readl(as, RDR); - } - - for (len_tx = 0, len_rx = 0; len_rx < len; ) { - status = spi_readl(as, SR); - - if (status & ATMEL_SPI_SR_OVRES) - return -1; - - if (len_tx < len && (status & ATMEL_SPI_SR_TDRE)) { - if (txp) - value = *txp++; - else - value = 0; - spi_writel(as, TDR, value); - len_tx++; - } - if (status & ATMEL_SPI_SR_RDRF) { - value = spi_readl(as, RDR); - if (rxp) - *rxp++ = value; - len_rx++; - } - } - -out: - if (flags & SPI_XFER_END) { - /* - * Wait until the transfer is completely done before - * we deactivate CS. - */ - do { - status = spi_readl(as, SR); - } while (!(status & ATMEL_SPI_SR_TXEMPTY)); - - spi_cs_deactivate(slave); - } - - return 0; -} - -#else - #define MAX_CS_COUNT 4
struct atmel_spi_platdata { @@ -507,4 +310,3 @@ U_BOOT_DRIVER(atmel_spi) = { .priv_auto_alloc_size = sizeof(struct atmel_spi_priv), .probe = atmel_spi_probe, }; -#endif
Dropped - fsl_espi driver
Dropped becuase - no active updates - no dm conversion - multiple pings for asking dm-conversion - driver-model migration expiry
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/Arcturus/ucp1020/ucp1020.c | 6 + drivers/spi/Kconfig | 7 - drivers/spi/Makefile | 1 - drivers/spi/fsl_espi.c | 383 ------------------------------- 4 files changed, 6 insertions(+), 391 deletions(-) delete mode 100644 drivers/spi/fsl_espi.c
diff --git a/board/Arcturus/ucp1020/ucp1020.c b/board/Arcturus/ucp1020/ucp1020.c index 1a1fcb9be9..b07ba60671 100644 --- a/board/Arcturus/ucp1020/ucp1020.c +++ b/board/Arcturus/ucp1020/ucp1020.c @@ -43,6 +43,12 @@ void spi_set_speed(struct spi_slave *slave, uint hz) /* TO DO: It's actially have to be in spi/ */ }
+int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + /* do nothing, there is no spi driver */ + return 0; +} + /* * To be compatible with cmd_gpio */ diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index faed69bd03..be87e82699 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -278,13 +278,6 @@ config ZYNQMP_GQSPI
endif # if DM_SPI
-config FSL_ESPI - bool "Freescale eSPI driver" - help - Enable the Freescale eSPI driver. This driver can be used to - access the SPI interface and SPI NOR flash on platforms embedding - this Freescale eSPI IP core. - config FSL_QSPI bool "Freescale QSPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index e2c6435402..5d14b11b1d 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -29,7 +29,6 @@ obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o -obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o obj-$(CONFIG_ICH_SPI) += ich.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c deleted file mode 100644 index 7444ae1a06..0000000000 --- a/drivers/spi/fsl_espi.c +++ /dev/null @@ -1,383 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * eSPI controller driver. - * - * Copyright 2010-2011 Freescale Semiconductor, Inc. - * Author: Mingkai Hu (Mingkai.hu@freescale.com) - */ - -#include <common.h> - -#include <malloc.h> -#include <spi.h> -#include <asm/immap_85xx.h> - -struct fsl_spi_slave { - struct spi_slave slave; - ccsr_espi_t *espi; - unsigned int div16; - unsigned int pm; - int tx_timeout; - unsigned int mode; - size_t cmd_len; - u8 cmd_buf[16]; - size_t data_len; - unsigned int max_transfer_length; -}; - -#define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave) -#define US_PER_SECOND 1000000UL - -#define ESPI_MAX_CS_NUM 4 -#define ESPI_FIFO_WIDTH_BIT 32 - -#define ESPI_EV_RNE BIT(9) -#define ESPI_EV_TNF BIT(8) -#define ESPI_EV_DON BIT(14) -#define ESPI_EV_TXE BIT(15) -#define ESPI_EV_RFCNT_SHIFT 24 -#define ESPI_EV_RFCNT_MASK (0x3f << ESPI_EV_RFCNT_SHIFT) - -#define ESPI_MODE_EN BIT(31) /* Enable interface */ -#define ESPI_MODE_TXTHR(x) ((x) << 8) /* Tx FIFO threshold */ -#define ESPI_MODE_RXTHR(x) ((x) << 0) /* Rx FIFO threshold */ - -#define ESPI_COM_CS(x) ((x) << 30) -#define ESPI_COM_TRANLEN(x) ((x) << 0) - -#define ESPI_CSMODE_CI_INACTIVEHIGH BIT(31) -#define ESPI_CSMODE_CP_BEGIN_EDGCLK BIT(30) -#define ESPI_CSMODE_REV_MSB_FIRST BIT(29) -#define ESPI_CSMODE_DIV16 BIT(28) -#define ESPI_CSMODE_PM(x) ((x) << 24) -#define ESPI_CSMODE_POL_ASSERTED_LOW BIT(20) -#define ESPI_CSMODE_LEN(x) ((x) << 16) -#define ESPI_CSMODE_CSBEF(x) ((x) << 12) -#define ESPI_CSMODE_CSAFT(x) ((x) << 8) -#define ESPI_CSMODE_CSCG(x) ((x) << 3) - -#define ESPI_CSMODE_INIT_VAL (ESPI_CSMODE_POL_ASSERTED_LOW | \ - ESPI_CSMODE_CSBEF(0) | ESPI_CSMODE_CSAFT(0) | \ - ESPI_CSMODE_CSCG(1)) - -#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0 - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct fsl_spi_slave *fsl; - sys_info_t sysinfo; - unsigned long spibrg = 0; - unsigned long spi_freq = 0; - unsigned char pm = 0; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs); - if (!fsl) - return NULL; - - fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR); - fsl->mode = mode; - fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN; - - /* Set eSPI BRG clock source */ - get_sys_info(&sysinfo); - spibrg = sysinfo.freq_systembus / 2; - fsl->div16 = 0; - if ((spibrg / max_hz) > 32) { - fsl->div16 = ESPI_CSMODE_DIV16; - pm = spibrg / (max_hz * 16 * 2); - if (pm > 16) { - pm = 16; - debug("Requested speed is too low: %d Hz, %ld Hz " - "is used.\n", max_hz, spibrg / (32 * 16)); - } - } else - pm = spibrg / (max_hz * 2); - if (pm) - pm--; - fsl->pm = pm; - - if (fsl->div16) - spi_freq = spibrg / ((pm + 1) * 2 * 16); - else - spi_freq = spibrg / ((pm + 1) * 2); - - /* set tx_timeout to 10 times of one espi FIFO entry go out */ - fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * ESPI_FIFO_WIDTH_BIT - * 10), spi_freq); - - return &fsl->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave); - free(fsl); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave); - ccsr_espi_t *espi = fsl->espi; - unsigned char pm = fsl->pm; - unsigned int cs = slave->cs; - unsigned int mode = fsl->mode; - unsigned int div16 = fsl->div16; - int i; - - debug("%s: bus:%i cs:%i\n", __func__, slave->bus, cs); - - /* Enable eSPI interface */ - out_be32(&espi->mode, ESPI_MODE_RXTHR(3) - | ESPI_MODE_TXTHR(4) | ESPI_MODE_EN); - - out_be32(&espi->event, 0xffffffff); /* Clear all eSPI events */ - out_be32(&espi->mask, 0x00000000); /* Mask all eSPI interrupts */ - - /* Init CS mode interface */ - for (i = 0; i < ESPI_MAX_CS_NUM; i++) - out_be32(&espi->csmode[i], ESPI_CSMODE_INIT_VAL); - - out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) & - ~(ESPI_CSMODE_PM(0xF) | ESPI_CSMODE_DIV16 - | ESPI_CSMODE_CI_INACTIVEHIGH | ESPI_CSMODE_CP_BEGIN_EDGCLK - | ESPI_CSMODE_REV_MSB_FIRST | ESPI_CSMODE_LEN(0xF))); - - /* Set eSPI BRG clock source */ - out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) - | ESPI_CSMODE_PM(pm) | div16); - - /* Set eSPI mode */ - if (mode & SPI_CPHA) - out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) - | ESPI_CSMODE_CP_BEGIN_EDGCLK); - if (mode & SPI_CPOL) - out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) - | ESPI_CSMODE_CI_INACTIVEHIGH); - - /* Character bit order: msb first */ - out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) - | ESPI_CSMODE_REV_MSB_FIRST); - - /* Character length in bits, between 0x3~0xf, i.e. 4bits~16bits */ - out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) - | ESPI_CSMODE_LEN(7)); - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - -} - -static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout) -{ - ccsr_espi_t *espi = fsl->espi; - unsigned int tmpdout, event; - int tmp_tx_timeout; - - if (dout) - tmpdout = *(u32 *)dout; - else - tmpdout = 0; - - out_be32(&espi->tx, tmpdout); - out_be32(&espi->event, ESPI_EV_TNF); - debug("***spi_xfer:...%08x written\n", tmpdout); - - tmp_tx_timeout = fsl->tx_timeout; - /* Wait for eSPI transmit to go out */ - while (tmp_tx_timeout--) { - event = in_be32(&espi->event); - if (event & ESPI_EV_DON || event & ESPI_EV_TXE) { - out_be32(&espi->event, ESPI_EV_TXE); - break; - } - udelay(1); - } - - if (tmp_tx_timeout < 0) - debug("***spi_xfer:...Tx timeout! event = %08x\n", event); -} - -static int fsl_espi_rx(struct fsl_spi_slave *fsl, void *din, unsigned int bytes) -{ - ccsr_espi_t *espi = fsl->espi; - unsigned int tmpdin, rx_times; - unsigned char *buf, *p_cursor; - - if (bytes <= 0) - return 0; - - rx_times = DIV_ROUND_UP(bytes, 4); - buf = (unsigned char *)malloc(4 * rx_times); - if (!buf) { - debug("SF: Failed to malloc memory.\n"); - return -1; - } - p_cursor = buf; - while (rx_times--) { - tmpdin = in_be32(&espi->rx); - debug("***spi_xfer:...%08x readed\n", tmpdin); - *(u32 *)p_cursor = tmpdin; - p_cursor += 4; - } - - if (din) - memcpy(din, buf, bytes); - - free(buf); - out_be32(&espi->event, ESPI_EV_RNE); - - return bytes; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out, - void *data_in, unsigned long flags) -{ - struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave); - ccsr_espi_t *espi = fsl->espi; - unsigned int event, rx_bytes; - const void *dout = NULL; - void *din = NULL; - int len = 0; - int num_blks, num_chunks, max_tran_len, tran_len; - int num_bytes; - unsigned char *buffer = NULL; - size_t buf_len; - u8 *cmd_buf = fsl->cmd_buf; - size_t cmd_len = fsl->cmd_len; - size_t data_len = bitlen / 8; - size_t rx_offset = 0; - int rf_cnt; - - max_tran_len = fsl->max_transfer_length; - switch (flags) { - case SPI_XFER_BEGIN: - cmd_len = fsl->cmd_len = data_len; - memcpy(cmd_buf, data_out, cmd_len); - return 0; - case 0: - case SPI_XFER_END: - if (bitlen == 0) { - spi_cs_deactivate(slave); - return 0; - } - buf_len = 2 * cmd_len + min(data_len, (size_t)max_tran_len); - len = cmd_len + data_len; - rx_offset = cmd_len; - buffer = (unsigned char *)malloc(buf_len); - if (!buffer) { - debug("SF: Failed to malloc memory.\n"); - return 1; - } - memcpy(buffer, cmd_buf, cmd_len); - if (data_in == NULL) - memcpy(buffer + cmd_len, data_out, data_len); - break; - case SPI_XFER_BEGIN | SPI_XFER_END: - len = data_len; - buffer = (unsigned char *)malloc(len * 2); - if (!buffer) { - debug("SF: Failed to malloc memory.\n"); - return 1; - } - memcpy(buffer, data_out, len); - rx_offset = len; - cmd_len = 0; - break; - } - - debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) len %u\n", - *(uint *)data_out, data_out, *(uint *)data_in, data_in, len); - - num_chunks = DIV_ROUND_UP(data_len, max_tran_len); - while (num_chunks--) { - if (data_in) - din = buffer + rx_offset; - dout = buffer; - tran_len = min(data_len, (size_t)max_tran_len); - num_blks = DIV_ROUND_UP(tran_len + cmd_len, 4); - num_bytes = (tran_len + cmd_len) % 4; - fsl->data_len = tran_len + cmd_len; - spi_cs_activate(slave); - - /* Clear all eSPI events */ - out_be32(&espi->event , 0xffffffff); - /* handle data in 32-bit chunks */ - while (num_blks) { - event = in_be32(&espi->event); - if (event & ESPI_EV_TNF) { - fsl_espi_tx(fsl, dout); - /* Set up the next iteration */ - if (len > 4) { - len -= 4; - dout += 4; - } - } - - event = in_be32(&espi->event); - if (event & ESPI_EV_RNE) { - rf_cnt = ((event & ESPI_EV_RFCNT_MASK) - >> ESPI_EV_RFCNT_SHIFT); - if (rf_cnt >= 4) - rx_bytes = 4; - else if (num_blks == 1 && rf_cnt == num_bytes) - rx_bytes = num_bytes; - else - continue; - if (fsl_espi_rx(fsl, din, rx_bytes) - == rx_bytes) { - num_blks--; - if (din) - din = (unsigned char *)din - + rx_bytes; - } - } - } - if (data_in) { - memcpy(data_in, buffer + 2 * cmd_len, tran_len); - if (*buffer == 0x0b) { - data_in += tran_len; - data_len -= tran_len; - *(int *)buffer += tran_len; - } - } - spi_cs_deactivate(slave); - } - - free(buffer); - return 0; -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return bus == 0 && cs < ESPI_MAX_CS_NUM; -} - -void spi_cs_activate(struct spi_slave *slave) -{ - struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave); - ccsr_espi_t *espi = fsl->espi; - unsigned int com = 0; - size_t data_len = fsl->data_len; - - com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF)); - com |= ESPI_COM_CS(slave->cs); - com |= ESPI_COM_TRANLEN(data_len - 1); - out_be32(&espi->com, com); -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave); - ccsr_espi_t *espi = fsl->espi; - - /* clear the RXCNT and TXCNT */ - out_be32(&espi->mode, in_be32(&espi->mode) & (~ESPI_MODE_EN)); - out_be32(&espi->mode, in_be32(&espi->mode) | ESPI_MODE_EN); -}
Look like all defconfigs are using DM_SPI, but it may grow the size if enable it globally. but due to DM_SPI migration policy remove non-dm code, and will discuss footprint issues if any?
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Makefile | 6 +- drivers/spi/Makefile | 2 +- drivers/spi/fsl_dspi.c | 132 ----------------------------------------- 3 files changed, 4 insertions(+), 136 deletions(-)
diff --git a/Makefile b/Makefile index 502a8e15f8..4639a9fb41 100644 --- a/Makefile +++ b/Makefile @@ -919,9 +919,9 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y) @echo "====================================================" endif ifeq ($(CONFIG_DM_SPI),) -ifeq ($(filter $(CONFIG_ATMEL_SPI) $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) \ - $(CONFIG_MPC8XXX_SPI) $(CONFIG_MXC_SPI) $(CONFIG_OMAP3_SPI) \ - $(CONFIG_TI_QSPI),y),y) +ifeq ($(filter $(CONFIG_ATMEL_SPI) $(CONFIG_DAVINCI_SPI) $(CONFIG_FSL_DSPI) \ + $(CONFIG_KIRKWOOD_SPI) $(CONFIG_MPC8XXX_SPI) $(CONFIG_MXC_SPI) \ + $(CONFIG_OMAP3_SPI) $(CONFIG_TI_QSPI),y),y) @echo "===================== WARNING ======================" @echo "This board uses SPI driver from drivers/spi/ without" @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI" diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 5d14b11b1d..4e8f0b0993 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -8,6 +8,7 @@ ifdef CONFIG_DM_SPI obj-y += spi-uclass.o obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o +obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o obj-$(CONFIG_MXC_SPI) += mxc_spi.o @@ -28,7 +29,6 @@ obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o -obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o obj-$(CONFIG_ICH_SPI) += ich.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c index 764c94215e..2e1cf22eb0 100644 --- a/drivers/spi/fsl_dspi.c +++ b/drivers/spi/fsl_dspi.c @@ -97,13 +97,6 @@ struct fsl_dspi_priv { struct dspi *regs; };
-#ifndef CONFIG_DM_SPI -struct fsl_dspi { - struct spi_slave slave; - struct fsl_dspi_priv priv; -}; -#endif - __weak void cpu_dspi_port_conf(void) { } @@ -389,131 +382,7 @@ static int fsl_dspi_cfg_speed(struct fsl_dspi_priv *priv, uint speed)
return 0; } -#ifndef CONFIG_DM_SPI -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - if (((cs >= 0) && (cs < 8)) && ((bus >= 0) && (bus < 8))) - return 1; - else - return 0; -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct fsl_dspi *dspi; - uint mcr_cfg_val; - - dspi = spi_alloc_slave(struct fsl_dspi, bus, cs); - if (!dspi) - return NULL; - - cpu_dspi_port_conf(); - -#ifdef CONFIG_SYS_FSL_DSPI_BE - dspi->priv.flags |= DSPI_FLAG_REGMAP_ENDIAN_BIG; -#endif - - dspi->priv.regs = (struct dspi *)MMAP_DSPI; - -#ifdef CONFIG_M68K - dspi->priv.bus_clk = gd->bus_clk; -#else - dspi->priv.bus_clk = mxc_get_clock(MXC_DSPI_CLK); -#endif - dspi->priv.speed_hz = FSL_DSPI_DEFAULT_SCK_FREQ; - - /* default: all CS signals inactive state is high */ - mcr_cfg_val = DSPI_MCR_MSTR | DSPI_MCR_PCSIS_MASK | - DSPI_MCR_CRXF | DSPI_MCR_CTXF; - fsl_dspi_init_mcr(&dspi->priv, mcr_cfg_val); - - for (i = 0; i < FSL_DSPI_MAX_CHIPSELECT; i++) - dspi->priv.ctar_val[i] = DSPI_CTAR_DEFAULT_VALUE; - -#ifdef CONFIG_SYS_DSPI_CTAR0 - if (FSL_DSPI_MAX_CHIPSELECT > 0) - dspi->priv.ctar_val[0] = CONFIG_SYS_DSPI_CTAR0; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR1 - if (FSL_DSPI_MAX_CHIPSELECT > 1) - dspi->priv.ctar_val[1] = CONFIG_SYS_DSPI_CTAR1; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR2 - if (FSL_DSPI_MAX_CHIPSELECT > 2) - dspi->priv.ctar_val[2] = CONFIG_SYS_DSPI_CTAR2; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR3 - if (FSL_DSPI_MAX_CHIPSELECT > 3) - dspi->priv.ctar_val[3] = CONFIG_SYS_DSPI_CTAR3; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR4 - if (FSL_DSPI_MAX_CHIPSELECT > 4) - dspi->priv.ctar_val[4] = CONFIG_SYS_DSPI_CTAR4; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR5 - if (FSL_DSPI_MAX_CHIPSELECT > 5) - dspi->priv.ctar_val[5] = CONFIG_SYS_DSPI_CTAR5; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR6 - if (FSL_DSPI_MAX_CHIPSELECT > 6) - dspi->priv.ctar_val[6] = CONFIG_SYS_DSPI_CTAR6; -#endif -#ifdef CONFIG_SYS_DSPI_CTAR7 - if (FSL_DSPI_MAX_CHIPSELECT > 7) - dspi->priv.ctar_val[7] = CONFIG_SYS_DSPI_CTAR7; -#endif
- fsl_dspi_cfg_speed(&dspi->priv, max_hz); - - /* configure transfer mode */ - fsl_dspi_cfg_ctar_mode(&dspi->priv, cs, mode); - - /* configure active state of CSX */ - fsl_dspi_cfg_cs_active_state(&dspi->priv, cs, mode); - - return &dspi->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - free(slave); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - uint sr_val; - struct fsl_dspi *dspi = (struct fsl_dspi *)slave; - - cpu_dspi_claim_bus(slave->bus, slave->cs); - - fsl_dspi_clr_fifo(&dspi->priv); - - /* check module TX and RX status */ - sr_val = dspi_read32(dspi->priv.flags, &dspi->priv.regs->sr); - if ((sr_val & DSPI_SR_TXRXS) != DSPI_SR_TXRXS) { - debug("DSPI RX/TX not ready!\n"); - return -EIO; - } - - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct fsl_dspi *dspi = (struct fsl_dspi *)slave; - - dspi_halt(&dspi->priv, 1); - cpu_dspi_release_bus(slave->bus.slave->cs); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct fsl_dspi *dspi = (struct fsl_dspi *)slave; - return dspi_xfer(&dspi->priv, slave->cs, bitlen, dout, din, flags); -} -#else static int fsl_dspi_child_pre_probe(struct udevice *dev) { struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); @@ -720,4 +589,3 @@ U_BOOT_DRIVER(fsl_dspi) = { .child_pre_probe = fsl_dspi_child_pre_probe, .bind = fsl_dspi_bind, }; -#endif
Update the spi driver dm-conversion status.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- doc/driver-model/MIGRATION.txt | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-)
diff --git a/doc/driver-model/MIGRATION.txt b/doc/driver-model/MIGRATION.txt index 5ebefd608b..b2d1488aeb 100644 --- a/doc/driver-model/MIGRATION.txt +++ b/doc/driver-model/MIGRATION.txt @@ -30,25 +30,9 @@ Status: In progress Deadline: 2018.09
No dm conversion yet: - drivers/spi/cf_spi.c - drivers/spi/fsl_espi.c - drivers/spi/lpc32xx_ssp.c - drivers/spi/mpc8xx_spi.c - drivers/spi/mpc8xxx_spi.c - drivers/spi/mxs_spi.c - drivers/spi/sh_qspi.c - drivers/spi/sh_spi.c - drivers/spi/soft_spi_legacy.c
Partially converted: - drivers/spi/atcspi200_spi.c - drivers/spi/davinci_spi.c - drivers/spi/fsl_dspi.c - drivers/spi/fsl_qspi.c - drivers/spi/kirkwood_spi.c - drivers/spi/mxc_spi.c - drivers/spi/omap3_spi.c - drivers/spi/ti_qspi.c + drivers/spi/sh_qspi.c
-- Jagan Teki jagan@openedev.com
On Sun, 25 Nov 2018 at 10:40, Jagan Teki jagan@amarulasolutions.com wrote:
Update the spi driver dm-conversion status.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
doc/driver-model/MIGRATION.txt | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
Hi Jagan,
Just have a quick question here.
After dropping non-DM code, for SPL use non-DM code should switch to SPL_DM and use SPL OF CONTROL?
Thanks, Peng.
-----Original Message----- From: Jagan Teki [mailto:jagan@amarulasolutions.com] Sent: 2018年11月26日 1:28 To: Adam Ford aford173@gmail.com; Vitaly Andrianov vitalya@ti.com; Stefano Babic sbabic@denx.de; Peter Howard phoward@gme.net.au; Tom Rini trini@konsulko.com; Walter Schweizer swwa@users.sourceforge.net; Valentin Longchamp valentin.longchamp@keymile.com; Phil Sutter phil@nwl.cc; Stefan Roese sr@denx.de; Simon Glass sjg@chromium.org; Tuomas Tynkkynen tuomas@tuxera.com; Sam Protsenko semen.protsenko@linaro.org; Dirk Eibach dirk.eibach@gdsys.cc; Mario Six mario.six@gdsys.cc; Simon Guinot simon.guinot@sequanux.org; Konstantin Porotchkin kostap@marvell.com; Jason Cooper u-boot@lakedaemon.net; Marek Behún marek.behun@nic.cz; Lokesh Vutla lokeshvutla@ti.com; Andrew F . Davis afd@ti.com; Uri Mashiach uri.mashiach@compulab.co.il; Heiko Schocher hs@denx.de; Tc Liew tsi-chung.liew@nxp.com; Joe Hershberger joe.hershberger@ni.com; Angelo Dureghello angelo@sysam.it; Vladimir Zapolskiy vz@mleia.com; Albert ARIBAUD albert.aribaud@3adev.fr; Marek Vasut marex@denx.de; Fabio Estevam fabio.estevam@nxp.com; Nikita Kiryanov nikita@compulab.co.il; Lukasz Majewski lukma@denx.de; Markus Niebel Markus.Niebel@tq-group.com; Troy Kisky troy.kisky@boundarydevices.com; Akshay Bhat akshaybhat@timesys.com; Ken Lin Ken.Lin@advantech.com.tw; Peng Fan peng.fan@nxp.com; Magnus Lilja lilja.magnus@gmail.com; Christian Gmeiner christian.gmeiner@gmail.com; Eric Bénard eric@eukrea.com; Ian Ray ian.ray@ge.com; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Dmitry Lifshitz lifshitz@compulab.co.il; Roger Meier r.meier@siemens.com; Gilles Gameiro gilles@gigadevices.com; Lothar Felten lothar.felten@gmail.com; Tapani Utriainen linuxfae@technexion.com; Steve Sakoman sakoman@gmail.com; Pali Rohár pali.rohar@gmail.com; Marcin Niestroj m.niestroj@grinn-global.com; Nishanth Menon nm@ti.com; Lars Poeschel poeschel@lemonage.de; Enric Balletbo i Serra eballetbo@gmail.com; Yegor Yefremov yegorslists@googlemail.com; Ash Charles ash@gumstix.com; Grazvydas Ignotas notasas@gmail.com; Igor Grinberg grinberg@compulab.co.il; Derald D . Woods woods.technical@gmail.com; Hannes Schmelzer hannes.schmelzer@br-automation.com; Eugen Hristev eugen.hristev@microchip.com; Ludovic Desroches ludovic.desroches@microchip.com; Stelian Pop stelian@popies.net; Mateusz Kulikowski mateusz.kulikowski@gmail.com; Ilko Iliev iliev@ronetix.at; Daniel Gorsulowski daniel.gorsulowski@esd.eu; Ben Whitten ben.whitten@lairdtech.com; Andreas Bießmann andreas@biessmann.org; Erik van Luijk evanluijk@interact.nl; Gregory CLEMENT gregory.clement@free-electrons.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Sumit Garg sumit.garg@nxp.com; York Sun york.sun@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com; Priyanka Jain priyanka.jain@nxp.com; Mingkai Hu mingkai.hu@nxp.com; Alison Wang alison.wang@nxp.com; Ashish Kumar ashish.kumar@nxp.com; Udit Agarwal udit.agarwal@nxp.com; VINITHA V PILLAI vinitha.pillai@nxp.com; Feng Li feng.li_2@nxp.com; Qiang Zhao qiang.zhao@nxp.com; Naveen Burmi naveen.burmi@nxp.com; Shengzhou Liu shengzhou.liu@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; Poonam Aggrwal poonam.aggrwal@nxp.com; Timur Tabi timur@tabi.org; Xiaobo Xie xiaobo.xie@nxp.com; PO LIU po.liu@nxp.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@amarulasolutions.com Subject: [PATCH v2 00/32] spi: DM_SPI migration timeout, remainder(2)
This series fix, build issues and comments from previous series [1].
We have not heard any positive feed back about dm-conversion on spi drivers along with no response for the work done by Akash and me.
Plan is to send the same series remainder recursively based on the dm conversion updates and finally merged into v2019.04 MW.
So expecting inputs from relevant developers to move their board/drivers to support DM_SPI.
- cf_spi, lpc32xx_ssp, mxs_spi, sh_spi, soft_spi_legacy, fsl_espi drivers are
drooped with their respective CONFIG items. the spi/spi-flash usage commands still build but the used spi core function calls return 0.
- non-dm code in davinci, kirkwood, ti_qspi, mpc8xxx, mxc, omap3, atmel,
fsl_dspi drivers were drooped and u-boot build system will trigger warning for the same.
Note:
- Let's discuss if any foot-print issues?
Any inputs, Jagan.
[1] https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc hwork.ozlabs.org%2Fcover%2F1000444%2F&data=02%7C01%7Cpeng.fa n%40nxp.com%7C575d95c25be74fc237bb08d652fb8b34%7C686ea1d3bc2b4 c6fa92cd99c5c301635%7C0%7C0%7C636787637664212094&sdata=Wy H54iAVB%2BRPIVvgpQsw1T3cG5UUtNRKbFR08wibgOg%3D&reserved= 0
Jagan Teki (15): spi: davinci: Full dm conversion spi: kirkwood: Full dm conversion spi: ti_qspi: Full dm conversion spi: mpc8xxx: Convert to DM spi: Zap cf_spi driver-related code spi: Zap lpc32xx_ssp driver-related code spi: Zap mxs_spi driver-related code spi: Zap sh_spi driver-related code spi: Zap soft_spi_legacy driver-related code spi: mxc: Drop non-dm code spi: omap3: Drop non-dm code spi: atmel: Drop non-dm code spi: Zap fsl_espi driver-related code spi: fsl_dspi: Drop non-dm code dm: MIGRATION: spi: Update SPI driver status
Mario Six (17): spi: mpc8xxx: Use short type names spi: mpc8xxx: Fix comments spi: mpc8xxx: Rename camel-case variables spi: mpc8xxx: Fix space after cast spi: mpc8xxx: Fix function names in strings spi: mpc8xxx: Replace defines with enums spi: mpc8xxx: Use IO accessors spi: mpc8xxx: Simplify if spi: mpc8xxx: Get rid of is_read spi: mpc8xxx: Simplify logic a bit spi: mpc8xxx: Reduce scope of loop variables spi: mpc8xxx: Make code more readable spi: mpc8xxx: Rename variable spi: mpc8xxx: Document LEN setting better spi: mpc8xxx: Re-order transfer setup spi: mpc8xxx: Fix if check spi: mpc8xxx: Use get_timer
Makefile | 11 + arch/m68k/cpu/mcf5227x/cpu_init.c | 54 -- arch/m68k/cpu/mcf5445x/cpu_init.c | 113 ---- board/Arcturus/ucp1020/ucp1020.c | 6 + configs/M52277EVB_defconfig | 1 - configs/M52277EVB_stmicro_defconfig | 1 - configs/M54418TWR_defconfig | 1 - configs/M54418TWR_nand_mii_defconfig | 1 - configs/M54418TWR_nand_rmii_defconfig | 1 - configs/M54418TWR_nand_rmii_lowfreq_defconfig | 1 - configs/M54418TWR_serial_mii_defconfig | 1 - configs/M54418TWR_serial_rmii_defconfig | 1 - configs/M54451EVB_defconfig | 1 - configs/M54451EVB_stmicro_defconfig | 1 - configs/M54455EVB_a66_defconfig | 1 - configs/M54455EVB_defconfig | 1 - configs/M54455EVB_i66_defconfig | 1 - configs/M54455EVB_intel_defconfig | 1 - configs/M54455EVB_stm33_defconfig | 1 - configs/bg0900_defconfig | 1 - configs/devkit3250_defconfig | 1 - configs/mx28evk_auart_console_defconfig | 1 - configs/mx28evk_defconfig | 1 - configs/mx28evk_nand_defconfig | 1 - configs/mx28evk_spi_defconfig | 1 - configs/sh7752evb_defconfig | 1 - configs/sh7753evb_defconfig | 1 - configs/sh7757lcr_defconfig | 1 - configs/stmark2_defconfig | 1 - configs/work_92105_defconfig | 1 - doc/driver-model/MIGRATION.txt | 18 +- drivers/spi/Kconfig | 42 +- drivers/spi/Makefile | 22 +- drivers/spi/atmel_spi.c | 198 ------- drivers/spi/cf_spi.c | 335 ------------ drivers/spi/davinci_spi.c | 157 ------ drivers/spi/fsl_dspi.c | 132 ----- drivers/spi/fsl_espi.c | 383 -------------- drivers/spi/kirkwood_spi.c | 218 ++------ drivers/spi/lpc32xx_ssp.c | 134 ----- drivers/spi/mpc8xxx_spi.c | 279 ++++++---- drivers/spi/mxc_spi.c | 123 +---- drivers/spi/mxs_spi.c | 358 ------------- drivers/spi/omap3_spi.c | 126 ----- drivers/spi/sh_spi.c | 249 --------- drivers/spi/sh_spi.h | 67 --- drivers/spi/soft_spi_legacy.c | 168 ------ drivers/spi/spi.c | 38 ++ drivers/spi/ti_qspi.c | 490 +++++++----------- include/configs/M52277EVB.h | 1 - include/configs/M54418TWR.h | 1 - include/configs/M54451EVB.h | 1 - include/configs/M54455EVB.h | 1 - include/configs/MPC8349EMDS.h | 3 - include/configs/devkit3250.h | 5 - include/configs/sh7752evb.h | 3 - include/configs/sh7753evb.h | 3 - include/configs/sh7757lcr.h | 3 - include/configs/stmark2.h | 1 - include/configs/work_92105.h | 5 - include/configs/zipitz2.h | 1 - include/dm/platform_data/spi_kirkwood.h | 15 + include/dm/platform_data/spi_ti_qspi.h | 19 + scripts/config_whitelist.txt | 3 - 64 files changed, 502 insertions(+), 3310 deletions(-) delete mode 100644 drivers/spi/cf_spi.c delete mode 100644 drivers/spi/fsl_espi.c delete mode 100644 drivers/spi/lpc32xx_ssp.c delete mode 100644 drivers/spi/mxs_spi.c delete mode 100644 drivers/spi/sh_spi.c delete mode 100644 drivers/spi/sh_spi.h delete mode 100644 drivers/spi/soft_spi_legacy.c create mode 100644 include/dm/platform_data/spi_kirkwood.h create mode 100644 include/dm/platform_data/spi_ti_qspi.h
-- 2.18.0.321.gffc6fa0e3
On Mon, Nov 26, 2018 at 12:48 PM Peng Fan peng.fan@nxp.com wrote:
Hi Jagan,
Just have a quick question here.
After dropping non-DM code, for SPL use non-DM code should switch to SPL_DM and use SPL OF CONTROL?
Here are the options, that we dealt based on the size constraints 1) try to use DM_SPL with SPL OF_CONTROL 2) try PLATDATA 3) try TPL for truly small size
if none works, we can see the other option. may be some glue code to read flash for SPL or something else.
On 11/27/2018 06:51 AM, Jagan Teki wrote:
On Mon, Nov 26, 2018 at 12:48 PM Peng Fan peng.fan@nxp.com wrote:
Hi Jagan,
Just have a quick question here.
After dropping non-DM code, for SPL use non-DM code should switch to SPL_DM and use SPL OF CONTROL?
Here are the options, that we dealt based on the size constraints
- try to use DM_SPL with SPL OF_CONTROL
Not possible
- try PLATDATA
Adds extra bloat to SPLs which are already borderline, so not possible.
- try TPL for truly small size
How would that help ? I don't need extra level of bootloader, I can use SPL right now.
if none works, we can see the other option. may be some glue code to read flash for SPL or something else.
I'll have to take a look at the Renesas Gen2, but probably next year.
Hello Marek, Jagan,
Am 27.11.2018 um 13:10 schrieb Marek Vasut:
On 11/27/2018 06:51 AM, Jagan Teki wrote:
On Mon, Nov 26, 2018 at 12:48 PM Peng Fan peng.fan@nxp.com wrote:
Hi Jagan,
Just have a quick question here.
After dropping non-DM code, for SPL use non-DM code should switch to SPL_DM and use SPL OF CONTROL?
Here are the options, that we dealt based on the size constraints
- try to use DM_SPL with SPL OF_CONTROL
Not possible
- try PLATDATA
Adds extra bloat to SPLs which are already borderline, so not possible.
- try TPL for truly small size
How would that help ? I don't need extra level of bootloader, I can use SPL right now.
Exactly my thoughts too. I have a at91 based board (smartweb) in mainline where the SPL fits into 4k sram ... no chance for 1) or 2) ...
I see the reasons for integrating more and more stuff into SPL, but it should be possible to build a small SPL ...
Hopefully TPL stays really small ...
Hmm.. while writting (did not actually looked into TPL ...):
Is it possible to boot U-boot directly from TPL ?
if none works, we can see the other option. may be some glue code to read flash for SPL or something else.
I'll have to take a look at the Renesas Gen2, but probably next year.
I talk with customers to get time for converting, but this also may take some time ...
bye, Heiko
On Wed, Nov 28, 2018 at 05:24:45AM +0100, Heiko Schocher wrote:
Hello Marek, Jagan,
Am 27.11.2018 um 13:10 schrieb Marek Vasut:
On 11/27/2018 06:51 AM, Jagan Teki wrote:
On Mon, Nov 26, 2018 at 12:48 PM Peng Fan peng.fan@nxp.com wrote:
Hi Jagan,
Just have a quick question here.
After dropping non-DM code, for SPL use non-DM code should switch to SPL_DM and use SPL OF CONTROL?
Here are the options, that we dealt based on the size constraints
- try to use DM_SPL with SPL OF_CONTROL
Not possible
- try PLATDATA
Adds extra bloat to SPLs which are already borderline, so not possible.
- try TPL for truly small size
How would that help ? I don't need extra level of bootloader, I can use SPL right now.
Exactly my thoughts too. I have a at91 based board (smartweb) in mainline where the SPL fits into 4k sram ... no chance for 1) or 2) ...
I see the reasons for integrating more and more stuff into SPL, but it should be possible to build a small SPL ...
Hopefully TPL stays really small ...
Staying small is the stated goal of TPL. And it's not impossible that something like smartweb will need to switch to something like TPL->U-Boot.
Hmm.. while writting (did not actually looked into TPL ...):
Is it possible to boot U-boot directly from TPL ?
No reason why not, so long as everything U-Boot needs is setup, just like always.
if none works, we can see the other option. may be some glue code to read flash for SPL or something else.
I'll have to take a look at the Renesas Gen2, but probably next year.
I talk with customers to get time for converting, but this also may take some time ...
I understand this concern, but, things have been converting for years. I continue to be happy to hear and welcome additional technical problems that need to be solved, but by that same token, I want to be clear that "I think we just can't convert $X to DM for full U-Boot" or similar aren't arguments I'm very receptive to.
Hi Jagan,
(CCing the world looks to me quite a terror attack, nevertheless):
On 27/11/18 06:51, Jagan Teki wrote:
On Mon, Nov 26, 2018 at 12:48 PM Peng Fan peng.fan@nxp.com wrote:
Hi Jagan,
Just have a quick question here.
After dropping non-DM code, for SPL use non-DM code should switch to SPL_DM and use SPL OF CONTROL?
I can understand the reasons to switch completely to DM code, but let's face some real facts:
- dropping legacy code requires to use SPL_OF_CONTROL into SPL, and yes, footprint steadily increases. We are getting rid of place for MX6 Solo, and this is not an ancient processor we can forget. Size of SRAM is not something we can discuss - it is. Other features (secure boot, etc.) were pushed to SPL, and these features were requested by real projects. We cannot get rid of these feature just to make place for DM.
- the benefits cannot be really understood by the manufacturers or owners of boards, because they can see a step in the past if they have to forget some features they are currently using.
- TPL adds an additional step and this increases the boottime - another *real* and *important* feature for most projects.
Here are the options, that we dealt based on the size constraints
- try to use DM_SPL with SPL OF_CONTROL
There is no enough place for most SOCs, even quite recent. This is not due just to the size of SRAM, but also by some restriction on the usage of the SRAM itself by the internal BootROM.
- try PLATDATA
This is even not footprint friendly.
- try TPL for truly small size
See above. There is an additional layer without evident advantages for manufacturers and / or customers.
if none works, we can see the other option. may be some glue code to read flash for SPL or something else.
Best regards, Stefano
On Tue, Nov 27, 2018 at 03:39:39PM +0100, Stefano Babic wrote:
Hi Jagan,
(CCing the world looks to me quite a terror attack, nevertheless):
On 27/11/18 06:51, Jagan Teki wrote:
On Mon, Nov 26, 2018 at 12:48 PM Peng Fan peng.fan@nxp.com wrote:
Hi Jagan,
Just have a quick question here.
After dropping non-DM code, for SPL use non-DM code should switch to SPL_DM and use SPL OF CONTROL?
I can understand the reasons to switch completely to DM code, but let's face some real facts:
- dropping legacy code requires to use SPL_OF_CONTROL into SPL, and yes,
footprint steadily increases. We are getting rid of place for MX6 Solo, and this is not an ancient processor we can forget. Size of SRAM is not something we can discuss - it is. Other features (secure boot, etc.) were pushed to SPL, and these features were requested by real projects. We cannot get rid of these feature just to make place for DM.
Just what is the limit on MX6 Solo, worst case? And what boot methods do we have to support there too? The am335x with secure boot case is small, but might not be as small as you have to worry about here.
- the benefits cannot be really understood by the manufacturers or
owners of boards, because they can see a step in the past if they have to forget some features they are currently using.
Yes, we need to make sure that we don't just drop functionality for no apparent reason. But we can't use that as a reason to maintain wholly separate subsystems for some platforms either.
- TPL adds an additional step and this increases the boottime - another
*real* and *important* feature for most projects.
I _really_ want to see this measured so we know what time is being added so we can think about what to do about it, too. Yes, adding a few kilobytes is a few cycles, and a few is more than zero, and there are use cases that have demands screaming for less cycles to be used, not more (aside, when this is coupled with "But we're moving to aarch64" and that requires more firmware layers makes me shake my head internally a little). But by that same token, part of the notion behind TPL->SPL->U-Boot or Linux is that some functionality is moved from SPL to TPL.
Here are the options, that we dealt based on the size constraints
- try to use DM_SPL with SPL OF_CONTROL
There is no enough place for most SOCs, even quite recent. This is not due just to the size of SRAM, but also by some restriction on the usage of the SRAM itself by the internal BootROM.
This is debatable, frankly. But yes, we do have modern platforms with a still small usable by first non-ROM-application amount of memory. So we must have a solution.
- try PLATDATA
This is even not footprint friendly.
Why? This is in fact our current method for "we need something more footprint friendly to feed enough info in to get to the next application".
- try TPL for truly small size
See above. There is an additional layer without evident advantages for manufacturers and / or customers.
"You need this in order to boot now". Just like moving from say DCD files to SPL required convincing manufacturers and customers that it was a win even if you could do everything with DCD scripts and plugins, this too requires explanation.
But also, I keep saying, and it feels like I keep not being heard, we aren't declaring the death of non-DM for SPL for all platforms just yet. There's likely a few more technical challenges to sort out, and some explanation of why the world isn't static required before we can do that.
Hi Tom,
On 27/11/18 17:13, Tom Rini wrote:
On Tue, Nov 27, 2018 at 03:39:39PM +0100, Stefano Babic wrote:
Hi Jagan,
(CCing the world looks to me quite a terror attack, nevertheless):
On 27/11/18 06:51, Jagan Teki wrote:
On Mon, Nov 26, 2018 at 12:48 PM Peng Fan peng.fan@nxp.com wrote:
Hi Jagan,
Just have a quick question here.
After dropping non-DM code, for SPL use non-DM code should switch to SPL_DM and use SPL OF CONTROL?
I can understand the reasons to switch completely to DM code, but let's face some real facts:
- dropping legacy code requires to use SPL_OF_CONTROL into SPL, and yes,
footprint steadily increases. We are getting rid of place for MX6 Solo, and this is not an ancient processor we can forget. Size of SRAM is not something we can discuss - it is. Other features (secure boot, etc.) were pushed to SPL, and these features were requested by real projects. We cannot get rid of these feature just to make place for DM.
Just what is the limit on MX6 Solo, worst case?
Solo has 68KB OCRAM available - if I remember well, letting some space for early stack and some other thigs, there is still 49K available. This was big enough when SPL was ported to MX, now we are approaching the limit.
This is worst when for some projects there is the need for some customization, like additional code to get device data or calibration for RAM. In some cases, it is becoming tricky.
Anyway, my concern is that the OCRAM is not so small, but nevertheless we have now reached the point where the SPL has grown so much to take all available size.
And what boot methods do we have to support there too?
I can imagine that at least booting from storages (NAND, SPI, SD) and from SDP (usb gadget) should be supported in the same SPL. Maybe just a couple of storages at the same time (main boot device and "backup" to restore it).
The am335x with secure boot case is small, but might not be as small as you have to worry about here.
It looks to me that size is quite comparable to AM335x.
- the benefits cannot be really understood by the manufacturers or
owners of boards, because they can see a step in the past if they have to forget some features they are currently using.
Yes, we need to make sure that we don't just drop functionality for no apparent reason.
Fully agree.
But we can't use that as a reason to maintain wholly separate subsystems for some platforms either.
Right, but we have to find a solution.
- TPL adds an additional step and this increases the boottime - another
*real* and *important* feature for most projects.
I _really_ want to see this measured so we know what time is being added so we can think about what to do about it, too. Yes, adding a few kilobytes is a few cycles, and a few is more than zero, and there are use cases that have demands screaming for less cycles to be used, not more (aside, when this is coupled with "But we're moving to aarch64" and that requires more firmware layers makes me shake my head internally a little). But by that same token, part of the notion behind TPL->SPL->U-Boot or Linux is that some functionality is moved from SPL to TPL.
I have no measures - this can be done after moving one of these i.MX6 to a TPL based bootloader. I am just thinking about when we introduced SPL some years ago. One goal was to have a "simpler" loader that provides the first initialization (just RAM and console), letting u-boot to do the rest. This sounds weird now - these are the requirement we ask for TPL. So TPL looks to me an early SPL - can we just have a simpler SPL, that just does the simple initialization ? TPL was initially thought for SOCs having a very small RAM on board, and then they can boot from a single storage only. This is also not the requirement for more complex SOC, and even with TPL, a i.MX should boot from SPI, NAND / SD. And to maintain the trust of chain, TPL should able to load just signed images, too (it is another step and add complexity).
For aarch64, I agree with you and there is nothing we can do against it. More layers were also introduced due to increased requirements for security.On the other side, these SOCs could be faster during boot due to better CPU.
What about the drivers we need in TPL ? They cannot be a DM driver, so we still need some legacy drivers for storage. We should still have both type of drivers (DM and not DM), and dropping current legacy drivers from SPL does not help.
Here are the options, that we dealt based on the size constraints
- try to use DM_SPL with SPL OF_CONTROL
There is no enough place for most SOCs, even quite recent. This is not due just to the size of SRAM, but also by some restriction on the usage of the SRAM itself by the internal BootROM.
This is debatable, frankly. But yes, we do have modern platforms with a still small usable by first non-ROM-application amount of memory. So we must have a solution.
Fully agree.
- try PLATDATA
This is even not footprint friendly.
Why? This is in fact our current method for "we need something more footprint friendly to feed enough info in to get to the next application".
I think I need some measure - if size remains small enough, it could be a suitable way.
- try TPL for truly small size
See above. There is an additional layer without evident advantages for manufacturers and / or customers.
"You need this in order to boot now". Just like moving from say DCD files to SPL required convincing manufacturers and customers that it was a win even if you could do everything with DCD scripts and plugins, this too requires explanation.
I agree - but let's me say that the advantages in that case were very clear (no fixed RAM setup bound to the HW, run time detection, single binary for multiple variants in case of i.MX6,..) and most important, these advantages meant for manufacturers less costs. Less cost because it is easier to relace a chip that reached EOL, or because they do not have different part number for each bootloader (they have just one), or...
The same should happens now to convince again manufacturers and customers.
But also, I keep saying, and it feels like I keep not being heard, we aren't declaring the death of non-DM for SPL for all platforms just yet.
Nice to listen this - I was already scared from this thread and last "CONFIG_BLK" :-)
There's likely a few more technical challenges to sort out, and some explanation of why the world isn't static required before we can do that.
Best regards, Stefano
On Wed, Nov 28, 2018 at 10:33:56AM +0100, Stefano Babic wrote:
Hi Tom,
On 27/11/18 17:13, Tom Rini wrote:
On Tue, Nov 27, 2018 at 03:39:39PM +0100, Stefano Babic wrote:
Hi Jagan,
(CCing the world looks to me quite a terror attack, nevertheless):
On 27/11/18 06:51, Jagan Teki wrote:
On Mon, Nov 26, 2018 at 12:48 PM Peng Fan peng.fan@nxp.com wrote:
Hi Jagan,
Just have a quick question here.
After dropping non-DM code, for SPL use non-DM code should switch to SPL_DM and use SPL OF CONTROL?
I can understand the reasons to switch completely to DM code, but let's face some real facts:
- dropping legacy code requires to use SPL_OF_CONTROL into SPL, and yes,
footprint steadily increases. We are getting rid of place for MX6 Solo, and this is not an ancient processor we can forget. Size of SRAM is not something we can discuss - it is. Other features (secure boot, etc.) were pushed to SPL, and these features were requested by real projects. We cannot get rid of these feature just to make place for DM.
Just what is the limit on MX6 Solo, worst case?
Solo has 68KB OCRAM available - if I remember well, letting some space for early stack and some other thigs, there is still 49K available. This was big enough when SPL was ported to MX, now we are approaching the limit.
OK, so yes, we're both in the same ballpark wrt size constraints.
This is worst when for some projects there is the need for some customization, like additional code to get device data or calibration for RAM. In some cases, it is becoming tricky.
Anyway, my concern is that the OCRAM is not so small, but nevertheless we have now reached the point where the SPL has grown so much to take all available size.
Right, and we'll need to take a look at what tricks we have available and what we've already used.
And what boot methods do we have to support there too?
I can imagine that at least booting from storages (NAND, SPI, SD) and from SDP (usb gadget) should be supported in the same SPL. Maybe just a couple of storages at the same time (main boot device and "backup" to restore it).
Yeah, that's probably one of the things that'll need to be changed then is moving from "look we can do anything" to more production "here's what the design has for regular and recovery". We had to do that for the longest time, again on am33xx to put USB SPL stuff in its own build but we're now finally looking at being able to perhaps pull that back in to the kitchen-sink EVM builds.
And part of moving from "edit the config file" to "enable what you want via Kconfig" makes me feel less bad / worried about not showcasing every possible feature of a SoC in all builds since it becomes easier to document and less potentially error-prone to change what's configured.
The am335x with secure boot case is small, but might not be as small as you have to worry about here.
It looks to me that size is quite comparable to AM335x.
- the benefits cannot be really understood by the manufacturers or
owners of boards, because they can see a step in the past if they have to forget some features they are currently using.
Yes, we need to make sure that we don't just drop functionality for no apparent reason.
Fully agree.
But we can't use that as a reason to maintain wholly separate subsystems for some platforms either.
Right, but we have to find a solution.
Fully agree.
- TPL adds an additional step and this increases the boottime - another
*real* and *important* feature for most projects.
I _really_ want to see this measured so we know what time is being added so we can think about what to do about it, too. Yes, adding a few kilobytes is a few cycles, and a few is more than zero, and there are use cases that have demands screaming for less cycles to be used, not more (aside, when this is coupled with "But we're moving to aarch64" and that requires more firmware layers makes me shake my head internally a little). But by that same token, part of the notion behind TPL->SPL->U-Boot or Linux is that some functionality is moved from SPL to TPL.
I have no measures - this can be done after moving one of these i.MX6 to
OK, so lets not worry too much about that part then until it's something we can see is a real concern.
a TPL based bootloader. I am just thinking about when we introduced SPL some years ago. One goal was to have a "simpler" loader that provides the first initialization (just RAM and console), letting u-boot to do the rest. This sounds weird now - these are the requirement we ask for TPL. So TPL looks to me an early SPL - can we just have a simpler SPL, that just does the simple initialization ? TPL was initially thought for SOCs having a very small RAM on board, and then they can boot from a single storage only. This is also not the requirement for more complex SOC, and even with TPL, a i.MX should boot from SPI, NAND / SD. And to maintain the trust of chain, TPL should able to load just signed images, too (it is another step and add complexity).
I suppose part of the problem is that we had "SPL" for dealing with NAND booting, where we couldn't do what we used to do, and then we had "SPL" for "lets allow ourselves to do a bunch of neat things". Moving forward it's more "TPL" is "we need one-off (or near enough) code to get ourselves started" and "SPL" for "We need to handle a bunch of neat things very early".
For aarch64, I agree with you and there is nothing we can do against it. More layers were also introduced due to increased requirements for security.On the other side, these SOCs could be faster during boot due to better CPU.
What about the drivers we need in TPL ? They cannot be a DM driver, so we still need some legacy drivers for storage. We should still have both type of drivers (DM and not DM), and dropping current legacy drivers from SPL does not help.
So yes, TPL is where we're going to have to, and will live with one-off SoC-centric and lack of framework drivers to Just Work.
Here are the options, that we dealt based on the size constraints
- try to use DM_SPL with SPL OF_CONTROL
There is no enough place for most SOCs, even quite recent. This is not due just to the size of SRAM, but also by some restriction on the usage of the SRAM itself by the internal BootROM.
This is debatable, frankly. But yes, we do have modern platforms with a still small usable by first non-ROM-application amount of memory. So we must have a solution.
Fully agree.
- try PLATDATA
This is even not footprint friendly.
Why? This is in fact our current method for "we need something more footprint friendly to feed enough info in to get to the next application".
I think I need some measure - if size remains small enough, it could be a suitable way.
Please, yes.
- try TPL for truly small size
See above. There is an additional layer without evident advantages for manufacturers and / or customers.
"You need this in order to boot now". Just like moving from say DCD files to SPL required convincing manufacturers and customers that it was a win even if you could do everything with DCD scripts and plugins, this too requires explanation.
I agree - but let's me say that the advantages in that case were very clear (no fixed RAM setup bound to the HW, run time detection, single binary for multiple variants in case of i.MX6,..) and most important, these advantages meant for manufacturers less costs. Less cost because it is easier to relace a chip that reached EOL, or because they do not have different part number for each bootloader (they have just one), or...
The same should happens now to convince again manufacturers and customers.
But also, I keep saying, and it feels like I keep not being heard, we aren't declaring the death of non-DM for SPL for all platforms just yet.
Nice to listen this - I was already scared from this thread and last "CONFIG_BLK" :-)
There's likely a few more technical challenges to sort out, and some explanation of why the world isn't static required before we can do that.
So, I think we're largely in agreement here. What I'd really like to see happen next is get enough of what's remaining and not DM'ified on the full U-Boot side of things (where the why is because that's what drivers look like now) so that we can enable them for SPL too and see where we really do hit a problem. I'm sure we will, and the situations like at91 where we have single-digit kilobytes to work with are going to be hard. But for i.MX, we're in the same ballpark as other platforms that have been converted.
participants (8)
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Adam Ford -
Heiko Schocher -
Jagan Teki -
Marek Vasut -
Peng Fan -
Simon Glass -
Stefano Babic -
Tom Rini