Device tree contains assigned-clock-rates property for these, but default value will work just fine

Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- v2: implement stubs for CLK_PCIEPHY_REF instead of dropping assigned-clock properties

drivers/clk/rockchip/clk_rk3568.c | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 253b69504f..1c6adc56f9 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -425,6 +425,9 @@ static ulong rk3568_pmuclk_set_rate(struct clk *clk, ulong rate) case PCLK_PMU: ret = rk3568_pmu_set_pmuclk(priv, rate); break; + case CLK_PCIEPHY0_REF: + case CLK_PCIEPHY1_REF: + return 0; default: return -ENOENT; }

This reverts commit 5bec4b0de7851a254fb4447b3599a60f95550141.

Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- v2: revert dropping assigned-clock properties because we have stubs for CLK_PCIEPHY_REF clocks now

arch/arm/dts/rk356x-u-boot.dtsi | 5 ----- 1 file changed, 5 deletions(-)

diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index 2331641049..1709604b22 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -34,11 +34,6 @@ }; };

-&combphy1 { - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-rates; -}; - &cru { u-boot,dm-pre-reloc; status = "okay";

Hi Vasily,

This patch is cover by patch[1] from Eugen, right?

Thanks,

- Kever

[1] https://patchwork.ozlabs.org/project/uboot/patch/20230303073134.282462-2-eug...

On 2023/3/8 06:08, Vasily Khoruzhick wrote:

PHY driver needs to enable PHY supply, otherwise port will remain unpowered.

Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com

v2: address check_patch.pl issues

drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 64 ++++++++++++++++++- 1 file changed, 61 insertions(+), 3 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c index 55e1dbcfef..a859cd6f18 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -19,6 +19,7 @@ #include <asm/io.h> #include <linux/iopoll.h> #include <asm/arch-rockchip/clock.h> +#include <power/regulator.h>

DECLARE_GLOBAL_DATA_PTR;

@@ -62,6 +63,10 @@ struct rockchip_usb2phy { void *reg_base; struct clk phyclk; const struct rockchip_usb2phy_cfg *phy_cfg; +#if IS_ENABLED(CONFIG_DM_REGULATOR)

• struct udevice *host_supply;
• struct udevice *otg_supply;

+#endif };

static inline int property_enable(void *reg_base, @@ -86,12 +91,42 @@ struct rockchip_usb2phy_port_cfg *us2phy_get_port(struct phy *phy) return &phy_cfg->port_cfgs[phy->id]; }

+#if IS_ENABLED(CONFIG_DM_REGULATOR) +static int rockchip_usb2phy_regulator_set_enable(struct phy *phy, bool enable) +{

• struct udevice *parent = dev_get_parent(phy->dev);
• struct rockchip_usb2phy *priv = dev_get_priv(parent);
• struct udevice *supply;
• int ret = 0;
• if (phy->id == USB2PHY_PORT_HOST)

• supply = priv->host_supply;
  

• else

• supply = priv->otg_supply;
  

• if (supply)

• ret = regulator_set_enable(supply, enable);
  

• return ret;

+} +#else +static int rockchip_usb2phy_regulator_set_enable(struct phy *phy, bool enable) +{

• return 0;

+} +#endif

• static int rockchip_usb2phy_power_on(struct phy *phy) { struct udevice *parent = dev_get_parent(phy->dev); struct rockchip_usb2phy *priv = dev_get_priv(parent); const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);

• int ret = rockchip_usb2phy_regulator_set_enable(phy, true);

• if (ret)

• return ret;
  

• property_enable(priv->reg_base, &port_cfg->phy_sus, false);

  /* waiting for the utmi_clk to become stable */

@@ -108,6 +143,11 @@ static int rockchip_usb2phy_power_off(struct phy *phy)

property_enable(priv->reg_base, &port_cfg->phy_sus, true);

• int ret = rockchip_usb2phy_regulator_set_enable(phy, false);
• if (ret)

• return ret;
  

• return 0; }

@@ -149,13 +189,31 @@ static int rockchip_usb2phy_of_xlate(struct phy *phy, struct ofnode_phandle_args *args) { const char *name = phy->dev->name;

• struct udevice *parent = dev_get_parent(phy->dev);
• struct rockchip_usb2phy *priv = dev_get_priv(parent);

+#if IS_ENABLED(CONFIG_DM_REGULATOR)

• struct udevice *supply;
• int ret = device_get_supply_regulator(phy->dev, "phy-supply", &supply);
• if (ret && ret != -ENOENT) {

• pr_err("Failed to get PHY regulator\n");
  

• return ret;
  

• }

+#endif

• if (!strcasecmp(name, "host-port"))

• if (!strcasecmp(name, "host-port")) { phy->id = USB2PHY_PORT_HOST;

• else if (!strcasecmp(name, "otg-port"))

+#if IS_ENABLED(CONFIG_DM_REGULATOR)

• priv->host_supply = supply;
  

+#endif

• } else if (!strcasecmp(name, "otg-port")) { phy->id = USB2PHY_PORT_OTG;

• else

+#if IS_ENABLED(CONFIG_DM_REGULATOR)

• priv->otg_supply = supply;
  

+#endif

• } else { dev_err(phy->dev, "improper %s device\n", name);

• }

  return 0; }