Hello list,

inside the automatic U-Boot patch tracking system a new ticket [DNX#2006091242000069] was created:

<snip>

From: Timur Tabi timur@freescale.com

Signed-off-by: Timur Tabi timur@freescale.com

cpu/mpc83xx/spd_sdram.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 files changed, 40 insertions(+), 0 deletions(-)

diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index 48624fe..f796822 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -112,6 +112,9 @@ long int spd_sdram() unsigned int law_size; unsigned char caslat; unsigned int trfc, trfc_clk, trfc_low; +#ifdef CONFIG_MPC834X

• int caslat_83xx; /* For Errata DDR6 */

+#endif

CFG_READ_SPD(SPD_EEPROM_ADDRESS, 0, 1, (uchar *) & spd, sizeof (spd)); #ifdef SPD_DEBUG @@ -222,6 +225,39 @@ #endif return 0; }

+#ifdef CONFIG_MPC834X +/* Errata DDR6

• This errata affects all MPC8349E, MPC8343E and MPC8347E processors.

+*/

• if ((tmp1 >= 280) && (tmp1 < 350)) { /* CSB=333 */

• if (spd.mid[0] == 0x2c) {
  

• 	/* Micron memory running at 333 MHz */
  

• 	/* Chances are, U-Boot will crash before we get here,
  

• 	   but just in case, display a message and return error. */
  

• 	printf("Micron DDR not supported at 333MHz CSB\n");
  

• 	return 0;
  

• } else if (spd.mid[0] == 0xad) {
  

• 	printf("Hynix DDR does not require Errata DDR6\n");
  

• } else {
  

• 	/* enable 2 cycle Earlier for CL=2.5 or 3 */
  

• 	ddr->debug_reg = 0x202c0000;
  

• 	printf("Errata DDR6 (debug_reg=0x%x)\n", ddr->debug_reg);
  

• }
  

• caslat_83xx = caslat;
  

• }
• if ((tmp1 >= 230) && (tmp1 < 280)) { /* CSB=266 */

• if (spd.mid[0] != 0x2c) /* non-Micron */
  

• 	caslat_83xx = caslat - 1;
  

• }
• if ((tmp1 >= 90) && (tmp1 < 230)) { /* CSB=200 */

• caslat = 3;
  

• caslat_83xx = 2;
  

• }

+#endif

• /*
  • note: caslat must also be programmed into ddr->sdram_mode
  • register.

@@ -237,7 +273,11 @@ #endif (((picos_to_clk(spd.trp * 250) & 0x07) << 28 ) | ((picos_to_clk(spd.tras * 1000) & 0x0f ) << 24 ) | ((picos_to_clk(spd.trcd * 250) & 0x07) << 20 ) | +#ifdef CONFIG_MPC834x

•     ((caslat_83xx & 0x07) << 16 ) |
  

+#else ((caslat & 0x07) << 16 ) | +#endif (trfc_low << 12 ) | ( 0x300 ) | ((picos_to_clk(spd.trrd * 250) & 0x07) << 4) | 1); -- 1.4.2

</snip>

Your U-Boot support team