From: Nishanth Menon nm@ti.com

In some situations the EEPROM used for board detection may not be programmed or simply programmed incorrectly. Therefore, it may be necessary to "simulate" reading the contents of the EEPROM to set appropriate variables used in the board detection code.

This may also be helpful in certain boot modes where doing i2c reads may be costly and the config supports running only a specific board.

Signed-off-by: Nishanth Menon nm@ti.com Signed-off-by: Tero Kristo t-kristo@ti.com Signed-off-by: Keerthy j-keerthy@ti.com Signed-off-by: Franklin S Cooper Jr. fcooper@ti.com --- board/ti/common/board_detect.c | 24 ++++++++++++++++++++++++ board/ti/common/board_detect.h | 17 +++++++++++++++++ 2 files changed, 41 insertions(+)

diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c index a5dba94..5aaf884 100644 --- a/board/ti/common/board_detect.c +++ b/board/ti/common/board_detect.c @@ -116,6 +116,30 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr, return 0; }

+int __maybe_unused ti_i2c_eeprom_am_set(const char *name, const char *rev) +{ + struct ti_common_eeprom *ep; + + if (!name || !rev) + return -1; + + ep = TI_EEPROM_DATA; + if (ep->header == TI_EEPROM_HEADER_MAGIC) + goto already_set; + + /* Set to 0 all fields */ + memset(ep, 0, sizeof(*ep)); + strncpy(ep->name, name, TI_EEPROM_HDR_NAME_LEN); + strncpy(ep->version, rev, TI_EEPROM_HDR_REV_LEN); + /* Some dummy serial number to identify the platform */ + strncpy(ep->serial, "0000", TI_EEPROM_HDR_SERIAL_LEN); + /* Mark it with a valid header */ + ep->header = TI_EEPROM_HEADER_MAGIC; + +already_set: + return 0; +} + int __maybe_unused ti_i2c_eeprom_am_get(int bus_addr, int dev_addr) { int rc; diff --git a/board/ti/common/board_detect.h b/board/ti/common/board_detect.h index 343fcb4..eeeacd3 100644 --- a/board/ti/common/board_detect.h +++ b/board/ti/common/board_detect.h @@ -193,4 +193,21 @@ u64 board_ti_get_emif2_size(void); */ void set_board_info_env(char *name);

+/** + * ti_i2c_eeprom_am_set() - Setup the eeprom data with predefined values + * @name: Name of the board + * @rev: Revision of the board + * + * In some cases such as in RTC-only mode, we are able to skip reading eeprom + * and wasting i2c based initialization time by using predefined flags for + * detecting what platform we are booting on. For those platforms, provide + * a handy function to pre-program information. + * + * NOTE: many eeprom information such as serial number, mac address etc is not + * available. + * + * Return: 0 if all went fine, else return error. + */ +int ti_i2c_eeprom_am_set(const char *name, const char *rev); + #endif /* __BOARD_DETECT_H */

This patch gives U-boot the runtime support to have the board specific code decide which FDT to use. This is especially useful for devices that need this type of runtime determination and also doesn't use SPL.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com Reviewed-by: Lokesh Vutla lokeshvutla@ti.com --- lib/fdtdec.c | 10 ++++++++++ 1 file changed, 10 insertions(+)

diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 81f47ef..38db61c 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -4,6 +4,7 @@ */

#ifndef USE_HOSTCC +#include <boot_fit.h> #include <common.h> #include <dm.h> #include <errno.h> @@ -1243,6 +1244,15 @@ int fdtdec_setup(void) gd->fdt_blob = (ulong *)&_image_binary_end; else gd->fdt_blob = (ulong *)&__bss_end; + +# elif defined CONFIG_FIT_EMBED + gd->fdt_blob = locate_dtb_in_fit(&_end); + + if (gd->fdt_blob == NULL || gd->fdt_blob <= ((void *)&_end)) { + puts("Failed to find proper dtb in embedded FIT Image\n"); + return -1; + } + # else /* FDT is at end of image */ gd->fdt_blob = (ulong *)&_end;

When the EEPROM is first read its contents are stored in memory as a cache to avoid further I2C operations. To determine if the EEPROM was previously read the easiest way is to check the memory to see if the EEPROM's magic header value is set. Create a new function that can determine if the EEPROM was previously read or not without having to perform a I2C transaction.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- board/ti/common/board_detect.c | 10 ++++++++++ board/ti/common/board_detect.h | 9 +++++++++ 2 files changed, 19 insertions(+)

diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c index 5aaf884..b29807a 100644 --- a/board/ti/common/board_detect.c +++ b/board/ti/common/board_detect.c @@ -338,3 +338,13 @@ void __maybe_unused set_board_info_env(char *name) else setenv("board_serial", unknown); } + +bool __maybe_unused board_ti_was_eeprom_read(void) +{ + struct ti_common_eeprom *ep = TI_EEPROM_DATA; + + if (ep->header == TI_EEPROM_HEADER_MAGIC) + return true; + else + return false; +} diff --git a/board/ti/common/board_detect.h b/board/ti/common/board_detect.h index eeeacd3..97dc4e4 100644 --- a/board/ti/common/board_detect.h +++ b/board/ti/common/board_detect.h @@ -194,6 +194,15 @@ u64 board_ti_get_emif2_size(void); void set_board_info_env(char *name);

/** + * board_ti_was_eeprom_read() - Check to see if the eeprom contents have been read + * + * This function is useful to determine if the eeprom has already been read and + * its contents have already been loaded into memory. It utiltzes the magic + * number that the header value is set to upon successful eeprom read. + */ +bool board_ti_was_eeprom_read(void); + +/** * ti_i2c_eeprom_am_set() - Setup the eeprom data with predefined values * @name: Name of the board * @rev: Revision of the board

OF_LIST will be useable by SPL and U-boot. Therefore, update its dependency to allow it to be enable by either SPL or U-boot specific config option.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Lokesh Vutla lokeshvutla@ti.com Acked-by: Andrew F. Davis afd@ti.com --- dts/Kconfig | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/dts/Kconfig b/dts/Kconfig index 4b7d8b1..ba019a8 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -61,14 +61,15 @@ config DEFAULT_DEVICE_TREE

config OF_LIST string "List of device tree files to include for DT control" - depends on SPL_LOAD_FIT + depends on SPL_LOAD_FIT || FIT_EMBED default DEFAULT_DEVICE_TREE help This option specifies a list of device tree files to use for DT - control. These will be packaged into a FIT. At run-time, SPL will - select the correct DT to use by examining the hardware (e.g. - reading a board ID value). This is a list of device tree files - (without the directory or .dtb suffix) separated by <space>. + control. These will be packaged into a FIT. At run-time, U-boot + or SPL will select the correct DT to use by examining the + hardware (e.g. reading a board ID value). This is a list of + device tree files (without the directory or .dtb suffix) + separated by <space>.

config OF_SPL_REMOVE_PROPS string "List of device tree properties to drop for SPL"

From: Lokesh Vutla lokeshvutla@ti.com

Non OMAP platforms i.e. Keystone will also need to use the board EEPROM helpers so let's make the macro platform independent.

Signed-off-by: Roger Quadros rogerq@ti.com Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Reviewed-by: Tom Rini trini@konsulko.com --- arch/arm/include/asm/omap_common.h | 8 +++++--- board/ti/common/board_detect.h | 2 +- 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 2034a5e..c1a70b1 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -767,9 +767,11 @@ static inline u8 is_dra72x(void) #define OMAP_SRAM_SCRATCH_VCORES_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x1C) #define OMAP_SRAM_SCRATCH_SYS_CTRL (SRAM_SCRATCH_SPACE_ADDR + 0x20) #define OMAP_SRAM_SCRATCH_BOOT_PARAMS (SRAM_SCRATCH_SPACE_ADDR + 0x24) -#define OMAP_SRAM_SCRATCH_BOARD_EEPROM_START (SRAM_SCRATCH_SPACE_ADDR + 0x28) -#define OMAP_SRAM_SCRATCH_BOARD_EEPROM_END (SRAM_SCRATCH_SPACE_ADDR + 0x200) -#define OMAP_SRAM_SCRATCH_SPACE_END (OMAP_SRAM_SCRATCH_BOARD_EEPROM_END) +#ifndef TI_SRAM_SCRATCH_BOARD_EEPROM_START +#define TI_SRAM_SCRATCH_BOARD_EEPROM_START (SRAM_SCRATCH_SPACE_ADDR + 0x28) +#define TI_SRAM_SCRATCH_BOARD_EEPROM_END (SRAM_SCRATCH_SPACE_ADDR + 0x200) +#endif +#define OMAP_SRAM_SCRATCH_SPACE_END (TI_SRAM_SCRATCH_BOARD_EEPROM_END)

/* Boot parameters */ #define DEVICE_DATA_OFFSET 0x18 diff --git a/board/ti/common/board_detect.h b/board/ti/common/board_detect.h index 97dc4e4..1ea4d68 100644 --- a/board/ti/common/board_detect.h +++ b/board/ti/common/board_detect.h @@ -98,7 +98,7 @@ struct ti_common_eeprom { };

#define TI_EEPROM_DATA ((struct ti_common_eeprom *)\ - OMAP_SRAM_SCRATCH_BOARD_EEPROM_START) + TI_SRAM_SCRATCH_BOARD_EEPROM_START)

/** * ti_i2c_eeprom_am_get() - Consolidated eeprom data collection for AM* TI EVMs

K2G boards have a EEPROM that will be used for board detection. Therefore, select the board detection config for K2G evms.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- arch/arm/mach-keystone/Kconfig | 1 + 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig index e1962c7..5c880fa 100644 --- a/arch/arm/mach-keystone/Kconfig +++ b/arch/arm/mach-keystone/Kconfig @@ -15,6 +15,7 @@ config TARGET_K2L_EVM

config TARGET_K2G_EVM bool "TI Keystone 2 Galileo EVM" + select TI_I2C_BOARD_DETECT

endchoice

Runtime U-boot dtb selection is generally a two step process. First step is to simply use an initial generic dtb. The second step is to select the dtb and perhaps execute additional code ones U-boot knows what board it is running on. Embedded_dtb_select handles the second step by allowing board specific code to run and perform what ever necessary configuration that is needed.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- common/Kconfig | 10 ++++++++++ common/board_f.c | 3 +++ include/common.h | 4 ++++ 3 files changed, 17 insertions(+)

diff --git a/common/Kconfig b/common/Kconfig index 11495f3..bf4e94b 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -352,6 +352,16 @@ config SYS_STDIO_DEREGISTER

endmenu

+config DTB_RESELECT + bool "Support swapping dtbs at a later point in boot" + depends on FIT_EMBED + default n + help + It is possible during initial boot you may need to use a generic + dtb until you can fully determine the board your running on. This + config allows boards to implement a function at a later point + during boot to switch to the "correct" dtb. + config FIT_EMBED bool "Support a FIT image embedded in the U-boot image" default n diff --git a/common/board_f.c b/common/board_f.c index ae6cd85..2e69b3a 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -920,6 +920,9 @@ static const init_fnc_t init_sequence_f[] = { #if defined(CONFIG_DISPLAY_CPUINFO) print_cpuinfo, /* display cpu info (and speed) */ #endif +#if defined(CONFIG_DTB_RESELECT) + embedded_dtb_select, +#endif #if defined(CONFIG_DISPLAY_BOARDINFO) show_board_info, #endif diff --git a/include/common.h b/include/common.h index fbbc2cb..7bc85d8 100644 --- a/include/common.h +++ b/include/common.h @@ -451,6 +451,10 @@ void pci_init_board(void); #endif #endif

+#if defined(CONFIG_DTB_RESELECT) +int embedded_dtb_select(void); +#endif + int misc_init_f (void); int misc_init_r (void);

Future boards will need to configure DDR3 registers in a slightly different manner. Support this by defining additional variables and defines that will be utilized later.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- arch/arm/mach-keystone/include/mach/ddr3.h | 14 ++++++++++++++ arch/arm/mach-keystone/include/mach/hardware.h | 3 +++ 2 files changed, 17 insertions(+)

diff --git a/arch/arm/mach-keystone/include/mach/ddr3.h b/arch/arm/mach-keystone/include/mach/ddr3.h index 5feffe8..93789fd 100644 --- a/arch/arm/mach-keystone/include/mach/ddr3.h +++ b/arch/arm/mach-keystone/include/mach/ddr3.h @@ -35,6 +35,20 @@ struct ddr3_phy_config { unsigned int zq1cr1; unsigned int zq2cr1; unsigned int pir_v1; + unsigned int datx8_2_mask; + unsigned int datx8_2_val; + unsigned int datx8_3_mask; + unsigned int datx8_3_val; + unsigned int datx8_4_mask; + unsigned int datx8_4_val; + unsigned int datx8_5_mask; + unsigned int datx8_5_val; + unsigned int datx8_6_mask; + unsigned int datx8_6_val; + unsigned int datx8_7_mask; + unsigned int datx8_7_val; + unsigned int datx8_8_mask; + unsigned int datx8_8_val; unsigned int pir_v2; };

diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h index 38d0190..1969a10 100644 --- a/arch/arm/mach-keystone/include/mach/hardware.h +++ b/arch/arm/mach-keystone/include/mach/hardware.h @@ -52,6 +52,8 @@ typedef volatile unsigned int *dv_reg_p; #define KS2_DDRPHY_ZQ2CR1_OFFSET 0x1A4 #define KS2_DDRPHY_ZQ3CR1_OFFSET 0x1B4

+#define KS2_DDRPHY_DATX8_2_OFFSET 0x240 +#define KS2_DDRPHY_DATX8_3_OFFSET 0x280 #define KS2_DDRPHY_DATX8_4_OFFSET 0x2C0 #define KS2_DDRPHY_DATX8_5_OFFSET 0x300 #define KS2_DDRPHY_DATX8_6_OFFSET 0x340 @@ -70,6 +72,7 @@ typedef volatile unsigned int *dv_reg_p; #define PDQ_MASK 0x00000070 #define NOSRA_MASK 0x08000000 #define ECC_MASK 0x00000001 +#define DXEN_MASK 0x00000001

/* DDR3 definitions */ #define KS2_DDR3A_EMIF_CTRL_BASE 0x21010000

K2G GP doesn't require the MR2 register to be programed since the default is good enough. However, newer K2G boards do need to change this register value. Therefore, instead of not writing this register if ran on a K2G board just program the value to be written to match the default/reset value.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- arch/arm/mach-keystone/ddr3.c | 3 +-- board/ti/ks2_evm/ddr3_k2g.c | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-keystone/ddr3.c b/arch/arm/mach-keystone/ddr3.c index ee8e12e..25a9637 100644 --- a/arch/arm/mach-keystone/ddr3.c +++ b/arch/arm/mach-keystone/ddr3.c @@ -52,8 +52,7 @@ void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg) __raw_writel(phy_cfg->dtpr2, base + KS2_DDRPHY_DTPR2_OFFSET); __raw_writel(phy_cfg->mr0, base + KS2_DDRPHY_MR0_OFFSET); __raw_writel(phy_cfg->mr1, base + KS2_DDRPHY_MR1_OFFSET); - if (!cpu_is_k2g()) - __raw_writel(phy_cfg->mr2, base + KS2_DDRPHY_MR2_OFFSET); + __raw_writel(phy_cfg->mr2, base + KS2_DDRPHY_MR2_OFFSET); __raw_writel(phy_cfg->dtcr, base + KS2_DDRPHY_DTCR_OFFSET); __raw_writel(phy_cfg->pgcr2, base + KS2_DDRPHY_PGCR2_OFFSET);

diff --git a/board/ti/ks2_evm/ddr3_k2g.c b/board/ti/ks2_evm/ddr3_k2g.c index 344961d..aeb7da6 100644 --- a/board/ti/ks2_evm/ddr3_k2g.c +++ b/board/ti/ks2_evm/ddr3_k2g.c @@ -27,7 +27,7 @@ struct ddr3_phy_config ddr3phy_800_2g = { .dtpr2 = 0x50022A00ul, .mr0 = 0x00001430ul, .mr1 = 0x00000006ul, - .mr2 = 0x00000018ul, + .mr2 = 0x00000000ul, .dtcr = 0x710035C7ul, .pgcr2 = 0x00F03D09ul, .zq0cr1 = 0x0001005Dul,

Different K2G evms may need to program the various KS2_DDRPHY_DATX8_X_OFFSET registers in different ways. Therefore, use the mask and val registers for each KS2_DDRPHY_DATAX_X_OFFSET to properly program the register.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- arch/arm/mach-keystone/ddr3.c | 32 +++++++++++++++++++++++++++----- board/ti/ks2_evm/ddr3_k2g.c | 14 ++++++++++++++ 2 files changed, 41 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-keystone/ddr3.c b/arch/arm/mach-keystone/ddr3.c index 25a9637..4cad6a2 100644 --- a/arch/arm/mach-keystone/ddr3.c +++ b/arch/arm/mach-keystone/ddr3.c @@ -65,11 +65,33 @@ void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg) ;

if (cpu_is_k2g()) { - setbits_le32(base + KS2_DDRPHY_DATX8_4_OFFSET, 0x1); - clrbits_le32(base + KS2_DDRPHY_DATX8_5_OFFSET, 0x1); - clrbits_le32(base + KS2_DDRPHY_DATX8_6_OFFSET, 0x1); - clrbits_le32(base + KS2_DDRPHY_DATX8_7_OFFSET, 0x1); - clrbits_le32(base + KS2_DDRPHY_DATX8_8_OFFSET, 0x1); + clrsetbits_le32(base + KS2_DDRPHY_DATX8_2_OFFSET, + phy_cfg->datx8_2_mask, + phy_cfg->datx8_2_val); + + clrsetbits_le32(base + KS2_DDRPHY_DATX8_3_OFFSET, + phy_cfg->datx8_3_mask, + phy_cfg->datx8_3_val); + + clrsetbits_le32(base + KS2_DDRPHY_DATX8_4_OFFSET, + phy_cfg->datx8_4_mask, + phy_cfg->datx8_4_val); + + clrsetbits_le32(base + KS2_DDRPHY_DATX8_5_OFFSET, + phy_cfg->datx8_5_mask, + phy_cfg->datx8_5_val); + + clrsetbits_le32(base + KS2_DDRPHY_DATX8_6_OFFSET, + phy_cfg->datx8_6_mask, + phy_cfg->datx8_6_val); + + clrsetbits_le32(base + KS2_DDRPHY_DATX8_7_OFFSET, + phy_cfg->datx8_7_mask, + phy_cfg->datx8_7_val); + + clrsetbits_le32(base + KS2_DDRPHY_DATX8_8_OFFSET, + phy_cfg->datx8_8_mask, + phy_cfg->datx8_8_val); }

__raw_writel(phy_cfg->pir_v2, base + KS2_DDRPHY_PIR_OFFSET); diff --git a/board/ti/ks2_evm/ddr3_k2g.c b/board/ti/ks2_evm/ddr3_k2g.c index aeb7da6..3b12943 100644 --- a/board/ti/ks2_evm/ddr3_k2g.c +++ b/board/ti/ks2_evm/ddr3_k2g.c @@ -34,6 +34,20 @@ struct ddr3_phy_config ddr3phy_800_2g = { .zq1cr1 = 0x0001005Bul, .zq2cr1 = 0x0001005Bul, .pir_v1 = 0x00000033ul, + .datx8_2_mask = 0, + .datx8_2_val = 0, + .datx8_3_mask = 0, + .datx8_3_val = 0, + .datx8_4_mask = 0, + .datx8_4_val = ((1 << 0)), + .datx8_5_mask = DXEN_MASK, + .datx8_5_val = 0, + .datx8_6_mask = DXEN_MASK, + .datx8_6_val = 0, + .datx8_7_mask = DXEN_MASK, + .datx8_7_val = 0, + .datx8_8_mask = DXEN_MASK, + .datx8_8_val = 0, .pir_v2 = 0x00000F81ul, };

Add a function that can be used to determine if the board being ran on is a K2G Industrial Communication Engine EVM or K2G General Purpose EVM based on values programmed on the EEPROM.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- board/ti/ks2_evm/board.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)

diff --git a/board/ti/ks2_evm/board.h b/board/ti/ks2_evm/board.h index 0698921..b3ad188 100644 --- a/board/ti/ks2_evm/board.h +++ b/board/ti/ks2_evm/board.h @@ -15,6 +15,26 @@

extern struct eth_priv_t eth_priv_cfg[];

+#if defined(CONFIG_TI_I2C_BOARD_DETECT) +static inline int board_is_k2g_gp(void) +{ + return board_ti_is("66AK2GGP"); +} +static inline int board_is_k2g_ice(void) +{ + return board_ti_is("66AK2GIC"); +} +#else +static inline int board_is_k2g_gp(void) +{ + return false; +} +static inline int board_is_k2g_ice(void) +{ + return false; +} +#endif + int get_num_eth_ports(void); void spl_init_keystone_plls(void);

Add basic pinmux data for new K2G ICE evm. Also add pinmuxing for a generic K2G evm which includes I2C 0 and 1 used for board detection purposes.

Since multiple K2G boards are supported that means initially generic pinmuxing should be used when board detection hasn't ran. Once board detection runs the proper pinmuxing can be reran to match the board being ran on.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- board/ti/ks2_evm/board_k2g.c | 2 ++ board/ti/ks2_evm/mux-k2g.h | 45 +++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 46 insertions(+), 1 deletion(-)

diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c index 64b1f6b..8340cde 100644 --- a/board/ti/ks2_evm/board_k2g.c +++ b/board/ti/ks2_evm/board_k2g.c @@ -180,6 +180,8 @@ int embedded_dtb_select(void)

fdtdec_setup();

+ k2g_mux_config(); + k2g_reset_mux_config();

/* deassert FLASH_HOLD */ diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h index 773f9b7..630103d 100644 --- a/board/ti/ks2_evm/mux-k2g.h +++ b/board/ti/ks2_evm/mux-k2g.h @@ -11,6 +11,22 @@ #include <asm/io.h> #include <asm/arch/mux-k2g.h> #include <asm/arch/hardware.h> +#include "board.h" + +struct pin_cfg k2g_generic_pin_cfg[] = { + /* UART0 */ + { 115, MODE(0) }, /* SOC_UART0_RXD */ + { 116, MODE(0) }, /* SOC_UART0_TXD */ + + /* I2C 0 */ + { 223, MODE(0) }, /* SOC_I2C0_SCL */ + { 224, MODE(0) }, /* SOC_I2C0_SDA */ + + /* I2C 1 */ + { 225, MODE(0) }, /* SOC_I2C1_SCL */ + { 226, MODE(0) }, /* SOC_I2C1_SDA */ + { MAX_PIN_N, } +};

struct pin_cfg k2g_evm_pin_cfg[] = { /* GPMC */ @@ -307,7 +323,34 @@ struct pin_cfg k2g_evm_pin_cfg[] = { { MAX_PIN_N, } };

+struct pin_cfg k2g_ice_evm_pin_cfg[] = { + /* MMC 1 */ + { 63, MODE(0) | PIN_PTD }, /* MMC1_DAT3.MMC1_DAT3 */ + { 64, MODE(0) | PIN_PTU }, /* MMC1_DAT2.MMC1_DAT2 */ + { 65, MODE(0) | PIN_PTU }, /* MMC1_DAT1.MMC1_DAT1 */ + { 66, MODE(0) | PIN_PTD }, /* MMC1_DAT0.MMC1_DAT0 */ + { 67, MODE(0) | PIN_PTD }, /* MMC1_CLK.MMC1_CLK */ + { 68, MODE(0) | PIN_PTD }, /* MMC1_CMD.MMC1_CMD */ + { 69, MODE(3) | PIN_PTU }, /* MMC1_SDCD.GPIO0_69 */ + { 70, MODE(0) | PIN_PTU }, /* MMC1_SDWP.MMC1_SDWP */ + { 71, MODE(0) | PIN_PTD }, /* MMC1_POW.MMC1_POW */ + + /* I2C 0 */ + { 223, MODE(0) }, /* SOC_I2C0_SCL */ + { 224, MODE(0) }, /* SOC_I2C0_SDA */ + { MAX_PIN_N, } +}; + void k2g_mux_config(void) { - configure_pin_mux(k2g_evm_pin_cfg); + if (!board_ti_was_eeprom_read()) { + configure_pin_mux(k2g_generic_pin_cfg); + } else if (board_is_k2g_gp()) { + configure_pin_mux(k2g_evm_pin_cfg); + } else if (board_is_k2g_ice()) { + configure_pin_mux(k2g_ice_evm_pin_cfg); + } else { + puts("Unknown board, cannot configure pinmux."); + hang(); + } }

Add configuration settings used by the K2G ICE evm. Also use board detection to determine which DDR3 configuration to use.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- board/ti/ks2_evm/ddr3_k2g.c | 62 +++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 60 insertions(+), 2 deletions(-)

diff --git a/board/ti/ks2_evm/ddr3_k2g.c b/board/ti/ks2_evm/ddr3_k2g.c index 3b12943..44db335 100644 --- a/board/ti/ks2_evm/ddr3_k2g.c +++ b/board/ti/ks2_evm/ddr3_k2g.c @@ -10,7 +10,9 @@ #include <common.h> #include "ddr3_cfg.h" #include <asm/arch/ddr3.h> +#include "board.h"

+/* K2G GP EVM DDR3 Configuration */ struct ddr3_phy_config ddr3phy_800_2g = { .pllcr = 0x000DC000ul, .pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK), @@ -61,13 +63,69 @@ struct ddr3_emif_config ddr3_800_2g = { .sdrfc = 0x00000C34ul, };

+/* K2G ICE evm DDR3 Configuration */ +struct ddr3_phy_config ddr3phy_800_512mb = { + .pllcr = 0x000DC000ul, + .pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK), + .pgcr1_val = ((1 << 2) | (2 << 7) | (1 << 23)), + .ptr0 = 0x42C21590ul, + .ptr1 = 0xD05612C0ul, + .ptr2 = 0, + .ptr3 = 0x06C30D40ul, + .ptr4 = 0x06413880ul, + .dcr_mask = (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK), + .dcr_val = ((1 << 10)), + .dtpr0 = 0x550E6644ul, + .dtpr1 = 0x32834200ul, + .dtpr2 = 0x50022A00ul, + .mr0 = 0x00001430ul, + .mr1 = 0x00000006ul, + .mr2 = 0x00000008ul, + .dtcr = 0x710035C7ul, + .pgcr2 = 0x00F03D09ul, + .zq0cr1 = 0x0001005Dul, + .zq1cr1 = 0x0001005Bul, + .zq2cr1 = 0x0001005Bul, + .pir_v1 = 0x00000033ul, + .datx8_2_mask = DXEN_MASK, + .datx8_2_val = 0, + .datx8_3_mask = DXEN_MASK, + .datx8_3_val = 0, + .datx8_4_mask = DXEN_MASK, + .datx8_4_val = 0, + .datx8_5_mask = DXEN_MASK, + .datx8_5_val = 0, + .datx8_6_mask = DXEN_MASK, + .datx8_6_val = 0, + .datx8_7_mask = DXEN_MASK, + .datx8_7_val = 0, + .datx8_8_mask = DXEN_MASK, + .datx8_8_val = 0, + .pir_v2 = 0x00000F81ul, +}; + +struct ddr3_emif_config ddr3_800_512mb = { + .sdcfg = 0x62006662ul, + .sdtim1 = 0x0A385033ul, + .sdtim2 = 0x00001CA5ul, + .sdtim3 = 0x21ADFF32ul, + .sdtim4 = 0x533F067Ful, + .zqcfg = 0x70073200ul, + .sdrfc = 0x00000C34ul, +}; + u32 ddr3_init(void) { /* Reset DDR3 PHY after PLL enabled */ ddr3_reset_ddrphy();

- ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_800_2g); - ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_800_2g); + if (board_is_k2g_gp()) { + ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_800_2g); + ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_800_2g); + } else if (board_is_k2g_ice()) { + ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_800_512mb); + ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_800_512mb); + }

return 0; }

Some code doesn't apply to K2G ICE evm. Therefore, use board detection to wrap these calls.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- board/ti/ks2_evm/board.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index 4792311..c61baee 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -45,13 +45,17 @@ int dram_init(void) gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_MAX_RAM_BANK_SIZE); #if defined(CONFIG_TI_AEMIF) - aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs); + if (!board_is_k2g_ice()) + aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs); #endif

- if (ddr3_size) - ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size); - else - ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, gd->ram_size >> 30); + if (!board_is_k2g_ice()) { + if (ddr3_size) + ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size); + else + ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, + gd->ram_size >> 30); + }

return 0; }

Certain peripherals used by K2G GP aren't used on K2G ICE evm. Or configuration is slightly different. Therefore, use board detection to deal with these variations.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- board/ti/ks2_evm/board_k2g.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c index 8340cde..0fbc64a 100644 --- a/board/ti/ks2_evm/board_k2g.c +++ b/board/ti/ks2_evm/board_k2g.c @@ -114,7 +114,9 @@ int board_mmc_init(bd_t *bis) return -1; }

- omap_mmc_init(0, 0, 0, -1, -1); + if (board_is_k2g_gp()) + omap_mmc_init(0, 0, 0, -1, -1); + omap_mmc_init(1, 0, 0, -1, -1); return 0; } @@ -184,11 +186,13 @@ int embedded_dtb_select(void)

k2g_reset_mux_config();

- /* deassert FLASH_HOLD */ - clrbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_DIR_OFFSET, - BIT(9)); - setbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_SETDATA_OFFSET, - BIT(9)); + if (board_is_k2g_gp()) { + /* deassert FLASH_HOLD */ + clrbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_DIR_OFFSET, + BIT(9)); + setbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_SETDATA_OFFSET, + BIT(9)); + }

return 0; }

Enable CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG to allow "board_name" to be set depending on the board it is being ran on.

Update findfdt to use this new dynamic board_name value to determine which dtb should be used.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- board/ti/ks2_evm/board_k2g.c | 13 +++++++++++++ include/configs/k2g_evm.h | 14 ++++++++++++-- 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c index 0fbc64a..70164ee 100644 --- a/board/ti/ks2_evm/board_k2g.c +++ b/board/ti/ks2_evm/board_k2g.c @@ -198,6 +198,19 @@ int embedded_dtb_select(void) } #endif

+#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + if (board_is_k2g_gp()) + setenv("board_name", "66AK2GGP\0"); + else if (board_is_k2g_ice()) + setenv("board_name", "66AK2GIC\0"); +#endif + return 0; +} +#endif + #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index bd25231..0d11e4e 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -13,6 +13,9 @@ /* Platform type */ #define CONFIG_SOC_K2G

+#define CONFIG_BOARD_LATE_INIT +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + /* U-Boot general configuration */ #define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ DEFAULT_MMC_TI_ARGS \ @@ -25,7 +28,14 @@ "rd_spec=-\0" \ "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \ "root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \ - "name_fdt=keystone-k2g-evm.dtb\0" \ + "findfdt="\ + "if test $board_name = 66AK2GGP; then " \ + "setenv name_fdt keystone-k2g-evm.dtb; " \ + "else if test $board_name = 66AK2GIC; then " \ + "setenv name_fdt keystone-k2g-ice.dtb; " \ + "else if test $name_fdt = undefined; then " \ + "echo WARNING: Could not determine device tree to use;"\ + "fi;fi;fi;\0" \ "name_mon=skern-k2g.bin\0" \ "name_ubi=k2g-evm-ubifs.ubi\0" \ "name_uboot=u-boot-spi-k2g-evm.gph\0" \ @@ -43,7 +53,7 @@ "run envboot; " \ "run set_name_pmmc init_${boot} init_fw_rd_${boot} " \ "get_pmmc_${boot} run_pmmc get_mon_${boot} run_mon " \ - "get_fdt_${boot} get_kern_${boot} run_kern" + "findfdt get_fdt_${boot} get_kern_${boot} run_kern"

#include <configs/ti_armv7_keystone2.h>

Disable netcp by default like all other peripherals in the dtsi file. Enable the peripheral explicitly in the board specific dts file.

Signed-off-by: Franklin S Cooper Jr fcooper@ti.com --- arch/arm/dts/keystone-k2g-evm.dts | 4 ++++ arch/arm/dts/keystone-k2g-netcp.dtsi | 1 + 2 files changed, 5 insertions(+)

diff --git a/arch/arm/dts/keystone-k2g-evm.dts b/arch/arm/dts/keystone-k2g-evm.dts index 696a0d7..594543f 100644 --- a/arch/arm/dts/keystone-k2g-evm.dts +++ b/arch/arm/dts/keystone-k2g-evm.dts @@ -32,6 +32,10 @@ phy-handle = <&ethphy0>; };

+&netcp { + status = "okay"; +}; + &spi1 { status = "okay";

diff --git a/arch/arm/dts/keystone-k2g-netcp.dtsi b/arch/arm/dts/keystone-k2g-netcp.dtsi index a9b26c3..d76f2a1 100644 --- a/arch/arm/dts/keystone-k2g-netcp.dtsi +++ b/arch/arm/dts/keystone-k2g-netcp.dtsi @@ -99,6 +99,7 @@ netcp: netcp@4000000 { reg = <0x2620110 0x8>; reg-names = "efuse"; compatible = "ti,netcp-1.0"; + status = "disabled"; #address-cells = <1>; #size-cells = <1>; /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */