From: Peng Fan peng.fan@nxp.com

Add i.MX8MP UltraLite Part CPU type

Signed-off-by: Peng Fan peng.fan@nxp.com --- arch/arm/include/asm/arch-imx/cpu.h | 1 + arch/arm/include/asm/mach-imx/sys_proto.h | 3 ++- arch/arm/mach-imx/cpu.c | 2 ++ 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index fe963789710..4f63803765e 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -47,6 +47,7 @@ #define MXC_CPU_IMX8MP6 0x186 /* dummy ID */ #define MXC_CPU_IMX8MPL 0x187 /* dummy ID */ #define MXC_CPU_IMX8MPD 0x188 /* dummy ID */ +#define MXC_CPU_IMX8MPUL 0x189 /* dummy ID */ #define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */ #define MXC_CPU_IMX8QM 0x91 /* dummy ID */ #define MXC_CPU_IMX8QXP 0x92 /* dummy ID */ diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 37fd427cc00..940864aaeb7 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -73,10 +73,11 @@ struct bd_info; #define is_imx8mnud() (is_cpu_type(MXC_CPU_IMX8MNUD)) #define is_imx8mnus() (is_cpu_type(MXC_CPU_IMX8MNUS)) #define is_imx8mp() (is_cpu_type(MXC_CPU_IMX8MP) || is_cpu_type(MXC_CPU_IMX8MPD) || \ - is_cpu_type(MXC_CPU_IMX8MPL) || is_cpu_type(MXC_CPU_IMX8MP6)) + is_cpu_type(MXC_CPU_IMX8MPL) || is_cpu_type(MXC_CPU_IMX8MP6) || is_cpu_type(MXC_CPU_IMX8MPUL)) #define is_imx8mpd() (is_cpu_type(MXC_CPU_IMX8MPD)) #define is_imx8mpl() (is_cpu_type(MXC_CPU_IMX8MPL)) #define is_imx8mp6() (is_cpu_type(MXC_CPU_IMX8MP6)) +#define is_imx8mpul() (is_cpu_type(MXC_CPU_IMX8MPUL))

#define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))

diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 8eb05c8dd67..ba386c24b4a 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -106,6 +106,8 @@ const char *get_imx_type(u32 imxtype) return "8MP Lite[4]"; /* Quad-core Lite version of the imx8mp */ case MXC_CPU_IMX8MP6: return "8MP[6]"; /* Quad-core version of the imx8mp, NPU fused */ + case MXC_CPU_IMX8MPUL: + return "8MP UltraLite"; /* Quad-core UltraLite version of the imx8mp */ case MXC_CPU_IMX8MN: return "8MNano Quad"; /* Quad-core version */ case MXC_CPU_IMX8MND:

From: Peng Fan peng.fan@nxp.com

Detect i.MX8MP UltraLite in get_cpu_variant_type

Signed-off-by: Peng Fan peng.fan@nxp.com --- arch/arm/mach-imx/imx8m/soc.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 7397b99a1ee..f88296f7311 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -408,13 +408,27 @@ static u32 get_cpu_variant_type(u32 type)

/* npu disabled*/ if ((value & 0x8) == 0x8) - flag |= (1 << 1); + flag |= BIT(1);

/* isp disabled */ if ((value & 0x3) == 0x3) - flag |= (1 << 2); + flag |= BIT(2); + + /* gpu disabled */ + if ((value & 0xc0) == 0xc0) + flag |= BIT(3); + + /* lvds disabled */ + if ((value & 0x180000) == 0x180000) + flag |= BIT(4); + + /* mipi dsi disabled */ + if ((value & 0x60000) == 0x60000) + flag |= BIT(5);

switch (flag) { + case 0x3f: + return MXC_CPU_IMX8MPUL; case 7: return MXC_CPU_IMX8MPL; case 2:

From: Peng Fan peng.fan@nxp.com

Beside the fused modules on iMX8MP Lite, this part has also fused GPU3D/2D, LVDS and MIPI DSI. So we have to disable them for kernel and also disable MIPI DSI in u-boot DTS for splash screen at runtime.

Signed-off-by: Ye Li ye.li@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com --- arch/arm/mach-imx/imx8m/soc.c | 147 ++++++++++++++++++++++++++++++++-- 1 file changed, 142 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index f88296f7311..0ab55765c7c 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -907,6 +907,90 @@ static int low_drive_gpu_freq(void *blob) } #endif

+static bool check_remote_endpoint(void *blob, const char *ep1, const char *ep2) +{ + int lookup_node; + int nodeoff; + + nodeoff = fdt_path_offset(blob, ep1); + if (nodeoff) { + lookup_node = fdtdec_lookup_phandle(blob, nodeoff, "remote-endpoint"); + nodeoff = fdt_path_offset(blob, ep2); + + if (nodeoff > 0 && nodeoff == lookup_node) + return true; + } + + return false; +} + +int disable_dsi_lcdif_nodes(void *blob) +{ + int ret; + + static const char * const dsi_path_8mp[] = { + "/soc@0/bus@32c00000/mipi_dsi@32e60000" + }; + + static const char * const lcdif_path_8mp[] = { + "/soc@0/bus@32c00000/lcd-controller@32e80000" + }; + + static const char * const lcdif_ep_path_8mp[] = { + "/soc@0/bus@32c00000/lcd-controller@32e80000/port@0/endpoint" + }; + static const char * const dsi_ep_path_8mp[] = { + "/soc@0/bus@32c00000/mipi_dsi@32e60000/port@0/endpoint" + }; + + ret = disable_fdt_nodes(blob, dsi_path_8mp, ARRAY_SIZE(dsi_path_8mp)); + if (ret) + return ret; + + if (check_remote_endpoint(blob, dsi_ep_path_8mp[0], lcdif_ep_path_8mp[0])) { + /* Disable lcdif node */ + return disable_fdt_nodes(blob, lcdif_path_8mp, ARRAY_SIZE(lcdif_path_8mp)); + } + + return 0; +} + +int disable_lvds_lcdif_nodes(void *blob) +{ + int ret, i; + + static const char * const ldb_path_8mp[] = { + "/soc@0/bus@32c00000/ldb@32ec005c", + "/soc@0/bus@32c00000/phy@32ec0128" + }; + + static const char * const lcdif_path_8mp[] = { + "/soc@0/bus@32c00000/lcd-controller@32e90000" + }; + + static const char * const lcdif_ep_path_8mp[] = { + "/soc@0/bus@32c00000/lcd-controller@32e90000/port@0/endpoint@0", + "/soc@0/bus@32c00000/lcd-controller@32e90000/port@0/endpoint@1" + }; + static const char * const ldb_ep_path_8mp[] = { + "/soc@0/bus@32c00000/ldb@32ec005c/lvds-channel@0/port@0/endpoint", + "/soc@0/bus@32c00000/ldb@32ec005c/lvds-channel@1/port@0/endpoint" + }; + + ret = disable_fdt_nodes(blob, ldb_path_8mp, ARRAY_SIZE(ldb_path_8mp)); + if (ret) + return ret; + + for (i = 0; i < ARRAY_SIZE(ldb_ep_path_8mp); i++) { + if (check_remote_endpoint(blob, ldb_ep_path_8mp[i], lcdif_ep_path_8mp[i])) { + /* Disable lcdif node */ + return disable_fdt_nodes(blob, lcdif_path_8mp, ARRAY_SIZE(lcdif_path_8mp)); + } + } + + return 0; +} + int disable_gpu_nodes(void *blob) { static const char * const nodes_path_8mn[] = { @@ -914,7 +998,15 @@ int disable_gpu_nodes(void *blob) "/soc@/gpu@38000000" };

- return disable_fdt_nodes(blob, nodes_path_8mn, ARRAY_SIZE(nodes_path_8mn)); + static const char * const nodes_path_8mp[] = { + "/gpu3d@38000000", + "/gpu2d@38008000" + }; + + if (is_imx8mp()) + return disable_fdt_nodes(blob, nodes_path_8mp, ARRAY_SIZE(nodes_path_8mp)); + else + return disable_fdt_nodes(blob, nodes_path_8mn, ARRAY_SIZE(nodes_path_8mn)); }

int disable_npu_nodes(void *blob) @@ -1170,16 +1262,27 @@ usb_modify_speed: disable_cpu_nodes(blob, 3);

#elif defined(CONFIG_IMX8MP) - if (is_imx8mpl()) + if (is_imx8mpul()) { + /* Disable GPU */ + disable_gpu_nodes(blob); + + /* Disable DSI */ + disable_dsi_lcdif_nodes(blob); + + /* Disable LVDS */ + disable_lvds_lcdif_nodes(blob); + } + + if (is_imx8mpul() || is_imx8mpl()) disable_vpu_nodes(blob);

- if (is_imx8mpl() || is_imx8mp6()) + if (is_imx8mpul() || is_imx8mpl() || is_imx8mp6()) disable_npu_nodes(blob);

- if (is_imx8mpl()) + if (is_imx8mpul() || is_imx8mpl()) disable_isp_nodes(blob);

- if (is_imx8mpl() || is_imx8mp6()) + if (is_imx8mpul() || is_imx8mpl() || is_imx8mp6()) disable_dsp_nodes(blob);

if (is_imx8mpd()) @@ -1190,6 +1293,40 @@ usb_modify_speed: } #endif

+#ifdef CONFIG_OF_BOARD_FIXUP +#ifndef CONFIG_SPL_BUILD +int board_fix_fdt(void *fdt) +{ + if (is_imx8mpul()) { + int i = 0; + int nodeoff, ret; + const char *status = "disabled"; + static const char * const dsi_nodes[] = { + "/soc@0/bus@32c00000/mipi_dsi@32e60000", + "/soc@0/bus@32c00000/lcd-controller@32e80000", + "/dsi-host" + }; + + for (i = 0; i < ARRAY_SIZE(dsi_nodes); i++) { + nodeoff = fdt_path_offset(fdt, dsi_nodes[i]); + if (nodeoff > 0) { +set_status: + ret = fdt_setprop(fdt, nodeoff, "status", status, + strlen(status) + 1); + if (ret == -FDT_ERR_NOSPACE) { + ret = fdt_increase_size(fdt, 512); + if (!ret) + goto set_status; + } + } + } + } + + return 0; +} +#endif +#endif + #if !CONFIG_IS_ENABLED(SYSRESET) void reset_cpu(void) {

From: Peng Fan peng.fan@nxp.com

The extcon is an decrepted property and not used by upstream Linux and NXP 5.10 kernel, so we remove it before kicking linux in case it is in dts. Otherwise distro kernel will not able to have usb function.

Reviewed-by: Ye Li ye.li@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com --- arch/arm/mach-imx/imx8m/soc.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+)

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 0ab55765c7c..e76d75269d7 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -1148,6 +1148,37 @@ static int disable_cpu_nodes(void *blob, u32 disabled_cores) return 0; }

+#if defined(CONFIG_IMX8MM) +static int cleanup_nodes_for_efi(void *blob) +{ + static const char * const usbotg_path[] = { + "/soc@0/bus@32c00000/usb@32e40000", + "/soc@0/bus@32c00000/usb@32e50000" + }; + int nodeoff, i, rc; + + for (i = 0; i < ARRAY_SIZE(usbotg_path); i++) { + nodeoff = fdt_path_offset(blob, usbotg_path[i]); + if (nodeoff < 0) + continue; /* Not found, skip it */ + debug("Found %s node\n", usbotg_path[i]); + + rc = fdt_delprop(blob, nodeoff, "extcon"); + if (rc == -FDT_ERR_NOTFOUND) + continue; + if (rc) { + printf("Unable to update property %s:%s, err=%s\n", + usbotg_path[i], "extcon", fdt_strerror(rc)); + return rc; + } + + printf("Remove %s:%s\n", usbotg_path[i], "extcon"); + } + + return 0; +} +#endif + int ft_system_setup(void *blob, struct bd_info *bd) { #ifdef CONFIG_IMX8MQ @@ -1242,6 +1273,8 @@ usb_modify_speed: else if (is_imx8mms() || is_imx8mmsl()) disable_cpu_nodes(blob, 3);

+ cleanup_nodes_for_efi(blob); + #elif defined(CONFIG_IMX8MN) if (is_imx8mnl() || is_imx8mndl() || is_imx8mnsl()) disable_gpu_nodes(blob);

From: Peng Fan peng.fan@nxp.com

Need to drop phy-reset-gpios before booting linux, this property is legacy property and replaced with reset-gpios.

If provide both, kernel would failed to request the same gpio twice and cause fec not work.

Signed-off-by: Peng Fan peng.fan@nxp.com --- arch/arm/mach-imx/imx8m/soc.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index e76d75269d7..5a6872dda61 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -1148,36 +1148,36 @@ static int disable_cpu_nodes(void *blob, u32 disabled_cores) return 0; }

-#if defined(CONFIG_IMX8MM) static int cleanup_nodes_for_efi(void *blob) { - static const char * const usbotg_path[] = { - "/soc@0/bus@32c00000/usb@32e40000", - "/soc@0/bus@32c00000/usb@32e50000" - }; + static const char * const path[][2] = { + { "/soc@0/bus@32c00000/usb@32e40000", "extcon" }, + { "/soc@0/bus@32c00000/usb@32e50000", "extcon" }, + { "/soc@0/bus@30800000/ethernet@30be0000", "phy-reset-gpios" }, + { "/soc@0/bus@30800000/ethernet@30bf0000", "phy-reset-gpios" } + }; int nodeoff, i, rc;

- for (i = 0; i < ARRAY_SIZE(usbotg_path); i++) { - nodeoff = fdt_path_offset(blob, usbotg_path[i]); + for (i = 0; i < ARRAY_SIZE(path); i++) { + nodeoff = fdt_path_offset(blob, path[i][0]); if (nodeoff < 0) continue; /* Not found, skip it */ - debug("Found %s node\n", usbotg_path[i]); + debug("Found %s node\n", path[i][0]);

- rc = fdt_delprop(blob, nodeoff, "extcon"); + rc = fdt_delprop(blob, nodeoff, path[i][1]); if (rc == -FDT_ERR_NOTFOUND) continue; if (rc) { printf("Unable to update property %s:%s, err=%s\n", - usbotg_path[i], "extcon", fdt_strerror(rc)); + path[i][0], path[i][1], fdt_strerror(rc)); return rc; }

- printf("Remove %s:%s\n", usbotg_path[i], "extcon"); + printf("Remove %s:%s\n", path[i][0], path[i][1]); }

return 0; } -#endif

int ft_system_setup(void *blob, struct bd_info *bd) { @@ -1273,8 +1273,6 @@ usb_modify_speed: else if (is_imx8mms() || is_imx8mmsl()) disable_cpu_nodes(blob, 3);

- cleanup_nodes_for_efi(blob); - #elif defined(CONFIG_IMX8MN) if (is_imx8mnl() || is_imx8mndl() || is_imx8mnsl()) disable_gpu_nodes(blob); @@ -1322,6 +1320,7 @@ usb_modify_speed: disable_cpu_nodes(blob, 2); #endif

+ cleanup_nodes_for_efi(blob); return 0; } #endif

From: Ye Li ye.li@nxp.com

The EFI memory init uses gd->ram_top for conventional memory. In current implementation, the ram_top is below optee address. This cause grub failed to allocation memory for initrd. The change updates DDR bank setup functions to place the u-boot at top DDR in 4GB space.

Reviewed-by: Peng Fan peng.fan@nxp.com Signed-off-by: Ye Li ye.li@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com --- arch/arm/mach-imx/imx8m/soc.c | 123 ++++++++++++++++++++-------------- 1 file changed, 71 insertions(+), 52 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 5a6872dda61..c83651d43d1 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -188,32 +188,29 @@ static unsigned int imx8m_find_dram_entry_in_mem_map(void)

void enable_caches(void) { - /* If OPTEE runs, remove OPTEE memory from MMU table to avoid speculative prefetch */ - if (rom_pointer[1]) { - /* - * TEE are loaded, So the ddr bank structures - * have been modified update mmu table accordingly - */ - int i = 0; - /* - * please make sure that entry initial value matches - * imx8m_mem_map for DRAM1 - */ - int entry = imx8m_find_dram_entry_in_mem_map(); - u64 attrs = imx8m_mem_map[entry].attrs; - - while (i < CONFIG_NR_DRAM_BANKS && - entry < ARRAY_SIZE(imx8m_mem_map)) { - if (gd->bd->bi_dram[i].start == 0) - break; - imx8m_mem_map[entry].phys = gd->bd->bi_dram[i].start; - imx8m_mem_map[entry].virt = gd->bd->bi_dram[i].start; - imx8m_mem_map[entry].size = gd->bd->bi_dram[i].size; - imx8m_mem_map[entry].attrs = attrs; - debug("Added memory mapping (%d): %llx %llx\n", entry, - imx8m_mem_map[entry].phys, imx8m_mem_map[entry].size); - i++; entry++; - } + /* If OPTEE runs, remove OPTEE memory from MMU table to avoid speculative prefetch + * If OPTEE does not run, still update the MMU table according to dram banks structure + * to set correct dram size from board_phys_sdram_size + */ + int i = 0; + /* + * please make sure that entry initial value matches + * imx8m_mem_map for DRAM1 + */ + int entry = imx8m_find_dram_entry_in_mem_map(); + u64 attrs = imx8m_mem_map[entry].attrs; + + while (i < CONFIG_NR_DRAM_BANKS && + entry < ARRAY_SIZE(imx8m_mem_map)) { + if (gd->bd->bi_dram[i].start == 0) + break; + imx8m_mem_map[entry].phys = gd->bd->bi_dram[i].start; + imx8m_mem_map[entry].virt = gd->bd->bi_dram[i].start; + imx8m_mem_map[entry].size = gd->bd->bi_dram[i].size; + imx8m_mem_map[entry].attrs = attrs; + debug("Added memory mapping (%d): %llx %llx\n", entry, + imx8m_mem_map[entry].phys, imx8m_mem_map[entry].size); + i++; entry++; }

icache_enable(); @@ -226,12 +223,15 @@ __weak int board_phys_sdram_size(phys_size_t *size) return -EINVAL;

*size = PHYS_SDRAM_SIZE; + +#ifdef PHYS_SDRAM_2_SIZE + *size += PHYS_SDRAM_2_SIZE; +#endif return 0; }

int dram_init(void) { - unsigned int entry = imx8m_find_dram_entry_in_mem_map(); phys_size_t sdram_size; int ret;

@@ -245,13 +245,6 @@ int dram_init(void) else gd->ram_size = sdram_size;

- /* also update the SDRAM size in the mem_map used externally */ - imx8m_mem_map[entry].size = sdram_size; - -#ifdef PHYS_SDRAM_2_SIZE - gd->ram_size += PHYS_SDRAM_2_SIZE; -#endif - return 0; }

@@ -260,18 +253,28 @@ int dram_init_banksize(void) int bank = 0; int ret; phys_size_t sdram_size; + phys_size_t sdram_b1_size, sdram_b2_size;

ret = board_phys_sdram_size(&sdram_size); if (ret) return ret;

+ /* Bank 1 can't cross over 4GB space */ + if (sdram_size > 0xc0000000) { + sdram_b1_size = 0xc0000000; + sdram_b2_size = sdram_size - 0xc0000000; + } else { + sdram_b1_size = sdram_size; + sdram_b2_size = 0; + } + gd->bd->bi_dram[bank].start = PHYS_SDRAM; if (rom_pointer[1]) { phys_addr_t optee_start = (phys_addr_t)rom_pointer[0]; phys_size_t optee_size = (size_t)rom_pointer[1];

gd->bd->bi_dram[bank].size = optee_start - gd->bd->bi_dram[bank].start; - if ((optee_start + optee_size) < (PHYS_SDRAM + sdram_size)) { + if ((optee_start + optee_size) < (PHYS_SDRAM + sdram_b1_size)) { if (++bank >= CONFIG_NR_DRAM_BANKS) { puts("CONFIG_NR_DRAM_BANKS is not enough\n"); return -1; @@ -279,35 +282,51 @@ int dram_init_banksize(void)

gd->bd->bi_dram[bank].start = optee_start + optee_size; gd->bd->bi_dram[bank].size = PHYS_SDRAM + - sdram_size - gd->bd->bi_dram[bank].start; + sdram_b1_size - gd->bd->bi_dram[bank].start; } } else { - gd->bd->bi_dram[bank].size = sdram_size; + gd->bd->bi_dram[bank].size = sdram_b1_size; }

-#ifdef PHYS_SDRAM_2_SIZE - if (++bank >= CONFIG_NR_DRAM_BANKS) { - puts("CONFIG_NR_DRAM_BANKS is not enough for SDRAM_2\n"); - return -1; + if (sdram_b2_size) { + if (++bank >= CONFIG_NR_DRAM_BANKS) { + puts("CONFIG_NR_DRAM_BANKS is not enough for SDRAM_2\n"); + return -1; + } + gd->bd->bi_dram[bank].start = 0x100000000UL; + gd->bd->bi_dram[bank].size = sdram_b2_size; } - gd->bd->bi_dram[bank].start = PHYS_SDRAM_2; - gd->bd->bi_dram[bank].size = PHYS_SDRAM_2_SIZE; -#endif

return 0; }

phys_size_t get_effective_memsize(void) { - /* return the first bank as effective memory */ - if (rom_pointer[1]) - return ((phys_addr_t)rom_pointer[0] - PHYS_SDRAM); + int ret; + phys_size_t sdram_size; + phys_size_t sdram_b1_size; + ret = board_phys_sdram_size(&sdram_size); + if (!ret) { + /* Bank 1 can't cross over 4GB space */ + if (sdram_size > 0xc0000000) { + sdram_b1_size = 0xc0000000; + } else { + sdram_b1_size = sdram_size; + }

-#ifdef PHYS_SDRAM_2_SIZE - return gd->ram_size - PHYS_SDRAM_2_SIZE; -#else - return gd->ram_size; -#endif + if (rom_pointer[1]) { + /* We will relocate u-boot to Top of dram1. Tee position has two cases: + * 1. At the top of dram1, Then return the size removed optee size. + * 2. In the middle of dram1, return the size of dram1. + */ + if ((rom_pointer[0] + rom_pointer[1]) == (PHYS_SDRAM + sdram_b1_size)) + return ((phys_addr_t)rom_pointer[0] - PHYS_SDRAM); + } + + return sdram_b1_size; + } else { + return PHYS_SDRAM_SIZE; + } }

ulong board_get_usable_ram_top(ulong total_size)