[U-Boot] [PATCH 0/6] bmips: add brcmnand support
These patches add support for brcmnand on bmips. The current brcmnand driver only supports controller >= 4.0, which means that only BCM63268 works right now.
Álvaro Fernández Rojas (6): nand: brcm: add BCM6368 support bmips: bcm6368: add support for brcmnand bmips: bcm6328: add support for brcmnand bmips: bcm6362: add support for brcmnand bmips: bcm63268: add support for brcmnand bmips: enable vr-3032u nand support
arch/mips/dts/brcm,bcm63268.dtsi | 18 +++ arch/mips/dts/brcm,bcm6328.dtsi | 16 +++ arch/mips/dts/brcm,bcm6362.dtsi | 18 +++ arch/mips/dts/brcm,bcm6368.dtsi | 18 +++ arch/mips/dts/comtrend,vr-3032u.dts | 13 ++ configs/comtrend_vr3032u_ram_defconfig | 5 + drivers/mtd/nand/raw/Kconfig | 6 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c | 122 +++++++++++++++++++ include/configs/comtrend_vr3032u.h | 6 + 10 files changed, 223 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- drivers/mtd/nand/raw/Kconfig | 6 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c | 122 +++++++++++++++++++ 3 files changed, 129 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index f86035bcce..d2bfad28d5 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -67,6 +67,12 @@ config NAND_BRCMNAND Enable the driver for NAND flash on platforms using a Broadcom NAND controller.
+config NAND_BRCMNAND_6368 + bool "Support Broadcom NAND controller on bcm6368" + depends on NAND_BRCMNAND && ARCH_BMIPS + help + Enable support for broadcom nand driver on bcm6368. + config NAND_BRCMNAND_6838 bool "Support Broadcom NAND controller on bcm6838" depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838 diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index a2363cc80e..7e70b859dc 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+
+obj-$(CONFIG_NAND_BRCMNAND_6368) += bcm6368_nand.o obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c new file mode 100644 index 0000000000..1768d3945f --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c @@ -0,0 +1,122 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <asm/io.h> +#include <memalign.h> +#include <nand.h> +#include <linux/errno.h> +#include <linux/io.h> +#include <linux/ioport.h> +#include <dm.h> + +#include "brcmnand.h" + +struct bcm6368_nand_soc { + struct brcmnand_soc soc; + void __iomem *base; +}; + +#define BCM6368_NAND_INT 0x00 +#define BCM6368_NAND_STATUS_SHIFT 0 +#define BCM6368_NAND_STATUS_MASK (0xfff << BCM6368_NAND_STATUS_SHIFT) +#define BCM6368_NAND_ENABLE_SHIFT 16 +#define BCM6368_NAND_ENABLE_MASK (0xffff << BCM6368_NAND_ENABLE_SHIFT) + +enum { + BCM6368_NP_READ = BIT(0), + BCM6368_BLOCK_ERASE = BIT(1), + BCM6368_COPY_BACK = BIT(2), + BCM6368_PAGE_PGM = BIT(3), + BCM6368_CTRL_READY = BIT(4), + BCM6368_DEV_RBPIN = BIT(5), + BCM6368_ECC_ERR_UNC = BIT(6), + BCM6368_ECC_ERR_CORR = BIT(7), +}; + +static bool bcm6368_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct bcm6368_nand_soc *priv = + container_of(soc, struct bcm6368_nand_soc, soc); + void __iomem *mmio = priv->base + BCM6368_NAND_INT; + u32 val = brcmnand_readl(mmio); + + if (val & (BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT)) { + /* Ack interrupt */ + val &= ~BCM6368_NAND_STATUS_MASK; + val |= BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT; + brcmnand_writel(val, mmio); + return true; + } + + return false; +} + +static void bcm6368_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct bcm6368_nand_soc *priv = + container_of(soc, struct bcm6368_nand_soc, soc); + void __iomem *mmio = priv->base + BCM6368_NAND_INT; + u32 val = brcmnand_readl(mmio); + + /* Don't ack any interrupts */ + val &= ~BCM6368_NAND_STATUS_MASK; + + if (en) + val |= BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT; + else + val &= ~(BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT); + + brcmnand_writel(val, mmio); +} + +static int bcm6368_nand_probe(struct udevice *dev) +{ + struct udevice *pdev = dev; + struct bcm6368_nand_soc *priv = dev_get_priv(dev); + struct brcmnand_soc *soc; + struct resource res; + + soc = &priv->soc; + + dev_read_resource_byname(pdev, "nand-int-base", &res); + priv->base = ioremap(res.start, resource_size(&res)); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + soc->ctlrdy_ack = bcm6368_nand_intc_ack; + soc->ctlrdy_set_enabled = bcm6368_nand_intc_set; + + /* Disable and ack all interrupts */ + brcmnand_writel(0, priv->base + BCM6368_NAND_INT); + brcmnand_writel(BCM6368_NAND_STATUS_MASK, + priv->base + BCM6368_NAND_INT); + + return brcmnand_probe(pdev, soc); +} + +static const struct udevice_id bcm6368_nand_dt_ids[] = { + { + .compatible = "brcm,nand-bcm6368", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(bcm6368_nand) = { + .name = "bcm6368-nand", + .id = UCLASS_MTD, + .of_match = bcm6368_nand_dt_ids, + .probe = bcm6368_nand_probe, + .priv_auto_alloc_size = sizeof(struct bcm6368_nand_soc), +}; + +void board_nand_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_GET_DRIVER(bcm6368_nand), &dev); + if (ret && ret != -ENODEV) + pr_err("Failed to initialize %s. (error %d)\n", dev->name, + ret); +}
Am 13.08.19 um 21:19 schrieb Álvaro Fernández Rojas:
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com
drivers/mtd/nand/raw/Kconfig | 6 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c | 122 +++++++++++++++++++ 3 files changed, 129 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
Reviewed-by: Daniel Schwierzeck daniel.schwierzeck@gmail.com
BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- arch/mips/dts/brcm,bcm6368.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6368.dtsi b/arch/mips/dts/brcm,bcm6368.dtsi index 89590d6ff9..69be65056e 100644 --- a/arch/mips/dts/brcm,bcm6368.dtsi +++ b/arch/mips/dts/brcm,bcm6368.dtsi @@ -146,6 +146,24 @@ status = "disabled"; };
+ nand: nand-controller@10000200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm6368", + "brcm,brcmnand-v2.1", + "brcm,brcmnand"; + reg-names = "nand", + "nand-cache", + "nand-int-base"; + reg = <0x10000200 0x180>, + <0x10000600 0x200>, + <0x100000b0 0x10>; + clocks = <&periph_clk BCM6368_CLK_NAND>; + clock-names = "nand"; + + status = "disabled"; + }; + spi: spi@10000800 { compatible = "brcm,bcm6358-spi"; reg = <0x10000800 0x70c>;
BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- arch/mips/dts/brcm,bcm6328.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi index 50beed4171..350c0e903b 100644 --- a/arch/mips/dts/brcm,bcm6328.dtsi +++ b/arch/mips/dts/brcm,bcm6328.dtsi @@ -124,6 +124,22 @@ status = "disabled"; };
+ nand: nand-controller@10000200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm6368", + "brcm,brcmnand-v2.2", + "brcm,brcmnand"; + reg-names = "nand", + "nand-cache", + "nand-int-base"; + reg = <0x10000200 0x180>, + <0x10000400 0x200>, + <0x100000b0 0x10>; + + status = "disabled"; + }; + leds: led-controller@10000800 { compatible = "brcm,bcm6328-leds"; reg = <0x10000800 0x24>;
BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- arch/mips/dts/brcm,bcm6362.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6362.dtsi b/arch/mips/dts/brcm,bcm6362.dtsi index c77b80a4cc..23c47963c3 100644 --- a/arch/mips/dts/brcm,bcm6362.dtsi +++ b/arch/mips/dts/brcm,bcm6362.dtsi @@ -135,6 +135,24 @@ status = "disabled"; };
+ nand: nand-controller@10000200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm6368", + "brcm,brcmnand-v2.2", + "brcm,brcmnand"; + reg-names = "nand", + "nand-cache", + "nand-int-base"; + reg = <0x10000200 0x180>, + <0x10000600 0x200>, + <0x100000b0 0x10>; + clocks = <&periph_clk BCM6362_CLK_NAND>; + clock-names = "nand"; + + status = "disabled"; + }; + lsspi: spi@10000800 { compatible = "brcm,bcm6358-spi"; reg = <0x10000800 0x70c>;
BCM63268 uses 4.0 HW nand controller, which is currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- arch/mips/dts/brcm,bcm63268.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi index f8a72ef535..5294242529 100644 --- a/arch/mips/dts/brcm,bcm63268.dtsi +++ b/arch/mips/dts/brcm,bcm63268.dtsi @@ -141,6 +141,24 @@ status = "disabled"; };
+ nand: nand-controller@10000200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm6368", + "brcm,brcmnand-v4.0", + "brcm,brcmnand"; + reg-names = "nand", + "nand-cache", + "nand-int-base"; + reg = <0x10000200 0x180>, + <0x10000600 0x200>, + <0x100000b0 0x10>; + clocks = <&periph_clk BCM63268_CLK_NAND>; + clock-names = "nand"; + + status = "disabled"; + }; + periph_pwr: power-controller@1000184c { compatible = "brcm,bcm6328-power-domain"; reg = <0x1000184c 0x4>;
Am 13.08.19 um 21:19 schrieb Álvaro Fernández Rojas:
BCM63268 uses 4.0 HW nand controller, which is currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com
arch/mips/dts/brcm,bcm63268.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi index f8a72ef535..5294242529 100644 --- a/arch/mips/dts/brcm,bcm63268.dtsi +++ b/arch/mips/dts/brcm,bcm63268.dtsi @@ -141,6 +141,24 @@ status = "disabled"; };
nand: nand-controller@10000200 {#address-cells = <1>;#size-cells = <0>;compatible = "brcm,nand-bcm6368",
if BCM63268 is already supported by brcmnand, why should it match with your new driver?
"brcm,brcmnand-v4.0","brcm,brcmnand";reg-names = "nand","nand-cache","nand-int-base";reg = <0x10000200 0x180>,<0x10000600 0x200>,<0x100000b0 0x10>;clocks = <&periph_clk BCM63268_CLK_NAND>;clock-names = "nand";status = "disabled";};- periph_pwr: power-controller@1000184c { compatible = "brcm,bcm6328-power-domain"; reg = <0x1000184c 0x4>;
Hi Daniel,
“brcm,nand-bcm6368“ is the probe and interrupt part of the driver. The core part of the driver is the one that only supports HW rev 4.0 and newer.
Best regards, Álvaro.
________________________________ De: Daniel Schwierzeck daniel.schwierzeck@gmail.com Enviado: miércoles, agosto 14, 2019 3:23 p. m. Para: Álvaro Fernández Rojas; u-boot@lists.denx.de; philippe.reynes@softathome.com; trini@konsulko.com Asunto: Re: [PATCH 5/6] bmips: bcm63268: add support for brcmnand
Am 13.08.19 um 21:19 schrieb Álvaro Fernández Rojas:
BCM63268 uses 4.0 HW nand controller, which is currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com
arch/mips/dts/brcm,bcm63268.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi index f8a72ef535..5294242529 100644 --- a/arch/mips/dts/brcm,bcm63268.dtsi +++ b/arch/mips/dts/brcm,bcm63268.dtsi @@ -141,6 +141,24 @@ status = "disabled"; };
- nand: nand-controller@10000200 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,nand-bcm6368",
if BCM63268 is already supported by brcmnand, why should it match with your new driver?
- "brcm,brcmnand-v4.0",
- "brcm,brcmnand";
- reg-names = "nand",
- "nand-cache",
- "nand-int-base";
- reg = <0x10000200 0x180>,
- <0x10000600 0x200>,
- <0x100000b0 0x10>;
- clocks = <&periph_clk BCM63268_CLK_NAND>;
- clock-names = "nand";
- status = "disabled";
- };
periph_pwr: power-controller@1000184c { compatible = "brcm,bcm6328-power-domain"; reg = <0x1000184c 0x4>;
-- - Daniel
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- arch/mips/dts/comtrend,vr-3032u.dts | 13 +++++++++++++ configs/comtrend_vr3032u_ram_defconfig | 5 +++++ include/configs/comtrend_vr3032u.h | 6 ++++++ 3 files changed, 24 insertions(+)
diff --git a/arch/mips/dts/comtrend,vr-3032u.dts b/arch/mips/dts/comtrend,vr-3032u.dts index 512cb52de3..110119b507 100644 --- a/arch/mips/dts/comtrend,vr-3032u.dts +++ b/arch/mips/dts/comtrend,vr-3032u.dts @@ -99,6 +99,19 @@ }; };
+&nand { + status = "okay"; + + nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-ecc-strength = <15>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + brcm,nand-oob-sector-size = <64>; + }; +}; + &ohci { status = "okay"; }; diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 013c9ee1f6..33be24c45b 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_LICENSE=y CONFIG_CMD_MEMINFO=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set +CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -37,6 +38,10 @@ CONFIG_DM_GPIO=y CONFIG_LED=y CONFIG_LED_BCM6328=y CONFIG_LED_BLINK=y +CONFIG_MTD=y +CONFIG_NAND=y +CONFIG_NAND_BRCMNAND=y +CONFIG_NAND_BRCMNAND_6368=y CONFIG_DM_ETH=y CONFIG_BCM6368_ETH=y CONFIG_PHY=y diff --git a/include/configs/comtrend_vr3032u.h b/include/configs/comtrend_vr3032u.h index e183288c5d..b004d77f52 100644 --- a/include/configs/comtrend_vr3032u.h +++ b/include/configs/comtrend_vr3032u.h @@ -10,3 +10,9 @@
#define CONFIG_ENV_SIZE (8 * 1024)
+#ifdef CONFIG_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_SELF_INIT +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT +#endif /* CONFIG_NAND */
These patches add support for brcmnand on bmips. The current brcmnand driver only supports controller >= 4.0, which means that only BCM63268 works right now.
v2: Drop CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
Álvaro Fernández Rojas (6): nand: brcm: add BCM6368 support bmips: bcm6368: add support for brcmnand bmips: bcm6328: add support for brcmnand bmips: bcm6362: add support for brcmnand bmips: bcm63268: add support for brcmnand bmips: enable vr-3032u nand support
arch/mips/dts/brcm,bcm63268.dtsi | 18 +++ arch/mips/dts/brcm,bcm6328.dtsi | 16 +++ arch/mips/dts/brcm,bcm6362.dtsi | 18 +++ arch/mips/dts/brcm,bcm6368.dtsi | 18 +++ arch/mips/dts/comtrend,vr-3032u.dts | 13 ++ configs/comtrend_vr3032u_ram_defconfig | 5 + drivers/mtd/nand/raw/Kconfig | 6 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c | 122 +++++++++++++++++++ include/configs/comtrend_vr3032u.h | 5 + 10 files changed, 222 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- v2: no changes
drivers/mtd/nand/raw/Kconfig | 6 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c | 122 +++++++++++++++++++ 3 files changed, 129 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index a129f44869..2000826c79 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -72,6 +72,12 @@ config NAND_BRCMNAND Enable the driver for NAND flash on platforms using a Broadcom NAND controller.
+config NAND_BRCMNAND_6368 + bool "Support Broadcom NAND controller on bcm6368" + depends on NAND_BRCMNAND && ARCH_BMIPS + help + Enable support for broadcom nand driver on bcm6368. + config NAND_BRCMNAND_6838 bool "Support Broadcom NAND controller on bcm6838" depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838 diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index a2363cc80e..7e70b859dc 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+
+obj-$(CONFIG_NAND_BRCMNAND_6368) += bcm6368_nand.o obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c new file mode 100644 index 0000000000..1768d3945f --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c @@ -0,0 +1,122 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <asm/io.h> +#include <memalign.h> +#include <nand.h> +#include <linux/errno.h> +#include <linux/io.h> +#include <linux/ioport.h> +#include <dm.h> + +#include "brcmnand.h" + +struct bcm6368_nand_soc { + struct brcmnand_soc soc; + void __iomem *base; +}; + +#define BCM6368_NAND_INT 0x00 +#define BCM6368_NAND_STATUS_SHIFT 0 +#define BCM6368_NAND_STATUS_MASK (0xfff << BCM6368_NAND_STATUS_SHIFT) +#define BCM6368_NAND_ENABLE_SHIFT 16 +#define BCM6368_NAND_ENABLE_MASK (0xffff << BCM6368_NAND_ENABLE_SHIFT) + +enum { + BCM6368_NP_READ = BIT(0), + BCM6368_BLOCK_ERASE = BIT(1), + BCM6368_COPY_BACK = BIT(2), + BCM6368_PAGE_PGM = BIT(3), + BCM6368_CTRL_READY = BIT(4), + BCM6368_DEV_RBPIN = BIT(5), + BCM6368_ECC_ERR_UNC = BIT(6), + BCM6368_ECC_ERR_CORR = BIT(7), +}; + +static bool bcm6368_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct bcm6368_nand_soc *priv = + container_of(soc, struct bcm6368_nand_soc, soc); + void __iomem *mmio = priv->base + BCM6368_NAND_INT; + u32 val = brcmnand_readl(mmio); + + if (val & (BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT)) { + /* Ack interrupt */ + val &= ~BCM6368_NAND_STATUS_MASK; + val |= BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT; + brcmnand_writel(val, mmio); + return true; + } + + return false; +} + +static void bcm6368_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct bcm6368_nand_soc *priv = + container_of(soc, struct bcm6368_nand_soc, soc); + void __iomem *mmio = priv->base + BCM6368_NAND_INT; + u32 val = brcmnand_readl(mmio); + + /* Don't ack any interrupts */ + val &= ~BCM6368_NAND_STATUS_MASK; + + if (en) + val |= BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT; + else + val &= ~(BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT); + + brcmnand_writel(val, mmio); +} + +static int bcm6368_nand_probe(struct udevice *dev) +{ + struct udevice *pdev = dev; + struct bcm6368_nand_soc *priv = dev_get_priv(dev); + struct brcmnand_soc *soc; + struct resource res; + + soc = &priv->soc; + + dev_read_resource_byname(pdev, "nand-int-base", &res); + priv->base = ioremap(res.start, resource_size(&res)); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + soc->ctlrdy_ack = bcm6368_nand_intc_ack; + soc->ctlrdy_set_enabled = bcm6368_nand_intc_set; + + /* Disable and ack all interrupts */ + brcmnand_writel(0, priv->base + BCM6368_NAND_INT); + brcmnand_writel(BCM6368_NAND_STATUS_MASK, + priv->base + BCM6368_NAND_INT); + + return brcmnand_probe(pdev, soc); +} + +static const struct udevice_id bcm6368_nand_dt_ids[] = { + { + .compatible = "brcm,nand-bcm6368", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(bcm6368_nand) = { + .name = "bcm6368-nand", + .id = UCLASS_MTD, + .of_match = bcm6368_nand_dt_ids, + .probe = bcm6368_nand_probe, + .priv_auto_alloc_size = sizeof(struct bcm6368_nand_soc), +}; + +void board_nand_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_GET_DRIVER(bcm6368_nand), &dev); + if (ret && ret != -ENODEV) + pr_err("Failed to initialize %s. (error %d)\n", dev->name, + ret); +}
Am 28.08.19 um 13:44 schrieb Álvaro Fernández Rojas:
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com
v2: no changes
drivers/mtd/nand/raw/Kconfig | 6 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c | 122 +++++++++++++++++++ 3 files changed, 129 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
Reviewed-by: Daniel Schwierzeck daniel.schwierzeck@gmail.com
nits below
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index a129f44869..2000826c79 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -72,6 +72,12 @@ config NAND_BRCMNAND Enable the driver for NAND flash on platforms using a Broadcom NAND controller.
+config NAND_BRCMNAND_6368
- bool "Support Broadcom NAND controller on bcm6368"
- depends on NAND_BRCMNAND && ARCH_BMIPS
- help
Enable support for broadcom nand driver on bcm6368.config NAND_BRCMNAND_6838 bool "Support Broadcom NAND controller on bcm6838" depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838 diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index a2363cc80e..7e70b859dc 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+
+obj-$(CONFIG_NAND_BRCMNAND_6368) += bcm6368_nand.o obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c new file mode 100644 index 0000000000..1768d3945f --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c @@ -0,0 +1,122 @@ +// SPDX-License-Identifier: GPL-2.0+
+#include <common.h> +#include <asm/io.h> +#include <memalign.h> +#include <nand.h> +#include <linux/errno.h> +#include <linux/io.h> +#include <linux/ioport.h> +#include <dm.h>
+#include "brcmnand.h"
+struct bcm6368_nand_soc {
- struct brcmnand_soc soc;
- void __iomem *base;
+};
+#define BCM6368_NAND_INT 0x00 +#define BCM6368_NAND_STATUS_SHIFT 0 +#define BCM6368_NAND_STATUS_MASK (0xfff << BCM6368_NAND_STATUS_SHIFT) +#define BCM6368_NAND_ENABLE_SHIFT 16 +#define BCM6368_NAND_ENABLE_MASK (0xffff << BCM6368_NAND_ENABLE_SHIFT)
+enum {
- BCM6368_NP_READ = BIT(0),
- BCM6368_BLOCK_ERASE = BIT(1),
- BCM6368_COPY_BACK = BIT(2),
- BCM6368_PAGE_PGM = BIT(3),
- BCM6368_CTRL_READY = BIT(4),
- BCM6368_DEV_RBPIN = BIT(5),
- BCM6368_ECC_ERR_UNC = BIT(6),
- BCM6368_ECC_ERR_CORR = BIT(7),
+};
+static bool bcm6368_nand_intc_ack(struct brcmnand_soc *soc) +{
- struct bcm6368_nand_soc *priv =
container_of(soc, struct bcm6368_nand_soc, soc);
because you have this multiple times, maybe it makes sense to add something like:
#define soc_to_priv(_soc) container_of(_soc, struct bcm6368_nand_soc, soc)
- void __iomem *mmio = priv->base + BCM6368_NAND_INT;
- u32 val = brcmnand_readl(mmio);
- if (val & (BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT)) {
/* Ack interrupt */val &= ~BCM6368_NAND_STATUS_MASK;val |= BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT;brcmnand_writel(val, mmio);return true;- }
- return false;
+}
+static void bcm6368_nand_intc_set(struct brcmnand_soc *soc, bool en) +{
- struct bcm6368_nand_soc *priv =
container_of(soc, struct bcm6368_nand_soc, soc);- void __iomem *mmio = priv->base + BCM6368_NAND_INT;
- u32 val = brcmnand_readl(mmio);
- /* Don't ack any interrupts */
- val &= ~BCM6368_NAND_STATUS_MASK;
- if (en)
val |= BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT;- else
val &= ~(BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT);- brcmnand_writel(val, mmio);
+}
+static int bcm6368_nand_probe(struct udevice *dev) +{
- struct udevice *pdev = dev;
- struct bcm6368_nand_soc *priv = dev_get_priv(dev);
- struct brcmnand_soc *soc;
- struct resource res;
- soc = &priv->soc;
- dev_read_resource_byname(pdev, "nand-int-base", &res);
- priv->base = ioremap(res.start, resource_size(&res));
we recently got support for dev_remap_addr_name(). Maybe this is useful here.
- if (IS_ERR(priv->base))
return PTR_ERR(priv->base);- soc->ctlrdy_ack = bcm6368_nand_intc_ack;
- soc->ctlrdy_set_enabled = bcm6368_nand_intc_set;
- /* Disable and ack all interrupts */
- brcmnand_writel(0, priv->base + BCM6368_NAND_INT);
- brcmnand_writel(BCM6368_NAND_STATUS_MASK,
priv->base + BCM6368_NAND_INT);- return brcmnand_probe(pdev, soc);
+}
+static const struct udevice_id bcm6368_nand_dt_ids[] = {
- {
.compatible = "brcm,nand-bcm6368",- },
- { /* sentinel */ }
+};
+U_BOOT_DRIVER(bcm6368_nand) = {
- .name = "bcm6368-nand",
- .id = UCLASS_MTD,
- .of_match = bcm6368_nand_dt_ids,
- .probe = bcm6368_nand_probe,
- .priv_auto_alloc_size = sizeof(struct bcm6368_nand_soc),
+};
+void board_nand_init(void) +{
- struct udevice *dev;
- int ret;
- ret = uclass_get_device_by_driver(UCLASS_MTD,
DM_GET_DRIVER(bcm6368_nand), &dev);- if (ret && ret != -ENODEV)
pr_err("Failed to initialize %s. (error %d)\n", dev->name,ret);+}
BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- v2: no changes
arch/mips/dts/brcm,bcm6368.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6368.dtsi b/arch/mips/dts/brcm,bcm6368.dtsi index 89590d6ff9..69be65056e 100644 --- a/arch/mips/dts/brcm,bcm6368.dtsi +++ b/arch/mips/dts/brcm,bcm6368.dtsi @@ -146,6 +146,24 @@ status = "disabled"; };
+ nand: nand-controller@10000200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm6368", + "brcm,brcmnand-v2.1", + "brcm,brcmnand"; + reg-names = "nand", + "nand-cache", + "nand-int-base"; + reg = <0x10000200 0x180>, + <0x10000600 0x200>, + <0x100000b0 0x10>; + clocks = <&periph_clk BCM6368_CLK_NAND>; + clock-names = "nand"; + + status = "disabled"; + }; + spi: spi@10000800 { compatible = "brcm,bcm6358-spi"; reg = <0x10000800 0x70c>;
BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- v2: no changes
arch/mips/dts/brcm,bcm6328.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi index 50beed4171..350c0e903b 100644 --- a/arch/mips/dts/brcm,bcm6328.dtsi +++ b/arch/mips/dts/brcm,bcm6328.dtsi @@ -124,6 +124,22 @@ status = "disabled"; };
+ nand: nand-controller@10000200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm6368", + "brcm,brcmnand-v2.2", + "brcm,brcmnand"; + reg-names = "nand", + "nand-cache", + "nand-int-base"; + reg = <0x10000200 0x180>, + <0x10000400 0x200>, + <0x100000b0 0x10>; + + status = "disabled"; + }; + leds: led-controller@10000800 { compatible = "brcm,bcm6328-leds"; reg = <0x10000800 0x24>;
BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- v2: no changes
arch/mips/dts/brcm,bcm6362.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6362.dtsi b/arch/mips/dts/brcm,bcm6362.dtsi index c77b80a4cc..23c47963c3 100644 --- a/arch/mips/dts/brcm,bcm6362.dtsi +++ b/arch/mips/dts/brcm,bcm6362.dtsi @@ -135,6 +135,24 @@ status = "disabled"; };
+ nand: nand-controller@10000200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm6368", + "brcm,brcmnand-v2.2", + "brcm,brcmnand"; + reg-names = "nand", + "nand-cache", + "nand-int-base"; + reg = <0x10000200 0x180>, + <0x10000600 0x200>, + <0x100000b0 0x10>; + clocks = <&periph_clk BCM6362_CLK_NAND>; + clock-names = "nand"; + + status = "disabled"; + }; + lsspi: spi@10000800 { compatible = "brcm,bcm6358-spi"; reg = <0x10000800 0x70c>;
BCM63268 uses 4.0 HW nand controller, which is currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- v2: no changes
arch/mips/dts/brcm,bcm63268.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi index f8a72ef535..5294242529 100644 --- a/arch/mips/dts/brcm,bcm63268.dtsi +++ b/arch/mips/dts/brcm,bcm63268.dtsi @@ -141,6 +141,24 @@ status = "disabled"; };
+ nand: nand-controller@10000200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm6368", + "brcm,brcmnand-v4.0", + "brcm,brcmnand"; + reg-names = "nand", + "nand-cache", + "nand-int-base"; + reg = <0x10000200 0x180>, + <0x10000600 0x200>, + <0x100000b0 0x10>; + clocks = <&periph_clk BCM63268_CLK_NAND>; + clock-names = "nand"; + + status = "disabled"; + }; + periph_pwr: power-controller@1000184c { compatible = "brcm,bcm6328-power-domain"; reg = <0x1000184c 0x4>;
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- v2: Drop CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
arch/mips/dts/comtrend,vr-3032u.dts | 13 +++++++++++++ configs/comtrend_vr3032u_ram_defconfig | 5 +++++ include/configs/comtrend_vr3032u.h | 5 +++++ 3 files changed, 23 insertions(+)
diff --git a/arch/mips/dts/comtrend,vr-3032u.dts b/arch/mips/dts/comtrend,vr-3032u.dts index 512cb52de3..110119b507 100644 --- a/arch/mips/dts/comtrend,vr-3032u.dts +++ b/arch/mips/dts/comtrend,vr-3032u.dts @@ -99,6 +99,19 @@ }; };
+&nand { + status = "okay"; + + nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-ecc-strength = <15>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + brcm,nand-oob-sector-size = <64>; + }; +}; + &ohci { status = "okay"; }; diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 013c9ee1f6..33be24c45b 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_LICENSE=y CONFIG_CMD_MEMINFO=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set +CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -37,6 +38,10 @@ CONFIG_DM_GPIO=y CONFIG_LED=y CONFIG_LED_BCM6328=y CONFIG_LED_BLINK=y +CONFIG_MTD=y +CONFIG_NAND=y +CONFIG_NAND_BRCMNAND=y +CONFIG_NAND_BRCMNAND_6368=y CONFIG_DM_ETH=y CONFIG_BCM6368_ETH=y CONFIG_PHY=y diff --git a/include/configs/comtrend_vr3032u.h b/include/configs/comtrend_vr3032u.h index e183288c5d..d625101ecb 100644 --- a/include/configs/comtrend_vr3032u.h +++ b/include/configs/comtrend_vr3032u.h @@ -10,3 +10,8 @@
#define CONFIG_ENV_SIZE (8 * 1024)
+#ifdef CONFIG_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_SELF_INIT +#define CONFIG_SYS_NAND_ONFI_DETECTION +#endif /* CONFIG_NAND */
These patches add support for brcmnand on bmips. The current brcmnand driver only supports controller >= 4.0, which means that only BCM63268 works right now.
v3: Introduce changes suggested by Daniel Schwierzeck: - Introduce soc_to_priv helper definition. - Switch to dev_remap_addr_name. v2: Drop CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
Álvaro Fernández Rojas (6): nand: brcm: add BCM6368 support bmips: bcm6368: add support for brcmnand bmips: bcm6328: add support for brcmnand bmips: bcm6362: add support for brcmnand bmips: bcm63268: add support for brcmnand bmips: enable vr-3032u nand support
arch/mips/dts/brcm,bcm63268.dtsi | 18 +++ arch/mips/dts/brcm,bcm6328.dtsi | 16 +++ arch/mips/dts/brcm,bcm6362.dtsi | 18 +++ arch/mips/dts/brcm,bcm6368.dtsi | 18 +++ arch/mips/dts/comtrend,vr-3032u.dts | 13 +++ configs/comtrend_vr3032u_ram_defconfig | 5 + drivers/mtd/nand/raw/Kconfig | 6 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c | 117 +++++++++++++++++++ include/configs/comtrend_vr3032u.h | 5 + 10 files changed, 217 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com Reviewed-by: Daniel Schwierzeck daniel.schwierzeck@gmail.com --- v3: Introduce changes suggested by Daniel Schwierzeck: - Introduce soc_to_priv helper definition. - Switch to dev_remap_addr_name. v2: no changes
drivers/mtd/nand/raw/Kconfig | 6 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c | 117 +++++++++++++++++++ 3 files changed, 124 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index a129f44869..2000826c79 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -72,6 +72,12 @@ config NAND_BRCMNAND Enable the driver for NAND flash on platforms using a Broadcom NAND controller.
+config NAND_BRCMNAND_6368 + bool "Support Broadcom NAND controller on bcm6368" + depends on NAND_BRCMNAND && ARCH_BMIPS + help + Enable support for broadcom nand driver on bcm6368. + config NAND_BRCMNAND_6838 bool "Support Broadcom NAND controller on bcm6838" depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838 diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index a2363cc80e..7e70b859dc 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+
+obj-$(CONFIG_NAND_BRCMNAND_6368) += bcm6368_nand.o obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c new file mode 100644 index 0000000000..e2f5452c27 --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <asm/io.h> +#include <memalign.h> +#include <nand.h> +#include <linux/errno.h> +#include <linux/io.h> +#include <linux/ioport.h> +#include <dm.h> + +#include "brcmnand.h" + +struct bcm6368_nand_soc { + struct brcmnand_soc soc; + void __iomem *base; +}; + +#define soc_to_priv(_soc) container_of(_soc, struct bcm6368_nand_soc, soc) + +#define BCM6368_NAND_INT 0x00 +#define BCM6368_NAND_STATUS_SHIFT 0 +#define BCM6368_NAND_STATUS_MASK (0xfff << BCM6368_NAND_STATUS_SHIFT) +#define BCM6368_NAND_ENABLE_SHIFT 16 +#define BCM6368_NAND_ENABLE_MASK (0xffff << BCM6368_NAND_ENABLE_SHIFT) + +enum { + BCM6368_NP_READ = BIT(0), + BCM6368_BLOCK_ERASE = BIT(1), + BCM6368_COPY_BACK = BIT(2), + BCM6368_PAGE_PGM = BIT(3), + BCM6368_CTRL_READY = BIT(4), + BCM6368_DEV_RBPIN = BIT(5), + BCM6368_ECC_ERR_UNC = BIT(6), + BCM6368_ECC_ERR_CORR = BIT(7), +}; + +static bool bcm6368_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct bcm6368_nand_soc *priv = soc_to_priv(soc); + void __iomem *mmio = priv->base + BCM6368_NAND_INT; + u32 val = brcmnand_readl(mmio); + + if (val & (BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT)) { + /* Ack interrupt */ + val &= ~BCM6368_NAND_STATUS_MASK; + val |= BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT; + brcmnand_writel(val, mmio); + return true; + } + + return false; +} + +static void bcm6368_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct bcm6368_nand_soc *priv = soc_to_priv(soc); + void __iomem *mmio = priv->base + BCM6368_NAND_INT; + u32 val = brcmnand_readl(mmio); + + /* Don't ack any interrupts */ + val &= ~BCM6368_NAND_STATUS_MASK; + + if (en) + val |= BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT; + else + val &= ~(BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT); + + brcmnand_writel(val, mmio); +} + +static int bcm6368_nand_probe(struct udevice *dev) +{ + struct bcm6368_nand_soc *priv = dev_get_priv(dev); + struct brcmnand_soc *soc = &priv->soc; + + priv->base = dev_remap_addr_name(dev, "nand-int-base"); + if (!priv->base) + return -EINVAL; + + soc->ctlrdy_ack = bcm6368_nand_intc_ack; + soc->ctlrdy_set_enabled = bcm6368_nand_intc_set; + + /* Disable and ack all interrupts */ + brcmnand_writel(0, priv->base + BCM6368_NAND_INT); + brcmnand_writel(BCM6368_NAND_STATUS_MASK, + priv->base + BCM6368_NAND_INT); + + return brcmnand_probe(dev, soc); +} + +static const struct udevice_id bcm6368_nand_dt_ids[] = { + { + .compatible = "brcm,nand-bcm6368", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(bcm6368_nand) = { + .name = "bcm6368-nand", + .id = UCLASS_MTD, + .of_match = bcm6368_nand_dt_ids, + .probe = bcm6368_nand_probe, + .priv_auto_alloc_size = sizeof(struct bcm6368_nand_soc), +}; + +void board_nand_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_GET_DRIVER(bcm6368_nand), &dev); + if (ret && ret != -ENODEV) + pr_err("Failed to initialize %s. (error %d)\n", dev->name, + ret); +}
BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- v3: no changes v2: no changes
arch/mips/dts/brcm,bcm6368.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6368.dtsi b/arch/mips/dts/brcm,bcm6368.dtsi index 89590d6ff9..69be65056e 100644 --- a/arch/mips/dts/brcm,bcm6368.dtsi +++ b/arch/mips/dts/brcm,bcm6368.dtsi @@ -146,6 +146,24 @@ status = "disabled"; };
+ nand: nand-controller@10000200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm6368", + "brcm,brcmnand-v2.1", + "brcm,brcmnand"; + reg-names = "nand", + "nand-cache", + "nand-int-base"; + reg = <0x10000200 0x180>, + <0x10000600 0x200>, + <0x100000b0 0x10>; + clocks = <&periph_clk BCM6368_CLK_NAND>; + clock-names = "nand"; + + status = "disabled"; + }; + spi: spi@10000800 { compatible = "brcm,bcm6358-spi"; reg = <0x10000800 0x70c>;
BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- v3: no changes v2: no changes
arch/mips/dts/brcm,bcm6328.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi index 50beed4171..350c0e903b 100644 --- a/arch/mips/dts/brcm,bcm6328.dtsi +++ b/arch/mips/dts/brcm,bcm6328.dtsi @@ -124,6 +124,22 @@ status = "disabled"; };
+ nand: nand-controller@10000200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm6368", + "brcm,brcmnand-v2.2", + "brcm,brcmnand"; + reg-names = "nand", + "nand-cache", + "nand-int-base"; + reg = <0x10000200 0x180>, + <0x10000400 0x200>, + <0x100000b0 0x10>; + + status = "disabled"; + }; + leds: led-controller@10000800 { compatible = "brcm,bcm6328-leds"; reg = <0x10000800 0x24>;
BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- v3: no changes v2: no changes
arch/mips/dts/brcm,bcm6362.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6362.dtsi b/arch/mips/dts/brcm,bcm6362.dtsi index c77b80a4cc..23c47963c3 100644 --- a/arch/mips/dts/brcm,bcm6362.dtsi +++ b/arch/mips/dts/brcm,bcm6362.dtsi @@ -135,6 +135,24 @@ status = "disabled"; };
+ nand: nand-controller@10000200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm6368", + "brcm,brcmnand-v2.2", + "brcm,brcmnand"; + reg-names = "nand", + "nand-cache", + "nand-int-base"; + reg = <0x10000200 0x180>, + <0x10000600 0x200>, + <0x100000b0 0x10>; + clocks = <&periph_clk BCM6362_CLK_NAND>; + clock-names = "nand"; + + status = "disabled"; + }; + lsspi: spi@10000800 { compatible = "brcm,bcm6358-spi"; reg = <0x10000800 0x70c>;
BCM63268 uses 4.0 HW nand controller, which is currently supported by brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- v3: no changes v2: no changes
arch/mips/dts/brcm,bcm63268.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi index f8a72ef535..5294242529 100644 --- a/arch/mips/dts/brcm,bcm63268.dtsi +++ b/arch/mips/dts/brcm,bcm63268.dtsi @@ -141,6 +141,24 @@ status = "disabled"; };
+ nand: nand-controller@10000200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcm6368", + "brcm,brcmnand-v4.0", + "brcm,brcmnand"; + reg-names = "nand", + "nand-cache", + "nand-int-base"; + reg = <0x10000200 0x180>, + <0x10000600 0x200>, + <0x100000b0 0x10>; + clocks = <&periph_clk BCM63268_CLK_NAND>; + clock-names = "nand"; + + status = "disabled"; + }; + periph_pwr: power-controller@1000184c { compatible = "brcm,bcm6328-power-domain"; reg = <0x1000184c 0x4>;
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com --- v3: no changes v2: Drop CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
arch/mips/dts/comtrend,vr-3032u.dts | 13 +++++++++++++ configs/comtrend_vr3032u_ram_defconfig | 5 +++++ include/configs/comtrend_vr3032u.h | 5 +++++ 3 files changed, 23 insertions(+)
diff --git a/arch/mips/dts/comtrend,vr-3032u.dts b/arch/mips/dts/comtrend,vr-3032u.dts index 512cb52de3..110119b507 100644 --- a/arch/mips/dts/comtrend,vr-3032u.dts +++ b/arch/mips/dts/comtrend,vr-3032u.dts @@ -99,6 +99,19 @@ }; };
+&nand { + status = "okay"; + + nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-ecc-strength = <15>; + nand-ecc-step-size = <512>; + nand-on-flash-bbt; + brcm,nand-oob-sector-size = <64>; + }; +}; + &ohci { status = "okay"; }; diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 013c9ee1f6..33be24c45b 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_LICENSE=y CONFIG_CMD_MEMINFO=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADS is not set +CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -37,6 +38,10 @@ CONFIG_DM_GPIO=y CONFIG_LED=y CONFIG_LED_BCM6328=y CONFIG_LED_BLINK=y +CONFIG_MTD=y +CONFIG_NAND=y +CONFIG_NAND_BRCMNAND=y +CONFIG_NAND_BRCMNAND_6368=y CONFIG_DM_ETH=y CONFIG_BCM6368_ETH=y CONFIG_PHY=y diff --git a/include/configs/comtrend_vr3032u.h b/include/configs/comtrend_vr3032u.h index e183288c5d..d625101ecb 100644 --- a/include/configs/comtrend_vr3032u.h +++ b/include/configs/comtrend_vr3032u.h @@ -10,3 +10,8 @@
#define CONFIG_ENV_SIZE (8 * 1024)
+#ifdef CONFIG_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_SELF_INIT +#define CONFIG_SYS_NAND_ONFI_DETECTION +#endif /* CONFIG_NAND */
Am 28.08.19 um 19:12 schrieb Álvaro Fernández Rojas:
These patches add support for brcmnand on bmips. The current brcmnand driver only supports controller >= 4.0, which means that only BCM63268 works right now.
v3: Introduce changes suggested by Daniel Schwierzeck:
- Introduce soc_to_priv helper definition.
- Switch to dev_remap_addr_name.
v2: Drop CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
Álvaro Fernández Rojas (6): nand: brcm: add BCM6368 support bmips: bcm6368: add support for brcmnand bmips: bcm6328: add support for brcmnand bmips: bcm6362: add support for brcmnand bmips: bcm63268: add support for brcmnand bmips: enable vr-3032u nand support
arch/mips/dts/brcm,bcm63268.dtsi | 18 +++ arch/mips/dts/brcm,bcm6328.dtsi | 16 +++ arch/mips/dts/brcm,bcm6362.dtsi | 18 +++ arch/mips/dts/brcm,bcm6368.dtsi | 18 +++ arch/mips/dts/comtrend,vr-3032u.dts | 13 +++ configs/comtrend_vr3032u_ram_defconfig | 5 + drivers/mtd/nand/raw/Kconfig | 6 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c | 117 +++++++++++++++++++ include/configs/comtrend_vr3032u.h | 5 + 10 files changed, 217 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
series applied to u-boot-mips, thanks.
participants (2)
-
Daniel Schwierzeck -
Álvaro Fernández Rojas