Signed-off-by: Robert P. J. Day rpjday@crashcourse.ca

---

not the typos i was talking about, there are more.

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 94c8253..5249751 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -83,7 +83,7 @@ #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */

diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 3a73379..aaddfca 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -85,7 +85,7 @@

#define CONFIG_PCI /* Enable PCI/PCIE */ #if defined(CONFIG_PCI) -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 4d14c8b..1e5b501 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -92,7 +92,7 @@

#define CONFIG_PCI /* Enable PCI/PCIE */ #ifdef CONFIG_PCI -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 8cc7f02..03f17f9 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -51,9 +51,9 @@ #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* Enable PCI controller 1 */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 6202dff..26d92da 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -25,9 +25,9 @@

#define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* PCI controller 1 */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index dd07dc4..5de8b19 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -34,7 +34,7 @@

#define CONFIG_PCI /* enable any pci type devices */ #define CONFIG_PCI1 /* PCI controller 1 */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #undef CONFIG_PCI2 #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 9144f32..8c4e5e2 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -40,9 +40,9 @@

#define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 88ca4f3..e7f01d0 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -45,7 +45,7 @@ #define CONFIG_SYS_SCRATCH_VA 0xc0000000

#define CONFIG_PCI 1 /* Enable PCI/PCIE*/ -#define CONFIG_PCI1 1 /* PCI controler 1 */ +#define CONFIG_PCI1 1 /* PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIe 1 connected to ULI bridge */ #define CONFIG_PCIE2 1 /* PCIe 2 connected to slot */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 3569849..2f94c82 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -46,8 +46,8 @@ #define CONFIG_SRIO1 /* SRIO port 1 */

#define CONFIG_PCI 1 /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (ULI bridge) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (ULI bridge) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL law init code */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 5719e86..f398b37 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -176,8 +176,8 @@

#define CONFIG_PCI /* Enable PCI/PCIE */ #if defined(CONFIG_PCI) -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 8b29951..7457dfc 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -134,9 +134,9 @@

#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 /* PCIE controler 3 (ULI bridge) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 /* PCIE controller 3 (ULI bridge) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index fcbe288..a10310e 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -33,9 +33,9 @@ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 /* PCIE controler 3 (slot 3) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ +#define CONFIG_PCIE3 /* PCIE controller 3 (slot 3) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index b7a08e0..b3fb38c 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -52,9 +52,9 @@ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */

diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 12260aa..ef2ede4 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -577,9 +577,9 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_PCI_INDIRECT_BRIDGE diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 74274ca..778c64b 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -563,11 +563,11 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #ifdef CONFIG_PPC_T1040 -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #endif #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 4c1175d..be4ae71 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -65,10 +65,10 @@ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */

#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 9a3965f..ed3493b 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -130,10 +130,10 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */

#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 85df388..d8c57a8 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -550,10 +550,10 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_FSL_PCIE_RESET #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 5e2d659..b6be46e 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -500,10 +500,10 @@ unsigned long get_board_ddr_clk(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index a0cce85..ab838a8 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -92,9 +92,9 @@ #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */

diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 1bb8d93..c60c644 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -245,7 +245,7 @@ * Memory space is mapped 1-1, but I/O space must start from 0. */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 96f17d3..a06bfe0 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -67,8 +67,8 @@ #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */

diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index 4280c9c..660646e 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -59,8 +59,8 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */

diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 9232ee3..028623d 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -45,8 +45,8 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */

diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 3796395..f605ca6 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -528,8 +528,8 @@ unsigned long get_board_ddr_clk(void);

/* PCIe */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"

diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 3e32128..32d2acc 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -377,8 +377,8 @@

/* PCIe */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"

diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 8e0b472..a3aad1b 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -185,10 +185,10 @@ unsigned long long get_qixis_addr(void); #endif

/* PCIe */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #ifdef CONFIG_LS2080A #define FSL_PCIE_COMPAT "fsl,ls2080a-pcie" diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 596193d..71b2fa9 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -306,8 +306,8 @@

#define CONFIG_FSL_ELBC #define CONFIG_PCI -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index f2959c9..9b75afe 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -48,8 +48,8 @@

#define CONFIG_FSL_ELBC #define CONFIG_PCI -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ +#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index f34cef5..a7c7aef 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -44,8 +44,8 @@ #define CONFIG_SRIO1 /* SRIO port 1 */

#define CONFIG_PCI 1 /* Enable PCIE */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index af61f21..8ce337e 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -32,9 +32,9 @@ #define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS #define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */

diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index af02efb..86c9b4c 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -30,8 +30,8 @@ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index a1c5826..6a06b0a 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -30,8 +30,8 @@ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 02685ca..5b377e3 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -31,7 +31,7 @@ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 (PEX8112 or XMC) */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 (PEX8112 or XMC) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */

rday