[U-Boot] [PATCH 00/15] ARM: uniphier: use pinctrl drivers and some cleanups
Masahiro Yamada (15): pinctrl: uniphier: add UniPhier pinctrl core support pinctrl: uniphier: add UniPhier PH1-LD4 pinctrl driver pinctrl: uniphier: add UniPhier PH1-Pro4 pinctrl driver pinctrl: uniphier: add UniPhier PH1-sLD8 pinctrl driver pinctrl: uniphier: add UniPhier PH1-Pro5 pinctrl driver pinctrl: uniphier: add UniPhier ProXstream2 pinctrl driver pinctrl: uniphier: add UniPhier PH1-LD6b pinctrl driver ARM: uniphier: enable simple-bus driver for SPL ARM: uniphier: increase CONFIG_SYS_MALLOC_F_LEN to bind all nodes ARM: dts: uniphier: prepare device trees to use pinctrl in SPL ARM: uniphier: enable PINCTRL and SPL_PINCTRL ARM: uniphier: drop ad-hoc early pin-muxing settings ARM: uniphier: drop DCC micro support card support ARM: uniphier: enable setexpr command ARM: uniphier: change the external bus address mapping
arch/arm/dts/uniphier-ph1-ld4-ref.dts | 16 ++- arch/arm/dts/uniphier-ph1-ld6b-ref.dts | 16 ++- arch/arm/dts/uniphier-ph1-pro4-ref.dts | 16 ++- arch/arm/dts/uniphier-ph1-sld8-ref.dts | 16 ++- arch/arm/mach-uniphier/Kconfig | 23 +--- arch/arm/mach-uniphier/Makefile | 3 +- arch/arm/mach-uniphier/include/mach/board.h | 3 +- arch/arm/mach-uniphier/ph1-ld4/Makefile | 5 +- arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c | 27 ----- arch/arm/mach-uniphier/ph1-ld4/sbc_init.c | 12 +- arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c | 49 --------- arch/arm/mach-uniphier/ph1-pro4/Makefile | 5 +- arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c | 26 ----- arch/arm/mach-uniphier/ph1-pro4/sbc_init.c | 12 +- arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c | 42 ------- arch/arm/mach-uniphier/ph1-sld3/Makefile | 3 +- arch/arm/mach-uniphier/ph1-sld3/sbc_init.c | 12 +- arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c | 37 ------- arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c | 27 ----- arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c | 57 ---------- arch/arm/mach-uniphier/spl.c | 5 + arch/arm/mach-uniphier/support_card.c | 89 ++------------- configs/ph1_ld4_defconfig | 7 +- configs/ph1_pro4_defconfig | 7 +- configs/ph1_sld3_defconfig | 3 +- configs/ph1_sld8_defconfig | 7 +- drivers/pinctrl/Kconfig | 2 + drivers/pinctrl/Makefile | 2 + drivers/pinctrl/uniphier/Kconfig | 42 +++++++ drivers/pinctrl/uniphier/Makefile | 8 ++ drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c | 92 ++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c | 94 ++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c | 95 ++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c | 101 +++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c | 88 +++++++++++++++ drivers/pinctrl/uniphier/pinctrl-proxstream2.c | 103 +++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 134 +++++++++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-uniphier.h | 57 ++++++++++ include/configs/uniphier.h | 24 ++-- 39 files changed, 949 insertions(+), 418 deletions(-) delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c delete mode 100644 arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c delete mode 100644 arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c create mode 100644 drivers/pinctrl/uniphier/Kconfig create mode 100644 drivers/pinctrl/uniphier/Makefile create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c create mode 100644 drivers/pinctrl/uniphier/pinctrl-proxstream2.c create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier.h
The core support for the pinctrl drivers for all the UniPhier SoCs.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/Kconfig | 2 + drivers/pinctrl/Makefile | 2 + drivers/pinctrl/uniphier/Kconfig | 6 + drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 134 +++++++++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-uniphier.h | 57 ++++++++++ 6 files changed, 202 insertions(+) create mode 100644 drivers/pinctrl/uniphier/Kconfig create mode 100644 drivers/pinctrl/uniphier/Makefile create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier.h
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 30b8e45..9c12429 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -106,4 +106,6 @@ config PINCTRL_SANDBOX
endif
+source "drivers/pinctrl/uniphier/Kconfig" + endmenu diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 35decf4..d0eb263 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -2,3 +2,5 @@ obj-y += pinctrl-uclass.o obj-$(CONFIG_$(SPL_)PINCTRL_GENERIC) += pinctrl-generic.o
obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o + +obj-$(CONFIG_ARCH_UNIPHIER) += uniphier/ diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig new file mode 100644 index 0000000..29a623d --- /dev/null +++ b/drivers/pinctrl/uniphier/Kconfig @@ -0,0 +1,6 @@ +if ARCH_UNIPHIER + +config PINCTRL_UNIPHIER_CORE + bool + +endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile new file mode 100644 index 0000000..748aa1b --- /dev/null +++ b/drivers/pinctrl/uniphier/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_PINCTRL_UNIPHIER_CORE) += pinctrl-uniphier-core.o diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c new file mode 100644 index 0000000..f008aea --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -0,0 +1,134 @@ +/* + * Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <mapmem.h> +#include <linux/io.h> +#include <linux/err.h> +#include <dm/device.h> +#include <dm/pinctrl.h> + +#include "pinctrl-uniphier.h" + +DECLARE_GLOBAL_DATA_PTR; + +static int uniphier_pinctrl_get_groups_count(struct udevice *dev) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->socdata->groups_count; +} + +static const char *uniphier_pinctrl_get_group_name(struct udevice *dev, + unsigned selector) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->socdata->groups[selector].name; +} + +static int uniphier_pinmux_get_functions_count(struct udevice *dev) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->socdata->functions_count; +} + +static const char *uniphier_pinmux_get_function_name(struct udevice *dev, + unsigned selector) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->socdata->functions[selector]; +} + +static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin, + unsigned muxval) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + unsigned mux_bits = priv->socdata->mux_bits; + unsigned reg_stride = priv->socdata->reg_stride; + unsigned reg, reg_end, shift, mask; + u32 tmp; + + reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride; + reg_end = reg + reg_stride; + shift = pin * mux_bits % 32; + mask = (1U << mux_bits) - 1; + + /* + * If reg_stride is greater than 4, the MSB of each pinsel shall be + * stored in the offset+4. + */ + for (; reg < reg_end; reg += 4) { + tmp = readl(priv->base + reg); + tmp &= ~(mask << shift); + tmp |= (mask & muxval) << shift; + writel(tmp, priv->base + reg); + + muxval >>= mux_bits; + } + + if (priv->socdata->load_pinctrl) + writel(1, priv->base + UNIPHIER_PINCTRL_LOAD_PINMUX); +} + +static int uniphier_pinmux_group_set(struct udevice *dev, + unsigned group_selector, + unsigned func_selector) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + const struct uniphier_pinctrl_group *group = + &priv->socdata->groups[group_selector]; + const struct uniphier_pmx_data *pmx_data = group->pmx_data; + const unsigned num_pmx_data = group->num_pmx_data; + int i; + + for (i = 0; i < num_pmx_data; i++) + uniphier_pinmux_set_one(dev, pmx_data[i].pin, + pmx_data[i].muxval); + + return 0; +} + +const struct pinctrl_ops uniphier_pinctrl_ops = { + .get_groups_count = uniphier_pinctrl_get_groups_count, + .get_group_name = uniphier_pinctrl_get_group_name, + .get_functions_count = uniphier_pinmux_get_functions_count, + .get_function_name = uniphier_pinmux_get_function_name, + .pinmux_group_set = uniphier_pinmux_group_set, + .set_state = pinctrl_generic_set_state, +}; + +int uniphier_pinctrl_probe(struct udevice *dev, + struct uniphier_pinctrl_socdata *socdata) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + fdt_addr_t addr; + fdt_size_t size; + + addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", + &size); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->base = map_sysmem(addr, size); + if (!priv->base) + return -ENOMEM; + + priv->socdata = socdata; + + return 0; +} + +int uniphier_pinctrl_remove(struct udevice *dev) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + + unmap_sysmem(priv->base); + + return 0; +} diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h new file mode 100644 index 0000000..db74838 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __PINCTRL_UNIPHIER_H__ +#define __PINCTRL_UNIPHIER_H__ + +#include <linux/kernel.h> +#include <linux/types.h> + +#define UNIPHIER_PINCTRL_PINMUX_BASE 0x0 +#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x700 +#define UNIPHIER_PINCTRL_IECTRL 0xd00 + +struct uniphier_pmx_data { + unsigned pin; + unsigned muxval; +}; + +struct uniphier_pinctrl_group { + const char *name; + const struct uniphier_pmx_data *pmx_data; + unsigned num_pmx_data; +}; + +struct uniphier_pinctrl_socdata { + const struct uniphier_pinctrl_group *groups; + int groups_count; + const char * const *functions; + int functions_count; + unsigned mux_bits; + unsigned reg_stride; + bool load_pinctrl; +}; + +#define UNIPHIER_PINCTRL_GROUP(grp) \ + { \ + .name = #grp, \ + .pmx_data = grp##_pmx, \ + .num_pmx_data = ARRAY_SIZE(grp##_pmx), \ + } + +struct uniphier_pinctrl_priv { + void __iomem *base; + struct uniphier_pinctrl_socdata *socdata; +}; + +extern const struct pinctrl_ops uniphier_pinctrl_ops; + +int uniphier_pinctrl_probe(struct udevice *dev, + struct uniphier_pinctrl_socdata *socdata); + +int uniphier_pinctrl_remove(struct udevice *dev); + +#endif /* __PINCTRL_UNIPHIER_H__ */
Hi Masahiro,
On 1 September 2015 at 07:50, Masahiro Yamada yamada.masahiro@socionext.com wrote:
The core support for the pinctrl drivers for all the UniPhier SoCs.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com
drivers/pinctrl/Kconfig | 2 + drivers/pinctrl/Makefile | 2 + drivers/pinctrl/uniphier/Kconfig | 6 + drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 134 +++++++++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-uniphier.h | 57 ++++++++++ 6 files changed, 202 insertions(+) create mode 100644 drivers/pinctrl/uniphier/Kconfig create mode 100644 drivers/pinctrl/uniphier/Makefile create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier.h
Reviewed-by: Simon Glass sjg@chromium.org
A few comments below.
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 30b8e45..9c12429 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -106,4 +106,6 @@ config PINCTRL_SANDBOX
endif
+source "drivers/pinctrl/uniphier/Kconfig"
endmenu diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 35decf4..d0eb263 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -2,3 +2,5 @@ obj-y += pinctrl-uclass.o obj-$(CONFIG_$(SPL_)PINCTRL_GENERIC) += pinctrl-generic.o
obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
+obj-$(CONFIG_ARCH_UNIPHIER) += uniphier/ diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig new file mode 100644 index 0000000..29a623d --- /dev/null +++ b/drivers/pinctrl/uniphier/Kconfig @@ -0,0 +1,6 @@ +if ARCH_UNIPHIER
+config PINCTRL_UNIPHIER_CORE
bool+endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile new file mode 100644 index 0000000..748aa1b --- /dev/null +++ b/drivers/pinctrl/uniphier/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_PINCTRL_UNIPHIER_CORE) += pinctrl-uniphier-core.o diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c new file mode 100644 index 0000000..f008aea --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -0,0 +1,134 @@ +/*
- Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <mapmem.h> +#include <linux/io.h> +#include <linux/err.h> +#include <dm/device.h> +#include <dm/pinctrl.h>
+#include "pinctrl-uniphier.h"
+DECLARE_GLOBAL_DATA_PTR;
+static int uniphier_pinctrl_get_groups_count(struct udevice *dev) +{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);return priv->socdata->groups_count;+}
+static const char *uniphier_pinctrl_get_group_name(struct udevice *dev,
unsigned selector)+{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);return priv->socdata->groups[selector].name;+}
+static int uniphier_pinmux_get_functions_count(struct udevice *dev) +{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);return priv->socdata->functions_count;+}
+static const char *uniphier_pinmux_get_function_name(struct udevice *dev,
unsigned selector)+{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);return priv->socdata->functions[selector];+}
+static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin,
unsigned muxval)+{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);unsigned mux_bits = priv->socdata->mux_bits;unsigned reg_stride = priv->socdata->reg_stride;unsigned reg, reg_end, shift, mask;u32 tmp;reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride;reg_end = reg + reg_stride;shift = pin * mux_bits % 32;mask = (1U << mux_bits) - 1;/** If reg_stride is greater than 4, the MSB of each pinsel shall be* stored in the offset+4.*/for (; reg < reg_end; reg += 4) {tmp = readl(priv->base + reg);tmp &= ~(mask << shift);tmp |= (mask & muxval) << shift;writel(tmp, priv->base + reg);muxval >>= mux_bits;}if (priv->socdata->load_pinctrl)writel(1, priv->base + UNIPHIER_PINCTRL_LOAD_PINMUX);+}
+static int uniphier_pinmux_group_set(struct udevice *dev,
unsigned group_selector,unsigned func_selector)+{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);const struct uniphier_pinctrl_group *group =&priv->socdata->groups[group_selector];const struct uniphier_pmx_data *pmx_data = group->pmx_data;const unsigned num_pmx_data = group->num_pmx_data;int i;for (i = 0; i < num_pmx_data; i++)uniphier_pinmux_set_one(dev, pmx_data[i].pin,pmx_data[i].muxval);return 0;+}
+const struct pinctrl_ops uniphier_pinctrl_ops = {
.get_groups_count = uniphier_pinctrl_get_groups_count,.get_group_name = uniphier_pinctrl_get_group_name,.get_functions_count = uniphier_pinmux_get_functions_count,.get_function_name = uniphier_pinmux_get_function_name,.pinmux_group_set = uniphier_pinmux_group_set,.set_state = pinctrl_generic_set_state,+};
+int uniphier_pinctrl_probe(struct udevice *dev,
struct uniphier_pinctrl_socdata *socdata)+{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);fdt_addr_t addr;fdt_size_t size;addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg",&size);if (addr == FDT_ADDR_T_NONE)return -EINVAL;priv->base = map_sysmem(addr, size);if (!priv->base)return -ENOMEM;priv->socdata = socdata;return 0;+}
+int uniphier_pinctrl_remove(struct udevice *dev) +{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);unmap_sysmem(priv->base);return 0;+} diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h new file mode 100644 index 0000000..db74838 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -0,0 +1,57 @@ +/*
- Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __PINCTRL_UNIPHIER_H__ +#define __PINCTRL_UNIPHIER_H__
+#include <linux/kernel.h> +#include <linux/types.h>
+#define UNIPHIER_PINCTRL_PINMUX_BASE 0x0 +#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x700 +#define UNIPHIER_PINCTRL_IECTRL 0xd00
Since this is local data you don't really need the UNIPHIER prefix, but it's up to you.
+struct uniphier_pmx_data {
comments please on these structures.
unsigned pin;unsigned muxval;+};
+struct uniphier_pinctrl_group {
const char *name;const struct uniphier_pmx_data *pmx_data;unsigned num_pmx_data;+};
+struct uniphier_pinctrl_socdata {
const struct uniphier_pinctrl_group *groups;int groups_count;const char * const *functions;int functions_count;unsigned mux_bits;unsigned reg_stride;bool load_pinctrl;+};
+#define UNIPHIER_PINCTRL_GROUP(grp) \
{ \.name = #grp, \.pmx_data = grp##_pmx, \.num_pmx_data = ARRAY_SIZE(grp##_pmx), \}+struct uniphier_pinctrl_priv {
void __iomem *base;struct uniphier_pinctrl_socdata *socdata;+};
+extern const struct pinctrl_ops uniphier_pinctrl_ops;
It's a shame this cannot be static...
+int uniphier_pinctrl_probe(struct udevice *dev,
struct uniphier_pinctrl_socdata *socdata);+int uniphier_pinctrl_remove(struct udevice *dev);
+#endif /* __PINCTRL_UNIPHIER_H__ */
1.9.1
Regards, Simon
2015-09-02 11:48 GMT+09:00 Simon Glass sjg@chromium.org:
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h new file mode 100644 index 0000000..db74838 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -0,0 +1,57 @@ +/*
- Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __PINCTRL_UNIPHIER_H__ +#define __PINCTRL_UNIPHIER_H__
+#include <linux/kernel.h> +#include <linux/types.h>
+#define UNIPHIER_PINCTRL_PINMUX_BASE 0x0 +#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x700 +#define UNIPHIER_PINCTRL_IECTRL 0xd00
Since this is local data you don't really need the UNIPHIER prefix, but it's up to you.
I want to make sure that these macros are not global ones, but our SoC-specific ones.
I prefer to add some prefixes.
+struct uniphier_pmx_data {
comments please on these structures.
I will think of that, but I believe this is also up to me.
These are driver-local structures, so comments for each structure are not the requirement. Moreover, most of them have clear names.
At least, when I sent some driver patches to Linux, I was never told to add comment blocks to driver-specific structures.
unsigned pin;unsigned muxval;+};
+struct uniphier_pinctrl_group {
const char *name;const struct uniphier_pmx_data *pmx_data;unsigned num_pmx_data;+};
+struct uniphier_pinctrl_socdata {
const struct uniphier_pinctrl_group *groups;int groups_count;const char * const *functions;int functions_count;unsigned mux_bits;unsigned reg_stride;bool load_pinctrl;+};
+#define UNIPHIER_PINCTRL_GROUP(grp) \
{ \.name = #grp, \.pmx_data = grp##_pmx, \.num_pmx_data = ARRAY_SIZE(grp##_pmx), \}+struct uniphier_pinctrl_priv {
void __iomem *base;struct uniphier_pinctrl_socdata *socdata;+};
+extern const struct pinctrl_ops uniphier_pinctrl_ops;
It's a shame this cannot be static...
Indeed.
Hi Masahiro,
On 1 September 2015 at 21:30, Masahiro Yamada yamada.masahiro@socionext.com wrote:
2015-09-02 11:48 GMT+09:00 Simon Glass sjg@chromium.org:
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h new file mode 100644 index 0000000..db74838 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -0,0 +1,57 @@ +/*
- Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __PINCTRL_UNIPHIER_H__ +#define __PINCTRL_UNIPHIER_H__
+#include <linux/kernel.h> +#include <linux/types.h>
+#define UNIPHIER_PINCTRL_PINMUX_BASE 0x0 +#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x700 +#define UNIPHIER_PINCTRL_IECTRL 0xd00
Since this is local data you don't really need the UNIPHIER prefix, but it's up to you.
I want to make sure that these macros are not global ones, but our SoC-specific ones.
I prefer to add some prefixes.
+struct uniphier_pmx_data {
comments please on these structures.
I will think of that, but I believe this is also up to me.
These are driver-local structures, so comments for each structure are not the requirement. Moreover, most of them have clear names.
At least, when I sent some driver patches to Linux, I was never told to add comment blocks to driver-specific structures.
That might be because Linux is allergic to comments. Everyone is supposed to know already (presumably from birth) how things work :-)
Some of them I can guess, but others are not clear - e.g. mux_bits, reg_stride, load_pinctrl... I think it is better that our coding standard requires comments.
unsigned pin;unsigned muxval;+};
+struct uniphier_pinctrl_group {
const char *name;const struct uniphier_pmx_data *pmx_data;unsigned num_pmx_data;+};
+struct uniphier_pinctrl_socdata {
const struct uniphier_pinctrl_group *groups;int groups_count;const char * const *functions;int functions_count;unsigned mux_bits;unsigned reg_stride;bool load_pinctrl;+};
+#define UNIPHIER_PINCTRL_GROUP(grp) \
{ \.name = #grp, \.pmx_data = grp##_pmx, \.num_pmx_data = ARRAY_SIZE(grp##_pmx), \}+struct uniphier_pinctrl_priv {
void __iomem *base;struct uniphier_pinctrl_socdata *socdata;+};
+extern const struct pinctrl_ops uniphier_pinctrl_ops;
It's a shame this cannot be static...
Indeed.
Regards, Simon
Add pin configuration and pinmux support for UniPhier PH1-LD4 SoC.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/uniphier/Kconfig | 6 ++ drivers/pinctrl/uniphier/Makefile | 2 + drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c | 92 ++++++++++++++++++++++++++++++ 3 files changed, 100 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 29a623d..03593cd 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -3,4 +3,10 @@ if ARCH_UNIPHIER config PINCTRL_UNIPHIER_CORE bool
+config PINCTRL_UNIPHIER_PH1_LD4 + bool "UniPhier PH1-LD4 SoC pinctrl driver" + depends on MACH_PH1_LD4 + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index 748aa1b..b4bd042 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -1 +1,3 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_CORE) += pinctrl-uniphier-core.o + +obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c b/drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c new file mode 100644 index 0000000..d92e9bf --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c @@ -0,0 +1,92 @@ +/* + * Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <dm/device.h> +#include <dm/pinctrl.h> + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pmx_data i2c0_pmx[] = {{102, 0}, {103, 0}}; +static const struct uniphier_pmx_data i2c1_pmx[] = {{104, 0}, {105, 0}}; +static const struct uniphier_pmx_data i2c2_pmx[] = {{108, 2}, {109, 2}}; +static const struct uniphier_pmx_data i2c3_pmx[] = {{108, 3}, {109, 3}}; +static const struct uniphier_pmx_data nand_pmx[] = { + {24, 0}, {25, 0}, {26, 0}, {27, 0}, {28, 0}, {29, 0}, {30, 0}, {31, 0}, + {158, 0}, {159, 0}, {160, 0}, {161, 0}, {162, 0}, {163, 0}, {164, 0}, +}; +static const struct uniphier_pmx_data nand_cs1_pmx[] = {{22, 0}, {23, 0}}; +static const struct uniphier_pmx_data uart0_pmx[] = {{85, 1}, {88, 1}}; +static const struct uniphier_pmx_data uart1_pmx[] = {{155, 13}, {156, 13}}; +static const struct uniphier_pmx_data uart1b_pmx[] = {{69, 23}, {70, 23}}; +static const struct uniphier_pmx_data uart2_pmx[] = {{128, 13}, {129, 13}}; +static const struct uniphier_pmx_data uart3_pmx[] = {{110, 1}, {111, 1}}; +static const struct uniphier_pmx_data usb0_pmx[] = {{53, 0}, {54, 0}}; +static const struct uniphier_pmx_data usb1_pmx[] = {{55, 0}, {56, 0}}; +static const struct uniphier_pmx_data usb2_pmx[] = {{155, 4}, {156, 4}}; +static const struct uniphier_pmx_data usb2b_pmx[] = {{67, 23}, {68, 23}}; + +static const struct uniphier_pinctrl_group ph1_ld4_groups[] = { + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart1b), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb2b), +}; + +static const char * const ph1_ld4_functions[] = { + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "nand", + "uart0", + "uart1", + "uart2", + "uart3", + "usb0", + "usb1", + "usb2", +}; + +static struct uniphier_pinctrl_socdata ph1_ld4_pinctrl_socdata = { + .groups = ph1_ld4_groups, + .groups_count = ARRAY_SIZE(ph1_ld4_groups), + .functions = ph1_ld4_functions, + .functions_count = ARRAY_SIZE(ph1_ld4_functions), + .mux_bits = 8, + .reg_stride = 4, + .load_pinctrl = false, +}; + +static int ph1_ld4_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &ph1_ld4_pinctrl_socdata); +} + +static const struct udevice_id ph1_ld4_pinctrl_match[] = { + { .compatible = "socionext,ph1-ld4-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(ph1_ld4_pinctrl) = { + .name = "ph1-ld4-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(ph1_ld4_pinctrl_match), + .probe = ph1_ld4_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +};
Add pin configuration and pinmux support for UniPhier PH1-Pro4 SoC.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/uniphier/Kconfig | 6 ++ drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c | 95 +++++++++++++++++++++++++++++ 3 files changed, 102 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 03593cd..c417a9f 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -9,4 +9,10 @@ config PINCTRL_UNIPHIER_PH1_LD4 default y select PINCTRL_UNIPHIER_CORE
+config PINCTRL_UNIPHIER_PH1_PRO4 + bool "UniPhier PH1-Pro4 SoC pinctrl driver" + depends on MACH_PH1_PRO4 + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index b4bd042..b1b597e 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_CORE) += pinctrl-uniphier-core.o
obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c b/drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c new file mode 100644 index 0000000..3d89736 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c @@ -0,0 +1,95 @@ +/* + * Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <dm/device.h> +#include <dm/pinctrl.h> + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pmx_data i2c0_pmx[] = {{142, 0}, {143, 0}}; +static const struct uniphier_pmx_data i2c1_pmx[] = {{144, 0}, {145, 0}}; +static const struct uniphier_pmx_data i2c2_pmx[] = {{146, 0}, {147, 0}}; +static const struct uniphier_pmx_data i2c3_pmx[] = {{148, 0}, {149, 0}}; +static const struct uniphier_pmx_data i2c6_pmx[] = {{308, 6}, {309, 6}}; +static const struct uniphier_pmx_data nand_pmx[] = { + {40, 0}, {41, 0}, {42, 0}, {43, 0}, {44, 0}, {45, 0}, {46, 0}, {47, 0}, + {48, 0}, {49, 0}, {50, 0}, {51, 0}, {52, 0}, {53, 0}, {54, 0}, +}; +static const struct uniphier_pmx_data nand_cs1_pmx[] = {{131, 1}, {132, 1}}; +static const struct uniphier_pmx_data uart0_pmx[] = {{127, 0}, {128, 0}}; +static const struct uniphier_pmx_data uart1_pmx[] = {{129, 0}, {130, 0}}; +static const struct uniphier_pmx_data uart2_pmx[] = {{131, 0}, {132, 0}}; +static const struct uniphier_pmx_data uart3_pmx[] = {{88, 2}, {89, 2}}; +static const struct uniphier_pmx_data usb0_pmx[] = {{180, 0}, {181, 0}}; +static const struct uniphier_pmx_data usb1_pmx[] = {{182, 0}, {183, 0}}; +static const struct uniphier_pmx_data usb2_pmx[] = {{184, 0}, {185, 0}}; +static const struct uniphier_pmx_data usb3_pmx[] = {{186, 0}, {187, 0}}; + +static const struct uniphier_pinctrl_group ph1_pro4_groups[] = { + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(i2c6), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), +}; + +static const char * const ph1_pro4_functions[] = { + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "i2c6", + "nand", + "uart0", + "uart1", + "uart2", + "uart3", + "usb0", + "usb1", + "usb2", + "usb3", +}; + +static struct uniphier_pinctrl_socdata ph1_pro4_pinctrl_socdata = { + .groups = ph1_pro4_groups, + .groups_count = ARRAY_SIZE(ph1_pro4_groups), + .functions = ph1_pro4_functions, + .functions_count = ARRAY_SIZE(ph1_pro4_functions), + .mux_bits = 4, + .reg_stride = 8, + .load_pinctrl = true, +}; + +static int ph1_pro4_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &ph1_pro4_pinctrl_socdata); +} + +static const struct udevice_id ph1_pro4_pinctrl_match[] = { + { .compatible = "socionext,ph1-pro4-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(ph1_pro4_pinctrl) = { + .name = "ph1-pro4-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(ph1_pro4_pinctrl_match), + .probe = ph1_pro4_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, + .flags = DM_FLAG_PRE_RELOC, +};
Add pin configuration and pinmux support for UniPhier PH1-sLD8 SoC.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/uniphier/Kconfig | 6 ++ drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c | 88 +++++++++++++++++++++++++++++ 3 files changed, 95 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index c417a9f..a156a28 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -15,4 +15,10 @@ config PINCTRL_UNIPHIER_PH1_PRO4 default y select PINCTRL_UNIPHIER_CORE
+config PINCTRL_UNIPHIER_PH1_SLD8 + bool "UniPhier PH1-sLD8 SoC pinctrl driver" + depends on MACH_PH1_SLD8 + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index b1b597e..3349fff 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_CORE) += pinctrl-uniphier-core.o
obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c b/drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c new file mode 100644 index 0000000..b2c28c6 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c @@ -0,0 +1,88 @@ +/* + * Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <dm/device.h> +#include <dm/pinctrl.h> + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pmx_data i2c0_pmx[] = {{102, 0}, {103, 0}}; +static const struct uniphier_pmx_data i2c1_pmx[] = {{104, 0}, {105, 0}}; +static const struct uniphier_pmx_data i2c2_pmx[] = {{108, 2}, {109, 2}}; +static const struct uniphier_pmx_data i2c3_pmx[] = {{108, 3}, {109, 3}}; +static const struct uniphier_pmx_data nand_pmx[] = { + {15, 0}, {16, 0}, {17, 0}, {18, 0}, {19, 0}, {20, 0}, {21, 0}, {24, 0}, + {25, 0}, {26, 0}, {27, 0}, {28, 0}, {29, 0}, {30, 0}, {31, 0}, +}; +static const struct uniphier_pmx_data nand_cs1_pmx[] = {{22, 0}, {23, 0}}; +static const struct uniphier_pmx_data uart0_pmx[] = {{70, 3}, {71, 3}}; +static const struct uniphier_pmx_data uart1_pmx[] = {{114, 0}, {115, 0}}; +static const struct uniphier_pmx_data uart2_pmx[] = {{112, 1}, {113, 1}}; +static const struct uniphier_pmx_data uart3_pmx[] = {{110, 1}, {111, 1}}; +static const struct uniphier_pmx_data usb0_pmx[] = {{41, 0}, {42, 0}}; +static const struct uniphier_pmx_data usb1_pmx[] = {{43, 0}, {44, 0}}; +static const struct uniphier_pmx_data usb2_pmx[] = {{114, 1}, {115, 1}}; + +static const struct uniphier_pinctrl_group ph1_sld8_groups[] = { + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), +}; + +static const char * const ph1_sld8_functions[] = { + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "nand", + "uart0", + "uart1", + "uart2", + "uart3", + "usb0", + "usb1", + "usb2", +}; + +static struct uniphier_pinctrl_socdata ph1_sld8_pinctrl_socdata = { + .groups = ph1_sld8_groups, + .groups_count = ARRAY_SIZE(ph1_sld8_groups), + .functions = ph1_sld8_functions, + .functions_count = ARRAY_SIZE(ph1_sld8_functions), + .mux_bits = 8, + .reg_stride = 4, + .load_pinctrl = false, +}; + +static int ph1_sld8_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &ph1_sld8_pinctrl_socdata); +} + +static const struct udevice_id ph1_sld8_pinctrl_match[] = { + { .compatible = "socionext,ph1-sld8-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(ph1_sld8_pinctrl) = { + .name = "ph1-sld8-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(ph1_sld8_pinctrl_match), + .probe = ph1_sld8_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +};
Add pin configuration and pinmux support for UniPhier PH1-Pro5 SoC.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/uniphier/Kconfig | 6 ++ drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c | 101 ++++++++++++++++++++++++++++ 3 files changed, 108 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index a156a28..9d3065d 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -21,4 +21,10 @@ config PINCTRL_UNIPHIER_PH1_SLD8 default y select PINCTRL_UNIPHIER_CORE
+config PINCTRL_UNIPHIER_PH1_PRO5 + bool "UniPhier PH1-Pro5 SoC pinctrl driver" + depends on MACH_PH1_PRO5 + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index 3349fff..b0cd3e8 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_CORE) += pinctrl-uniphier-core.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c b/drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c new file mode 100644 index 0000000..63fe67b --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c @@ -0,0 +1,101 @@ +/* + * Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <dm/device.h> +#include <dm/pinctrl.h> + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pmx_data i2c0_pmx[] = {{112, 0}, {113, 0}}; +static const struct uniphier_pmx_data i2c1_pmx[] = {{114, 0}, {115, 0}}; +static const struct uniphier_pmx_data i2c2_pmx[] = {{116, 0}, {117, 0}}; +static const struct uniphier_pmx_data i2c3_pmx[] = {{118, 0}, {119, 0}}; +static const struct uniphier_pmx_data i2c5_pmx[] = {{87, 2}, {88, 2}}; +static const struct uniphier_pmx_data i2c5b_pmx[] = {{196, 2}, {197, 2}}; +static const struct uniphier_pmx_data i2c5c_pmx[] = {{215, 2}, {216, 2}}; +static const struct uniphier_pmx_data i2c6_pmx[] = {{101, 2}, {102, 2}}; +static const struct uniphier_pmx_data nand_pmx[] = { + {19, 0}, {20, 0}, {21, 0}, {22, 0}, {23, 0}, {24, 0}, {25, 0}, {28, 0}, + {29, 0}, {30, 0}, {31, 0}, {32, 0}, {33, 0}, {34, 0}, {35, 0}, +}; +static const struct uniphier_pmx_data nand_cs1_pmx[] = {{26, 0}, {27, 0}}; +static const struct uniphier_pmx_data uart0_pmx[] = {{47, 0}, {48, 0}}; +static const struct uniphier_pmx_data uart0b_pmx[] = {{227, 3}, {228, 3}}; +static const struct uniphier_pmx_data uart1_pmx[] = {{49, 0}, {50, 0}}; +static const struct uniphier_pmx_data uart2_pmx[] = {{51, 0}, {52, 0}}; +static const struct uniphier_pmx_data uart3_pmx[] = {{53, 2}, {54, 2}}; +static const struct uniphier_pmx_data usb0_pmx[] = {{124, 0}, {125, 0}}; +static const struct uniphier_pmx_data usb1_pmx[] = {{126, 0}, {127, 0}}; +static const struct uniphier_pmx_data usb2_pmx[] = {{128, 0}, {129, 0}}; + +static const struct uniphier_pinctrl_group ph1_pro5_groups[] = { + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(i2c5), + UNIPHIER_PINCTRL_GROUP(i2c5b), + UNIPHIER_PINCTRL_GROUP(i2c5c), + UNIPHIER_PINCTRL_GROUP(i2c6), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart0b), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), +}; + +static const char * const ph1_pro5_functions[] = { + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "i2c5", + "i2c6", + "nand", + "uart0", + "uart1", + "uart2", + "uart3", + "usb0", + "usb1", + "usb2", +}; + +static struct uniphier_pinctrl_socdata ph1_pro5_pinctrl_socdata = { + .groups = ph1_pro5_groups, + .groups_count = ARRAY_SIZE(ph1_pro5_groups), + .functions = ph1_pro5_functions, + .functions_count = ARRAY_SIZE(ph1_pro5_functions), + .mux_bits = 4, + .reg_stride = 8, + .load_pinctrl = true, +}; + +static int ph1_pro5_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &ph1_pro5_pinctrl_socdata); +} + +static const struct udevice_id ph1_pro5_pinctrl_match[] = { + { .compatible = "socionext,ph1-pro5-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(ph1_pro5_pinctrl) = { + .name = "ph1-pro5-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(ph1_pro5_pinctrl_match), + .probe = ph1_pro5_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, + .flags = DM_FLAG_PRE_RELOC, +};
Add pin configuration and pinmux support for UniPhier ProXstream2 SoC.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/uniphier/Kconfig | 6 ++ drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-proxstream2.c | 103 +++++++++++++++++++++++++ 3 files changed, 110 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-proxstream2.c
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 9d3065d..7f729b6 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -27,4 +27,10 @@ config PINCTRL_UNIPHIER_PH1_PRO5 default y select PINCTRL_UNIPHIER_CORE
+config PINCTRL_UNIPHIER_PROXSTREAM2 + bool "UniPhier ProXstream2 SoC pinctrl driver" + depends on MACH_PROXSTREAM2 + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index b0cd3e8..aed038c 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PROXSTREAM2) += pinctrl-proxstream2.o diff --git a/drivers/pinctrl/uniphier/pinctrl-proxstream2.c b/drivers/pinctrl/uniphier/pinctrl-proxstream2.c new file mode 100644 index 0000000..981ad7e --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-proxstream2.c @@ -0,0 +1,103 @@ +/* + * Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <dm/device.h> +#include <dm/pinctrl.h> + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pmx_data i2c0_pmx[] = {{109, 8}, {110, 8}}; +static const struct uniphier_pmx_data i2c1_pmx[] = {{111, 8}, {112, 8}}; +static const struct uniphier_pmx_data i2c2_pmx[] = {{171, 8}, {172, 8}}; +static const struct uniphier_pmx_data i2c3_pmx[] = {{159, 8}, {160, 8}}; +static const struct uniphier_pmx_data i2c5_pmx[] = {{183, 11}, {184, 11}}; +static const struct uniphier_pmx_data i2c6_pmx[] = {{185, 11}, {186, 11}}; +static const struct uniphier_pmx_data nand_pmx[] = { + {30, 8}, {31, 8}, {32, 8}, {33, 8}, {34, 8}, {35, 8}, {36, 8}, {39, 8}, + {40, 8}, {41, 8}, {42, 8}, {43, 8}, {44, 8}, {45, 8}, {46, 8}, +}; +static const struct uniphier_pmx_data nand_cs1_pmx[] = {{37, 8}, {38, 8}}; +static const struct uniphier_pmx_data uart0_pmx[] = {{217, 8}, {218, 8}}; +static const struct uniphier_pmx_data uart0b_pmx[] = {{179, 10}, {180, 10}}; +static const struct uniphier_pmx_data uart1_pmx[] = {{115, 8}, {116, 8}}; +static const struct uniphier_pmx_data uart2_pmx[] = {{113, 8}, {114, 8}}; +static const struct uniphier_pmx_data uart3_pmx[] = {{219, 8}, {220, 8}}; +static const struct uniphier_pmx_data uart3b_pmx[] = {{181, 10}, {182, 10}}; +static const struct uniphier_pmx_data usb0_pmx[] = {{56, 8}, {57, 8}}; +static const struct uniphier_pmx_data usb1_pmx[] = {{58, 8}, {59, 8}}; +static const struct uniphier_pmx_data usb2_pmx[] = {{60, 8}, {61, 8}}; +static const struct uniphier_pmx_data usb3_pmx[] = {{62, 8}, {63, 8}}; + +static const struct uniphier_pinctrl_group proxstream2_groups[] = { + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(i2c5), + UNIPHIER_PINCTRL_GROUP(i2c6), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart0b), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(uart3b), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), +}; + +static const char * const proxstream2_functions[] = { + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "i2c5", + "i2c6", + "nand", + "uart0", + "uart0b", + "uart1", + "uart2", + "uart3", + "uart3b", + "usb0", + "usb1", + "usb2", + "usb3", +}; + +static struct uniphier_pinctrl_socdata proxstream2_pinctrl_socdata = { + .groups = proxstream2_groups, + .groups_count = ARRAY_SIZE(proxstream2_groups), + .functions = proxstream2_functions, + .functions_count = ARRAY_SIZE(proxstream2_functions), + .mux_bits = 8, + .reg_stride = 4, + .load_pinctrl = false, +}; + +static int proxstream2_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &proxstream2_pinctrl_socdata); +} + +static const struct udevice_id proxstream2_pinctrl_match[] = { + { .compatible = "socionext,proxstream2-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(proxstream2_pinctrl) = { + .name = "proxstream2-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(proxstream2_pinctrl_match), + .probe = proxstream2_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +};
Add pin configuration and pinmux support for UniPhier PH1-LD6b SoC.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
drivers/pinctrl/uniphier/Kconfig | 6 ++ drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c | 94 +++++++++++++++++++++++++++++ 3 files changed, 101 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c
diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 7f729b6..757edce 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -33,4 +33,10 @@ config PINCTRL_UNIPHIER_PROXSTREAM2 default y select PINCTRL_UNIPHIER_CORE
+config PINCTRL_UNIPHIER_PH1_LD6B + bool "UniPhier PH1-LD6b SoC pinctrl driver" + depends on MACH_PH1_LD6B + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index aed038c..e215b10 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o obj-$(CONFIG_PINCTRL_UNIPHIER_PROXSTREAM2) += pinctrl-proxstream2.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD6B) += pinctrl-ph1-ld6b.o diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c new file mode 100644 index 0000000..8cd3936 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2015 Masahiro Yamada yamada.masahiro@socionext.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <dm/device.h> +#include <dm/pinctrl.h> + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pmx_data i2c0_pmx[] = {{109, 0}, {110, 0}}; +static const struct uniphier_pmx_data i2c1_pmx[] = {{111, 0}, {112, 0}}; +static const struct uniphier_pmx_data i2c2_pmx[] = {{115, 1}, {116, 1}}; +static const struct uniphier_pmx_data i2c3_pmx[] = {{118, 1}, {119, 1}}; +static const struct uniphier_pmx_data nand_pmx[] = { + {30, 0}, {31, 0}, {32, 0}, {33, 0}, {34, 0}, {35, 0}, {36, 0}, {39, 0}, + {40, 0}, {41, 0}, {42, 0}, {43, 0}, {44, 0}, {45, 0}, {46, 0}, +}; +static const struct uniphier_pmx_data nand_cs1_pmx[] = {{37, 0}, {38, 0}}; +static const struct uniphier_pmx_data uart0_pmx[] = {{135, 3}, {136, 3}}; +static const struct uniphier_pmx_data uart0b_pmx[] = {{11, 2}, {12, 2}}; +static const struct uniphier_pmx_data uart1_pmx[] = {{115, 0}, {116, 0}}; +static const struct uniphier_pmx_data uart1b_pmx[] = {{113, 1}, {114, 1}}; +static const struct uniphier_pmx_data uart2_pmx[] = {{113, 2}, {114, 2}}; +static const struct uniphier_pmx_data uart2b_pmx[] = {{86, 1}, {87, 1}}; +static const struct uniphier_pmx_data usb0_pmx[] = {{56, 0}, {57, 0}}; +static const struct uniphier_pmx_data usb1_pmx[] = {{58, 0}, {59, 0}}; +static const struct uniphier_pmx_data usb2_pmx[] = {{60, 0}, {61, 0}}; +static const struct uniphier_pmx_data usb3_pmx[] = {{62, 0}, {63, 0}}; + +static const struct uniphier_pinctrl_group ph1_ld6b_groups[] = { + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart0b), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart1b), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart2b), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), +}; + +static const char * const ph1_ld6b_functions[] = { + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "nand", + "uart0", + "uart1", + "uart2", + "usb0", + "usb1", + "usb2", + "usb3", +}; + +static struct uniphier_pinctrl_socdata ph1_ld6b_pinctrl_socdata = { + .groups = ph1_ld6b_groups, + .groups_count = ARRAY_SIZE(ph1_ld6b_groups), + .functions = ph1_ld6b_functions, + .functions_count = ARRAY_SIZE(ph1_ld6b_functions), + .mux_bits = 8, + .reg_stride = 4, + .load_pinctrl = false, +}; + +static int ph1_ld6b_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &ph1_ld6b_pinctrl_socdata); +} + +static const struct udevice_id ph1_ld6b_pinctrl_match[] = { + { .compatible = "socionext,ph1-ld6b-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(ph1_ld6b_pinctrl) = { + .name = "ph1-ld6b-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(ph1_ld6b_pinctrl_match), + .probe = ph1_ld6b_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +};
In UniPhier device trees, pinctrl device nodes are located under the simple-bus (AMBA).
This is needed to bind pinctrl devices in SPL.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
configs/ph1_ld4_defconfig | 1 + configs/ph1_pro4_defconfig | 1 + configs/ph1_sld8_defconfig | 1 + 3 files changed, 3 insertions(+)
diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 56c215f..74e759a 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -17,6 +17,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_SIMPLE_BUS=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 7624c54..714339a 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -16,6 +16,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_SIMPLE_BUS=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 1a35a77..df0e005 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -17,6 +17,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_SIMPLE_BUS=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
In the next commit, I will add "u-boot,dm-pre-reloc" to the "soc" (simple-bus) nodes in UniPhier device trees. But, before that, CONFIG_SYS_MALLOC_F_LEN must be increased.
Adding "u-boot,dm-pre-reloc" to a simple-bus node causes it to bind all of its child nodes. (See simple_bus_post_bind() function)
Actually, I want only UART0 and pinctrl to be bound in SPL and before relocation in U-boot proper. But, with "u-boot,dm-pre-reloc" in the simple-bus node, all the other unwanted nodes are also bound. The default value for CONFIG_SYS_MALLOC_F_LEN, 0x400, is not enough for that. Increase the pre-reloc malloc size to 0x2000, hoping the root cause will be fixed later.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
configs/ph1_ld4_defconfig | 1 + configs/ph1_pro4_defconfig | 1 + configs/ph1_sld8_defconfig | 1 + 3 files changed, 3 insertions(+)
diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 74e759a..61eb037 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_MACH_PH1_LD4=y CONFIG_PFC_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 714339a..7582fdf 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_PFC_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref" diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index df0e005..236e673 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_MACH_PH1_SLD8=y CONFIG_PFC_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000
Add "u-boot,dm-pre-reloc" for device nodes we want in SPL DTB (spl/u-boot-spl.dtb).
The "soc" node (this is simple-bus node) also needs the property to bind the pinctrl node located under it.
I am collecting this U-Boot specific hack to the bottom of board DTS rather than inserting "u-boot,dm-pre-reloc" into SoC DTSI. My goal is to sync DTSI with Linux for easier maintenance.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/dts/uniphier-ph1-ld4-ref.dts | 16 +++++++++++++++- arch/arm/dts/uniphier-ph1-ld6b-ref.dts | 16 +++++++++++++++- arch/arm/dts/uniphier-ph1-pro4-ref.dts | 16 +++++++++++++++- arch/arm/dts/uniphier-ph1-sld8-ref.dts | 16 +++++++++++++++- 4 files changed, 60 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/dts/uniphier-ph1-ld4-ref.dts index 20f2e9a..9d697c1 100644 --- a/arch/arm/dts/uniphier-ph1-ld4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld4-ref.dts @@ -61,6 +61,20 @@ };
/* for U-boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + &serial0 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts index 58dc20e..ca68930 100644 --- a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts @@ -54,6 +54,20 @@ };
/* for U-boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + &serial0 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts index ec1117d..a825069 100644 --- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts @@ -68,6 +68,20 @@ };
/* for U-boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + &serial0 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/dts/uniphier-ph1-sld8-ref.dts index 6269f9a..2cfcaff 100644 --- a/arch/arm/dts/uniphier-ph1-sld8-ref.dts +++ b/arch/arm/dts/uniphier-ph1-sld8-ref.dts @@ -65,6 +65,20 @@ };
/* for U-boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + &serial0 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; };
On 1 September 2015 at 07:50, Masahiro Yamada yamada.masahiro@socionext.com wrote:
Add "u-boot,dm-pre-reloc" for device nodes we want in SPL DTB (spl/u-boot-spl.dtb).
The "soc" node (this is simple-bus node) also needs the property to bind the pinctrl node located under it.
I am collecting this U-Boot specific hack to the bottom of board DTS rather than inserting "u-boot,dm-pre-reloc" into SoC DTSI. My goal is to sync DTSI with Linux for easier maintenance.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com
arch/arm/dts/uniphier-ph1-ld4-ref.dts | 16 +++++++++++++++- arch/arm/dts/uniphier-ph1-ld6b-ref.dts | 16 +++++++++++++++- arch/arm/dts/uniphier-ph1-pro4-ref.dts | 16 +++++++++++++++- arch/arm/dts/uniphier-ph1-sld8-ref.dts | 16 +++++++++++++++- 4 files changed, 60 insertions(+), 4 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
Now, UniPhier SoCs are ready to enable pinctrl drivers.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
configs/ph1_ld4_defconfig | 2 ++ configs/ph1_pro4_defconfig | 2 ++ configs/ph1_sld8_defconfig | 2 ++ 3 files changed, 6 insertions(+)
diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 61eb037..13b124b 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -24,6 +24,8 @@ CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_SPL_NAND_DENALI=y CONFIG_UNIPHIER_SERIAL=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 7582fdf..0982d91 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -23,6 +23,8 @@ CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_SPL_NAND_DENALI=y CONFIG_UNIPHIER_SERIAL=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 236e673..584c41a 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -24,6 +24,8 @@ CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_SPL_NAND_DENALI=y CONFIG_UNIPHIER_SERIAL=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y
As the UniPhier serial driver had already switched to Drive Model and the pinctrl drivers are now enabled, these pin-muxing settings are handled by the pinctrl drivers.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/mach-uniphier/ph1-ld4/Makefile | 2 +- arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c | 27 ------------------------- arch/arm/mach-uniphier/ph1-pro4/Makefile | 2 +- arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c | 26 ------------------------ arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c | 27 ------------------------- arch/arm/mach-uniphier/spl.c | 5 +++++ 6 files changed, 7 insertions(+), 82 deletions(-) delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c delete mode 100644 arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c
diff --git a/arch/arm/mach-uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile index 1410b12..789820e 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/Makefile +++ b/arch/arm/mach-uniphier/ph1-ld4/Makefile @@ -5,7 +5,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += bcu_init.o sg_init.o pll_init.o early_clkrst_init.o \ - early_pinctrl.o pll_spectrum.o umc_init.o ddrphy_init.o + pll_spectrum.o umc_init.o ddrphy_init.o obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o else diff --git a/arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c deleted file mode 100644 index e5e86bb..0000000 diff --git a/arch/arm/mach-uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile index 229f443..7fdb36a 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/Makefile +++ b/arch/arm/mach-uniphier/ph1-pro4/Makefile @@ -5,7 +5,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += sg_init.o pll_init.o early_clkrst_init.o \ - early_pinctrl.o pll_spectrum.o umc_init.o ddrphy_init.o + pll_spectrum.o umc_init.o ddrphy_init.o obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o else diff --git a/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c deleted file mode 100644 index e78d6ab..0000000 diff --git a/arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c deleted file mode 100644 index 28cc429..0000000 diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/spl.c index a34d3a1..86764bc 100644 --- a/arch/arm/mach-uniphier/spl.c +++ b/arch/arm/mach-uniphier/spl.c @@ -15,6 +15,11 @@ void __weak bcu_init(void) { }; + +void __weak early_pin_init(void) +{ +}; + void sbc_init(void); void sg_init(void); void pll_init(void);
+Stephen FYI
On 1 September 2015 at 07:50, Masahiro Yamada yamada.masahiro@socionext.com wrote:
As the UniPhier serial driver had already switched to Drive Model and the pinctrl drivers are now enabled, these pin-muxing settings are handled by the pinctrl drivers.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com
arch/arm/mach-uniphier/ph1-ld4/Makefile | 2 +- arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c | 27 ------------------------- arch/arm/mach-uniphier/ph1-pro4/Makefile | 2 +- arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c | 26 ------------------------ arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c | 27 ------------------------- arch/arm/mach-uniphier/spl.c | 5 +++++ 6 files changed, 7 insertions(+), 82 deletions(-) delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c delete mode 100644 arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c
Reviewed-by: Simon Glass sjg@chromium.org
diff --git a/arch/arm/mach-uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile index 1410b12..789820e 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/Makefile +++ b/arch/arm/mach-uniphier/ph1-ld4/Makefile @@ -5,7 +5,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += bcu_init.o sg_init.o pll_init.o early_clkrst_init.o \
early_pinctrl.o pll_spectrum.o umc_init.o ddrphy_init.o
pll_spectrum.o umc_init.o ddrphy_init.oobj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o else diff --git a/arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c deleted file mode 100644 index e5e86bb..0000000 diff --git a/arch/arm/mach-uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile index 229f443..7fdb36a 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/Makefile +++ b/arch/arm/mach-uniphier/ph1-pro4/Makefile @@ -5,7 +5,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += sg_init.o pll_init.o early_clkrst_init.o \
early_pinctrl.o pll_spectrum.o umc_init.o ddrphy_init.o
pll_spectrum.o umc_init.o ddrphy_init.oobj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o else diff --git a/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c deleted file mode 100644 index e78d6ab..0000000 diff --git a/arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c deleted file mode 100644 index 28cc429..0000000 diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/spl.c index a34d3a1..86764bc 100644 --- a/arch/arm/mach-uniphier/spl.c +++ b/arch/arm/mach-uniphier/spl.c @@ -15,6 +15,11 @@ void __weak bcu_init(void) { };
+void __weak early_pin_init(void) +{ +};
void sbc_init(void); void sg_init(void); void pll_init(void); -- 1.9.1
Historically (for compatibility with very old platforms), two different types of micro support cards have been used with the UniPhier SoC development boards. It has been painful to maintain both. Having one of them is enough.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/mach-uniphier/Kconfig | 23 ++----- arch/arm/mach-uniphier/Makefile | 3 +- arch/arm/mach-uniphier/include/mach/board.h | 3 +- arch/arm/mach-uniphier/ph1-ld4/Makefile | 3 +- arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c | 49 --------------- arch/arm/mach-uniphier/ph1-pro4/Makefile | 3 +- arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c | 42 ------------- arch/arm/mach-uniphier/ph1-sld3/Makefile | 3 +- arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c | 37 ----------- arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c | 57 ----------------- arch/arm/mach-uniphier/support_card.c | 87 +++----------------------- configs/ph1_ld4_defconfig | 2 +- configs/ph1_pro4_defconfig | 2 +- configs/ph1_sld3_defconfig | 2 +- configs/ph1_sld8_defconfig | 2 +- include/configs/uniphier.h | 19 ++---- 16 files changed, 28 insertions(+), 309 deletions(-) delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c delete mode 100644 arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 7b49ad3..28d574f 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -26,29 +26,14 @@ config MACH_PH1_SLD8
endchoice
-choice - prompt "UniPhier Support Card select" - optional - -config PFC_MICRO_SUPPORT_CARD - bool "Support card with PFC CPLD" - help - This option provides support for the expansion board with PFC - original address mapping. - - Say Y to use the on-board UART, Ether, LED devices. - -config DCC_MICRO_SUPPORT_CARD - bool "Support card with DCC CPLD" +config MICRO_SUPPORT_CARD + bool "Use Micro Support Card" help - This option provides support for the expansion board with DCC- - arranged address mapping that is compatible with legacy UniPhier - reference boards. + This option provides support for the expansion board, available + on some UniPhier reference boards.
Say Y to use the on-board UART, Ether, LED devices.
-endchoice - config CMD_PINMON bool "Enable boot mode pins monitor command" default y diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 103db6d..5f17557 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -29,8 +29,7 @@ endif
obj-y += timer.o
-obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += support_card.o -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += support_card.o +obj-$(CONFIG_MICRO_SUPPORT_CARD) += support_card.o
obj-$(CONFIG_MACH_PH1_SLD3) += ph1-sld3/ obj-$(CONFIG_MACH_PH1_LD4) += ph1-ld4/ diff --git a/arch/arm/mach-uniphier/include/mach/board.h b/arch/arm/mach-uniphier/include/mach/board.h index e3cba5b..84ce864 100644 --- a/arch/arm/mach-uniphier/include/mach/board.h +++ b/arch/arm/mach-uniphier/include/mach/board.h @@ -8,8 +8,7 @@ #ifndef ARCH_BOARD_H #define ARCH_BOARD_H
-#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) || \ - defined(CONFIG_DCC_MICRO_SUPPORT_CARD) +#if defined(CONFIG_MICRO_SUPPORT_CARD) void support_card_reset(void); void support_card_init(void); void support_card_late_init(void); diff --git a/arch/arm/mach-uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile index 789820e..616caad 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/Makefile +++ b/arch/arm/mach-uniphier/ph1-ld4/Makefile @@ -6,8 +6,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += bcu_init.o sg_init.o pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o -obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o +obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o else obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o endif diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c deleted file mode 100644 index 5b5958b..0000000 diff --git a/arch/arm/mach-uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile index 7fdb36a..4d316f0 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/Makefile +++ b/arch/arm/mach-uniphier/ph1-pro4/Makefile @@ -6,8 +6,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += sg_init.o pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o -obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o +obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o else obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o endif diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c deleted file mode 100644 index 877ba79..0000000 diff --git a/arch/arm/mach-uniphier/ph1-sld3/Makefile b/arch/arm/mach-uniphier/ph1-sld3/Makefile index aff5d64..e3cb39f 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/Makefile +++ b/arch/arm/mach-uniphier/ph1-sld3/Makefile @@ -6,8 +6,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += bcu_init.o memconf.o sg_init.o pll_init.o early_clkrst_init.o \ early_pinctrl.o pll_spectrum.o umc_init.o -obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o +obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o else obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o endif diff --git a/arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c deleted file mode 100644 index f5e2446..0000000 diff --git a/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c deleted file mode 100644 index c2267c7..0000000 diff --git a/arch/arm/mach-uniphier/support_card.c b/arch/arm/mach-uniphier/support_card.c index ea85b20..4ca6ffe 100644 --- a/arch/arm/mach-uniphier/support_card.c +++ b/arch/arm/mach-uniphier/support_card.c @@ -8,11 +8,9 @@ #include <linux/io.h> #include <mach/board.h>
-#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) - -#define PFC_MICRO_SUPPORT_CARD_RESET \ +#define MICRO_SUPPORT_CARD_RESET \ ((CONFIG_SUPPORT_CARD_BASE) + 0x000D0034) -#define PFC_MICRO_SUPPORT_CARD_REVISION \ +#define MICRO_SUPPORT_CARD_REVISION \ ((CONFIG_SUPPORT_CARD_BASE) + 0x000D00E0) /* * 0: reset deassert, 1: reset @@ -22,65 +20,22 @@ */ void support_card_reset_deassert(void) { - writel(0, PFC_MICRO_SUPPORT_CARD_RESET); + writel(0, MICRO_SUPPORT_CARD_RESET); }
void support_card_reset(void) { - writel(3, PFC_MICRO_SUPPORT_CARD_RESET); + writel(3, MICRO_SUPPORT_CARD_RESET); }
static int support_card_show_revision(void) { u32 revision;
- revision = readl(PFC_MICRO_SUPPORT_CARD_REVISION); - printf("(PFC CPLD version %d.%d)\n", revision >> 4, revision & 0xf); + revision = readl(MICRO_SUPPORT_CARD_REVISION); + printf("(CPLD version %d.%d)\n", revision >> 4, revision & 0xf); return 0; } -#endif - -#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD) - -#define DCC_MICRO_SUPPORT_CARD_RESET_LAN \ - ((CONFIG_SUPPORT_CARD_BASE) + 0x00401300) -#define DCC_MICRO_SUPPORT_CARD_RESET_UART \ - ((CONFIG_SUPPORT_CARD_BASE) + 0x00401304) -#define DCC_MICRO_SUPPORT_CARD_RESET_I2C \ - ((CONFIG_SUPPORT_CARD_BASE) + 0x00401308) -#define DCC_MICRO_SUPPORT_CARD_REVISION \ - ((CONFIG_SUPPORT_CARD_BASE) + 0x005000E0) - -void support_card_reset_deassert(void) -{ - writel(1, DCC_MICRO_SUPPORT_CARD_RESET_LAN); /* LAN and LED */ - writel(1, DCC_MICRO_SUPPORT_CARD_RESET_UART); /* UART */ - writel(1, DCC_MICRO_SUPPORT_CARD_RESET_I2C); /* I2C */ -} - -void support_card_reset(void) -{ - writel(0, DCC_MICRO_SUPPORT_CARD_RESET_LAN); /* LAN and LED */ - writel(0, DCC_MICRO_SUPPORT_CARD_RESET_UART); /* UART */ - writel(0, DCC_MICRO_SUPPORT_CARD_RESET_I2C); /* I2C */ -} - -static int support_card_show_revision(void) -{ - u32 revision; - - revision = readl(DCC_MICRO_SUPPORT_CARD_REVISION); - - if (revision >= 0x67) { - printf("(DCC CPLD version 3.%d.%d)\n", - revision >> 4, revision & 0xf); - return 0; - } else { - printf("(DCC CPLD unknown version)\n"); - return -1; - } -} -#endif
int check_support_card(void) { @@ -146,28 +101,11 @@ static int mem_is_flash(const struct memory_bank *mem) return ret; }
-#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) - /* {address, size} */ -static const struct memory_bank memory_banks_boot_swap_off[] = { +/* {address, size} */ +static const struct memory_bank memory_banks[] = { {0x02000000, 0x01f00000}, };
-static const struct memory_bank memory_banks_boot_swap_on[] = { - {0x00000000, 0x01f00000}, -}; -#endif - -#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD) -static const struct memory_bank memory_banks_boot_swap_off[] = { - {0x04000000, 0x02000000}, -}; - -static const struct memory_bank memory_banks_boot_swap_on[] = { - {0x00000000, 0x02000000}, - {0x04000000, 0x02000000}, -}; -#endif - static const struct memory_bank *flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS_DETECT];
@@ -187,13 +125,8 @@ static void detect_num_flash_banks(void)
cfi_flash_num_flash_banks = 0;
- if (boot_is_swapped()) { - memory_bank = memory_banks_boot_swap_on; - end = memory_bank + ARRAY_SIZE(memory_banks_boot_swap_on); - } else { - memory_bank = memory_banks_boot_swap_off; - end = memory_bank + ARRAY_SIZE(memory_banks_boot_swap_off); - } + memory_bank = memory_banks; + end = memory_bank + ARRAY_SIZE(memory_banks);
for (; memory_bank < end; memory_bank++) { if (cfi_flash_num_flash_banks >= diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 13b124b..e9744a3 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_MACH_PH1_LD4=y -CONFIG_PFC_MICRO_SUPPORT_CARD=y +CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref" CONFIG_HUSH_PARSER=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 0982d91..1b3092d 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_PFC_MICRO_SUPPORT_CARD=y +CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref" CONFIG_HUSH_PARSER=y diff --git a/configs/ph1_sld3_defconfig b/configs/ph1_sld3_defconfig index d495132..df908e2 100644 --- a/configs/ph1_sld3_defconfig +++ b/configs/ph1_sld3_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_MACH_PH1_SLD3=y -CONFIG_PFC_MICRO_SUPPORT_CARD=y +CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld3-ref" CONFIG_HUSH_PARSER=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 584c41a..8151562 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_MACH_PH1_SLD8=y -CONFIG_PFC_MICRO_SUPPORT_CARD=y +CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref" CONFIG_HUSH_PARSER=y diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index d59564b..7316046 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -62,19 +62,10 @@ /* * Support card address map */ -#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) -# define CONFIG_SUPPORT_CARD_BASE 0x03f00000 -# define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000) -# define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00090000) -# define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x000b0000) -#endif - -#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD) -# define CONFIG_SUPPORT_CARD_BASE 0x08000000 -# define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000) -# define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00401630) -# define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00200000) -#endif +#define CONFIG_SUPPORT_CARD_BASE 0x03f00000 +#define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000) +#define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00090000) +#define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x000b0000)
#ifdef CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550 @@ -140,7 +131,7 @@
#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
-#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2 +#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
/* serial console configuration */ #define CONFIG_BAUDRATE 115200
On 1 September 2015 at 07:50, Masahiro Yamada yamada.masahiro@socionext.com wrote:
Historically (for compatibility with very old platforms), two different types of micro support cards have been used with the UniPhier SoC development boards. It has been painful to maintain both. Having one of them is enough.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com
arch/arm/mach-uniphier/Kconfig | 23 ++----- arch/arm/mach-uniphier/Makefile | 3 +- arch/arm/mach-uniphier/include/mach/board.h | 3 +- arch/arm/mach-uniphier/ph1-ld4/Makefile | 3 +- arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c | 49 --------------- arch/arm/mach-uniphier/ph1-pro4/Makefile | 3 +- arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c | 42 ------------- arch/arm/mach-uniphier/ph1-sld3/Makefile | 3 +- arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c | 37 ----------- arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c | 57 ----------------- arch/arm/mach-uniphier/support_card.c | 87 +++----------------------- configs/ph1_ld4_defconfig | 2 +- configs/ph1_pro4_defconfig | 2 +- configs/ph1_sld3_defconfig | 2 +- configs/ph1_sld8_defconfig | 2 +- include/configs/uniphier.h | 19 ++---- 16 files changed, 28 insertions(+), 309 deletions(-) delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c delete mode 100644 arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c
Reviewed-by: Simon Glass sjg@chromium.org
This command will be used in the next commit to calculate base-offseted addresses.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
configs/ph1_ld4_defconfig | 1 - configs/ph1_pro4_defconfig | 1 - configs/ph1_sld3_defconfig | 1 - configs/ph1_sld8_defconfig | 1 - 4 files changed, 4 deletions(-)
diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index e9744a3..899a723 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -12,7 +12,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 1b3092d..139767a 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -11,7 +11,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y diff --git a/configs/ph1_sld3_defconfig b/configs/ph1_sld3_defconfig index df908e2..79ce0e2 100644 --- a/configs/ph1_sld3_defconfig +++ b/configs/ph1_sld3_defconfig @@ -11,7 +11,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 8151562..216d49b 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -12,7 +12,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y
In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces 0x00000000 - 0x0fffffff 0x40000000 - 0x4fffffff are both mapped to the external bus (also called system bus), so either was OK.
In the newest two SoCs, the former (0x00000000 - 0x0fffffff) is assigned for the serial NOR interface.
Going forward, use the latter for the external bus.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/mach-uniphier/ph1-ld4/sbc_init.c | 12 ++++++------ arch/arm/mach-uniphier/ph1-pro4/sbc_init.c | 12 ++++++------ arch/arm/mach-uniphier/ph1-sld3/sbc_init.c | 12 ++++++------ arch/arm/mach-uniphier/support_card.c | 2 +- include/configs/uniphier.h | 7 ++++++- 5 files changed, 25 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c index 8e25792..4435a47 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c @@ -30,18 +30,18 @@ void sbc_init(void) if (boot_is_swapped()) { /* * Boot Swap On: boot from external NOR/SRAM - * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff. + * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. * - * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank - * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals + * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank + * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals */ writel(0x0000bc01, SBBASE0); } else { /* * Boot Swap Off: boot from mask ROM - * 0x00000000-0x01ffffff: mask ROM - * 0x02000000-0x03efffff: memory bank (31MB) - * 0x03f00000-0x03ffffff: peripherals (1MB) + * 0x40000000-0x41ffffff: mask ROM + * 0x42000000-0x43efffff: memory bank (31MB) + * 0x43f00000-0x43ffffff: peripherals (1MB) */ writel(0x0000be01, SBBASE0); /* dummy */ writel(0x0200be01, SBBASE1); diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c index 533739c..685f9c7 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c @@ -23,18 +23,18 @@ void sbc_init(void) if (boot_is_swapped()) { /* * Boot Swap On: boot from external NOR/SRAM - * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff. + * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. * - * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank - * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals + * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank + * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals */ writel(0x0000bc01, SBBASE0); } else { /* * Boot Swap Off: boot from mask ROM - * 0x00000000-0x01ffffff: mask ROM - * 0x02000000-0x03efffff: memory bank (31MB) - * 0x03f00000-0x03ffffff: peripherals (1MB) + * 0x40000000-0x41ffffff: mask ROM + * 0x42000000-0x43efffff: memory bank (31MB) + * 0x43f00000-0x43ffffff: peripherals (1MB) */ writel(0x0000be01, SBBASE0); /* dummy */ writel(0x0200be01, SBBASE1); diff --git a/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c b/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c index d66f89e..bafab4b 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c @@ -24,18 +24,18 @@ void sbc_init(void) if (boot_is_swapped()) { /* * Boot Swap On: boot from external NOR/SRAM - * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff. + * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. * - * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank - * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals + * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank + * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals */ writel(0x0000bc01, SBBASE0); } else { /* * Boot Swap Off: boot from mask ROM - * 0x00000000-0x01ffffff: mask ROM - * 0x02000000-0x03efffff: memory bank (31MB) - * 0x03f00000-0x03ffffff: peripherals (1MB) + * 0x40000000-0x41ffffff: mask ROM + * 0x42000000-0x43efffff: memory bank (31MB) + * 0x43f00000-0x43ffffff: peripherals (1MB) */ writel(0x0000be01, SBBASE0); /* dummy */ writel(0x0200be01, SBBASE1); diff --git a/arch/arm/mach-uniphier/support_card.c b/arch/arm/mach-uniphier/support_card.c index 4ca6ffe..ef4576d 100644 --- a/arch/arm/mach-uniphier/support_card.c +++ b/arch/arm/mach-uniphier/support_card.c @@ -103,7 +103,7 @@ static int mem_is_flash(const struct memory_bank *mem)
/* {address, size} */ static const struct memory_bank memory_banks[] = { - {0x02000000, 0x01f00000}, + {0x42000000, 0x01f00000}, };
static const struct memory_bank diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 7316046..45b39c0 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -62,7 +62,7 @@ /* * Support card address map */ -#define CONFIG_SUPPORT_CARD_BASE 0x03f00000 +#define CONFIG_SUPPORT_CARD_BASE 0x43f00000 #define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000) #define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00090000) #define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x000b0000) @@ -240,6 +240,7 @@ "fit_addr_r=0x84100000\0" \ "fit_size=0x00f00000\0" \ "norboot=run add_default_bootargs &&" \ + "setexpr fit_addr $nor_base + $fit_addr &&" \ "bootm $fit_addr\0" \ "nandboot=run add_default_bootargs &&" \ "nand read $fit_addr_r $fit_addr $fit_size &&" \ @@ -262,6 +263,9 @@ "ramdisk_size=0x00600000\0" \ "ramdisk_file=rootfs.cpio.uboot\0" \ "norboot=run add_default_bootargs &&" \ + "setexpr kernel_addr $nor_base + $kernel_addr &&" \ + "setexpr ramdisk_addr $nor_base + $ramdisk_addr &&" \ + "setexpr fdt_addr $nor_base + $fdt_addr &&" \ "bootm $kernel_addr $ramdisk_addr $fdt_addr\0" \ "nandboot=run add_default_bootargs &&" \ "nand read $kernel_addr_r $kernel_addr $kernel_size &&" \ @@ -278,6 +282,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "verify=n\0" \ + "norbase=0x42000000\0" \ "nandupdate=nand erase 0 0x00100000 &&" \ "tftpboot u-boot-spl-dtb.bin &&" \ "nand write $loadaddr 0 0x00010000 &&" \
On 1 September 2015 at 07:50, Masahiro Yamada yamada.masahiro@socionext.com wrote:
In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces 0x00000000 - 0x0fffffff 0x40000000 - 0x4fffffff are both mapped to the external bus (also called system bus), so either was OK.
In the newest two SoCs, the former (0x00000000 - 0x0fffffff) is assigned for the serial NOR interface.
Going forward, use the latter for the external bus.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com
arch/arm/mach-uniphier/ph1-ld4/sbc_init.c | 12 ++++++------ arch/arm/mach-uniphier/ph1-pro4/sbc_init.c | 12 ++++++------ arch/arm/mach-uniphier/ph1-sld3/sbc_init.c | 12 ++++++------ arch/arm/mach-uniphier/support_card.c | 2 +- include/configs/uniphier.h | 7 ++++++- 5 files changed, 25 insertions(+), 20 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
participants (2)
-
Masahiro Yamada -
Simon Glass