[U-Boot-Users] u-boot 1.1.2 on mpc852t : decrementer exception in interrupt_init()
Hi, I'm trying to port u-boot-1.1.2 to mpc852t on ep852 board (from embedded planet). I'm using RPXClassic as reference. I only changed the config file rest all is RPXClassic stuff.I've put the config file in the end of the post. First of all the console works only on 2400 even if i set baud rate to 9600 in my config.h . If i use any other baud rate i get junk on the screen. The board gives a "decrementer exception" in interrupt_init() in set_msr() in lib_ppc/interrupts.c which takes the code to timer_interrupt() and then to timer_interrupt_cpu(). I get all the messages till "Hit any key to stop autoboot: 5 " at this point it just hangs. When run through debugger (code warrior) , I accept the message (decrementer exception) and continue the execution and all works fine(I get the prompt).
The following is the dump ( i sprinkled the code with *many* printfs) ------------------------------------------------------------------------------------------------------------------------------------------------------------- U-Boot 1.1.2 (Oct 19 2005 - 18:40:16)
CPU: MPC852TxxZPnn at 50 MHz [40.0...50.0 MHz] 4 kB I-Cache 4 kB D-Cache FEC present Board: EP852 DRAM: 16 MB
cpu_clk= 50000000 bus_clk = 50000000 FLASH: Flash addr:ff800000 Device ID :227e227e 16 MB *** Warning - bad CRC, using default environment
Displaying devices : In: serial Out: serial Err: serial
console_init_r done decrementer_count = 3125 in hex 0xc35 entering cpm_interrupt_init entering irq_install_handler with CPMVEC_ERROR irq_install_handler done entering irq_install_handler with INTERRUPT irq_install_handler done cpm_interrupt_init done entering set_dec set_dec done entering set_msr *** Timer Interrupt *** // timer_interrupt_cpu() in cpu/mpc8xx/interrupts immr->im_clkrst.car_plprcr = 39a5000 immr->im_clkrst.car_plprcr = 39a0000 get_dec() = 4294514023l 0xfff91567 Inside timer_interrupt. decrementer_count = 3125 in hex 0xc35 interrupt init passed. setting timer entering initialization from env initialization from env done. entering bootfile stuff bootfile stuff done
Net: FEC ETHERNET
Entering main_loop### main_loop entered: bootdelay=5
### main_loop: bootcmd="tftpboot; setenv bootargs root=/dev/nfs rw nfsroot=$(ser verip):$(rootpath) ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname): :off; bootm" Hit any key to stop autoboot: 5 -------------------------------------------------------------------------------------------------------------------------------------------------- Why is immr->im_clkrst.car_plprcr = 39a5000 when in config.h i define PLPRCR as 0x000A4000 ? Does it matter?
Some of the defines in config.h #define RPXClassic_50MHz#define CONFIG_MPC860 1 #define CONFIG_RPXCLASSIC 1 #define CONFIG_MPC852T 1
#define CONFIG_8xx_OSCLK 10000000 #define CONFIG_8xx_CPUCLK_DEFAULT 50000000 // 50 MHz #define CFG_8xx_CPUCLK_MIN 40000000 // 40 MHz #define CFG_8xx_CPUCLK_MAX 50000000
#define CFG_LOAD_ADDR CFG_SDRAM_BASE #define CFG_IMMR 0xFA200000 #define CFG_SDRAM_BASE 0x00000000 #define CFG_FLASH_BASE 0xFF800000 #define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_SYPCR 0xFFFFFF89 #define CFG_SIUMCR 0x01000800 #define CFG_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTE) #define CFG_PISCR (PISCR_PS | PISCR_PITF | PISCR_PTE) #define CFG_PLPRCR 0x000A4000 // is this OK??
#define CFG_SCCR 0x03020800 #define CFG_DER 0x73E67C0F #define CFG_OR1_PRELIM 0xFF000600 #define CFG_PTA_PER_CLK ((4096 * 32 * 1000) / (4 * 64))
#define CFG_MAMR_PTA 58 #define CFG_MPTPR MPTPR_PTP_DIV2 #define CFG_MAMR_10COL 0x58803000
All the hard coded values are from the configuration file I got along with the board to be used with code warrior and the board works fine with that, so they are right.
Thanks in advance.
Hello Gautam.
gautam borad wrote:
I'm trying to port u-boot-1.1.2 to mpc852t on ep852 board (from embedded planet). I'm using RPXClassic as reference.
I've successfully ported U-boot to EP852 sometime ago. Unfortunately, I still didn't get a chance to update to the latest U-boot so that I could submit the patches officially. These patches are based on a snapshot of U-boot repository made sometime in April 2005, but I hope they should apply more or less cleanly to the current source as well.
Give'em a shot if you want and let me know whether they work for you.
Thanks, Vladimir
Vladimir Gurevich wrote:
Hello Gautam.
gautam borad wrote:
I'm trying to port u-boot-1.1.2 to mpc852t on ep852 board (from embedded planet). I'm using RPXClassic as reference.
I've successfully ported U-boot to EP852 sometime ago. Unfortunately, I still didn't get a chance to update to the latest U-boot so that I could submit the patches officially. These patches are based on a snapshot of U-boot repository made sometime in April 2005, but I hope they should apply more or less cleanly to the current source as well.
Give'em a shot if you want and let me know whether they work for you.
Thanks, Vladimir
Hi, Thanks for giving the patch. I tried using your patch but it doesnt work, i get the following on the console:
-------------------------------------------------------------------------------------------------------------------------------------------------------- U-Boot 1.1.3 (Oct 20 2005 - 15:35:24) EP852
CPU: MPC852TxxZPnn at 50 MHz [25.0...125.0 MHz] 4 kB I-Cache 4 kB D-Cache FEC present
Board: EP852 (Rev. e4). CPLD Rev: 00 DIP Switch: 1111 DRAM: 16 MB FLASH: Bus Fault @ 0x00fab008, fixup 0x00000000 Machine check in kernel mode. Caused by (from msr): regs 00f5bdd8 Unknown values in msr NIP: 00FAB008 XER: 20002800 LR: 00FAAF5C REGS: 00f5bdd8 TRAP: 0200 DAR: 7172EEC4 MSR: 00001002 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00
GPR00: FF800000 00F5BEC8 00000000 0000003E 00FCF314 000000C4 00000059 00002088 GPR08: 00000000 FF800000 FF8000C4 FF8000D0 28000022 000080A0 00FCFF00 0179C000 GPR16: 00800080 40002400 00010000 00000035 00000002 00000047 00000002 00000002 GPR24: 00000000 00FCF430 00FCF43C 00000000 00FCF467 00F5BF8C 00FD0548 00FCF314 Call backtrace: 00FAAE94 00FA9F24 00FA4EA8 00F9E3B0 machine check Bus Fault @ 0x00fa439c, fixup 0x00000000 Machine check in kernel mode. Caused by (from msr): regs 00f5bc18 Unknown values in msr NIP: 00FA439C XER: 00002800 LR: 00FA07F4 REGS: 00f5bc18 TRAP: 0200 DAR: 66D64FEB MSR: 00001002 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00
GPR00: 039A5080 00F5BD08 00000000 00000000 00000000 00000000 00000000 002845D3 GPR08: 00FA3874 FA200000 00000000 00989680 00000000 000080A0 00FCFF00 0179C000 GPR16: 00800080 40002400 00010000 00000035 00001002 00F5BDC8 00000000 00F9E09C GPR24: 00F9E654 00FCF430 00FCF43C 00000000 00FCF467 00F5BF8C 00FCFF24 00F5BDD8 Call backtrace: 00FA3870 00FA07F4 00F9E730 00F9E09C 00FAAE94 00FA9F24 00FA4EA8 00F9E3B0 machine check Bus Fault @ 0x00fa439c, fixup 0x00000000 Machine check in kernel mode. Caused by (from msr): regs 00f5ba58 Unknown values in msr NIP: 00FA439C XER: 00002800 LR: 00FA07F4 REGS: 00f5ba58 TRAP: 0200 DAR: 00F5BDD8 MSR: 00001002 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00
GPR00: 039A5080 00F5BB48 00000000 00000000 00000000 00000000 00000000 0047D480 GPR08: 00FA3874 FA200000 00000000 00989680 00000000 000080A0 00FCFF00 0179C000 GPR16: 008. -------------------------------------------------------------------------------------------------------------------------------------------------------- I realized the problem was cfi_flash when i tried it with u-boot 1.1.2 which also gave the above error.(previously it didnt give the above error) So I took the flash.c file from RPXClassic directory. The board has 2 AMD AM29LV320MB (8 MB each) flash. In the flash.c the auto select command (to read manufactor ID) returns 0x227e227e. However in include/flash.h i have #define AMD_ID_LV320B 0x22F922F9 . 227E227E is defined for AMD_ID_DL640. Why is this so?? I've modified #define AMD_ID_LV320B to 0x227E227E , but is this the right way?? The flash starts at 0xFF800000. Got the following dump: -------------------------------------------------------------------------------------------------------------------------------------------------------- U-Boot 1.1.3 (Oct 20 2005 - 17:29:22) EP852
CPU: MPC852TxxZPnn at 50 MHz [25.0...125.0 MHz] 4 kB I-Cache 4 kB D-Cache FEC present
Board: EP852 (Rev. e4). CPLD Rev: 00 DIP Switch: 1111 DRAM: 16 MB FLASH: Flash addr:ff800000### ERROR ### Please RESET the board ### --------------------------------------------------------------------------------------------------------------------------------------------------------
I've made some modifications to the original config files . Here are the changes:
#define CFG_PRELIM_OR_AM 0xFF800000 #define CFG_OR_TIMING_FLASH (OR_SCY_4_CLK | OR_BI) #define CFG_BR0_PRELIM 0xFF800001 #define CFG_OR1_PRELIM 0xFF000600 #define CFG_MPTPR MPTPR_PTP_DIV2 #define CFG_BR3_PRELIM 0xFA400001 #define CFG_OR3_PRELIM 0xFF7F8970 #define CFG_PLPRCR 0x000A4000
If I dont give these values the board does not work.I got these values from the config file i got from embedded planet. I dont have any other option.Is it OK to modify these values?
Also what actually does U-Boot does when a decrementer exception is generated? Please see my previous post. The code gave a decrementer exception went into timer_interrupt and halted.
Thanks in advance.
Hello Gautam,
gautam borad wrote:
Thanks for giving the patch. I tried using your patch but it doesnt work, i get the following on the console:
Did you apply it to unmodified U-boot snapshot (preferrably 1.1.2)? Did it apply cleanly? Did you do "make EP852_config; make"? How did you program U-boot in the FLASH? What is your BDI-2000 config file (I attached mine here).
U-Boot 1.1.3 (Oct 20 2005 - 15:35:24) EP852
CPU: MPC852TxxZPnn at 50 MHz [25.0...125.0 MHz] 4 kB I-Cache 4 kB D-Cache FEC present
Board: EP852 (Rev. e4). CPLD Rev: 00 DIP Switch: 1111 DRAM: 16 MB FLASH: Bus Fault @ 0x00fab008, fixup 0x00000000
I realized the problem was cfi_flash when i tried it with u-boot 1.1.2 which also gave the above error.(previously it didnt give the above error) So I took the flash.c file from RPXClassic directory. The board has 2 AMD AM29LV320MB (8 MB each) flash. In the flash.c the auto select command (to read manufactor ID) returns 0x227e227e. However in include/flash.h i have #define AMD_ID_LV320B 0x22F922F9 . 227E227E is defined for AMD_ID_DL640. Why is this so?? I've modified #define AMD_ID_LV320B to 0x227E227E , but is this the right way??
Standard CFI driver should handle these chips just fine. I do not think any modifications are needed. However, my board uses 2xAM29LV640MB chips and thus you have to adjust the related parameters (like CFG_FLASH_SIZE and CFG_MAX_FLASH_SECT). Also, watch for CFG_JFFS2_FIRST_SECTOR. It reflects my particular layout.
The flash starts at 0xFF800000.
Well, this is programmable. When the CPU comes out of reset, it is located at 0x0. After that my U-boot port programs CS0 to be 0x04000000 (64M), the same way, say, TQM8xx port does. This is reflected in CFG_FLASH_BASE as well as in TEXT_BASE variable in config.mk
Also what actually does U-Boot does when a decrementer exception is generated?
This is a standard timer interrupt, but since I suspect that your address map is quite screwed, I wouldn't concentrate on that.
Happy hacking, Vladimir
; bdiGDB configuration file for EP852 board ; ----------------------------------------- ; [INIT] ; init core register WREG MSR 0x00001002 ; MSR : ME,RI WSPR 27 0x00001002 ; SRR1 : ME,RI WSPR 149 0x0002000E ; DER : enable SYSIE for BDI flash progr. WSPR 638 0xFFF00000 ; IMMR : internal memory at 0xFFF00000 WSPR 158 0x00000007 ; ICTRL:
; init SIU register WM32 0xFFF00000 0x00610400 ; SIUMCR WM32 0xFFF00004 0xFFFFFF89 ; SYPCR
WSPR 796 0x00000000 ; M_TWB: invalidate TWB
; Init BR0/OR0 to make sure FLASH isn't covering the whole area ;WM32 0xFFF00104 0xFC000140 ; 64MB ;WM32 0xFFF00100 0x00000001 ; Flash at 0x0000000 ; BSCR ;WM32 0xFFF0011C 0xFFFF8970 ; ;WM32 0xFFF00118 0xFA400001 ; BSCR at 0xFA400000 ;WM8 0xFA400000 0xAD ; BSCR[0]. Enable Eth & SMC Xceivers ;WM8 0xFA400002 0xC0 ; BSCR[2]. Enable and power up MII Xceiver
[TARGET] MMU XLAT ; support virtual addresses (for Linux!) PTBASE 0x000000F0 ; ptr to page table pointers CPUCLOCK 50000000 ; the CPU clock rate after processing the init list BDIMODE AGENT ; the BDI working mode (LOADONLY | AGENT) BREAKMODE HARD ; SOFT or HARD, HARD uses PPC hardware breakpoints
[HOST] IP 192.168.1.254 FILE u-boot.bin.ep852 FORMAT BIN LOAD MANUAL ;load code MANUAL or AUTO after reset DEBUGPORT 2001 START 0x0100
[FLASH] CHIPTYPE MIRRORX16 ;; Am29LV CHIPSIZE 0x800000 ;; 640ML BUSWIDTH 32 ;; (x2) WORKSPACE 0xFFF02000
FILE u-boot.bin.ep852 ;The file to program FORMAT BIN 0x00000000 ERASE 0x00000000 BLOCK ERASE 0x00020000 BLOCK
[REGS] DMM1 0xFFF00000 FILE bdi2000/defs/reg860.def
participants (2)
-
gautam borad -
Vladimir Gurevich