On Thu, 2011-03-10 at 16:54 -0600, Peter Tyser wrote:

From: John Schmoller jschmoller@xes-inc.com

The JEDEC DDR3 specification states that the above parameters should be set to a minimum of 4 clocks. The SPD defines the values in nanoseconds, and depending on the clock frequency the value in the SPD can be less than 4 clocks.

Previously, we were only using the values from the SPD, regardless if they were less than 4 clocks. Now, set the timing values to the greater of 4 clocks or the SPD value.

Invalid tRRD, tWTR, and tRTP values were observed on a variety of Freescale CPUs, although no negative side effects were seen from their use.

Signed-off-by: John Schmoller jschmoller@xes-inc.com Signed-off-by: Peter Tyser ptyser@xes-inc.com

---

arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c index 29cea53..8669898 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c @@ -230,8 +230,9 @@ ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd, * eg: tRRD_min = * DDR3-800(1KB page) 80 MTB (10ns) * DDR3-1333(1KB page) 48 MTB (6ns)

• * tRRD is at least 4 mclk independent of operating freq.
  

  */

• pdimm->tRRD_ps = spd->tRRD_min * mtb_ps;

• pdimm->tRRD_ps = max(spd->tRRD_min * mtb_ps, mclk_to_picos(4));

  /*

  • min row precharge delay time

@@ -276,14 +277,14 @@ ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd, * eg: tWTR_min = 40 MTB (7.5ns) - all speed bins. * tWRT is at least 4 mclk independent of operating freq. */

• pdimm->tWTR_ps = spd->tWTR_min * mtb_ps;

• pdimm->tWTR_ps = max(spd->tWTR_min * mtb_ps, mclk_to_picos(4));

  /*

  • min internal read to precharge command delay time
  • eg: tRTP_min = 40 MTB (7.5ns) - all speed bins.
  • tRTP is at least 4 mclk independent of operating freq.

  */

• pdimm->tRTP_ps = spd->tRTP_min * mtb_ps;

• pdimm->tRTP_ps = max(spd->tRTP_min * mtb_ps, mclk_to_picos(4));

  /*

  • Average periodic refresh interval

It is not necessary. The JEDEC spec is enforced in ctrl_regs.c. ddr3_dimm_params.c only parses the raw timing.

York