[U-Boot] [PATCH 0/7 v2] OMAP3: Add some additional improvements and fixes
OMAP3 support recently merged is version from mid december 2008. This patch series adds some additional clean up, fixes and improvements done since then. It brings U-Boot mainline in sync with U-Boot tree of OMAP3 developers ("omap3-dev").
Changes in v2:
- Rebase against commit 6b67962fd69ac0bcdf1a982669a029c2f0a7bcc1 "Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx" u-boot.git main branch - Update git commit message in Pandora pin mux patch - Re-name 'serial' to 'serial#' - In serial number patch, don't copy from a memory to an other, instead just update the pointer - Make beagle_revision_c static local variable and add function to return the value.
This v2 patch series makes all older patches of this series obsolete.
Best regards
Dirk
* Make Overo GPIO114 an input for touchscreen PENDOWN * Make Overo GPIO144-147 readable * Make Overo EHCI pinmux match beagle rev c setup * Adjust pinmux for SMSC911X network chip support * Remove unnecessary GPIO setup * Fix merge error in Makefile
Signed-off-by: Steve Sakoman sakoman@gmail.com Signed-off-by: Dirk Behme dirk.behme@googlemail.com
--- board/omap3/overo/Makefile | 1 + board/omap3/overo/overo.c | 13 ------------- board/omap3/overo/overo.h | 18 ++++++++++-------- 3 files changed, 11 insertions(+), 21 deletions(-)
Index: u-boot-main/board/omap3/overo/overo.h =================================================================== --- u-boot-main.orig/board/omap3/overo/overo.h +++ u-boot-main/board/omap3/overo/overo.h @@ -130,7 +130,8 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\ MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ - MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /*GPMC_nCS3*/\ + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | DIS | M4)) /*GPIO_64*/\ + /* - SMSC911X_NRES*/\ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_nCS3*/\ /*DSS*/\ MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\ @@ -184,7 +185,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\ MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0*/\ MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0*/\ - MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) /*CSI2_DX1*/\ + MUX_VAL(CP(CSI2_DX1), (IEN | PTD | EN | M4)) /*GPIO_114*/\ MUX_VAL(CP(CSI2_DY1), (IEN | PTU | EN | M4)) /*GPIO_115*/\ /*Audio Interface */\ MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\ @@ -218,10 +219,10 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\ MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M1)) /*UART2_TX*/\ MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M1)) /*UART2_RX*/\ - MUX_VAL(CP(UART2_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\ - MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_145*/\ - MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M4)) /*GPIO_146*/\ - MUX_VAL(CP(UART2_RX), (IDIS | PTD | DIS | M4)) /*GPIO_147*/\ + MUX_VAL(CP(UART2_CTS), (IEN | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\ + MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M4)) /*GPIO_145*/\ + MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M4)) /*GPIO_146*/\ + MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M4)) /*GPIO_147*/\ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\ MUX_VAL(CP(UART1_RTS), (IEN | PTU | DIS | M4)) /*GPIO_149*/ \ MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M4)) /*GPIO_150-MMC3_WP*/\ @@ -271,7 +272,8 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\ MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\ MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\ - MUX_VAL(CP(MCSPI1_CS2), (IDIS | PTD | DIS | M4)) /*GPIO_176*/\ + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | DIS | M4)) /*GPIO_176*/\ + /* - SMSC911X_IRQ*/\ MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA2*/\ MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA7*/\ MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA4*/\ @@ -306,7 +308,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(ETK_D8_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT6*/\ MUX_VAL(CP(ETK_D9_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT5*/\ MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\ - MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | EN | M3)) /*HSUSB2_STP*/\ + MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\ MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_DIR*/\ MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_NXT*/\ MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA0*/\ Index: u-boot-main/board/omap3/overo/overo.c =================================================================== --- u-boot-main.orig/board/omap3/overo/overo.c +++ u-boot-main/board/omap3/overo/overo.c @@ -58,21 +58,8 @@ int board_init(void) *****************************************************************************/ int misc_init_r(void) { - gpio_t *gpio5_base = (gpio_t *)OMAP34XX_GPIO5_BASE; - gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE; - power_init_r();
- /* Configure GPIOs to output */ - writel(~((GPIO10) | GPIO9 | GPIO3 | GPIO2), &gpio6_base->oe); - writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | - GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); - - /* Set GPIOs */ - writel(GPIO10 | GPIO9 | GPIO3 | GPIO2, &gpio6_base->setdataout); - writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | - GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); - return 0; }
Index: u-boot-main/board/omap3/overo/Makefile =================================================================== --- u-boot-main.orig/board/omap3/overo/Makefile +++ u-boot-main/board/omap3/overo/Makefile @@ -44,4 +44,5 @@ distclean: clean # defines $(obj).depend target include $(SRCTREE)/rules.mk
+######################################################################### sinclude $(obj).depend
With BeagleBoard revision C some HW changes are introduced (e.g. PinMUX) which might need different software handling. For this, GPIO pin 171 (GPIO module 6, offset 11) can be used to check for board revision. If this pin is low, we have a rev C board. Else it must be a revision Ax or Bx board.
To handle board differences you can call function beagle_get_revision(). E.g.:
if (beagle_get_revision()) {
/* do special revision C stuff here */
}
Signed-off-by: Dirk Behme dirk.behme@googlemail.com
---
Changes in v2:
- Make beagle_revision_c static local variable and add function to return the value.
board/omap3/beagle/beagle.c | 41 +++++++++++++++++++++++++++++++++++++ board/omap3/beagle/beagle.h | 2 + include/asm-arm/arch-omap3/omap3.h | 3 +- 3 files changed, 45 insertions(+), 1 deletion(-)
Index: u-boot-main/board/omap3/beagle/beagle.c =================================================================== --- u-boot-main.orig/board/omap3/beagle/beagle.c +++ u-boot-main/board/omap3/beagle/beagle.c @@ -36,6 +36,8 @@ #include <asm/mach-types.h> #include "beagle.h"
+static int beagle_revision_c; + /****************************************************************************** * Routine: board_init * Description: Early hardware init. @@ -54,6 +56,43 @@ int board_init(void) }
/****************************************************************************** + * Routine: beagle_get_revision + * Description: Return revision of the BeagleBoard this code is running on. + * If it is a revision Ax/Bx board, this function returns 0, + * on a revision C board you will get a 1. + *****************************************************************************/ +int beagle_get_revision(void) +{ + return beagle_revision_c; +} + +/****************************************************************************** + * Routine: beagle_identify + * Description: Detect if we are running on a Beagle revision Ax/Bx or + * Cx. This can be done by GPIO_171. If this is low, we are + * running on a revision C board. + *****************************************************************************/ +void beagle_identify(void) +{ + gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE; + + /* Configure GPIO 171 as input */ + writel(readl(&gpio6_base->oe) | GPIO11, &gpio6_base->oe); + + /* Get value of GPIO 171 */ + beagle_revision_c = readl(&gpio6_base->datain) & BOARD_REVISION_MASK; + + printf("Board revision "); + if (beagle_revision_c) { + printf("Ax/Bx\n"); + beagle_revision_c = 0; + } else { + printf("C\n"); + beagle_revision_c = 1; + } +} + +/****************************************************************************** * Routine: misc_init_r * Description: Configure board specific parts *****************************************************************************/ @@ -75,6 +114,8 @@ int misc_init_r(void) writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
+ beagle_identify(); + return 0; }
Index: u-boot-main/board/omap3/beagle/beagle.h =================================================================== --- u-boot-main.orig/board/omap3/beagle/beagle.h +++ u-boot-main/board/omap3/beagle/beagle.h @@ -36,6 +36,8 @@ const omap3_sysinfo sysinfo = { #endif };
+#define BOARD_REVISION_MASK (0x1 << 11) + /* * IEN - Input Enable * IDIS - Input Disable Index: u-boot-main/include/asm-arm/arch-omap3/omap3.h =================================================================== --- u-boot-main.orig/include/asm-arm/arch-omap3/omap3.h +++ u-boot-main/include/asm-arm/arch-omap3/omap3.h @@ -97,7 +97,8 @@ typedef struct s32ktimer { typedef struct gpio { unsigned char res1[0x34]; unsigned int oe; /* 0x34 */ - unsigned char res2[0x58]; + unsigned int datain; /* 0x38 */ + unsigned char res2[0x54]; unsigned int cleardataout; /* 0x90 */ unsigned int setdataout; /* 0x94 */ } gpio_t;
This patch adds OMAP3 cpu type auto detection based on OMAP3 register and removes hardcoded values.
Signed-off-by: Steve Sakoman sakoman@gmail.com Signed-off-by: Dirk Behme dirk.behme@googlemail.com
--- board/omap3/beagle/beagle.h | 1 - board/omap3/evm/evm.h | 1 - board/omap3/overo/overo.h | 1 - board/omap3/pandora/pandora.h | 1 - board/omap3/zoom1/zoom1.h | 1 - cpu/arm_cortexa8/omap3/sys_info.c | 31 +++++++++++++++++++++++++++++-- include/asm-arm/arch-omap3/cpu.h | 20 ++++++++++++++++++++ include/asm-arm/arch-omap3/sys_proto.h | 1 - 8 files changed, 49 insertions(+), 8 deletions(-)
Index: u-boot-main/include/asm-arm/arch-omap3/cpu.h =================================================================== --- u-boot-main.orig/include/asm-arm/arch-omap3/cpu.h +++ u-boot-main/include/asm-arm/arch-omap3/cpu.h @@ -35,11 +35,31 @@ typedef struct ctrl { unsigned short gpmc_nwe; /* 0xC4 */ unsigned char res2[0x22A]; unsigned int status; /* 0x2F0 */ + unsigned int gpstatus; /* 0x2F4 */ + unsigned char res3[0x08]; + unsigned int rpubkey_0; /* 0x300 */ + unsigned int rpubkey_1; /* 0x304 */ + unsigned int rpubkey_2; /* 0x308 */ + unsigned int rpubkey_3; /* 0x30C */ + unsigned int rpubkey_4; /* 0x310 */ + unsigned char res4[0x04]; + unsigned int randkey_0; /* 0x318 */ + unsigned int randkey_1; /* 0x31C */ + unsigned int randkey_2; /* 0x320 */ + unsigned int randkey_3; /* 0x324 */ + unsigned char res5[0x124]; + unsigned int ctrl_omap_stat; /* 0x44C */ } ctrl_t; #else /* __ASSEMBLY__ */ #define CONTROL_STATUS 0x2F0 #endif /* __ASSEMBLY__ */
+/* cpu type */ +#define OMAP3503 0x5c00 +#define OMAP3515 0x1c00 +#define OMAP3525 0x4c00 +#define OMAP3530 0x0c00 + /* device type */ #define DEVICE_MASK (0x7 << 8) #define SYSBOOT_MASK 0x1F Index: u-boot-main/cpu/arm_cortexa8/omap3/sys_info.c =================================================================== --- u-boot-main.orig/cpu/arm_cortexa8/omap3/sys_info.c +++ u-boot-main/cpu/arm_cortexa8/omap3/sys_info.c @@ -37,6 +37,14 @@ static sdrc_t *sdrc_base = (sdrc_t *)OMA static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
/****************************************** + * get_cpu_type(void) - extract cpu info + ******************************************/ +u32 get_cpu_type(void) +{ + return readl(&ctrl_base->ctrl_omap_stat); +} + +/****************************************** * get_cpu_rev(void) - extract version info ******************************************/ u32 get_cpu_rev(void) @@ -156,7 +164,25 @@ u32 get_board_rev(void) *********************************************************************/ void display_board_info(u32 btype) { - char *mem_s, *sec_s; + char *cpu_s, *mem_s, *sec_s; + + switch (get_cpu_type()) { + case OMAP3503: + cpu_s = "3503"; + break; + case OMAP3515: + cpu_s = "3515"; + break; + case OMAP3525: + cpu_s = "3525"; + break; + case OMAP3530: + cpu_s = "3530"; + break; + default: + cpu_s = "35XX"; + break; + }
if (is_mem_sdr()) mem_s = "mSDR"; @@ -180,7 +206,8 @@ void display_board_info(u32 btype) sec_s = "?"; }
- printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", sysinfo.cpu_string, + + printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", cpu_s, sec_s, get_cpu_rev()); printf("%s + %s/%s\n", sysinfo.board_string, mem_s, sysinfo.nand_string); Index: u-boot-main/board/omap3/beagle/beagle.h =================================================================== --- u-boot-main.orig/board/omap3/beagle/beagle.h +++ u-boot-main/board/omap3/beagle/beagle.h @@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = { SDP_3430_V1, SDP_3430_V2, DDR_STACKED, - "3530", "OMAP3 Beagle board", #if defined(CONFIG_ENV_IS_IN_ONENAND) "OneNAND", Index: u-boot-main/board/omap3/evm/evm.h =================================================================== --- u-boot-main.orig/board/omap3/evm/evm.h +++ u-boot-main/board/omap3/evm/evm.h @@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = { OMAP3EVM_V1, OMAP3EVM_V2, DDR_DISCRETE, - "35X-Family", "OMAP3 EVM board", #if defined(CONFIG_ENV_IS_IN_ONENAND) "OneNAND", Index: u-boot-main/board/omap3/overo/overo.h =================================================================== --- u-boot-main.orig/board/omap3/overo/overo.h +++ u-boot-main/board/omap3/overo/overo.h @@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = { SDP_3430_V1, SDP_3430_V2, DDR_STACKED, - "3503", "Gumstix Overo board", #if defined(CONFIG_ENV_IS_IN_ONENAND) "OneNAND", Index: u-boot-main/board/omap3/pandora/pandora.h =================================================================== --- u-boot-main.orig/board/omap3/pandora/pandora.h +++ u-boot-main/board/omap3/pandora/pandora.h @@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = { SDP_3430_V1, SDP_3430_V2, DDR_STACKED, - "3530", "OMAP3 Pandora", "NAND", }; Index: u-boot-main/board/omap3/zoom1/zoom1.h =================================================================== --- u-boot-main.orig/board/omap3/zoom1/zoom1.h +++ u-boot-main/board/omap3/zoom1/zoom1.h @@ -31,7 +31,6 @@ const omap3_sysinfo sysinfo = { SDP_3430_V1, SDP_3430_V2, DDR_STACKED, - "3430", "OMAP3 Zoom MDK Rev 1", "NAND", }; Index: u-boot-main/include/asm-arm/arch-omap3/sys_proto.h =================================================================== --- u-boot-main.orig/include/asm-arm/arch-omap3/sys_proto.h +++ u-boot-main/include/asm-arm/arch-omap3/sys_proto.h @@ -25,7 +25,6 @@ typedef struct { u32 board_type_v1; u32 board_type_v2; u32 mtype; - char *cpu_string; char *board_string; char *nand_string; } omap3_sysinfo;
Clock pin must have input enabled for MMC3 to work. Also enable pull-ups for cmd/data lines to be consistent with remaining MMC host pin setup.
Signed-off-by: Grazvydas Ignotas notasas@gmail.com
--- Changes in v2: No patch changes, update git commit message above.
board/omap3/pandora/pandora.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
Index: u-boot-main/board/omap3/pandora/pandora.h =================================================================== --- u-boot-main.orig/board/omap3/pandora/pandora.h +++ u-boot-main/board/omap3/pandora/pandora.h @@ -199,12 +199,12 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M1)) /*MMC2_CLKIN*/\ MUX_VAL(CP(MMC1_DAT5), (IEN | PTD | DIS | M4)) /*GPIO_127 - MMC2_WP*/\ /*SDIO Interface to WIFI Module*/\ - MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M2)) /*MMC3_CLK*/\ - MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTD | DIS | M2)) /*MMC3_CMD*/\ - MUX_VAL(CP(ETK_D4_ES2), (IEN | PTD | DIS | M2)) /*MMC3_DAT0*/\ - MUX_VAL(CP(ETK_D5_ES2), (IEN | PTD | DIS | M2)) /*MMC3_DAT1*/\ - MUX_VAL(CP(ETK_D6_ES2), (IEN | PTD | DIS | M2)) /*MMC3_DAT2*/\ - MUX_VAL(CP(ETK_D3_ES2), (IEN | PTD | DIS | M2)) /*MMC3_DAT3*/\ + MUX_VAL(CP(ETK_CLK_ES2), (IEN | PTD | DIS | M2)) /*MMC3_CLK*/\ + MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M2)) /*MMC3_CMD*/\ + MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT0*/\ + MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT1*/\ + MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT2*/\ + MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT3*/\ /*Audio Interface To Bluetooth chip*/\ MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\ MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M0)) /*McBSP3_DR*/\
Add serial number based on OMAP3 die ID.
Signed-off-by: Dirk Behme dirk.behme@googlemail.com
--- Changes in v2:
- Rename 'serial' to 'serial#' - Don't copy from a memory to an other, instead just update the pointer
board/omap3/beagle/beagle.c | 2 ++ board/omap3/evm/evm.c | 2 ++ board/omap3/overo/overo.c | 2 ++ board/omap3/pandora/pandora.c | 2 ++ board/omap3/zoom1/zoom1.c | 1 + cpu/arm_cortexa8/omap3/sys_info.c | 26 ++++++++++++++++++++++++++ include/asm-arm/arch-omap3/cpu.h | 13 +++++++++++++ include/asm-arm/arch-omap3/omap3.h | 1 + include/asm-arm/arch-omap3/sys_proto.h | 1 + 9 files changed, 50 insertions(+)
Index: u-boot-main/cpu/arm_cortexa8/omap3/sys_info.c =================================================================== --- u-boot-main.orig/cpu/arm_cortexa8/omap3/sys_info.c +++ u-boot-main/cpu/arm_cortexa8/omap3/sys_info.c @@ -36,6 +36,32 @@ static gpmc_csx_t *gpmc_cs_base = (gpmc_ static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE; static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
+/***************************************************************** + * serial_num_r(void) - read and set serial number based on DIE ID + *****************************************************************/ +void serial_num_r(void) +{ + ctrl_id_t *id_base = (ctrl_id_t *)OMAP34XX_ID_L4_IO_BASE; + char *uid_s, die_id[34]; + u32 id[4]; + + memset(die_id, 0, sizeof(die_id)); + + uid_s = getenv("serial#"); + + if (uid_s == NULL) { + id[3] = readl(&id_base->die_id_0); + id[2] = readl(&id_base->die_id_1); + id[1] = readl(&id_base->die_id_2); + id[0] = readl(&id_base->die_id_3); + sprintf(die_id, "%08x%08x%08x%08x", id[0], id[1], id[2], id[3]); + setenv("serial#", die_id); + uid_s = die_id; + } + + printf("Serial #%s\n", uid_s); +} + /****************************************** * get_cpu_type(void) - extract cpu info ******************************************/ Index: u-boot-main/include/asm-arm/arch-omap3/cpu.h =================================================================== --- u-boot-main.orig/include/asm-arm/arch-omap3/cpu.h +++ u-boot-main/include/asm-arm/arch-omap3/cpu.h @@ -60,6 +60,19 @@ typedef struct ctrl { #define OMAP3525 0x4c00 #define OMAP3530 0x0c00
+#ifndef __ASSEMBLY__ +typedef struct ctrl_id { + unsigned char res1[0x4]; + unsigned int idcode; /* 0x04 */ + unsigned int prod_id; /* 0x08 */ + unsigned char res2[0x0C]; + unsigned int die_id_0; /* 0x18 */ + unsigned int die_id_1; /* 0x1C */ + unsigned int die_id_2; /* 0x20 */ + unsigned int die_id_3; /* 0x24 */ +} ctrl_id_t; +#endif /* __ASSEMBLY__ */ + /* device type */ #define DEVICE_MASK (0x7 << 8) #define SYSBOOT_MASK 0x1F Index: u-boot-main/include/asm-arm/arch-omap3/omap3.h =================================================================== --- u-boot-main.orig/include/asm-arm/arch-omap3/omap3.h +++ u-boot-main/include/asm-arm/arch-omap3/omap3.h @@ -43,6 +43,7 @@ */ #define OMAP34XX_CORE_L4_IO_BASE 0x48000000 #define OMAP34XX_WAKEUP_L4_IO_BASE 0x48300000 +#define OMAP34XX_ID_L4_IO_BASE 0x4830A200 #define OMAP34XX_L4_PER 0x49000000 #define OMAP34XX_L4_IO_BASE OMAP34XX_CORE_L4_IO_BASE
Index: u-boot-main/board/omap3/overo/overo.c =================================================================== --- u-boot-main.orig/board/omap3/overo/overo.c +++ u-boot-main/board/omap3/overo/overo.c @@ -60,6 +60,8 @@ int misc_init_r(void) { power_init_r();
+ serial_num_r(); + return 0; }
Index: u-boot-main/board/omap3/beagle/beagle.c =================================================================== --- u-boot-main.orig/board/omap3/beagle/beagle.c +++ u-boot-main/board/omap3/beagle/beagle.c @@ -116,6 +116,8 @@ int misc_init_r(void)
beagle_identify();
+ serial_num_r(); + return 0; }
Index: u-boot-main/board/omap3/evm/evm.c =================================================================== --- u-boot-main.orig/board/omap3/evm/evm.c +++ u-boot-main/board/omap3/evm/evm.c @@ -68,6 +68,8 @@ int misc_init_r(void) setup_net_chip(); #endif
+ serial_num_r(); + return 0; }
Index: u-boot-main/include/asm-arm/arch-omap3/sys_proto.h =================================================================== --- u-boot-main.orig/include/asm-arm/arch-omap3/sys_proto.h +++ u-boot-main/include/asm-arm/arch-omap3/sys_proto.h @@ -66,5 +66,6 @@ void sdelay(unsigned long); void make_cs1_contiguous(void); void omap_nand_switch_ecc(int); void power_init_r(void); +void serial_num_r(void);
#endif Index: u-boot-main/board/omap3/pandora/pandora.c =================================================================== --- u-boot-main.orig/board/omap3/pandora/pandora.c +++ u-boot-main/board/omap3/pandora/pandora.c @@ -77,6 +77,8 @@ int misc_init_r(void) writel(GPIO28, &gpio5_base->setdataout); writel(GPIO4, &gpio6_base->setdataout);
+ serial_num_r(); + return 0; }
Index: u-boot-main/board/omap3/zoom1/zoom1.c =================================================================== --- u-boot-main.orig/board/omap3/zoom1/zoom1.c +++ u-boot-main/board/omap3/zoom1/zoom1.c @@ -61,6 +61,7 @@ int board_init(void) int misc_init_r(void) { power_init_r(); + serial_num_r(); return 0; }
OMAP3 core changes necessary for MUSB
Signed-off-by: Dirk Behme dirk.behme@googlemail.com
--- Note: OMAP3 USB code will be sent later to USB maintainer, so CONFIG_MUSB isn't used anywhere yet. This will avoid USB maintainer to change OMAP3 core files.
cpu/arm_cortexa8/omap3/clock.c | 5 +++++ include/asm-arm/arch-omap3/cpu.h | 2 ++ include/asm-arm/arch-omap3/omap3.h | 11 +++++++++++ 3 files changed, 18 insertions(+)
Index: u-boot-main/cpu/arm_cortexa8/omap3/clock.c =================================================================== --- u-boot-main.orig/cpu/arm_cortexa8/omap3/clock.c +++ u-boot-main/cpu/arm_cortexa8/omap3/clock.c @@ -377,5 +377,10 @@ void per_clocks_enable(void) sr32(&prcm_base->fclken_per, 0, 32, FCK_PER_ON); sr32(&prcm_base->iclken_per, 0, 32, ICK_PER_ON);
+#ifdef CONFIG_MUSB + /* Enable the MUSB interface clock */ + sr32(&prcm_base->iclken1_core, 4, 1, 0x1); +#endif + sdelay(1000); } Index: u-boot-main/include/asm-arm/arch-omap3/cpu.h =================================================================== --- u-boot-main.orig/include/asm-arm/arch-omap3/cpu.h +++ u-boot-main/include/asm-arm/arch-omap3/cpu.h @@ -432,4 +432,6 @@ typedef struct pm { #define I2C_BASE2 (OMAP34XX_CORE_L4_IO_BASE + 0x72000) #define I2C_BASE3 (OMAP34XX_CORE_L4_IO_BASE + 0x60000)
+#define UDC_BASE (OMAP34XX_CORE_L4_IO_BASE + 0xAB000) + #endif /* _CPU_H */ Index: u-boot-main/include/asm-arm/arch-omap3/omap3.h =================================================================== --- u-boot-main.orig/include/asm-arm/arch-omap3/omap3.h +++ u-boot-main/include/asm-arm/arch-omap3/omap3.h @@ -3,6 +3,7 @@ * Texas Instruments, <www.ti.com> * Richard Woodruff r-woodruff2@ti.com * Syed Mohammed Khasim x0khasim@ti.com + * Atin Malaviya atin.malaviya@gmail.com * * See file CREDITS for list of people who contributed to this * project. @@ -200,6 +201,7 @@ typedef struct gpio { #define LEDBPWM (0x1 << 5)
/* I2C ID4 (slave4) register */ +#define PROTECT_KEY 0x44 #define VAUX2_DEV_GRP 0x76 #define VAUX2_DEDICATED 0x79 #define VAUX3_DEV_GRP 0x7A @@ -209,6 +211,15 @@ typedef struct gpio { #define VDAC_DEV_GRP 0x96 #define VDAC_DEDICATED 0x99
+#define VUSB1V5_DEV_GRP 0xCC +#define VUSB1V5_TYPE 0xCD +#define VUSB1V8_DEV_GRP 0xCF +#define VUSB1V8_TYPE 0xD0 +#define VUSB3V1_DEV_GRP 0xD2 +#define VUSB3V1_TYPE 0xD3 +#define VUSB_DEDICATED1 0xD8 +#define VUSB_DEDICATED2 0xD9 + #define DEV_GRP_P1 0x20 #define DEV_GRP_ALL 0xE0
Clean up OMAP3 MMC code:
* Convert register access to struct & readx/writex style * Replace hardcode values by macros * Remove macro defined twice
Signed-off-by: Dirk Behme dirk.behme@googlemail.com
--- drivers/mmc/omap3_mmc.c | 145 +++++++++++++++--------------- include/asm-arm/arch-omap3/mmc_host_def.h | 64 ++++++++----- include/asm-arm/arch-omap3/omap3.h | 3 3 files changed, 118 insertions(+), 94 deletions(-)
Index: u-boot-main/include/asm-arm/arch-omap3/mmc_host_def.h =================================================================== --- u-boot-main.orig/include/asm-arm/arch-omap3/mmc_host_def.h +++ u-boot-main/include/asm-arm/arch-omap3/mmc_host_def.h @@ -25,30 +25,50 @@ #ifndef MMC_HOST_DEF_H #define MMC_HOST_DEF_H
+/* T2 Register definitions */ +#define T2_BASE 0x48002000 + +typedef struct t2 { + unsigned char res1[0x274]; + unsigned int devconf0; /* 0x274 */ + unsigned char res2[0x2A8]; + unsigned int pbias_lite; /* 0x520 */ +} t2_t; + +#define MMCSDIO1ADPCLKISEL (1 << 24) + +#define PBIASLITEPWRDNZ0 (1 << 1) +#define PBIASSPEEDCTRL0 (1 << 2) +#define PBIASLITEPWRDNZ1 (1 << 9) + /* * OMAP HSMMC register definitions */ -#define OMAP_HSMMC_SYSCONFIG (*(unsigned int *) 0x4809C010) -#define OMAP_HSMMC_SYSSTATUS (*(unsigned int *) 0x4809C014) -#define OMAP_HSMMC_CON (*(unsigned int *) 0x4809C02C) -#define OMAP_HSMMC_BLK (*(unsigned int *) 0x4809C104) -#define OMAP_HSMMC_ARG (*(unsigned int *) 0x4809C108) -#define OMAP_HSMMC_CMD (*(unsigned int *) 0x4809C10C) -#define OMAP_HSMMC_RSP10 (*(unsigned int *) 0x4809C110) -#define OMAP_HSMMC_RSP32 (*(unsigned int *) 0x4809C114) -#define OMAP_HSMMC_RSP54 (*(unsigned int *) 0x4809C118) -#define OMAP_HSMMC_RSP76 (*(unsigned int *) 0x4809C11C) -#define OMAP_HSMMC_DATA (*(unsigned int *) 0x4809C120) -#define OMAP_HSMMC_PSTATE (*(unsigned int *) 0x4809C124) -#define OMAP_HSMMC_HCTL (*(unsigned int *) 0x4809C128) -#define OMAP_HSMMC_SYSCTL (*(unsigned int *) 0x4809C12C) -#define OMAP_HSMMC_STAT (*(unsigned int *) 0x4809C130) -#define OMAP_HSMMC_IE (*(unsigned int *) 0x4809C134) -#define OMAP_HSMMC_CAPA (*(unsigned int *) 0x4809C140) +#define OMAP_HSMMC_BASE 0x4809C000
-/* T2 Register definitions */ -#define CONTROL_DEV_CONF0 (*(unsigned int *) 0x48002274) -#define CONTROL_PBIAS_LITE (*(unsigned int *) 0x48002520) +typedef struct hsmmc { + unsigned char res1[0x10]; + unsigned int sysconfig; /* 0x10 */ + unsigned int sysstatus; /* 0x14 */ + unsigned char res2[0x14]; + unsigned int con; /* 0x2C */ + unsigned char res3[0xD4]; + unsigned int blk; /* 0x104 */ + unsigned int arg; /* 0x108 */ + unsigned int cmd; /* 0x10C */ + unsigned int rsp10; /* 0x110 */ + unsigned int rsp32; /* 0x114 */ + unsigned int rsp54; /* 0x118 */ + unsigned int rsp76; /* 0x11C */ + unsigned int data; /* 0x120 */ + unsigned int pstate; /* 0x124 */ + unsigned int hctl; /* 0x128 */ + unsigned int sysctl; /* 0x12C */ + unsigned int stat; /* 0x130 */ + unsigned int ie; /* 0x134 */ + unsigned char res4[0x8]; + unsigned int capa; /* 0x140 */ +} hsmmc_t;
/* * OMAP HS MMC Bit definitions @@ -159,8 +179,6 @@ typedef struct { } mmc_card_data;
#define mmc_reg_out(addr, mask, val)\ - (addr) = (((addr)) & (~(mask))) | ((val) & (mask)); -#define mmc_reg_out(addr, mask, val)\ - (addr) = (((addr)) & (~(mask))) | ((val) & (mask)); + writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
#endif /* MMC_HOST_DEF_H */ Index: u-boot-main/drivers/mmc/omap3_mmc.c =================================================================== --- u-boot-main.orig/drivers/mmc/omap3_mmc.c +++ u-boot-main/drivers/mmc/omap3_mmc.c @@ -28,6 +28,7 @@ #include <mmc.h> #include <part.h> #include <i2c.h> +#include <asm/io.h>
const unsigned short mmc_transspeed_val[15][4] = { {CLKD(10, 1), CLKD(10, 10), CLKD(10, 100), CLKD(10, 1000)}, @@ -49,6 +50,7 @@ const unsigned short mmc_transspeed_val[
mmc_card_data cur_card_data; static block_dev_desc_t mmc_blk_dev; +static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC_BASE;
block_dev_desc_t *mmc_get_dev(int dev) { @@ -59,55 +61,49 @@ void twl4030_mmc_config(void) { unsigned char data;
- data = 0x20; - i2c_write(0x4B, 0x82, 1, &data, 1); - data = 0x2; - i2c_write(0x4B, 0x85, 1, &data, 1); + data = DEV_GRP_P1; + i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEV_GRP, 1, &data, 1); + data = VMMC1_VSEL_30; + i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEDICATED, 1, &data, 1); }
unsigned char mmc_board_init(void) { - unsigned int value = 0; + t2_t *t2_base = (t2_t *)T2_BASE;
twl4030_mmc_config();
- value = CONTROL_PBIAS_LITE; - CONTROL_PBIAS_LITE = value | (1 << 2) | (1 << 1) | (1 << 9); + writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 | + PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, + &t2_base->pbias_lite);
- value = CONTROL_DEV_CONF0; - CONTROL_DEV_CONF0 = value | (1 << 24); + writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL, + &t2_base->devconf0);
return 1; }
void mmc_init_stream(void) { - volatile unsigned int mmc_stat; + writel(readl(&mmc_base->con) | INIT_INITSTREAM, &mmc_base->con);
- OMAP_HSMMC_CON |= INIT_INITSTREAM; + writel(MMC_CMD0, &mmc_base->cmd); + while (!(readl(&mmc_base->stat) & CC_MASK));
- OMAP_HSMMC_CMD = MMC_CMD0; - do { - mmc_stat = OMAP_HSMMC_STAT; - } while (!(mmc_stat & CC_MASK)); - - OMAP_HSMMC_STAT = CC_MASK; + writel(CC_MASK, &mmc_base->stat);
- OMAP_HSMMC_CMD = MMC_CMD0; - do { - mmc_stat = OMAP_HSMMC_STAT; - } while (!(mmc_stat & CC_MASK)); + writel(MMC_CMD0, &mmc_base->cmd); + while (!(readl(&mmc_base->stat) & CC_MASK));
- OMAP_HSMMC_STAT = OMAP_HSMMC_STAT; - OMAP_HSMMC_CON &= ~INIT_INITSTREAM; + writel(readl(&mmc_base->con) & ~INIT_INITSTREAM, &mmc_base->con); }
unsigned char mmc_clock_config(unsigned int iclk, unsigned short clk_div) { unsigned int val;
- mmc_reg_out(OMAP_HSMMC_SYSCTL, (ICE_MASK | DTO_MASK | CEN_MASK), - (ICE_STOP | DTO_15THDTO | CEN_DISABLE)); + mmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK), + (ICE_STOP | DTO_15THDTO | CEN_DISABLE));
switch (iclk) { case CLK_INITSEQ: @@ -122,12 +118,12 @@ unsigned char mmc_clock_config(unsigned default: return 0; } - mmc_reg_out(OMAP_HSMMC_SYSCTL, - ICE_MASK | CLKD_MASK, (val << CLKD_OFFSET) | ICE_OSCILLATE); + mmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK, + (val << CLKD_OFFSET) | ICE_OSCILLATE);
- while ((OMAP_HSMMC_SYSCTL & ICS_MASK) == ICS_NOTREADY) ; + while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY);
- OMAP_HSMMC_SYSCTL |= CEN_ENABLE; + writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl); return 1; }
@@ -137,59 +133,63 @@ unsigned char mmc_init_setup(void)
mmc_board_init();
- OMAP_HSMMC_SYSCONFIG |= MMC_SOFTRESET; - while ((OMAP_HSMMC_SYSSTATUS & RESETDONE) == 0) ; - - OMAP_HSMMC_SYSCTL |= SOFTRESETALL; - while ((OMAP_HSMMC_SYSCTL & SOFTRESETALL) != 0x0) ; - - OMAP_HSMMC_HCTL = DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0; - OMAP_HSMMC_CAPA |= VS30_3V0SUP | VS18_1V8SUP; - - reg_val = OMAP_HSMMC_CON & RESERVED_MASK; - - OMAP_HSMMC_CON = CTPL_MMC_SD | reg_val | WPP_ACTIVEHIGH | - CDP_ACTIVEHIGH | MIT_CTO | DW8_1_4BITMODE | MODE_FUNC | - STR_BLOCK | HR_NOHOSTRESP | INIT_NOINIT | NOOPENDRAIN; + writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET, + &mmc_base->sysconfig); + while ((readl(&mmc_base->sysstatus) & RESETDONE) == 0); + + writel(readl(&mmc_base->sysctl) | SOFTRESETALL, &mmc_base->sysctl); + while ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0x0); + + writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl); + writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP, + &mmc_base->capa); + + reg_val = readl(&mmc_base->con) & RESERVED_MASK; + + writel(CTPL_MMC_SD | reg_val | WPP_ACTIVEHIGH | CDP_ACTIVEHIGH | + MIT_CTO | DW8_1_4BITMODE | MODE_FUNC | STR_BLOCK | + HR_NOHOSTRESP | INIT_NOINIT | NOOPENDRAIN, &mmc_base->con);
mmc_clock_config(CLK_INITSEQ, 0); - OMAP_HSMMC_HCTL |= SDBP_PWRON; + writel(readl(&mmc_base->hctl) | SDBP_PWRON, &mmc_base->hctl);
- OMAP_HSMMC_IE = 0x307f0033; + writel(IE_BADA | IE_CERR | IE_DEB | IE_DCRC | IE_DTO | IE_CIE | + IE_CEB | IE_CCRC | IE_CTO | IE_BRR | IE_BWR | IE_TC | IE_CC, + &mmc_base->ie);
mmc_init_stream(); return 1; }
unsigned char mmc_send_cmd(unsigned int cmd, unsigned int arg, - unsigned int *response) + unsigned int *response) { - volatile unsigned int mmc_stat; + unsigned int mmc_stat;
- while ((OMAP_HSMMC_PSTATE & DATI_MASK) == DATI_CMDDIS) ; + while ((readl(&mmc_base->pstate) & DATI_MASK) == DATI_CMDDIS);
- OMAP_HSMMC_BLK = BLEN_512BYTESLEN | NBLK_STPCNT; - OMAP_HSMMC_STAT = 0xFFFFFFFF; - OMAP_HSMMC_ARG = arg; - OMAP_HSMMC_CMD = cmd | CMD_TYPE_NORMAL | CICE_NOCHECK | - CCCE_NOCHECK | MSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | - DE_DISABLE; + writel(BLEN_512BYTESLEN | NBLK_STPCNT, &mmc_base->blk); + writel(0xFFFFFFFF, &mmc_base->stat); + writel(arg, &mmc_base->arg); + writel(cmd | CMD_TYPE_NORMAL | CICE_NOCHECK | CCCE_NOCHECK | + MSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | DE_DISABLE, + &mmc_base->cmd);
while (1) { do { - mmc_stat = OMAP_HSMMC_STAT; + mmc_stat = readl(&mmc_base->stat); } while (mmc_stat == 0);
if ((mmc_stat & ERRI_MASK) != 0) return (unsigned char) mmc_stat;
if (mmc_stat & CC_MASK) { - OMAP_HSMMC_STAT = CC_MASK; - response[0] = OMAP_HSMMC_RSP10; + writel(CC_MASK, &mmc_base->stat); + response[0] = readl(&mmc_base->rsp10); if ((cmd & RSP_TYPE_MASK) == RSP_TYPE_LGHT136) { - response[1] = OMAP_HSMMC_RSP32; - response[2] = OMAP_HSMMC_RSP54; - response[3] = OMAP_HSMMC_RSP76; + response[1] = readl(&mmc_base->rsp32); + response[2] = readl(&mmc_base->rsp54); + response[3] = readl(&mmc_base->rsp76); } break; } @@ -199,7 +199,7 @@ unsigned char mmc_send_cmd(unsigned int
unsigned char mmc_read_data(unsigned int *output_buf) { - volatile unsigned int mmc_stat; + unsigned int mmc_stat; unsigned int read_count = 0;
/* @@ -207,7 +207,7 @@ unsigned char mmc_read_data(unsigned int */ while (1) { do { - mmc_stat = OMAP_HSMMC_STAT; + mmc_stat = readl(&mmc_base->stat); } while (mmc_stat == 0);
if ((mmc_stat & ERRI_MASK) != 0) @@ -216,19 +216,22 @@ unsigned char mmc_read_data(unsigned int if (mmc_stat & BRR_MASK) { unsigned int k;
- OMAP_HSMMC_STAT |= BRR_MASK; + writel(readl(&mmc_base->stat) | BRR_MASK, + &mmc_base->stat); for (k = 0; k < MMCSD_SECTOR_SIZE / 4; k++) { - *output_buf = OMAP_HSMMC_DATA; + *output_buf = readl(&mmc_base->data); output_buf++; read_count += 4; } }
if (mmc_stat & BWR_MASK) - OMAP_HSMMC_STAT |= BWR_MASK; + writel(readl(&mmc_base->stat) | BWR_MASK, + &mmc_base->stat);
if (mmc_stat & TC_MASK) { - OMAP_HSMMC_STAT |= TC_MASK; + writel(readl(&mmc_base->stat) | TC_MASK, + &mmc_base->stat); break; } } @@ -272,8 +275,8 @@ unsigned char mmc_detect_card(mmc_card_d mmc_card_cur->card_type = MMC_CARD; ocr_value |= MMC_OCR_REG_ACCESS_MODE_SECTOR; ret_cmd41 = MMC_CMD1; - OMAP_HSMMC_CON &= ~OD; - OMAP_HSMMC_CON |= OPENDRAIN; + writel(readl(&mmc_base->con) & ~OD, &mmc_base->con); + writel(readl(&mmc_base->con) | OPENDRAIN, &mmc_base->con); }
argument = ocr_value; @@ -341,8 +344,8 @@ unsigned char mmc_detect_card(mmc_card_d mmc_card_cur->RCA = ((mmc_resp_r6 *) resp)->newpublishedrca; }
- OMAP_HSMMC_CON &= ~OD; - OMAP_HSMMC_CON |= NOOPENDRAIN; + writel(readl(&mmc_base->con) & ~OD, &mmc_base->con); + writel(readl(&mmc_base->con) | NOOPENDRAIN, &mmc_base->con); return 1; }
@@ -517,7 +520,7 @@ unsigned long mmc_bread(int dev_num, uns void *dst) { omap_mmc_read_sect(blknr, (blkcnt * MMCSD_SECTOR_SIZE), &cur_card_data, - (unsigned long *) dst); + (unsigned long *) dst); return 1; }
Index: u-boot-main/include/asm-arm/arch-omap3/omap3.h =================================================================== --- u-boot-main.orig/include/asm-arm/arch-omap3/omap3.h +++ u-boot-main/include/asm-arm/arch-omap3/omap3.h @@ -206,6 +206,8 @@ typedef struct gpio { #define VAUX2_DEDICATED 0x79 #define VAUX3_DEV_GRP 0x7A #define VAUX3_DEDICATED 0x7D +#define VMMC1_DEV_GRP 0x82 +#define VMMC1_DEDICATED 0x85 #define VPLL2_DEV_GRP 0x8E #define VPLL2_DEDICATED 0x91 #define VDAC_DEV_GRP 0x96 @@ -227,5 +229,6 @@ typedef struct gpio { #define VAUX3_VSEL_28 0x03 #define VPLL2_VSEL_18 0x05 #define VDAC_VSEL_18 0x03 +#define VMMC1_VSEL_30 0x02
#endif
On 19:55 Thu 12 Feb , Dirk Behme wrote:
OMAP3 core changes necessary for MUSB
Signed-off-by: Dirk Behme dirk.behme@googlemail.com
Note: OMAP3 USB code will be sent later to USB maintainer, so CONFIG_MUSB isn't used anywhere yet. This will avoid USB maintainer to change OMAP3 core files.
cpu/arm_cortexa8/omap3/clock.c | 5 +++++ include/asm-arm/arch-omap3/cpu.h | 2 ++ include/asm-arm/arch-omap3/omap3.h | 11 +++++++++++ 3 files changed, 18 insertions(+)
Index: u-boot-main/cpu/arm_cortexa8/omap3/clock.c
--- u-boot-main.orig/cpu/arm_cortexa8/omap3/clock.c +++ u-boot-main/cpu/arm_cortexa8/omap3/clock.c @@ -377,5 +377,10 @@ void per_clocks_enable(void) sr32(&prcm_base->fclken_per, 0, 32, FCK_PER_ON); sr32(&prcm_base->iclken_per, 0, 32, ICK_PER_ON);
+#ifdef CONFIG_MUSB
- /* Enable the MUSB interface clock */
- sr32(&prcm_base->iclken1_core, 4, 1, 0x1);
+#endif
the design of u-boot is to enagle the IP only when he use it so please do not enable the clock every time just when you want to use (in the USB driver init)
Best Regards, J.
Dear Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 19:55 Thu 12 Feb , Dirk Behme wrote:
OMAP3 core changes necessary for MUSB
Signed-off-by: Dirk Behme dirk.behme@googlemail.com
Note: OMAP3 USB code will be sent later to USB maintainer, so CONFIG_MUSB isn't used anywhere yet. This will avoid USB maintainer to change OMAP3 core files.
cpu/arm_cortexa8/omap3/clock.c | 5 +++++ include/asm-arm/arch-omap3/cpu.h | 2 ++ include/asm-arm/arch-omap3/omap3.h | 11 +++++++++++ 3 files changed, 18 insertions(+)
Index: u-boot-main/cpu/arm_cortexa8/omap3/clock.c
--- u-boot-main.orig/cpu/arm_cortexa8/omap3/clock.c +++ u-boot-main/cpu/arm_cortexa8/omap3/clock.c @@ -377,5 +377,10 @@ void per_clocks_enable(void) sr32(&prcm_base->fclken_per, 0, 32, FCK_PER_ON); sr32(&prcm_base->iclken_per, 0, 32, ICK_PER_ON);
+#ifdef CONFIG_MUSB
- /* Enable the MUSB interface clock */
- sr32(&prcm_base->iclken1_core, 4, 1, 0x1);
+#endif
the design of u-boot is to enagle the IP only when he use it so please do not enable the clock every time just when you want to use (in the USB driver init)
This is already answered in
http://lists.denx.de/pipermail/u-boot/2009-February/047452.html
??
Best regards
Dirk
On Sun, Feb 22, 2009 at 6:22 PM, Dirk Behme dirk.behme@googlemail.com wrote:
Dear Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 19:55 Thu 12 Feb , Dirk Behme wrote:
OMAP3 core changes necessary for MUSB
Signed-off-by: Dirk Behme dirk.behme@googlemail.com
Note: OMAP3 USB code will be sent later to USB maintainer, so CONFIG_MUSB isn't used anywhere yet. This will avoid USB maintainer to change OMAP3 core files.
cpu/arm_cortexa8/omap3/clock.c | 5 +++++ include/asm-arm/arch-omap3/cpu.h | 2 ++ include/asm-arm/arch-omap3/omap3.h | 11 +++++++++++ 3 files changed, 18 insertions(+)
Index: u-boot-main/cpu/arm_cortexa8/omap3/clock.c
--- u-boot-main.orig/cpu/arm_cortexa8/omap3/clock.c +++ u-boot-main/cpu/arm_cortexa8/omap3/clock.c @@ -377,5 +377,10 @@ void per_clocks_enable(void) sr32(&prcm_base->fclken_per, 0, 32, FCK_PER_ON); sr32(&prcm_base->iclken_per, 0, 32, ICK_PER_ON);
+#ifdef CONFIG_MUSB
- /* Enable the MUSB interface clock */
- sr32(&prcm_base->iclken1_core, 4, 1, 0x1);
+#endif
the design of u-boot is to enagle the IP only when he use it so please do not enable the clock every time just when you want to use (in the USB driver init)
This is already answered in
http://lists.denx.de/pipermail/u-boot/2009-February/047452.html
He probably wants to say that clocks should be enabled only when "usb start" is issued, as you might have u-boot compiled with USB defines set, but never actually use USB.
Grazvydas Ignotas said the following on 02/23/2009 02:13 PM:
+#ifdef CONFIG_MUSB
- /* Enable the MUSB interface clock */
- sr32(&prcm_base->iclken1_core, 4, 1, 0x1);
+#endif
the design of u-boot is to enagle the IP only when he use it so please do not enable the clock every time just when you want to use (in the USB driver init)
This is already answered in
http://lists.denx.de/pipermail/u-boot/2009-February/047452.html
He probably wants to say that clocks should be enabled only when "usb start" is issued, as you might have u-boot compiled with USB defines set, but never actually use USB.
Comparing having all clock initialization at a central point (clock.c) - which seems simple vs having get-put kind of clock apis in U-boot : I might go for the simple solution of all clocks in a single place.. u-boot is supposed to "keep it simple", enable/disable clocks on a need basis is elegant, though could end up getting extended to i2c and other peripherals too(if I were to stretch is pretty hard ;) ).. makes more sense in kernel(which is already there) than here - my 2 cents..
Regards, Nishanth Menon
Nishanth Menon wrote:
Grazvydas Ignotas said the following on 02/23/2009 02:13 PM:
+#ifdef CONFIG_MUSB
- /* Enable the MUSB interface clock */
- sr32(&prcm_base->iclken1_core, 4, 1, 0x1);
+#endif
the design of u-boot is to enagle the IP only when he use it so please do not enable the clock every time just when you want to use (in the USB driver init)
This is already answered in
http://lists.denx.de/pipermail/u-boot/2009-February/047452.html
He probably wants to say that clocks should be enabled only when "usb start" is issued, as you might have u-boot compiled with USB defines set, but never actually use USB.
Comparing having all clock initialization at a central point (clock.c) - which seems simple vs having get-put kind of clock apis in U-boot : I might go for the simple solution of all clocks in a single place.. u-boot is supposed to "keep it simple", enable/disable clocks on a need basis is elegant, though could end up getting extended to i2c and other peripherals too(if I were to stretch is pretty hard ;) ).. makes more sense in kernel(which is already there) than here - my 2 cents..
Yes, I agree. Let us keep it simple. If CONFIG_MUSB is enabled by additional patch, this clock will be necessary.
Thanks
Dirk
Dear Nishanth Menon,
In message 49A296F0.4000509@gmail.com you wrote:
He probably wants to say that clocks should be enabled only when "usb start" is issued, as you might have u-boot compiled with USB defines set, but never actually use USB.
Correct.
Comparing having all clock initialization at a central point (clock.c) - which seems simple vs having get-put kind of clock apis in U-boot : I
But the explicit rule is only to enable interfaces (and this includes clocks) when they are actually being used. Enabling all clocks even if not needed may for example add significantly to the power consumption and to EMC problems.
might go for the simple solution of all clocks in a single place..
Please don't.
u-boot is supposed to "keep it simple", enable/disable clocks on a need basis is elegant, though could end up getting extended to i2c and other
Yes, indeed - if you followed the recent discussion about I2C rework this is indeed under consideration.
peripherals too(if I were to stretch is pretty hard ;) ).. makes more sense in kernel(which is already there) than here - my 2 cents..
Well, we're trying to improve...
Best regards,
Wolfgang Denk
Wolfgang Denk said the following on 02/23/2009 11:36 PM:
Comparing having all clock initialization at a central point (clock.c) - which seems simple vs having get-put kind of clock apis in U-boot : I
But the explicit rule is only to enable interfaces (and this includes clocks) when they are actually being used. Enabling all clocks even if not needed may for example add significantly to the power consumption and to EMC problems.
I agree power consumption in u-boot is higher due to lack of power management support -> but just having clocks is just one factor of it.. if power management is our concern, we probably need a unified strategy for it. But inherently is'nt it an overkill at u-boot level (normal boot time is less than few seconds)..
if we look at clock handling -> there are multiple levels of clock handling: a) enable all required clocks at a go -> current omap3 code does that b) proposed change -> clock enable/disable on need basis. c) clock tree architecture -> OMAP3 as an example has a complex clock tree, cascading clock dependencies etc. as an example: sys_clk OR clk32 could be functional clock source of gptimer module. to access gptimer you need interface clock -> but once you program it, unless you need to access the regs, you can essentially shut the interface clock off.. till lets say interrupt occurs.. we could even think of cascading clock divisors here.. just to make things a little more complex..
How about voltage handling etc.. are we thinking of a complete power architecture here? what kind of gains do we expect by having just (b)? My feel is that it would make things a lot more complex than the need is.. For the modules one needs (they are not too many at u-boot level), enable the clocks at one place. if we go to (b) we might as well go to (c).. mebbe even pull in clocksource like u-boot-v2 has, while we are it..
But in anycase, do we have a generic clock architecture(clock register, unregister, get, put apis) we are to adhere to? or are we holding off each patch and rejecting unless they call thier own omap3_musb_clk_get, omap3_musb_clk_put? that does not sound to be a good idea :(.. maybe I am missing the conversation here..
Regards, Nishanth Menon
Nishanth Menon wrote:
Wolfgang Denk said the following on 02/23/2009 11:36 PM:
Comparing having all clock initialization at a central point (clock.c) - which seems simple vs having get-put kind of clock apis in U-boot : I
But the explicit rule is only to enable interfaces (and this includes clocks) when they are actually being used. Enabling all clocks even if not needed may for example add significantly to the power consumption and to EMC problems.
I agree power consumption in u-boot is higher due to lack of power management support -> but just having clocks is just one factor of it.. if power management is our concern, we probably need a unified strategy for it. But inherently is'nt it an overkill at u-boot level (normal boot time is less than few seconds)..
if we look at clock handling -> there are multiple levels of clock handling: a) enable all required clocks at a go -> current omap3 code does that b) proposed change -> clock enable/disable on need basis. c) clock tree architecture -> OMAP3 as an example has a complex clock tree, cascading clock dependencies etc. as an example: sys_clk OR clk32 could be functional clock source of gptimer module. to access gptimer you need interface clock -> but once you program it, unless you need to access the regs, you can essentially shut the interface clock off.. till lets say interrupt occurs.. we could even think of cascading clock divisors here.. just to make things a little more complex..
How about voltage handling etc.. are we thinking of a complete power architecture here? what kind of gains do we expect by having just (b)? My feel is that it would make things a lot more complex than the need is.. For the modules one needs (they are not too many at u-boot level), enable the clocks at one place. if we go to (b) we might as well go to (c).. mebbe even pull in clocksource like u-boot-v2 has, while we are it..
But in anycase, do we have a generic clock architecture(clock register, unregister, get, put apis) we are to adhere to? or are we holding off each patch and rejecting unless they call thier own omap3_musb_clk_get, omap3_musb_clk_put? that does not sound to be a good idea :(.. maybe I am missing the conversation here..
As yesterday: Yes, I agree. Again ;)
Thanks
Dirk
Wolfgang Denk wrote:
Dear Nishanth Menon,
In message 49A296F0.4000509@gmail.com you wrote:
He probably wants to say that clocks should be enabled only when "usb start" is issued, as you might have u-boot compiled with USB defines set, but never actually use USB.
Correct.
Don't get me wrong, but I find it a little funny that we are speculating (?) here about what someone else might have wanted to say ;)
Comparing having all clock initialization at a central point (clock.c) - which seems simple vs having get-put kind of clock apis in U-boot : I
But the explicit rule is only to enable interfaces (and this includes clocks) when they are actually being used. Enabling all clocks even if not needed may for example add significantly to the power consumption and to EMC problems.
While I totally agree, I think the point of discussion (misunderstanding?) is what does "_enabling_ clock only if needed" mean.
One can argue that "enabling clock only if needed" is done by
#ifdef MUSB enable_musbclock() #endif
While doing this, clock is enabled if somebody _enables_ MUSB in config. While doing this, clock is enabled when interface is enabled (at compile time), assuming that user who enables interface in config knows why and uses it. Else it makes no sense to enable it (in config). And by enabling serial output over USB in upcoming patch, the interface is used. Seems that this is my point of view ;)
Other point of view of "enabling clock only if need" can be "enable clock only if code is compiled into uboot _and_ is accessed (e.g. by serial output over USB)" (i.e. runtime enable). I think this what Wolfgang's point of view is. I wonder why someone might enable an interface for an bootloader at compile time, getting a larger binary, but then not using it, though. But this might be an other topic ;)
u-boot is supposed to "keep it simple", enable/disable clocks on a need basis is elegant, though could end up getting extended to i2c and other
Yes, indeed - if you followed the recent discussion about I2C rework this is indeed under consideration.
peripherals too(if I were to stretch is pretty hard ;) ).. makes more sense in kernel(which is already there) than here - my 2 cents..
Well, we're trying to improve...
I wonder a little why you try to improve code that is ideally running < 10s like a bootloader for e.g. power consumption aspects instead of keeping it small, simple and easy to maintain. But this might be an other topic, too ;)
Best regards
Dirk
Dear Dirk,
In message 49A427D1.6050700@googlemail.com you wrote:
Wolfgang Denk wrote:
Dear Nishanth Menon,
In message 49A296F0.4000509@gmail.com you wrote:
He probably wants to say that clocks should be enabled only when "usb start" is issued, as you might have u-boot compiled with USB defines set, but never actually use USB.
Correct.
Don't get me wrong, but I find it a little funny that we are speculating (?) here about what someone else might have wanted to say ;)
That was not my intention. What I meant was that the statement was correct. U-Boot design rules say "Initialize devices only when they are needed within U-Boot" (see for example http://www.denx.de/wiki/view/U-Boot/DesignPrinciples#2_Keep_it_Fast), and applied to clocks that means we should enable clocks only when we really need them. There are many reasons for that, power consumption being one of them.
While I totally agree, I think the point of discussion (misunderstanding?) is what does "_enabling_ clock only if needed" mean.
If "needed" means that the clocks are needed to execute a specific command within U-Boot.
One can argue that "enabling clock only if needed" is done by
#ifdef MUSB enable_musbclock() #endif
While doing this, clock is enabled if somebody _enables_ MUSB in config. While doing this, clock is enabled when interface is enabled (at compile time), assuming that user who enables interface in config
One can argue like that, but it's wrong. The intention is to enable interfaces only when really *used* by U-Boot to run some command. So if nobody ever executes an USB command in U-Boot, then the clocks should NOT be enabled.
knows why and uses it. Else it makes no sense to enable it (in config). And by enabling serial output over USB in upcoming patch, the interface is used. Seems that this is my point of view ;)
Only if serial output over USB is permanently enabled this would make sense. Otherwise, there is no reason to turn the clocks on before a command in U-Boot turns on the serial output over USB.
Other point of view of "enabling clock only if need" can be "enable clock only if code is compiled into uboot _and_ is accessed (e.g. by serial output over USB)" (i.e. runtime enable). I think this what
Yes, that is the intention.
Wolfgang's point of view is. I wonder why someone might enable an interface for an bootloader at compile time, getting a larger binary, but then not using it, though. But this might be an other topic ;)
Isn't that obvious? You enable features liek Ethernet and USB support in the configuration because they offer features you need. You may for example download the kernel and application images and write them to flash. Then you boot many, many times from flash. Now, the vendor ships a software update on USB sticks, so you plug in that stick and run the update procedure. After that, you run from flash again for a long time.
Of course it is important to have that features built in and ready available, but it makes no sense to acvtivate these on each and every boot - waiting for the Ethernet PHY to initialize and to establish a link (or to time out) or performing a USB bus scan on each boot would only add to the boot time and the power coinsumption of the system without any benefits.
Do you really mean you didn't know that? I cannot believe that.
I wonder a little why you try to improve code that is ideally running < 10s like a bootloader for e.g. power consumption aspects instead of keeping it small, simple and easy to maintain. But this might be an other topic, too ;)
Power consumption is just one aspect, as is boot time etc. But even if the power consumption in U-Boot is negligible - the clocks would most probably continue to run in Linux, too, right?
We had this problem and did see what happens when we for example enable a USB controller in U-Boot and don't shut it down before booting an OS. The result was well over a year of bug hunting and a lot of frustration - both to the engineers and - even worse - to the customers.
It makes perfect sense to shut off what's not in use. U-Boot goes green :-)
Best regards,
Wolfgang Denk
Wolfgang Denk wrote:
Dear Dirk,
In message 49A427D1.6050700@googlemail.com you wrote:
Wolfgang Denk wrote:
Dear Nishanth Menon,
In message 49A296F0.4000509@gmail.com you wrote:
He probably wants to say that clocks should be enabled only when "usb start" is issued, as you might have u-boot compiled with USB defines set, but never actually use USB.
Correct.
Don't get me wrong, but I find it a little funny that we are speculating (?) here about what someone else might have wanted to say ;)
That was not my intention. What I meant was that the statement was correct. U-Boot design rules say "Initialize devices only when they are needed within U-Boot" (see for example http://www.denx.de/wiki/view/U-Boot/DesignPrinciples#2_Keep_it_Fast), and applied to clocks that means we should enable clocks only when we really need them. There are many reasons for that, power consumption being one of them.
While I totally agree, I think the point of discussion (misunderstanding?) is what does "_enabling_ clock only if needed" mean.
If "needed" means that the clocks are needed to execute a specific command within U-Boot.
One can argue that "enabling clock only if needed" is done by
#ifdef MUSB enable_musbclock() #endif
While doing this, clock is enabled if somebody _enables_ MUSB in config. While doing this, clock is enabled when interface is enabled (at compile time), assuming that user who enables interface in config
One can argue like that, but it's wrong. The intention is to enable interfaces only when really *used* by U-Boot to run some command. So if nobody ever executes an USB command in U-Boot, then the clocks should NOT be enabled.
knows why and uses it. Else it makes no sense to enable it (in config). And by enabling serial output over USB in upcoming patch, the interface is used. Seems that this is my point of view ;)
Only if serial output over USB is permanently enabled this would make sense. Otherwise, there is no reason to turn the clocks on before a command in U-Boot turns on the serial output over USB.
Other point of view of "enabling clock only if need" can be "enable clock only if code is compiled into uboot _and_ is accessed (e.g. by serial output over USB)" (i.e. runtime enable). I think this what
Yes, that is the intention.
Will it get an ACK if we change
--- u-boot-main.orig/cpu/arm_cortexa8/omap3/clock.c +++ u-boot-main/cpu/arm_cortexa8/omap3/clock.c @@ -377,5 +377,10 @@ void per_clocks_enable(void) sr32(&prcm_base->fclken_per, 0, 32, FCK_PER_ON); sr32(&prcm_base->iclken_per, 0, 32, ICK_PER_ON);
+#ifdef CONFIG_MUSB + /* Enable the MUSB interface clock */ + sr32(&prcm_base->iclken1_core, 4, 1, 0x1); +#endif
to something like
+++ u-boot-main/cpu/arm_cortexa8/omap3/clock.c #ifdef CONFIG_MUSB void enable_musb_clock(void) { sr32(&prcm_base->iclken1_core, 4, 1, 0x1); }
void disable_musb_clock(void) { sr32(&prcm_base->iclken1_core, 4, 1, 0x0); } #endif
and then call enable/disable from MUSB code at appropriate places?
Best regards
Dirk
Dirk Behme wrote:
Wolfgang Denk wrote:
...
Other point of view of "enabling clock only if need" can be "enable clock only if code is compiled into uboot _and_ is accessed (e.g. by serial output over USB)" (i.e. runtime enable). I think this what
Yes, that is the intention.
Will it get an ACK if we change
--- u-boot-main.orig/cpu/arm_cortexa8/omap3/clock.c +++ u-boot-main/cpu/arm_cortexa8/omap3/clock.c @@ -377,5 +377,10 @@ void per_clocks_enable(void) sr32(&prcm_base->fclken_per, 0, 32, FCK_PER_ON); sr32(&prcm_base->iclken_per, 0, 32, ICK_PER_ON);
+#ifdef CONFIG_MUSB
- /* Enable the MUSB interface clock */
- sr32(&prcm_base->iclken1_core, 4, 1, 0x1);
+#endif
to something like
+++ u-boot-main/cpu/arm_cortexa8/omap3/clock.c #ifdef CONFIG_MUSB void enable_musb_clock(void) { sr32(&prcm_base->iclken1_core, 4, 1, 0x1); }
void disable_musb_clock(void) { sr32(&prcm_base->iclken1_core, 4, 1, 0x0); } #endif
and then call enable/disable from MUSB code at appropriate places?
Any hint if changing the patch doing something like above as proposed some days ago [1] would get an ack?
Thanks
Dirk
[1] http://lists.denx.de/pipermail/u-boot/2009-February/048482.html
Dear Dirk,
In message 49AA9B19.6060907@googlemail.com you wrote:
Will it get an ACK if we change
...
and then call enable/disable from MUSB code at appropriate places?
Any hint if changing the patch doing something like above as proposed some days ago [1] would get an ack?
I'd like to see the patch, but so far I don;t see any problems with that.
Umm.... but this posting triggered me to look up what this function sr32() might be doing...
I think this could need some cleanup...
"cpu/arm_cortexa8/omap3/syslib.c":
43 /***************************************************************** 44 * sr32 - clear & set a value in a bit range for a 32 bit address 45 *****************************************************************/ 46 void sr32(void *addr, u32 start_bit, u32 num_bits, u32 value) 47 { 48 u32 tmp, msk = 0; 49 msk = 1 << num_bits;
It makes no sense to initialize msk with 0 when you set another value right in the next statement.
50 --msk;
I think the code would be clearer if you wrote:
msk = (1 << num_bits) - 1; 51 tmp = readl((u32)addr) & ~(msk << start_bit); 52 tmp |= value << start_bit;
Wouldn't it be better to make sure that "value" does not exceed the bit range? Like that:
tmp |= (value & ~msk) << start_bit;
?
Also, I find code that is based on bit numbers, bit widths and values *very* difficult to read. Do you really think that for example
sr32(&prcm_base->iclken1_core, 4, 1, 0x1);
is easier to read than
clrsetbits(u32, &prcm_base->iclken1_core, 0x10, 0x10);
?
And actually, just to set or clear values we don't even need that, a plain
setbits(u32, &prcm_base->iclken1_core, 0x10);
would do as well.
[Look up the definitions in include/asm-ppc/io.h if needed].
And probably 0x10 could be even replaced by some MUSB_INTERFACE_CLK #define from some header file?
I am aware that this is work for a future release, but I think it would *greatly* improve the code. It would, most of all, make it readable.
Best regards,
Wolfgang Denk
On 19:55 Thu 12 Feb , Dirk Behme wrote:
OMAP3 core changes necessary for MUSB
Signed-off-by: Dirk Behme dirk.behme@googlemail.com
will you send a new version soon or this will wait the next release?
Best Regards, J.
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 19:55 Thu 12 Feb , Dirk Behme wrote:
OMAP3 core changes necessary for MUSB
Signed-off-by: Dirk Behme dirk.behme@googlemail.com
will you send a new version soon or this will wait the next release?
The developers which did the initial MUSB support for OMAP3/Beagle on the Beagle specific "omap3-dev-usb" git branch [1] are busy at the moment. I had a short discussion with them. I'd like to have the clock changes discussed here to be tested first at Beagle specific U-Boot branch/tree [1] before we extract them to send them to this list. In short, this will be waiting for next release. Hopefully we have a tested version then.
For the die ID (former serial number) patch [2] I will send an update with better commit message as requested by Wolfgang, soon (weekend?). Hopefully this will still be merged then in this release (?).
Do you agree to this way to go?
Dirk
[1] http://www.sakoman.net/cgi-bin/gitweb.cgi?p=u-boot-omap3.git;a=shortlog;h=re...
[2] http://lists.denx.de/pipermail/u-boot/2009-March/048847.html
Dear Dirk,
In message 49B8021C.8080402@googlemail.com you wrote:
For the die ID (former serial number) patch [2] I will send an update with better commit message as requested by Wolfgang, soon (weekend?). Hopefully this will still be merged then in this release (?).
ACK from me.
Do you agree to this way to go?
Sounds like a plan.
Best regards,
Wolfgang Denk
On 19:55 Thu 12 Feb , Dirk Behme wrote:
Add serial number based on OMAP3 die ID.
Signed-off-by: Dirk Behme dirk.behme@googlemail.com
Changes in v2:
- Rename 'serial' to 'serial#'
- Don't copy from a memory to an other, instead just update the pointer
board/omap3/beagle/beagle.c | 2 ++ board/omap3/evm/evm.c | 2 ++ board/omap3/overo/overo.c | 2 ++ board/omap3/pandora/pandora.c | 2 ++ board/omap3/zoom1/zoom1.c | 1 + cpu/arm_cortexa8/omap3/sys_info.c | 26 ++++++++++++++++++++++++++ include/asm-arm/arch-omap3/cpu.h | 13 +++++++++++++ include/asm-arm/arch-omap3/omap3.h | 1 + include/asm-arm/arch-omap3/sys_proto.h | 1 + 9 files changed, 50 insertions(+)
report it as the CPU serial if you want but report it as the board serial make no sense to me
Wolfgang what do you think?
Best Regards, J.
Dear Wolfgang and Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 19:55 Thu 12 Feb , Dirk Behme wrote:
Add serial number based on OMAP3 die ID.
Signed-off-by: Dirk Behme dirk.behme@googlemail.com
Changes in v2:
- Rename 'serial' to 'serial#'
- Don't copy from a memory to an other, instead just update the pointer
board/omap3/beagle/beagle.c | 2 ++ board/omap3/evm/evm.c | 2 ++ board/omap3/overo/overo.c | 2 ++ board/omap3/pandora/pandora.c | 2 ++ board/omap3/zoom1/zoom1.c | 1 + cpu/arm_cortexa8/omap3/sys_info.c | 26 ++++++++++++++++++++++++++ include/asm-arm/arch-omap3/cpu.h | 13 +++++++++++++ include/asm-arm/arch-omap3/omap3.h | 1 + include/asm-arm/arch-omap3/sys_proto.h | 1 + 9 files changed, 50 insertions(+)
report it as the CPU serial if you want but report it as the board serial make no sense to me
While discussing about this, please consider arguments/point of view given in
http://lists.denx.de/pipermail/u-boot/2009-February/047458.html
too.
Additionally, looking at description of "serial#" at
http://www.denx.de/wiki/DULG/UBootEnvVariables
I understand:
-> "serial#: contains hardware identification information such as type string and/or serial number."
With OMAP3 == hardware this is true for OMAP3 device ID, no?
-> "This variable can be set only once (usually during manufacturing of the board)."
This is true if OMAP3 is never exchanged as assumption in my comment
http://lists.denx.de/pipermail/u-boot/2009-February/047458.html
no?
Regards
Dirk
Btw.: I haven't got the point why the string 'serial#' applies only to a _board_ serial number, yet?
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090222160142.GE9867@game.jcrosoft.org you wrote: ...
Add serial number based on OMAP3 die ID.
...
report it as the CPU serial if you want but report it as the board serial make no sense to me
Wolfgang what do you think?
I agree that's a funny concept, but then we don't make any specifications how a board vendor defines the serial numbe rof his boards.
In other words: I don't care much.
Best regards,
Wolfgang Denk
Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090222160142.GE9867@game.jcrosoft.org you wrote: ...
Add serial number based on OMAP3 die ID.
...
report it as the CPU serial if you want but report it as the board serial make no sense to me
Wolfgang what do you think?
I agree that's a funny concept, but then we don't make any specifications how a board vendor defines the serial numbe rof his boards.
In other words: I don't care much.
Any hint or proposal how to go on with now? Someone proposed to change string 'serial#' to 'cpu#' in this patch. Would a patch with this change get an ack?
Dirk
Dear Dirk,
In message 49AA99BC.2080703@googlemail.com you wrote:
Add serial number based on OMAP3 die ID.
If it's a die ID, and if you really need to store this in an environment variable, it should be probably called "dieid" or "die_id" or similar ?
I agree that's a funny concept, but then we don't make any specifications how a board vendor defines the serial numbe rof his boards.
In other words: I don't care much.
Any hint or proposal how to go on with now? Someone proposed to change string 'serial#' to 'cpu#' in this patch. Would a patch with this change get an ack?
"cpu#" (read: cpu number) seems wrong to me - I would probably expect that this holds the CPU core number in a multi-core setup.
Best regards,
Wolfgang Denk
participants (5)
-
Dirk Behme -
Grazvydas Ignotas -
Jean-Christophe PLAGNIOL-VILLARD -
Nishanth Menon -
Wolfgang Denk