Based on http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips we need to re-work our sequence in config_sdram slightly to match what the TRM describes as the correct sequence. In our current (incorrect) sequence some edge cases may fail to initalize correctly.

Signed-off-by: Tom Rini trini@ti.com --- arch/arm/cpu/armv7/am33xx/ddr.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c index fd9fc4a..448cc40 100644 --- a/arch/arm/cpu/armv7/am33xx/ddr.c +++ b/arch/arm/cpu/armv7/am33xx/ddr.c @@ -45,13 +45,19 @@ static struct ddr_cmdtctrl *ioctrl_reg = { */ void config_sdram(const struct emif_regs *regs) { - writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl); - writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl_shdw); - if (regs->zq_config){ + if (regs->zq_config) { + /* + * A value of 0x2800 for the REF CTRL will give us + * about 570us for a delay, which will be long enough + * to configure things. + */ + writel(0x2800, &emif_reg->emif_sdram_ref_ctrl); writel(regs->zq_config, &emif_reg->emif_zq_config); writel(regs->sdram_config, &cstat->secure_emif_sdram_config); } writel(regs->sdram_config, &emif_reg->emif_sdram_config); + writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl); + writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl_shdw); }

/**