Please pull u-boot-x86

Hi Tom,
This PR includes the following x86 changes for v2020.07:
- Corrected some FSP-M/FSP-S settings for Chromebook Coral - ICH SPI driver and mrccache fixes for obtaining the SPI memory map - Fixed various warnings generated by latest version IASL when compiling ACPI tables
The following changes since commit 9452b7496f8b85ca3bdda1014495df1a6235a8de:
Merge tag 'u-boot-rockchip-20200531' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip (2020-05-31 20:07:39 -0400)
are available in the git repository at:
https://gitlab.denx.de/u-boot/custodians/u-boot-x86
for you to fetch changes up to 95cfa1d46c61461bdadb195799a205b48b907a5e:
x86: quark: acpi: Replace _ADR() by _UID() in description of PCI host bridge (2020-06-02 09:16:13 +0800)
---------------------------------------------------------------- Andy Shevchenko (4): x86: tangier: acpi: Create buffers outside of the methods x86: tangier: acpi: Replace _ADR() by _UID() in description of PCI host bridge x86: tangier: acpi: Drop _ADR() where _HID() is present x86: tangier: acpi: Drop _HID() where enumerated by _ADR()
Bin Meng (3): x86: baytrail: acpi: Create buffers outside of the methods x86: baytrail: acpi: Replace _ADR() by _UID() in description of PCI host bridge x86: quark: acpi: Replace _ADR() by _UID() in description of PCI host bridge
Simon Glass (9): x86: spi: Add a way to access the SPI mapping via registers x86: spi: Rewrite logic for obtaining the SPI memory map x86: spl: Print the error on SPL failure x86: mrccache: Allow use before driver model is active x86: coral: Correct some FSP-M settings x86: apl: Add hex offsets for registers in FSP-M x86: coral: Correct some FSP-S settings x86: apl: Add hex offsets for registers in FSP-S x86: minnowmax: Add support for Winbond flash
arch/x86/cpu/intel_common/fast_spi.c | 19 ++++++++++++++----- arch/x86/dts/chromebook_coral.dts | 15 ++++++++------- arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h | 17 +++++++++++++++-- arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h | 72 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/x86/include/asm/arch-baytrail/acpi/lpc.asl | 24 ++++++++++++------------ arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl | 2 +- arch/x86/include/asm/arch-quark/acpi/southcluster.asl | 2 +- arch/x86/include/asm/arch-tangier/acpi/southcluster.asl | 99 ++++++++++++++++++++++++++++++++++++++++++++++++++------------------------------------------------- arch/x86/include/asm/fast_spi.h | 19 +++++++++++++++++++ arch/x86/include/asm/mrccache.h | 15 ++++----------- arch/x86/lib/mrccache.c | 35 +++++++++++++++++++++++++---------- arch/x86/lib/spl.c | 4 ++-- board/intel/minnowmax/Kconfig | 3 +++ drivers/spi/ich.c | 103 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--------------- 14 files changed, 314 insertions(+), 115 deletions(-)
Regards, Bin

On Tue, Jun 02, 2020 at 09:23:13AM +0800, Bin Meng wrote:
Hi Tom,
This PR includes the following x86 changes for v2020.07:
- Corrected some FSP-M/FSP-S settings for Chromebook Coral
- ICH SPI driver and mrccache fixes for obtaining the SPI memory map
- Fixed various warnings generated by latest version IASL when
compiling ACPI tables
The following changes since commit 9452b7496f8b85ca3bdda1014495df1a6235a8de:
Merge tag 'u-boot-rockchip-20200531' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip (2020-05-31 20:07:39 -0400)
are available in the git repository at:
https://gitlab.denx.de/u-boot/custodians/u-boot-x86
for you to fetch changes up to 95cfa1d46c61461bdadb195799a205b48b907a5e:
x86: quark: acpi: Replace _ADR() by _UID() in description of PCI host bridge (2020-06-02 09:16:13 +0800)
Applied to u-boot/master, thanks!
participants (2)
-
Bin Meng
-
Tom Rini