[U-Boot] [PATCH v2 0/7] sunxi: sun8i-emac: Update DT bindings
Compared to the last post, this converts U-Boot's DTs over to use the new binding, so that the final patch can remove support for the old binding from U-Boot EMAC driver. The Linux DTs can be synced in later once we solved the size problem.
================================================ The existing sun8i-emac driver in U-Boot uses some preliminary bindings, which matched our own DTs. Now that the Linux kernel got a driver, lets update our probe code to handle those Linux DTs as well. The first patch adds the missing compatible strings for the pinctrl drivers, which is needed for using the sunxi_name_to_gpio() lookup function. Patch 2/7 updates the pinctrl parser used in the sun8i-emac driver, to cope with the new, generic Allwinner pinctrl bindings. Patch 3/7 extends the probe routine in the Ethernet driver to deal with both the old and the new bindings. Patches 4, 5 and 6 update U-Boot's DTs for boards using the A64, H3 and H5 SoC, respectively, to actually use the new binding in their EMAC nodes. This allows the final patch 7/7 to remove the support for the old binding in the EMAC driver, so we use the proper binding only. This series allows to copy in the DTs from the latest kernel. Unfortunately right now updating the DTs for the H5 and A64 breaks the build, as the resulting binary (which embeds the DT) gets to large and triggers our new image size check. As the H5 and H3 share most of the DT, we can't just update the H3 DTs either. I have patches syncing all 64-bit Allwinner SoCs to the 4.15 DTs ready anyway, which even build (by disabling raw MMC environment support). If people are interested, I can post them as well.
Cheers, Andre.
Changelog v1 .. v2: 01, 02, 03: unchanged 04, 05, 06, 07: added
Andre Przywara (7): sunxi: gpio: add missing compatible strings net: sun8i-emac: support new pinctrl DT bindings net: sun8i-emac: add support for new EMAC DT binding arm: dts: sunxi: update A64 to new EMAC binding arm: dts: sunxi: update H3 to new EMAC binding arm: dts: sunxi: update H5 to new EMAC binding net: sun8i-emac: remove support for old binding
arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 51 ++++++++------ arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 7 +- arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts | 6 +- arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts | 7 +- arch/arm/dts/sun8i-h3-nanopi-neo.dts | 6 +- arch/arm/dts/sun8i-h3-orangepi-2.dts | 7 +- arch/arm/dts/sun8i-h3-orangepi-one.dts | 7 +- arch/arm/dts/sun8i-h3-orangepi-pc.dts | 7 +- arch/arm/dts/sun8i-h3-orangepi-plus.dts | 8 ++- arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 9 ++- arch/arm/dts/sun8i-h3.dtsi | 69 ++++++++++++++----- drivers/gpio/sunxi_gpio.c | 4 ++ drivers/net/sun8i_emac.c | 89 ++++++++++++++++++------- 13 files changed, 179 insertions(+), 98 deletions(-)
The sunxi GPIO driver is missing some compatible strings for recent SoCs. While most of the sunxi GPIO code seems to not rely on this (and so works anyway), the sunxi_name_to_gpio() function does and fails at the moment (for instance when resolving the MMC CD pin name). Add the compatible strings for the A64, H5 and V3s, which were missing from the list. This now covers all pinctrl nodes in our own DTs.
Signed-off-by: Andre Przywara andre.przywara@arm.com --- drivers/gpio/sunxi_gpio.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c index 3cf01b6e36..90fd7c1596 100644 --- a/drivers/gpio/sunxi_gpio.c +++ b/drivers/gpio/sunxi_gpio.c @@ -354,12 +354,16 @@ static const struct udevice_id sunxi_gpio_ids[] = { ID("allwinner,sun8i-a83t-pinctrl", a_all), ID("allwinner,sun8i-h3-pinctrl", a_all), ID("allwinner,sun8i-r40-pinctrl", a_all), + ID("allwinner,sun8i-v3s-pinctrl", a_all), ID("allwinner,sun9i-a80-pinctrl", a_all), + ID("allwinner,sun50i-a64-pinctrl", a_all), + ID("allwinner,sun50i-h5-pinctrl", a_all), ID("allwinner,sun6i-a31-r-pinctrl", l_2), ID("allwinner,sun8i-a23-r-pinctrl", l_1), ID("allwinner,sun8i-a83t-r-pinctrl", l_1), ID("allwinner,sun8i-h3-r-pinctrl", l_1), ID("allwinner,sun9i-a80-r-pinctrl", l_3), + ID("allwinner,sun50i-a64-r-pinctrl", l_1), { } };
On Fri, Feb 9, 2018 at 7:00 AM, Andre Przywara andre.przywara@arm.com wrote:
The sunxi GPIO driver is missing some compatible strings for recent SoCs. While most of the sunxi GPIO code seems to not rely on this (and so works anyway), the sunxi_name_to_gpio() function does and fails at the moment (for instance when resolving the MMC CD pin name). Add the compatible strings for the A64, H5 and V3s, which were missing from the list. This now covers all pinctrl nodes in our own DTs.
Signed-off-by: Andre Przywara andre.przywara@arm.com
drivers/gpio/sunxi_gpio.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c index 3cf01b6e36..90fd7c1596 100644 --- a/drivers/gpio/sunxi_gpio.c +++ b/drivers/gpio/sunxi_gpio.c @@ -354,12 +354,16 @@ static const struct udevice_id sunxi_gpio_ids[] = { ID("allwinner,sun8i-a83t-pinctrl", a_all), ID("allwinner,sun8i-h3-pinctrl", a_all), ID("allwinner,sun8i-r40-pinctrl", a_all),
ID("allwinner,sun8i-v3s-pinctrl", a_all), ID("allwinner,sun9i-a80-pinctrl", a_all),ID("allwinner,sun50i-a64-pinctrl", a_all),ID("allwinner,sun50i-h5-pinctrl", a_all),
h5 is already added after sun5i-a13
Hi,
On 09/02/18 11:21, Jagan Teki wrote:
On Fri, Feb 9, 2018 at 7:00 AM, Andre Przywara andre.przywara@arm.com wrote:
The sunxi GPIO driver is missing some compatible strings for recent SoCs. While most of the sunxi GPIO code seems to not rely on this (and so works anyway), the sunxi_name_to_gpio() function does and fails at the moment (for instance when resolving the MMC CD pin name). Add the compatible strings for the A64, H5 and V3s, which were missing from the list. This now covers all pinctrl nodes in our own DTs.
Signed-off-by: Andre Przywara andre.przywara@arm.com
drivers/gpio/sunxi_gpio.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c index 3cf01b6e36..90fd7c1596 100644 --- a/drivers/gpio/sunxi_gpio.c +++ b/drivers/gpio/sunxi_gpio.c @@ -354,12 +354,16 @@ static const struct udevice_id sunxi_gpio_ids[] = { ID("allwinner,sun8i-a83t-pinctrl", a_all), ID("allwinner,sun8i-h3-pinctrl", a_all), ID("allwinner,sun8i-r40-pinctrl", a_all),
ID("allwinner,sun8i-v3s-pinctrl", a_all), ID("allwinner,sun9i-a80-pinctrl", a_all),ID("allwinner,sun50i-a64-pinctrl", a_all),ID("allwinner,sun50i-h5-pinctrl", a_all),h5 is already added after sun5i-a13
Ah, indeed, good catch.
Thanks for having a look.
Cheers, Andre.
The Linux kernel driver for the Allwinner pin controller gained support for generic properties, which are now also used in the DTs. The sun8i-emac Ethernet driver for new Allwinner MACs reads the pins from the DT, but so far only supported the old binding. Update the parsing routine to cope with both the old and new bindings, so that the newer DTs can be used with U-Boot and its Ethernet driver.
Signed-off-by: Andre Przywara andre.przywara@arm.com --- drivers/net/sun8i_emac.c | 52 ++++++++++++++++++++++++++++++++++++------------ 1 file changed, 39 insertions(+), 13 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 3ccc6b0bb6..df2b857310 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -21,6 +21,7 @@ #include <malloc.h> #include <miiphy.h> #include <net.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> #ifdef CONFIG_DM_GPIO #include <asm-generic/gpio.h> #endif @@ -465,30 +466,55 @@ static int parse_phy_pins(struct udevice *dev) }
drive = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0, - "allwinner,drive", 4); - pull = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0, - "allwinner,pull", 0); + "drive-strength", ~0); + if (drive != ~0) { + if (drive <= 10) + drive = SUN4I_PINCTRL_10_MA; + else if (drive <= 20) + drive = SUN4I_PINCTRL_20_MA; + else if (drive <= 30) + drive = SUN4I_PINCTRL_30_MA; + else + drive = SUN4I_PINCTRL_40_MA; + } else { + drive = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0, + "allwinner,drive", 4); + } + + if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-up", NULL)) + pull = SUN4I_PINCTRL_PULL_UP; + else if (fdt_get_property(gd->fdt_blob, offset, "bias-disable", NULL)) + pull = SUN4I_PINCTRL_NO_PULL; + else if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-down", NULL)) + pull = SUN4I_PINCTRL_PULL_DOWN; + else + pull = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0, + "allwinner,pull", 0); for (i = 0; ; i++) { int pin;
pin_name = fdt_stringlist_get(gd->fdt_blob, offset, "allwinner,pins", i, NULL); - if (!pin_name) - break; - if (pin_name[0] != 'P') - continue; - pin = (pin_name[1] - 'A') << 5; - if (pin >= 26 << 5) + if (!pin_name) { + pin_name = fdt_stringlist_get(gd->fdt_blob, offset, + "pins", i, NULL); + if (!pin_name) + break; + } + + pin = sunxi_name_to_gpio(pin_name); + if (pin < 0) continue; - pin += simple_strtol(&pin_name[2], NULL, 10);
sunxi_gpio_set_cfgpin(pin, SUN8I_GPD8_GMAC); - sunxi_gpio_set_drv(pin, drive); - sunxi_gpio_set_pull(pin, pull); + if (drive != ~0) + sunxi_gpio_set_drv(pin, drive); + if (pull != ~0) + sunxi_gpio_set_pull(pin, pull); }
if (!i) { - printf("WARNING: emac: cannot find allwinner,pins property\n"); + printf("WARNING: emac: cannot find pins property\n"); return -2; }
The Ethernet MAC used in newer Allwinner SoCs (H3, A64, H5) got an upstream Linux driver in v4.15. This one uses a slightly different binding from the original one used by the U-Boot driver. The differences to the old binding are: - The "syscon" address is held in a separate node, referenced via a phandle in the "syscon" property. - The reference to the PHY is held in a property called "phy-handle", not "phy". - The PHY register is at offset 0x30 in the syscon device, not at 0. - The internal PHY is activated when the node, which phy-handle points to, is a child node of an "allwinner,sun8i-h3-mdio-internal" node.
Teach the U-Boot driver how to find its resources in a "new-style" DT, so that we can use a Linux kernel compatible DT for U-Boot as well. This keeps support for the old binding for now, to allow a smooth transition.
Signed-off-by: Andre Przywara andre.przywara@arm.com --- drivers/net/sun8i_emac.c | 55 ++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 48 insertions(+), 7 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index df2b857310..4ba8959239 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -279,7 +279,7 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv) int ret; u32 reg;
- reg = readl(priv->sysctl_reg); + reg = readl(priv->sysctl_reg + 0x30);
if (priv->variant == H3_EMAC) { ret = sun8i_emac_set_syscon_ephy(priv, ®); @@ -310,7 +310,7 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv) return -EINVAL; }
- writel(reg, priv->sysctl_reg); + writel(reg, priv->sysctl_reg + 0x30);
return 0; } @@ -806,17 +806,50 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev) #endif
pdata->iobase = devfdt_get_addr_name(dev, "emac"); + if (pdata->iobase == FDT_ADDR_T_NONE) + pdata->iobase = devfdt_get_addr(dev); + if (pdata->iobase == FDT_ADDR_T_NONE) { + debug("%s: Cannot find MAC base address\n", __func__); + return -EINVAL; + } + priv->sysctl_reg = devfdt_get_addr_name(dev, "syscon"); + if (priv->sysctl_reg == FDT_ADDR_T_NONE) { + const fdt32_t *reg; + + offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "syscon"); + if (offset < 0) { + debug("%s: cannot find syscon node\n", __func__); + return -EINVAL; + } + reg = fdt_getprop(gd->fdt_blob, offset, "reg", NULL); + if (!reg) { + debug("%s: cannot find reg property in syscon node\n", + __func__); + return -EINVAL; + } + priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob, + offset, reg); + } else + priv->sysctl_reg -= 0x30; + if (priv->sysctl_reg == FDT_ADDR_T_NONE) { + debug("%s: Cannot find syscon base address\n", __func__); + return -EINVAL; + }
pdata->phy_interface = -1; priv->phyaddr = -1; priv->use_internal_phy = false;
- offset = fdtdec_lookup_phandle(gd->fdt_blob, node, - "phy"); - if (offset > 0) - priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", - -1); + offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "phy"); + if (offset < 0) + offset = fdtdec_lookup_phandle(gd->fdt_blob, node, + "phy-handle"); + if (offset < 0) { + debug("%s: Cannot find PHY address\n", __func__); + return -EINVAL; + } + priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1);
phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
@@ -841,6 +874,14 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev) if (fdt_getprop(gd->fdt_blob, node, "allwinner,use-internal-phy", NULL)) priv->use_internal_phy = true; + else { + int parent = fdt_parent_offset(gd->fdt_blob, offset); + + if (parent >= 0 && + !fdt_node_check_compatible(gd->fdt_blob, parent, + "allwinner,sun8i-h3-mdio-internal")) + priv->use_internal_phy = true; + } }
priv->interface = pdata->phy_interface;
The U-Boot driver for the sun8i-emac was using some preliminary DT binding. Now since Linux got its own driver in v4.15 and our driver can now cope with both bindings, let's convert the DT nodes used for the Pine64+ board over to the new bindings used by the kernel.
Signed-off-by: Andre Przywara andre.przywara@arm.com --- arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 51 +++++++++++++++---------- 1 file changed, 30 insertions(+), 21 deletions(-)
diff --git a/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi b/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi index 9c61beac01..32a263ce3d 100644 --- a/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi +++ b/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi @@ -4,25 +4,38 @@ };
soc { - emac: ethernet@01c30000 { + syscon: syscon@1c00000 { + compatible = "allwinner,sun50i-a64-system-controller", + "syscon"; + reg = <0x01c00000 0x1000>; + }; + + emac: ethernet@1c30000 { compatible = "allwinner,sun50i-a64-emac"; - reg = <0x01c30000 0x2000>, <0x01c00030 0x4>; - reg-names = "emac", "syscon"; + syscon = <&syscon>; + reg = <0x01c30000 0x10000>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; resets = <&ccu RST_BUS_EMAC>; - reset-names = "ahb"; + reset-names = "stmmaceth"; clocks = <&ccu CLK_BUS_EMAC>; - clock-names = "ahb"; + clock-names = "stmmaceth"; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&rgmii_pins>; phy-mode = "rgmii"; - phy = <&phy1>; + phy-handle = <&ext_rgmii_phy>; status = "okay";
- phy1: ethernet-phy@1 { - reg = <1>; + mdio: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; }; }; }; @@ -30,21 +43,17 @@
&pio { rmii_pins: rmii_pins { - allwinner,pins = "PD10", "PD11", "PD13", "PD14", - "PD17", "PD18", "PD19", "PD20", - "PD22", "PD23"; - allwinner,function = "emac"; - allwinner,drive = <3>; - allwinner,pull = <0>; + pins = "PD10", "PD11", "PD13", "PD14", "PD17", + "PD18", "PD19", "PD20", "PD22", "PD23"; + function = "emac"; + drive-strength = <40>; };
rgmii_pins: rgmii_pins { - allwinner,pins = "PD8", "PD9", "PD10", "PD11", - "PD12", "PD13", "PD15", - "PD16", "PD17", "PD18", "PD19", - "PD20", "PD21", "PD22", "PD23"; - allwinner,function = "emac"; - allwinner,drive = <3>; - allwinner,pull = <0>; + pins = "PD8", "PD9", "PD10", "PD11", "PD12", + "PD13", "PD15", "PD16", "PD17", "PD18", + "PD19", "PD20", "PD21", "PD22", "PD23"; + function = "emac"; + drive-strength = <40>; }; };
On 02/08/18 19:30, Andre Przywara wrote:
The U-Boot driver for the sun8i-emac was using some preliminary DT binding. Now since Linux got its own driver in v4.15 and our driver can now cope with both bindings, let's convert the DT nodes used for the Pine64+ board over to the new bindings used by the kernel.
Signed-off-by: Andre Przywara andre.przywara@arm.com
arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 51 +++++++++++++++---------- 1 file changed, 30 insertions(+), 21 deletions(-)
Since this is now the same binding as used in Linux, can this file be merged into the A64 dtsi? This file isn't pine64-specific, and it looks like it's not currently included from either dts file anyway. I ask because I'd like to get Ethernet working on the Orange Pi Win.
Thanks, Samuel
On 09/02/18 15:58, Samuel Holland wrote:
On 02/08/18 19:30, Andre Przywara wrote:
The U-Boot driver for the sun8i-emac was using some preliminary DT binding. Now since Linux got its own driver in v4.15 and our driver can now cope with both bindings, let's convert the DT nodes used for the Pine64+ board over to the new bindings used by the kernel.
Signed-off-by: Andre Przywara andre.przywara@arm.com
arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 51 +++++++++++++++---------- 1 file changed, 30 insertions(+), 21 deletions(-)
Since this is now the same binding as used in Linux, can this file be merged into the A64 dtsi? This file isn't pine64-specific, and it looks like it's not currently included from either dts file anyway. I ask because I'd like to get Ethernet working on the Orange Pi Win.
Yeah, I was thinking about this as well, but wanted to keep the diff small for this series. I have patches ready that copy all of the Linux .dts file into U-Boot, so these patches here are somewhat preliminary anyway.
But if people don't mind, I could merge this into sun50i-a64.dtsi as well.
Cheers, Andre.
The U-Boot driver for the sun8i-emac was using some preliminary DT binding. Now since Linux got its own driver in v4.15 and our driver can now cope with both bindings, let's convert the DT nodes used by the various H3 boards over to the new bindings used by the kernel.
Signed-off-by: Andre Przywara andre.przywara@arm.com --- arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts | 6 +-- arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts | 7 +-- arch/arm/dts/sun8i-h3-nanopi-neo.dts | 6 +-- arch/arm/dts/sun8i-h3-orangepi-2.dts | 7 +-- arch/arm/dts/sun8i-h3-orangepi-one.dts | 7 +-- arch/arm/dts/sun8i-h3-orangepi-pc.dts | 7 +-- arch/arm/dts/sun8i-h3-orangepi-plus.dts | 8 +++- arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 9 +++- arch/arm/dts/sun8i-h3.dtsi | 69 ++++++++++++++++++++------- 9 files changed, 75 insertions(+), 51 deletions(-)
diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts index 20d489cb2a..e0efcb3ba3 100644 --- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts +++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts @@ -100,14 +100,10 @@ };
&emac { - phy = <&phy1>; + phy-handle = <&int_mii_phy>; phy-mode = "mii"; - allwinner,use-internal-phy; allwinner,leds-active-low; status = "okay"; - phy1: ethernet-phy@1 { - reg = <1>; - }; };
&mmc0 { diff --git a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts index 97b993f636..c8fd69f0a4 100644 --- a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts +++ b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts @@ -125,15 +125,10 @@ };
&emac { - phy = <&phy1>; + phy-handle = <&int_mii_phy>; phy-mode = "mii"; - allwinner,use-internal-phy; allwinner,leds-active-low; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; };
&ir { diff --git a/arch/arm/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/dts/sun8i-h3-nanopi-neo.dts index 5113059098..78f6c24952 100644 --- a/arch/arm/dts/sun8i-h3-nanopi-neo.dts +++ b/arch/arm/dts/sun8i-h3-nanopi-neo.dts @@ -48,12 +48,8 @@ };
&emac { - phy = <&phy1>; + phy-handle = <&int_mii_phy>; phy-mode = "mii"; - allwinner,use-internal-phy; allwinner,leds-active-low; status = "okay"; - phy1: ethernet-phy@1 { - reg = <1>; - }; }; diff --git a/arch/arm/dts/sun8i-h3-orangepi-2.dts b/arch/arm/dts/sun8i-h3-orangepi-2.dts index caa1a6959c..d97fdacb35 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-2.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-2.dts @@ -55,6 +55,7 @@ aliases { serial0 = &uart0; /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ + ethernet0 = &emac; ethernet1 = &rtl8189; };
@@ -110,14 +111,10 @@ };
&emac { - phy = <&phy1>; + phy-handle = <&int_mii_phy>; phy-mode = "mii"; - allwinner,use-internal-phy; allwinner,leds-active-low; status = "okay"; - phy1: ethernet-phy@1 { - reg = <1>; - }; };
&ir { diff --git a/arch/arm/dts/sun8i-h3-orangepi-one.dts b/arch/arm/dts/sun8i-h3-orangepi-one.dts index 8df5c74f04..adab1cbfc9 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-one.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-one.dts @@ -53,6 +53,7 @@ compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
aliases { + ethernet0 = &emac; serial0 = &uart0; };
@@ -95,14 +96,10 @@ };
&emac { - phy = <&phy1>; + phy-handle = <&int_mii_phy>; phy-mode = "mii"; - allwinner,use-internal-phy; allwinner,leds-active-low; status = "okay"; - phy1: ethernet-phy@1 { - reg = <1>; - }; };
&mmc0 { diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/dts/sun8i-h3-orangepi-pc.dts index b8340f74e7..afba264ea5 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-pc.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-pc.dts @@ -53,6 +53,7 @@ compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
aliases { + ethernet0 = &emac; serial0 = &uart0; };
@@ -167,12 +168,8 @@ };
&emac { - phy = <&phy1>; + phy-handle = <&int_mii_phy>; phy-mode = "mii"; - allwinner,use-internal-phy; allwinner,leds-active-low; status = "okay"; - phy1: ethernet-phy@1 { - reg = <1>; - }; }; diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-plus.dts index e7079b26bc..136e4414a4 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts @@ -82,7 +82,13 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-mode = "rgmii"; - /delete-property/allwinner,use-internal-phy; +}; + +&external_mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; };
&mmc2 { diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts index f97b040b35..51aaf49b6d 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts @@ -69,8 +69,15 @@ pinctrl-names = "default"; pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; phy-mode = "rgmii"; - /delete-property/allwinner,use-internal-phy; +}; + +&external_mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; };
&pio { diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi index afa60793a2..39a6438ec4 100644 --- a/arch/arm/dts/sun8i-h3.dtsi +++ b/arch/arm/dts/sun8i-h3.dtsi @@ -144,9 +144,10 @@ #size-cells = <1>; ranges;
- syscon: syscon@01c00000 { - compatible = "allwinner,sun8i-h3-syscon","syscon"; - reg = <0x01c00000 0x34>; + syscon: syscon@1c00000 { + compatible = "allwinner,sun8i-h3-system-controller", + "syscon"; + reg = <0x01c00000 0x1000>; };
dma: dma-controller@01c02000 { @@ -339,15 +340,12 @@ interrupt-controller; #interrupt-cells = <3>;
- emac_rgmii_pins: emac0@0 { - allwinner,pins = "PD0", "PD1", "PD2", "PD3", - "PD4", "PD5", "PD7", - "PD8", "PD9", "PD10", - "PD12", "PD13", "PD15", - "PD16", "PD17"; - allwinner,function = "emac"; - allwinner,drive = <SUN4I_PINCTRL_40_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + emac_rgmii_pins: emac0 { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", + "PD5", "PD7", "PD8", "PD9", "PD10", + "PD12", "PD13", "PD15", "PD16", "PD17"; + function = "emac"; + drive-strength = <40>; };
mmc0_pins_a: mmc0@0 { @@ -466,16 +464,51 @@
emac: ethernet@1c30000 { compatible = "allwinner,sun8i-h3-emac"; - reg = <0x01c30000 0x104>, <0x01c00030 0x4>; - reg-names = "emac", "syscon"; + syscon = <&syscon>; + reg = <0x01c30000 0x10000>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; - resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>; - reset-names = "ahb", "ephy"; - clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>; - clock-names = "ahb", "ephy"; + interrupt-names = "macirq"; + resets = <&ccu RST_BUS_EMAC>; + reset-names = "stmmaceth"; + clocks = <&ccu CLK_BUS_EMAC>; + clock-names = "stmmaceth"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + }; + + mdio-mux { + compatible = "allwinner,sun8i-h3-mdio-mux"; + #address-cells = <1>; + #size-cells = <0>; + + mdio-parent-bus = <&mdio>; + /* Only one MDIO is usable at the time */ + internal_mdio: mdio@1 { + compatible = "allwinner,sun8i-h3-mdio-internal"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + int_mii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + clocks = <&ccu CLK_BUS_EPHY>; + resets = <&ccu RST_BUS_EPHY>; + }; + }; + + external_mdio: mdio@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; };
gic: interrupt-controller@01c81000 {
The U-Boot driver for the sun8i-emac was using some preliminary DT binding. Now since Linux got its own driver in v4.15 and our driver can now cope with both bindings, let's convert the DT nodes used by the OrangePi PC2 over to the new bindings used by the kernel.
Signed-off-by: Andre Przywara andre.przywara@arm.com --- arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts index 780d59a096..d1c347d2b8 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts @@ -108,10 +108,13 @@ pinctrl-names = "default"; pinctrl-0 = <&emac_rgmii_pins>; phy-mode = "rgmii"; - phy = <&phy1>; + phy-handle = <&ext_rgmii_phy>; status = "okay"; +};
- phy1: ethernet-phy@1 { +&external_mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; }; };
The original DT binding used by U-Boot's sun8i-emac driver was not really agreed upon, and deviated from the "official" binding now used by the kernel. Since now all U-Boot users have been converted to the new binding, we can remove support for the old DT nodes from the driver.
Signed-off-by: Andre Przywara andre.przywara@arm.com --- drivers/net/sun8i_emac.c | 78 ++++++++++++++++-------------------------------- 1 file changed, 26 insertions(+), 52 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 4ba8959239..fd13b6bf95 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -456,7 +456,7 @@ static int parse_phy_pins(struct udevice *dev) { int offset; const char *pin_name; - int drive, pull, i; + int drive, pull = SUN4I_PINCTRL_NO_PULL, i;
offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev), "pinctrl-0"); @@ -476,31 +476,20 @@ static int parse_phy_pins(struct udevice *dev) drive = SUN4I_PINCTRL_30_MA; else drive = SUN4I_PINCTRL_40_MA; - } else { - drive = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0, - "allwinner,drive", 4); }
if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-up", NULL)) pull = SUN4I_PINCTRL_PULL_UP; - else if (fdt_get_property(gd->fdt_blob, offset, "bias-disable", NULL)) - pull = SUN4I_PINCTRL_NO_PULL; else if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-down", NULL)) pull = SUN4I_PINCTRL_PULL_DOWN; - else - pull = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0, - "allwinner,pull", 0); + for (i = 0; ; i++) { int pin;
pin_name = fdt_stringlist_get(gd->fdt_blob, offset, - "allwinner,pins", i, NULL); - if (!pin_name) { - pin_name = fdt_stringlist_get(gd->fdt_blob, offset, - "pins", i, NULL); - if (!pin_name) - break; - } + "pins", i, NULL); + if (!pin_name) + break;
pin = sunxi_name_to_gpio(pin_name); if (pin < 0) @@ -798,6 +787,7 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev) struct eth_pdata *pdata = &sun8i_pdata->eth_pdata; struct emac_eth_dev *priv = dev_get_priv(dev); const char *phy_mode; + const fdt32_t *reg; int node = dev_of_offset(dev); int offset = 0; #ifdef CONFIG_DM_GPIO @@ -805,33 +795,25 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev) int ret = 0; #endif
- pdata->iobase = devfdt_get_addr_name(dev, "emac"); - if (pdata->iobase == FDT_ADDR_T_NONE) - pdata->iobase = devfdt_get_addr(dev); + pdata->iobase = devfdt_get_addr(dev); if (pdata->iobase == FDT_ADDR_T_NONE) { debug("%s: Cannot find MAC base address\n", __func__); return -EINVAL; }
- priv->sysctl_reg = devfdt_get_addr_name(dev, "syscon"); - if (priv->sysctl_reg == FDT_ADDR_T_NONE) { - const fdt32_t *reg; - - offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "syscon"); - if (offset < 0) { - debug("%s: cannot find syscon node\n", __func__); - return -EINVAL; - } - reg = fdt_getprop(gd->fdt_blob, offset, "reg", NULL); - if (!reg) { - debug("%s: cannot find reg property in syscon node\n", - __func__); - return -EINVAL; - } - priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob, - offset, reg); - } else - priv->sysctl_reg -= 0x30; + offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "syscon"); + if (offset < 0) { + debug("%s: cannot find syscon node\n", __func__); + return -EINVAL; + } + reg = fdt_getprop(gd->fdt_blob, offset, "reg", NULL); + if (!reg) { + debug("%s: cannot find reg property in syscon node\n", + __func__); + return -EINVAL; + } + priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob, + offset, reg); if (priv->sysctl_reg == FDT_ADDR_T_NONE) { debug("%s: Cannot find syscon base address\n", __func__); return -EINVAL; @@ -841,10 +823,7 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev) priv->phyaddr = -1; priv->use_internal_phy = false;
- offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "phy"); - if (offset < 0) - offset = fdtdec_lookup_phandle(gd->fdt_blob, node, - "phy-handle"); + offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "phy-handle"); if (offset < 0) { debug("%s: Cannot find PHY address\n", __func__); return -EINVAL; @@ -871,17 +850,12 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev) }
if (priv->variant == H3_EMAC) { - if (fdt_getprop(gd->fdt_blob, node, - "allwinner,use-internal-phy", NULL)) - priv->use_internal_phy = true; - else { - int parent = fdt_parent_offset(gd->fdt_blob, offset); + int parent = fdt_parent_offset(gd->fdt_blob, offset);
- if (parent >= 0 && - !fdt_node_check_compatible(gd->fdt_blob, parent, - "allwinner,sun8i-h3-mdio-internal")) - priv->use_internal_phy = true; - } + if (parent >= 0 && + !fdt_node_check_compatible(gd->fdt_blob, parent, + "allwinner,sun8i-h3-mdio-internal")) + priv->use_internal_phy = true; }
priv->interface = pdata->phy_interface;
On Fri, Feb 9, 2018 at 7:00 AM, Andre Przywara andre.przywara@arm.com wrote:
Compared to the last post, this converts U-Boot's DTs over to use the new binding, so that the final patch can remove support for the old binding from U-Boot EMAC driver. The Linux DTs can be synced in later once we solved the size problem.
================================================ The existing sun8i-emac driver in U-Boot uses some preliminary bindings, which matched our own DTs. Now that the Linux kernel got a driver, lets update our probe code to handle those Linux DTs as well. The first patch adds the missing compatible strings for the pinctrl drivers, which is needed for using the sunxi_name_to_gpio() lookup function. Patch 2/7 updates the pinctrl parser used in the sun8i-emac driver, to cope with the new, generic Allwinner pinctrl bindings. Patch 3/7 extends the probe routine in the Ethernet driver to deal with both the old and the new bindings. Patches 4, 5 and 6 update U-Boot's DTs for boards using the A64, H3 and H5 SoC, respectively, to actually use the new binding in their EMAC nodes. This allows the final patch 7/7 to remove the support for the old binding in the EMAC driver, so we use the proper binding only. This series allows to copy in the DTs from the latest kernel. Unfortunately right now updating the DTs for the H5 and A64 breaks the build, as the resulting binary (which embeds the DT) gets to large and triggers our new image size check. As the H5 and H3 share most of the DT, we can't just update the H3 DTs either.
Same case with me with USB PHY changes, better to check size by disabling dts changes on H5/A64 if OK, then will move this to next. Once FAT transition done we can take them back - this is what I'm thinking as of now.
On Fri, Feb 09, 2018 at 01:30:02AM +0000, Andre Przywara wrote:
Compared to the last post, this converts U-Boot's DTs over to use the new binding, so that the final patch can remove support for the old binding from U-Boot EMAC driver. The Linux DTs can be synced in later once we solved the size problem.
================================================ The existing sun8i-emac driver in U-Boot uses some preliminary bindings, which matched our own DTs. Now that the Linux kernel got a driver, lets update our probe code to handle those Linux DTs as well. The first patch adds the missing compatible strings for the pinctrl drivers, which is needed for using the sunxi_name_to_gpio() lookup function. Patch 2/7 updates the pinctrl parser used in the sun8i-emac driver, to cope with the new, generic Allwinner pinctrl bindings. Patch 3/7 extends the probe routine in the Ethernet driver to deal with both the old and the new bindings. Patches 4, 5 and 6 update U-Boot's DTs for boards using the A64, H3 and H5 SoC, respectively, to actually use the new binding in their EMAC nodes. This allows the final patch 7/7 to remove the support for the old binding in the EMAC driver, so we use the proper binding only.
Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Maxime
participants (5)
-
Andre Przywara -
André Przywara
-
Jagan Teki -
Maxime Ripard -
Samuel Holland