ZynqMP emulation platforms are no longer tested and supported that's why remove macros and code around.

Signed-off-by: Michal Simek michal.simek@xilinx.com ---

Changes in v2: - s/emulatio/emulations/ in subject - Also fix clk.c for freq below 1MHz

arch/arm/cpu/armv8/zynqmp/clk.c | 10 +--------- arch/arm/cpu/armv8/zynqmp/cpu.c | 4 ---- arch/arm/include/asm/arch-zynqmp/hardware.h | 2 -- 3 files changed, 1 insertion(+), 15 deletions(-)

diff --git a/arch/arm/cpu/armv8/zynqmp/clk.c b/arch/arm/cpu/armv8/zynqmp/clk.c index 13e1977bfa1a..0593b6310fd5 100644 --- a/arch/arm/cpu/armv8/zynqmp/clk.c +++ b/arch/arm/cpu/armv8/zynqmp/clk.c @@ -16,10 +16,6 @@ unsigned long zynqmp_get_system_timer_freq(void) u32 ver = zynqmp_get_silicon_version();

switch (ver) { - case ZYNQMP_CSU_VERSION_VELOCE: - return 10000; - case ZYNQMP_CSU_VERSION_EP108: - return 4000000; case ZYNQMP_CSU_VERSION_QEMU: return 50000000; } @@ -40,11 +36,7 @@ int set_cpu_clk_info(void) { gd->cpu_clk = get_tbclk();

- /* Support Veloce to show at least 1MHz via bdi */ - if (gd->cpu_clk > 1000000) - gd->bd->bi_arm_freq = gd->cpu_clk / 1000000; - else - gd->bd->bi_arm_freq = 1; + gd->bd->bi_arm_freq = gd->cpu_clk / 1000000;

gd->bd->bi_dsp_freq = 0;

diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c index 2748d65d14b4..792a3e1b655f 100644 --- a/arch/arm/cpu/armv8/zynqmp/cpu.c +++ b/arch/arm/cpu/armv8/zynqmp/cpu.c @@ -135,12 +135,8 @@ unsigned int zynqmp_get_silicon_version(void) gd->cpu_clk = get_tbclk();

switch (gd->cpu_clk) { - case 0 ... 1000000: - return ZYNQMP_CSU_VERSION_VELOCE; case 50000000: return ZYNQMP_CSU_VERSION_QEMU; - case 4000000: - return ZYNQMP_CSU_VERSION_EP108; }

return ZYNQMP_CSU_VERSION_SILICON; diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 52b2e506f211..7961a247e196 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -133,8 +133,6 @@ struct apu_regs { /* Board version value */ #define ZYNQMP_CSU_BASEADDR 0xFFCA0000 #define ZYNQMP_CSU_VERSION_SILICON 0x0 -#define ZYNQMP_CSU_VERSION_EP108 0x1 -#define ZYNQMP_CSU_VERSION_VELOCE 0x2 #define ZYNQMP_CSU_VERSION_QEMU 0x3

#define ZYNQMP_CSU_VERSION_EMPTY_SHIFT 20