[PATCH 1/2] pinctrl: probe pinctrl drivers during post-bind
Currently, pinctrl drivers only get probed if pinconf is actually being used, however on SoC-s like Armada 3720 pinctrl driver is a also the GPIO driver.
So, if the pinctrl driver doesn't get probed GPIO-s won't get registered and thus they cannot be used.
This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s and without them being registered networking won't work as it only has one SFP slot and the TX disable GPIO is on the SB controller.
So, probe the pinctrl drivers using DM_FLAG_PROBE_AFTER_BIND like LED uclass does.
Signed-off-by: Robert Marko robert.marko@sartura.hr --- drivers/pinctrl/pinctrl-uclass.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c index 4462ed20e2..38ce2b5e0a 100644 --- a/drivers/pinctrl/pinctrl-uclass.c +++ b/drivers/pinctrl/pinctrl-uclass.c @@ -402,6 +402,13 @@ static int __maybe_unused pinctrl_post_bind(struct udevice *dev) { const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
+ /* + * Make sure that the pinctrl driver gets probed after binding + * as some pinctrl drivers also register the GPIO driver during + * probe, and if they are not probed GPIO-s are not registered. + */ + dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND); + if (!ops) { dev_dbg(dev, "ops is not set. Do not bind.\n"); return -EINVAL;
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko robert.marko@sartura.hr --- arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++++++ arch/arm/dts/armada-3720-eDPU.dts | 14 ++ arch/arm/dts/armada-3720-uDPU.dts | 153 +------------------- arch/arm/dts/armada-3720-uDPU.dtsi | 163 ++++++++++++++++++++++ configs/eDPU_defconfig | 99 +++++++++++++ 5 files changed, 322 insertions(+), 152 deletions(-) create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi create mode 100644 arch/arm/dts/armada-3720-eDPU.dts create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi new file mode 100644 index 0000000000..1b2648f64d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/ { + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + product = "eDPU"; + }; + + baseboard { + product = "eDPU"; + }; + + chassis { + product = "eDPU"; + }; + }; + }; +}; + +&spi0 { + u-boot,dm-pre-reloc; + + spi-flash@0 { + u-boot,dm-pre-reloc; + }; +}; + +&sdhci0 { + u-boot,dm-pre-reloc; +}; + +ð0 { + /* G.hn does not work without additional configuration */ + status = "disabled"; +}; + +ð1 { + fixed-link { + speed = <1000>; + full-duplex; + }; +}; diff --git a/arch/arm/dts/armada-3720-eDPU.dts b/arch/arm/dts/armada-3720-eDPU.dts new file mode 100644 index 0000000000..f2e2d21a8d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "armada-3720-uDPU.dtsi" + +/ { + model = "Methode eDPU Board"; + compatible = "methode,edpu", "marvell,armada3720"; +}; + +ð0 { + phy-mode = "1000base-x"; +}; diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts index 1f534c0c65..b146fae9f6 100644 --- a/arch/arm/dts/armada-3720-uDPU.dts +++ b/arch/arm/dts/armada-3720-uDPU.dts @@ -1,67 +1,13 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Device tree for the uDPU board. - * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3) - * Copyright (C) 2016 Marvell - * Copyright (C) 2019 Methode Electronics - * Copyright (C) 2019 Telus - * - * Vladimir Vid vladimir.vid@sartura.hr - */
/dts-v1/;
-#include <dt-bindings/gpio/gpio.h> -#include "armada-372x.dtsi" +#include "armada-3720-uDPU.dtsi"
/ { model = "Methode uDPU Board"; compatible = "methode,udpu", "marvell,armada3720";
- chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0x20000000>; - }; - - leds { - pinctrl-names = "default"; - compatible = "gpio-leds"; - - power1 { - label = "udpu:green:power"; - gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; - }; - - power2 { - label = "udpu:red:power"; - gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; - }; - - network1 { - label = "udpu:green:network"; - gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; - }; - - network2 { - label = "udpu:red:network"; - gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; - }; - - alarm1 { - label = "udpu:green:alarm"; - gpios = <&gpionb 15 GPIO_ACTIVE_LOW>; - }; - - alarm2 { - label = "udpu:red:alarm"; - gpios = <&gpionb 16 GPIO_ACTIVE_LOW>; - }; - }; - sfp_eth0: sfp-eth0 { compatible = "sff,sfp"; i2c-bus = <&i2c0>; @@ -71,55 +17,6 @@ tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; }; - - sfp_eth1: sfp-eth1 { - compatible = "sff,sfp"; - i2c-bus = <&i2c1>; - los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>; - maximum-power-milliwatt = <3000>; - }; -}; - -&sdhci0 { - status = "okay"; - bus-width = <8>; - mmc-ddr-1_8v; - mmc-hs400-1_8v; - marvell,pad-type = "fixed-1-8v"; - non-removable; - no-sd; - no-sdio; -}; - -&spi0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&spi_quad_pins>; - - spi-flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <54000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "firmware"; - reg = <0x0 0x180000>; - }; - - partition@180000 { - label = "u-boot-env"; - reg = <0x180000 0x10000>; - }; - }; - }; };
&pinctrl_nb { @@ -127,11 +24,6 @@ groups = "i2c1"; function = "gpio"; }; - - i2c2_recovery_pins: i2c2-recovery-pins { - groups = "i2c2"; - function = "gpio"; - }; };
&i2c0 { @@ -144,50 +36,7 @@ sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; };
-&i2c1 { - status = "okay"; - pinctrl-names = "default", "recovery"; - pinctrl-0 = <&i2c2_pins>; - pinctrl-1 = <&i2c2_recovery_pins>; - /delete-property/mrvl,i2c-fast-mode; - scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - - nct375@48 { - status = "okay"; - compatible = "ti,tmp75c"; - reg = <0x48>; - }; - - nct375@49 { - status = "okay"; - compatible = "ti,tmp75c"; - reg = <0x49>; - }; -}; - ð0 { phy-mode = "sgmii"; - status = "okay"; - managed = "in-band-status"; - phys = <&comphy1 0>; sfp = <&sfp_eth0>; }; - -ð1 { - phy-mode = "sgmii"; - status = "okay"; - managed = "in-band-status"; - phys = <&comphy0 1>; - sfp = <&sfp_eth1>; -}; - -&usb3 { - status = "okay"; - phys = <&usb2_utmi_otg_phy>; - phy-names = "usb2-utmi-otg-phy"; -}; - -&uart0 { - status = "okay"; -}; diff --git a/arch/arm/dts/armada-3720-uDPU.dtsi b/arch/arm/dts/armada-3720-uDPU.dtsi new file mode 100644 index 0000000000..5e38acc92a --- /dev/null +++ b/arch/arm/dts/armada-3720-uDPU.dtsi @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device tree for the uDPU board. + * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3) + * Copyright (C) 2016 Marvell + * Copyright (C) 2019 Methode Electronics + * Copyright (C) 2019 Telus + * + * Vladimir Vid vladimir.vid@sartura.hr + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include "armada-372x.dtsi" + +/ { + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0x20000000>; + }; + + leds { + pinctrl-names = "default"; + compatible = "gpio-leds"; + + power1 { + label = "udpu:green:power"; + gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; + }; + + power2 { + label = "udpu:red:power"; + gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; + }; + + network1 { + label = "udpu:green:network"; + gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; + }; + + network2 { + label = "udpu:red:network"; + gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; + }; + + alarm1 { + label = "udpu:green:alarm"; + gpios = <&gpionb 15 GPIO_ACTIVE_LOW>; + }; + + alarm2 { + label = "udpu:red:alarm"; + gpios = <&gpionb 16 GPIO_ACTIVE_LOW>; + }; + }; + + sfp_eth1: sfp-eth1 { + compatible = "sff,sfp"; + i2c-bus = <&i2c1>; + los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>; + tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>; + tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>; + maximum-power-milliwatt = <3000>; + }; +}; + +&sdhci0 { + status = "okay"; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs400-1_8v; + marvell,pad-type = "fixed-1-8v"; + non-removable; + no-sd; + no-sdio; +}; + +&spi0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi_quad_pins>; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <54000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + /* only bootloader is located on the SPI */ + partition@0 { + label = "firmware"; + reg = <0x0 0x180000>; + }; + + partition@180000 { + label = "u-boot-env"; + reg = <0x180000 0x10000>; + }; + }; + }; +}; + +&pinctrl_nb { + i2c2_recovery_pins: i2c2-recovery-pins { + groups = "i2c2"; + function = "gpio"; + }; +}; + +&i2c1 { + status = "okay"; + pinctrl-names = "default", "recovery"; + pinctrl-0 = <&i2c2_pins>; + pinctrl-1 = <&i2c2_recovery_pins>; + /delete-property/mrvl,i2c-fast-mode; + scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + nct375@48 { + status = "okay"; + compatible = "ti,tmp75c"; + reg = <0x48>; + }; + + nct375@49 { + status = "okay"; + compatible = "ti,tmp75c"; + reg = <0x49>; + }; +}; + +ð0 { + status = "okay"; + managed = "in-band-status"; + phys = <&comphy1 0>; +}; + +ð1 { + phy-mode = "sgmii"; + status = "okay"; + managed = "in-band-status"; + phys = <&comphy0 1>; + sfp = <&sfp_eth1>; +}; + +&usb3 { + status = "okay"; + phys = <&usb2_utmi_otg_phy>; + phy-names = "usb2-utmi-otg-phy"; +}; + +&uart0 { + status = "okay"; +}; diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig new file mode 100644 index 0000000000..37f91fc4c2 --- /dev/null +++ b/configs/eDPU_defconfig @@ -0,0 +1,99 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_TEXT_BASE=0x00000000 +CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_MVEBU_EFUSE=y +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-eDPU" +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_SYS_LOAD_ADDR=0x6000000 +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_USE_PREBOOT=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="uDPU>> " +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_MVEBU_BUBT=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MAC_PARTITION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_AHCI_MVEBU=y +CONFIG_CLK=y +CONFIG_CLK_MVEBU=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_GPIO=y +CONFIG_SYS_I2C_MV=y +CONFIG_MISC=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y +CONFIG_MVNETA=y +CONFIG_MVMDIO=y +CONFIG_PCI=y +CONFIG_PCI_AARDVARK=y +CONFIG_PHY=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_MVEBU_A3700_UART=y +CONFIG_MVEBU_A3700_SPI=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_LZO=y +CONFIG_SPL_LZO=y
On Friday 06 May 2022 20:01:40 Robert Marko wrote:
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko robert.marko@sartura.hr
Send also these changes to Linux kernel as now all 3720 files are same in Linux and U-Boot. We do not want to handle divergence again...
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++++++ arch/arm/dts/armada-3720-eDPU.dts | 14 ++ arch/arm/dts/armada-3720-uDPU.dts | 153 +------------------- arch/arm/dts/armada-3720-uDPU.dtsi | 163 ++++++++++++++++++++++ configs/eDPU_defconfig | 99 +++++++++++++ 5 files changed, 322 insertions(+), 152 deletions(-) create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi create mode 100644 arch/arm/dts/armada-3720-eDPU.dts create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi new file mode 100644 index 0000000000..1b2648f64d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+
+/ {
- smbios {
compatible = "u-boot,sysinfo-smbios";smbios {system {product = "eDPU";};baseboard {product = "eDPU";};chassis {product = "eDPU";};};- };
+};
+&spi0 {
- u-boot,dm-pre-reloc;
- spi-flash@0 {
u-boot,dm-pre-reloc;- };
+};
+&sdhci0 {
- u-boot,dm-pre-reloc;
+};
+ð0 {
- /* G.hn does not work without additional configuration */
- status = "disabled";
+};
+ð1 {
- fixed-link {
speed = <1000>;full-duplex;- };
+};
Is this U-Boot specific fixed-link property still needed? IIRC Marek's patches for fixing mvneta were merged into master.
diff --git a/arch/arm/dts/armada-3720-eDPU.dts b/arch/arm/dts/armada-3720-eDPU.dts new file mode 100644 index 0000000000..f2e2d21a8d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/dts-v1/;
+#include "armada-3720-uDPU.dtsi"
+/ {
- model = "Methode eDPU Board";
- compatible = "methode,edpu", "marvell,armada3720";
+};
+ð0 {
- phy-mode = "1000base-x";
+}; diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts index 1f534c0c65..b146fae9f6 100644 --- a/arch/arm/dts/armada-3720-uDPU.dts +++ b/arch/arm/dts/armada-3720-uDPU.dts @@ -1,67 +1,13 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/*
- Device tree for the uDPU board.
- Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- Copyright (C) 2016 Marvell
- Copyright (C) 2019 Methode Electronics
- Copyright (C) 2019 Telus
- Vladimir Vid vladimir.vid@sartura.hr
- */
/dts-v1/;
-#include <dt-bindings/gpio/gpio.h> -#include "armada-372x.dtsi" +#include "armada-3720-uDPU.dtsi"
/ { model = "Methode uDPU Board"; compatible = "methode,udpu", "marvell,armada3720";
- chosen {
stdout-path = "serial0:115200n8";- };
- memory@0 {
device_type = "memory";reg = <0x00000000 0x00000000 0x00000000 0x20000000>;- };
- leds {
pinctrl-names = "default";compatible = "gpio-leds";power1 {label = "udpu:green:power";gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;};power2 {label = "udpu:red:power";gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;};network1 {label = "udpu:green:network";gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;};network2 {label = "udpu:red:network";gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;};alarm1 {label = "udpu:green:alarm";gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;};alarm2 {label = "udpu:red:alarm";gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;};- };
- sfp_eth0: sfp-eth0 { compatible = "sff,sfp"; i2c-bus = <&i2c0>;
@@ -71,55 +17,6 @@ tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; };
- sfp_eth1: sfp-eth1 {
compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;maximum-power-milliwatt = <3000>;- };
-};
-&sdhci0 {
- status = "okay";
- bus-width = <8>;
- mmc-ddr-1_8v;
- mmc-hs400-1_8v;
- marvell,pad-type = "fixed-1-8v";
- non-removable;
- no-sd;
- no-sdio;
-};
-&spi0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&spi_quad_pins>;
- spi-flash@0 {
compatible = "jedec,spi-nor";reg = <0>;spi-max-frequency = <54000000>;partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;partition@0 {label = "firmware";reg = <0x0 0x180000>;};partition@180000 {label = "u-boot-env";reg = <0x180000 0x10000>;};};- };
};
&pinctrl_nb { @@ -127,11 +24,6 @@ groups = "i2c1"; function = "gpio"; };
- i2c2_recovery_pins: i2c2-recovery-pins {
groups = "i2c2";function = "gpio";- };
};
&i2c0 { @@ -144,50 +36,7 @@ sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; };
-&i2c1 {
- status = "okay";
- pinctrl-names = "default", "recovery";
- pinctrl-0 = <&i2c2_pins>;
- pinctrl-1 = <&i2c2_recovery_pins>;
- /delete-property/mrvl,i2c-fast-mode;
- scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- nct375@48 {
status = "okay";compatible = "ti,tmp75c";reg = <0x48>;- };
- nct375@49 {
status = "okay";compatible = "ti,tmp75c";reg = <0x49>;- };
-};
ð0 { phy-mode = "sgmii";
- status = "okay";
- managed = "in-band-status";
- phys = <&comphy1 0>; sfp = <&sfp_eth0>;
};
-ð1 {
- phy-mode = "sgmii";
- status = "okay";
- managed = "in-band-status";
- phys = <&comphy0 1>;
- sfp = <&sfp_eth1>;
-};
-&usb3 {
- status = "okay";
- phys = <&usb2_utmi_otg_phy>;
- phy-names = "usb2-utmi-otg-phy";
-};
-&uart0 {
- status = "okay";
-}; diff --git a/arch/arm/dts/armada-3720-uDPU.dtsi b/arch/arm/dts/armada-3720-uDPU.dtsi new file mode 100644 index 0000000000..5e38acc92a --- /dev/null +++ b/arch/arm/dts/armada-3720-uDPU.dtsi @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Device tree for the uDPU board.
- Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- Copyright (C) 2016 Marvell
- Copyright (C) 2019 Methode Electronics
- Copyright (C) 2019 Telus
- Vladimir Vid vladimir.vid@sartura.hr
- */
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h> +#include "armada-372x.dtsi"
+/ {
- chosen {
stdout-path = "serial0:115200n8";- };
- memory@0 {
device_type = "memory";reg = <0x00000000 0x00000000 0x00000000 0x20000000>;- };
- leds {
pinctrl-names = "default";compatible = "gpio-leds";power1 {label = "udpu:green:power";gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;};power2 {label = "udpu:red:power";gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;};network1 {label = "udpu:green:network";gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;};network2 {label = "udpu:red:network";gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;};alarm1 {label = "udpu:green:alarm";gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;};alarm2 {label = "udpu:red:alarm";gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;};- };
- sfp_eth1: sfp-eth1 {
compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;maximum-power-milliwatt = <3000>;- };
+};
+&sdhci0 {
- status = "okay";
- bus-width = <8>;
- mmc-ddr-1_8v;
- mmc-hs400-1_8v;
- marvell,pad-type = "fixed-1-8v";
- non-removable;
- no-sd;
- no-sdio;
+};
+&spi0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&spi_quad_pins>;
- spi-flash@0 {
compatible = "jedec,spi-nor";reg = <0>;spi-max-frequency = <54000000>;partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;/* only bootloader is located on the SPI */partition@0 {label = "firmware";reg = <0x0 0x180000>;};partition@180000 {label = "u-boot-env";reg = <0x180000 0x10000>;};};- };
+};
+&pinctrl_nb {
- i2c2_recovery_pins: i2c2-recovery-pins {
groups = "i2c2";function = "gpio";- };
+};
+&i2c1 {
- status = "okay";
- pinctrl-names = "default", "recovery";
- pinctrl-0 = <&i2c2_pins>;
- pinctrl-1 = <&i2c2_recovery_pins>;
- /delete-property/mrvl,i2c-fast-mode;
- scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- nct375@48 {
status = "okay";compatible = "ti,tmp75c";reg = <0x48>;- };
- nct375@49 {
status = "okay";compatible = "ti,tmp75c";reg = <0x49>;- };
+};
+ð0 {
- status = "okay";
- managed = "in-band-status";
- phys = <&comphy1 0>;
+};
+ð1 {
- phy-mode = "sgmii";
- status = "okay";
- managed = "in-band-status";
- phys = <&comphy0 1>;
- sfp = <&sfp_eth1>;
+};
+&usb3 {
- status = "okay";
- phys = <&usb2_utmi_otg_phy>;
- phy-names = "usb2-utmi-otg-phy";
+};
+&uart0 {
- status = "okay";
+}; diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig new file mode 100644 index 0000000000..37f91fc4c2 --- /dev/null +++ b/configs/eDPU_defconfig @@ -0,0 +1,99 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_TEXT_BASE=0x00000000 +CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_MVEBU_EFUSE=y +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-eDPU" +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_SYS_LOAD_ADDR=0x6000000 +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y
There is SATA/AHCI on this board? I guess that not as it has 2 ethernet serdeses and third seredes is in usb mode. So there is no option for SATA, right?
+CONFIG_DISTRO_DEFAULTS=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_USE_PREBOOT=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="uDPU>> " +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PCI=y
And neither PCIe, right?
+CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_MVEBU_BUBT=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MAC_PARTITION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_AHCI_MVEBU=y +CONFIG_CLK=y +CONFIG_CLK_MVEBU=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_GPIO=y +CONFIG_SYS_I2C_MV=y +CONFIG_MISC=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y
And neither E1000 PCIe card?
+CONFIG_MVNETA=y +CONFIG_MVMDIO=y +CONFIG_PCI=y +CONFIG_PCI_AARDVARK=y +CONFIG_PHY=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_MVEBU_A3700_UART=y +CONFIG_MVEBU_A3700_SPI=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_LZO=y
+CONFIG_SPL_LZO=y
2.35.1
Btw, cannot you detect at runtime on which variant of board (uDPU vs eDPU) are you running? If yes, this would allow to use just one u-boot binary and therefore also reduce number of defconfig files. Because u-boot already supports inclusion of more DT files into binary and can do decision at runtime which DT one to use.
On Sat, May 7, 2022 at 4:03 PM Pali Rohár pali@kernel.org wrote:
On Friday 06 May 2022 20:01:40 Robert Marko wrote:
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko robert.marko@sartura.hr
Send also these changes to Linux kernel as now all 3720 files are same in Linux and U-Boot. We do not want to handle divergence again...
Yes, I planned to send it the same day but only got around to sending it to Linux today.
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++++++ arch/arm/dts/armada-3720-eDPU.dts | 14 ++ arch/arm/dts/armada-3720-uDPU.dts | 153 +------------------- arch/arm/dts/armada-3720-uDPU.dtsi | 163 ++++++++++++++++++++++ configs/eDPU_defconfig | 99 +++++++++++++ 5 files changed, 322 insertions(+), 152 deletions(-) create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi create mode 100644 arch/arm/dts/armada-3720-eDPU.dts create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi new file mode 100644 index 0000000000..1b2648f64d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+
+/ {
smbios {compatible = "u-boot,sysinfo-smbios";smbios {system {product = "eDPU";};baseboard {product = "eDPU";};chassis {product = "eDPU";};};};+};
+&spi0 {
u-boot,dm-pre-reloc;spi-flash@0 {u-boot,dm-pre-reloc;};+};
+&sdhci0 {
u-boot,dm-pre-reloc;+};
+ð0 {
/* G.hn does not work without additional configuration */status = "disabled";+};
+ð1 {
fixed-link {speed = <1000>;full-duplex;};+};
Is this U-Boot specific fixed-link property still needed? IIRC Marek's patches for fixing mvneta were merged into master.
Unfortunately, it's still required as there is no ethernet PHY-s present, only an SFP slot. I am aware of Mareks fixes, he did a nice cleanup of the driver.
diff --git a/arch/arm/dts/armada-3720-eDPU.dts b/arch/arm/dts/armada-3720-eDPU.dts new file mode 100644 index 0000000000..f2e2d21a8d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/dts-v1/;
+#include "armada-3720-uDPU.dtsi"
+/ {
model = "Methode eDPU Board";compatible = "methode,edpu", "marvell,armada3720";+};
+ð0 {
phy-mode = "1000base-x";+}; diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts index 1f534c0c65..b146fae9f6 100644 --- a/arch/arm/dts/armada-3720-uDPU.dts +++ b/arch/arm/dts/armada-3720-uDPU.dts @@ -1,67 +1,13 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/*
- Device tree for the uDPU board.
- Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- Copyright (C) 2016 Marvell
- Copyright (C) 2019 Methode Electronics
- Copyright (C) 2019 Telus
- Vladimir Vid vladimir.vid@sartura.hr
- */
/dts-v1/;
-#include <dt-bindings/gpio/gpio.h> -#include "armada-372x.dtsi" +#include "armada-3720-uDPU.dtsi"
/ { model = "Methode uDPU Board"; compatible = "methode,udpu", "marvell,armada3720";
chosen {stdout-path = "serial0:115200n8";};memory@0 {device_type = "memory";reg = <0x00000000 0x00000000 0x00000000 0x20000000>;};leds {pinctrl-names = "default";compatible = "gpio-leds";power1 {label = "udpu:green:power";gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;};power2 {label = "udpu:red:power";gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;};network1 {label = "udpu:green:network";gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;};network2 {label = "udpu:red:network";gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;};alarm1 {label = "udpu:green:alarm";gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;};alarm2 {label = "udpu:red:alarm";gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;};};sfp_eth0: sfp-eth0 { compatible = "sff,sfp"; i2c-bus = <&i2c0>;@@ -71,55 +17,6 @@ tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; };
sfp_eth1: sfp-eth1 {compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;maximum-power-milliwatt = <3000>;};-};
-&sdhci0 {
status = "okay";bus-width = <8>;mmc-ddr-1_8v;mmc-hs400-1_8v;marvell,pad-type = "fixed-1-8v";non-removable;no-sd;no-sdio;-};
-&spi0 {
status = "okay";pinctrl-names = "default";pinctrl-0 = <&spi_quad_pins>;spi-flash@0 {compatible = "jedec,spi-nor";reg = <0>;spi-max-frequency = <54000000>;partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;partition@0 {label = "firmware";reg = <0x0 0x180000>;};partition@180000 {label = "u-boot-env";reg = <0x180000 0x10000>;};};};};
&pinctrl_nb { @@ -127,11 +24,6 @@ groups = "i2c1"; function = "gpio"; };
i2c2_recovery_pins: i2c2-recovery-pins {groups = "i2c2";function = "gpio";};};
&i2c0 { @@ -144,50 +36,7 @@ sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; };
-&i2c1 {
status = "okay";pinctrl-names = "default", "recovery";pinctrl-0 = <&i2c2_pins>;pinctrl-1 = <&i2c2_recovery_pins>;/delete-property/mrvl,i2c-fast-mode;scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;nct375@48 {status = "okay";compatible = "ti,tmp75c";reg = <0x48>;};nct375@49 {status = "okay";compatible = "ti,tmp75c";reg = <0x49>;};-};
ð0 { phy-mode = "sgmii";
status = "okay";managed = "in-band-status";phys = <&comphy1 0>; sfp = <&sfp_eth0>;};
-ð1 {
phy-mode = "sgmii";status = "okay";managed = "in-band-status";phys = <&comphy0 1>;sfp = <&sfp_eth1>;-};
-&usb3 {
status = "okay";phys = <&usb2_utmi_otg_phy>;phy-names = "usb2-utmi-otg-phy";-};
-&uart0 {
status = "okay";-}; diff --git a/arch/arm/dts/armada-3720-uDPU.dtsi b/arch/arm/dts/armada-3720-uDPU.dtsi new file mode 100644 index 0000000000..5e38acc92a --- /dev/null +++ b/arch/arm/dts/armada-3720-uDPU.dtsi @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Device tree for the uDPU board.
- Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- Copyright (C) 2016 Marvell
- Copyright (C) 2019 Methode Electronics
- Copyright (C) 2019 Telus
- Vladimir Vid vladimir.vid@sartura.hr
- */
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h> +#include "armada-372x.dtsi"
+/ {
chosen {stdout-path = "serial0:115200n8";};memory@0 {device_type = "memory";reg = <0x00000000 0x00000000 0x00000000 0x20000000>;};leds {pinctrl-names = "default";compatible = "gpio-leds";power1 {label = "udpu:green:power";gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;};power2 {label = "udpu:red:power";gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;};network1 {label = "udpu:green:network";gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;};network2 {label = "udpu:red:network";gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;};alarm1 {label = "udpu:green:alarm";gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;};alarm2 {label = "udpu:red:alarm";gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;};};sfp_eth1: sfp-eth1 {compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;maximum-power-milliwatt = <3000>;};+};
+&sdhci0 {
status = "okay";bus-width = <8>;mmc-ddr-1_8v;mmc-hs400-1_8v;marvell,pad-type = "fixed-1-8v";non-removable;no-sd;no-sdio;+};
+&spi0 {
status = "okay";pinctrl-names = "default";pinctrl-0 = <&spi_quad_pins>;spi-flash@0 {compatible = "jedec,spi-nor";reg = <0>;spi-max-frequency = <54000000>;partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;/* only bootloader is located on the SPI */partition@0 {label = "firmware";reg = <0x0 0x180000>;};partition@180000 {label = "u-boot-env";reg = <0x180000 0x10000>;};};};+};
+&pinctrl_nb {
i2c2_recovery_pins: i2c2-recovery-pins {groups = "i2c2";function = "gpio";};+};
+&i2c1 {
status = "okay";pinctrl-names = "default", "recovery";pinctrl-0 = <&i2c2_pins>;pinctrl-1 = <&i2c2_recovery_pins>;/delete-property/mrvl,i2c-fast-mode;scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;nct375@48 {status = "okay";compatible = "ti,tmp75c";reg = <0x48>;};nct375@49 {status = "okay";compatible = "ti,tmp75c";reg = <0x49>;};+};
+ð0 {
status = "okay";managed = "in-band-status";phys = <&comphy1 0>;+};
+ð1 {
phy-mode = "sgmii";status = "okay";managed = "in-band-status";phys = <&comphy0 1>;sfp = <&sfp_eth1>;+};
+&usb3 {
status = "okay";phys = <&usb2_utmi_otg_phy>;phy-names = "usb2-utmi-otg-phy";+};
+&uart0 {
status = "okay";+}; diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig new file mode 100644 index 0000000000..37f91fc4c2 --- /dev/null +++ b/configs/eDPU_defconfig @@ -0,0 +1,99 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_TEXT_BASE=0x00000000 +CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_MVEBU_EFUSE=y +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-eDPU" +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_SYS_LOAD_ADDR=0x6000000 +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y
There is SATA/AHCI on this board? I guess that not as it has 2 ethernet serdeses and third seredes is in usb mode. So there is no option for SATA, right?
That's right, there is no SATA, it's a leftover from the uDPU defconfig.
+CONFIG_DISTRO_DEFAULTS=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_USE_PREBOOT=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="uDPU>> " +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PCI=y
And neither PCIe, right?
Correct, more leftovers from uDPU defconfig.
+CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_MVEBU_BUBT=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MAC_PARTITION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_AHCI_MVEBU=y +CONFIG_CLK=y +CONFIG_CLK_MVEBU=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_GPIO=y +CONFIG_SYS_I2C_MV=y +CONFIG_MISC=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y
And neither E1000 PCIe card?
Correct, more leftovers from uDPU defconfig. I have removed all of these in v2.
+CONFIG_MVNETA=y +CONFIG_MVMDIO=y +CONFIG_PCI=y +CONFIG_PCI_AARDVARK=y +CONFIG_PHY=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_MVEBU_A3700_UART=y +CONFIG_MVEBU_A3700_SPI=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_LZO=y
+CONFIG_SPL_LZO=y
2.35.1
Btw, cannot you detect at runtime on which variant of board (uDPU vs eDPU) are you running? If yes, this would allow to use just one u-boot binary and therefore also reduce number of defconfig files. Because u-boot already supports inclusion of more DT files into binary and can do decision at runtime which DT one to use.
I thought about this, but I don't know how to differentiate them really as there is no EEPROM or something like that, or an I2C peripheral difference.
Regards, Robert
On Monday 09 May 2022 13:07:00 Robert Marko wrote:
On Sat, May 7, 2022 at 4:03 PM Pali Rohár pali@kernel.org wrote:
On Friday 06 May 2022 20:01:40 Robert Marko wrote:
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko robert.marko@sartura.hr
Send also these changes to Linux kernel as now all 3720 files are same in Linux and U-Boot. We do not want to handle divergence again...
Yes, I planned to send it the same day but only got around to sending it to Linux today.
Perfect!
+ð1 {
fixed-link {speed = <1000>;full-duplex;};+};
Is this U-Boot specific fixed-link property still needed? IIRC Marek's patches for fixing mvneta were merged into master.
Unfortunately, it's still required as there is no ethernet PHY-s present, only an SFP slot.
Ok!
I am aware of Mareks fixes, he did a nice cleanup of the driver.
+CONFIG_AHCI=y
There is SATA/AHCI on this board? I guess that not as it has 2 ethernet serdeses and third seredes is in usb mode. So there is no option for SATA, right?
That's right, there is no SATA, it's a leftover from the uDPU defconfig.
+CONFIG_CMD_PCI=y
And neither PCIe, right?
Correct, more leftovers from uDPU defconfig.
+CONFIG_E1000=y
And neither E1000 PCIe card?
Correct, more leftovers from uDPU defconfig. I have removed all of these in v2.
Ok!
Btw, cannot you detect at runtime on which variant of board (uDPU vs eDPU) are you running? If yes, this would allow to use just one u-boot binary and therefore also reduce number of defconfig files. Because u-boot already supports inclusion of more DT files into binary and can do decision at runtime which DT one to use.
I thought about this, but I don't know how to differentiate them really as there is no EEPROM or something like that, or an I2C peripheral difference.
Well, if is is not possible then stick with two configs.
Anyway, Marek already wrote autodetection of more A3720 boards into the CZ.NIC WTMI firmware. And uDPU is detected based on non-existence of PHY: https://gitlab.nic.cz/turris/mox-boot-builder/-/blob/master/wtmi/board.c
On 06.05.22 20:01, Robert Marko wrote:
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko robert.marko@sartura.hr
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++++++ arch/arm/dts/armada-3720-eDPU.dts | 14 ++ arch/arm/dts/armada-3720-uDPU.dts | 153 +------------------- arch/arm/dts/armada-3720-uDPU.dtsi | 163 ++++++++++++++++++++++ configs/eDPU_defconfig | 99 +++++++++++++ 5 files changed, 322 insertions(+), 152 deletions(-) create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi create mode 100644 arch/arm/dts/armada-3720-eDPU.dts create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi new file mode 100644 index 0000000000..1b2648f64d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+
+/ {
- smbios {
compatible = "u-boot,sysinfo-smbios";smbios {system {product = "eDPU";};baseboard {product = "eDPU";};chassis {product = "eDPU";};};- };
+};
+&spi0 {
- u-boot,dm-pre-reloc;
- spi-flash@0 {
u-boot,dm-pre-reloc;- };
+};
+&sdhci0 {
- u-boot,dm-pre-reloc;
+};
+ð0 {
- /* G.hn does not work without additional configuration */
- status = "disabled";
+};
+ð1 {
- fixed-link {
speed = <1000>;full-duplex;- };
+}; diff --git a/arch/arm/dts/armada-3720-eDPU.dts b/arch/arm/dts/armada-3720-eDPU.dts new file mode 100644 index 0000000000..f2e2d21a8d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/dts-v1/;
+#include "armada-3720-uDPU.dtsi"
+/ {
- model = "Methode eDPU Board";
- compatible = "methode,edpu", "marvell,armada3720";
+};
+ð0 {
- phy-mode = "1000base-x";
+}; diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts index 1f534c0c65..b146fae9f6 100644 --- a/arch/arm/dts/armada-3720-uDPU.dts +++ b/arch/arm/dts/armada-3720-uDPU.dts @@ -1,67 +1,13 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/*
- Device tree for the uDPU board.
- Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- Copyright (C) 2016 Marvell
- Copyright (C) 2019 Methode Electronics
- Copyright (C) 2019 Telus
- Vladimir Vid vladimir.vid@sartura.hr
*/
/dts-v1/;
-#include <dt-bindings/gpio/gpio.h> -#include "armada-372x.dtsi" +#include "armada-3720-uDPU.dtsi"
/ { model = "Methode uDPU Board"; compatible = "methode,udpu", "marvell,armada3720";
- chosen {
stdout-path = "serial0:115200n8";- };
- memory@0 {
device_type = "memory";reg = <0x00000000 0x00000000 0x00000000 0x20000000>;- };
- leds {
pinctrl-names = "default";compatible = "gpio-leds";power1 {label = "udpu:green:power";gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;};power2 {label = "udpu:red:power";gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;};network1 {label = "udpu:green:network";gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;};network2 {label = "udpu:red:network";gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;};alarm1 {label = "udpu:green:alarm";gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;};alarm2 {label = "udpu:red:alarm";gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;};- };
- sfp_eth0: sfp-eth0 { compatible = "sff,sfp"; i2c-bus = <&i2c0>;
@@ -71,55 +17,6 @@ tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; };
- sfp_eth1: sfp-eth1 {
compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;maximum-power-milliwatt = <3000>;- };
-};
-&sdhci0 {
- status = "okay";
- bus-width = <8>;
- mmc-ddr-1_8v;
- mmc-hs400-1_8v;
- marvell,pad-type = "fixed-1-8v";
- non-removable;
- no-sd;
- no-sdio;
-};
-&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
spi-flash@0 {
compatible = "jedec,spi-nor";reg = <0>;spi-max-frequency = <54000000>;partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;partition@0 {label = "firmware";reg = <0x0 0x180000>;};partition@180000 {label = "u-boot-env";reg = <0x180000 0x10000>;};};}; };
&pinctrl_nb {
@@ -127,11 +24,6 @@ groups = "i2c1"; function = "gpio"; };
i2c2_recovery_pins: i2c2-recovery-pins {
groups = "i2c2";function = "gpio";}; };
&i2c0 {
@@ -144,50 +36,7 @@ sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; };
-&i2c1 {
- status = "okay";
- pinctrl-names = "default", "recovery";
- pinctrl-0 = <&i2c2_pins>;
- pinctrl-1 = <&i2c2_recovery_pins>;
- /delete-property/mrvl,i2c-fast-mode;
- scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- nct375@48 {
status = "okay";compatible = "ti,tmp75c";reg = <0x48>;- };
- nct375@49 {
status = "okay";compatible = "ti,tmp75c";reg = <0x49>;- };
-};
- ð0 { phy-mode = "sgmii";
- status = "okay";
- managed = "in-band-status";
- phys = <&comphy1 0>; sfp = <&sfp_eth0>; };
-ð1 {
- phy-mode = "sgmii";
- status = "okay";
- managed = "in-band-status";
- phys = <&comphy0 1>;
- sfp = <&sfp_eth1>;
-};
-&usb3 {
- status = "okay";
- phys = <&usb2_utmi_otg_phy>;
- phy-names = "usb2-utmi-otg-phy";
-};
-&uart0 {
- status = "okay";
-}; diff --git a/arch/arm/dts/armada-3720-uDPU.dtsi b/arch/arm/dts/armada-3720-uDPU.dtsi new file mode 100644 index 0000000000..5e38acc92a --- /dev/null +++ b/arch/arm/dts/armada-3720-uDPU.dtsi @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Device tree for the uDPU board.
- Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- Copyright (C) 2016 Marvell
- Copyright (C) 2019 Methode Electronics
- Copyright (C) 2019 Telus
- Vladimir Vid vladimir.vid@sartura.hr
- */
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h> +#include "armada-372x.dtsi"
+/ {
- chosen {
stdout-path = "serial0:115200n8";- };
- memory@0 {
device_type = "memory";reg = <0x00000000 0x00000000 0x00000000 0x20000000>;- };
- leds {
pinctrl-names = "default";compatible = "gpio-leds";power1 {label = "udpu:green:power";gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;};power2 {label = "udpu:red:power";gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;};network1 {label = "udpu:green:network";gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;};network2 {label = "udpu:red:network";gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;};alarm1 {label = "udpu:green:alarm";gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;};alarm2 {label = "udpu:red:alarm";gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;};- };
- sfp_eth1: sfp-eth1 {
compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;maximum-power-milliwatt = <3000>;- };
+};
+&sdhci0 {
- status = "okay";
- bus-width = <8>;
- mmc-ddr-1_8v;
- mmc-hs400-1_8v;
- marvell,pad-type = "fixed-1-8v";
- non-removable;
- no-sd;
- no-sdio;
+};
+&spi0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&spi_quad_pins>;
- spi-flash@0 {
compatible = "jedec,spi-nor";reg = <0>;spi-max-frequency = <54000000>;partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;/* only bootloader is located on the SPI */partition@0 {label = "firmware";reg = <0x0 0x180000>;};partition@180000 {label = "u-boot-env";reg = <0x180000 0x10000>;};};- };
+};
+&pinctrl_nb {
- i2c2_recovery_pins: i2c2-recovery-pins {
groups = "i2c2";function = "gpio";- };
+};
+&i2c1 {
- status = "okay";
- pinctrl-names = "default", "recovery";
- pinctrl-0 = <&i2c2_pins>;
- pinctrl-1 = <&i2c2_recovery_pins>;
- /delete-property/mrvl,i2c-fast-mode;
- scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- nct375@48 {
status = "okay";compatible = "ti,tmp75c";reg = <0x48>;- };
- nct375@49 {
status = "okay";compatible = "ti,tmp75c";reg = <0x49>;- };
+};
+ð0 {
- status = "okay";
- managed = "in-band-status";
- phys = <&comphy1 0>;
+};
+ð1 {
- phy-mode = "sgmii";
- status = "okay";
- managed = "in-band-status";
- phys = <&comphy0 1>;
- sfp = <&sfp_eth1>;
+};
+&usb3 {
- status = "okay";
- phys = <&usb2_utmi_otg_phy>;
- phy-names = "usb2-utmi-otg-phy";
+};
+&uart0 {
- status = "okay";
+}; diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig new file mode 100644 index 0000000000..37f91fc4c2 --- /dev/null +++ b/configs/eDPU_defconfig @@ -0,0 +1,99 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_TEXT_BASE=0x00000000 +CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_MVEBU_EFUSE=y +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-eDPU" +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_SYS_LOAD_ADDR=0x6000000 +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_USE_PREBOOT=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="uDPU>> " +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_MVEBU_BUBT=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MAC_PARTITION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_AHCI_MVEBU=y +CONFIG_CLK=y +CONFIG_CLK_MVEBU=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_GPIO=y +CONFIG_SYS_I2C_MV=y +CONFIG_MISC=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y +CONFIG_MVNETA=y +CONFIG_MVMDIO=y +CONFIG_PCI=y +CONFIG_PCI_AARDVARK=y +CONFIG_PHY=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_MVEBU_A3700_UART=y +CONFIG_MVEBU_A3700_SPI=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_LZO=y +CONFIG_SPL_LZO=y
Viele Grüße, Stefan Roese
On Mon, May 16, 2022 at 8:40 AM Stefan Roese sr@denx.de wrote:
On 06.05.22 20:01, Robert Marko wrote:
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko robert.marko@sartura.hr
Reviewed-by: Stefan Roese sr@denx.de
Hi Stefan, Can you hold off on merging this until v2?
I have a few more comments to take care in Linux upstreaming and will then use the final DTS versions in v2. Had to convert A37xx bindings to YAML, so that slowed everything down.
Regards, Robert
Thanks, Stefan
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++++++ arch/arm/dts/armada-3720-eDPU.dts | 14 ++ arch/arm/dts/armada-3720-uDPU.dts | 153 +------------------- arch/arm/dts/armada-3720-uDPU.dtsi | 163 ++++++++++++++++++++++ configs/eDPU_defconfig | 99 +++++++++++++ 5 files changed, 322 insertions(+), 152 deletions(-) create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi create mode 100644 arch/arm/dts/armada-3720-eDPU.dts create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi new file mode 100644 index 0000000000..1b2648f64d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+
+/ {
smbios {compatible = "u-boot,sysinfo-smbios";smbios {system {product = "eDPU";};baseboard {product = "eDPU";};chassis {product = "eDPU";};};};+};
+&spi0 {
u-boot,dm-pre-reloc;spi-flash@0 {u-boot,dm-pre-reloc;};+};
+&sdhci0 {
u-boot,dm-pre-reloc;+};
+ð0 {
/* G.hn does not work without additional configuration */status = "disabled";+};
+ð1 {
fixed-link {speed = <1000>;full-duplex;};+}; diff --git a/arch/arm/dts/armada-3720-eDPU.dts b/arch/arm/dts/armada-3720-eDPU.dts new file mode 100644 index 0000000000..f2e2d21a8d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/dts-v1/;
+#include "armada-3720-uDPU.dtsi"
+/ {
model = "Methode eDPU Board";compatible = "methode,edpu", "marvell,armada3720";+};
+ð0 {
phy-mode = "1000base-x";+}; diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts index 1f534c0c65..b146fae9f6 100644 --- a/arch/arm/dts/armada-3720-uDPU.dts +++ b/arch/arm/dts/armada-3720-uDPU.dts @@ -1,67 +1,13 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/*
- Device tree for the uDPU board.
- Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- Copyright (C) 2016 Marvell
- Copyright (C) 2019 Methode Electronics
- Copyright (C) 2019 Telus
- Vladimir Vid vladimir.vid@sartura.hr
*/
/dts-v1/;
-#include <dt-bindings/gpio/gpio.h> -#include "armada-372x.dtsi" +#include "armada-3720-uDPU.dtsi"
/ { model = "Methode uDPU Board"; compatible = "methode,udpu", "marvell,armada3720";
chosen {stdout-path = "serial0:115200n8";};memory@0 {device_type = "memory";reg = <0x00000000 0x00000000 0x00000000 0x20000000>;};leds {pinctrl-names = "default";compatible = "gpio-leds";power1 {label = "udpu:green:power";gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;};power2 {label = "udpu:red:power";gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;};network1 {label = "udpu:green:network";gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;};network2 {label = "udpu:red:network";gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;};alarm1 {label = "udpu:green:alarm";gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;};alarm2 {label = "udpu:red:alarm";gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;};};sfp_eth0: sfp-eth0 { compatible = "sff,sfp"; i2c-bus = <&i2c0>;@@ -71,55 +17,6 @@ tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; };
sfp_eth1: sfp-eth1 {compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;maximum-power-milliwatt = <3000>;};-};
-&sdhci0 {
status = "okay";bus-width = <8>;mmc-ddr-1_8v;mmc-hs400-1_8v;marvell,pad-type = "fixed-1-8v";non-removable;no-sd;no-sdio;-};
-&spi0 {
status = "okay";pinctrl-names = "default";pinctrl-0 = <&spi_quad_pins>;spi-flash@0 {compatible = "jedec,spi-nor";reg = <0>;spi-max-frequency = <54000000>;partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;partition@0 {label = "firmware";reg = <0x0 0x180000>;};partition@180000 {label = "u-boot-env";reg = <0x180000 0x10000>;};};};};
&pinctrl_nb {
@@ -127,11 +24,6 @@ groups = "i2c1"; function = "gpio"; };
i2c2_recovery_pins: i2c2-recovery-pins {groups = "i2c2";function = "gpio";};};
&i2c0 {
@@ -144,50 +36,7 @@ sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; };
-&i2c1 {
status = "okay";pinctrl-names = "default", "recovery";pinctrl-0 = <&i2c2_pins>;pinctrl-1 = <&i2c2_recovery_pins>;/delete-property/mrvl,i2c-fast-mode;scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;nct375@48 {status = "okay";compatible = "ti,tmp75c";reg = <0x48>;};nct375@49 {status = "okay";compatible = "ti,tmp75c";reg = <0x49>;};-};
- ð0 { phy-mode = "sgmii";
status = "okay";managed = "in-band-status";phys = <&comphy1 0>; sfp = <&sfp_eth0>;-ð1 {
phy-mode = "sgmii";status = "okay";managed = "in-band-status";phys = <&comphy0 1>;sfp = <&sfp_eth1>;-};
-&usb3 {
status = "okay";phys = <&usb2_utmi_otg_phy>;phy-names = "usb2-utmi-otg-phy";-};
-&uart0 {
status = "okay";-}; diff --git a/arch/arm/dts/armada-3720-uDPU.dtsi b/arch/arm/dts/armada-3720-uDPU.dtsi new file mode 100644 index 0000000000..5e38acc92a --- /dev/null +++ b/arch/arm/dts/armada-3720-uDPU.dtsi @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Device tree for the uDPU board.
- Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- Copyright (C) 2016 Marvell
- Copyright (C) 2019 Methode Electronics
- Copyright (C) 2019 Telus
- Vladimir Vid vladimir.vid@sartura.hr
- */
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h> +#include "armada-372x.dtsi"
+/ {
chosen {stdout-path = "serial0:115200n8";};memory@0 {device_type = "memory";reg = <0x00000000 0x00000000 0x00000000 0x20000000>;};leds {pinctrl-names = "default";compatible = "gpio-leds";power1 {label = "udpu:green:power";gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;};power2 {label = "udpu:red:power";gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;};network1 {label = "udpu:green:network";gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;};network2 {label = "udpu:red:network";gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;};alarm1 {label = "udpu:green:alarm";gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;};alarm2 {label = "udpu:red:alarm";gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;};};sfp_eth1: sfp-eth1 {compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;maximum-power-milliwatt = <3000>;};+};
+&sdhci0 {
status = "okay";bus-width = <8>;mmc-ddr-1_8v;mmc-hs400-1_8v;marvell,pad-type = "fixed-1-8v";non-removable;no-sd;no-sdio;+};
+&spi0 {
status = "okay";pinctrl-names = "default";pinctrl-0 = <&spi_quad_pins>;spi-flash@0 {compatible = "jedec,spi-nor";reg = <0>;spi-max-frequency = <54000000>;partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;/* only bootloader is located on the SPI */partition@0 {label = "firmware";reg = <0x0 0x180000>;};partition@180000 {label = "u-boot-env";reg = <0x180000 0x10000>;};};};+};
+&pinctrl_nb {
i2c2_recovery_pins: i2c2-recovery-pins {groups = "i2c2";function = "gpio";};+};
+&i2c1 {
status = "okay";pinctrl-names = "default", "recovery";pinctrl-0 = <&i2c2_pins>;pinctrl-1 = <&i2c2_recovery_pins>;/delete-property/mrvl,i2c-fast-mode;scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;nct375@48 {status = "okay";compatible = "ti,tmp75c";reg = <0x48>;};nct375@49 {status = "okay";compatible = "ti,tmp75c";reg = <0x49>;};+};
+ð0 {
status = "okay";managed = "in-band-status";phys = <&comphy1 0>;+};
+ð1 {
phy-mode = "sgmii";status = "okay";managed = "in-band-status";phys = <&comphy0 1>;sfp = <&sfp_eth1>;+};
+&usb3 {
status = "okay";phys = <&usb2_utmi_otg_phy>;phy-names = "usb2-utmi-otg-phy";+};
+&uart0 {
status = "okay";+}; diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig new file mode 100644 index 0000000000..37f91fc4c2 --- /dev/null +++ b/configs/eDPU_defconfig @@ -0,0 +1,99 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_TEXT_BASE=0x00000000 +CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_MVEBU_EFUSE=y +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-eDPU" +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_SYS_LOAD_ADDR=0x6000000 +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_USE_PREBOOT=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="uDPU>> " +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_MVEBU_BUBT=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MAC_PARTITION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_AHCI_MVEBU=y +CONFIG_CLK=y +CONFIG_CLK_MVEBU=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_GPIO=y +CONFIG_SYS_I2C_MV=y +CONFIG_MISC=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y +CONFIG_MVNETA=y +CONFIG_MVMDIO=y +CONFIG_PCI=y +CONFIG_PCI_AARDVARK=y +CONFIG_PHY=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_MVEBU_A3700_UART=y +CONFIG_MVEBU_A3700_SPI=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_LZO=y +CONFIG_SPL_LZO=y
Viele Grüße, Stefan Roese
-- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
On 16.05.22 10:52, Robert Marko wrote:
On Mon, May 16, 2022 at 8:40 AM Stefan Roese sr@denx.de wrote:
On 06.05.22 20:01, Robert Marko wrote:
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko robert.marko@sartura.hr
Reviewed-by: Stefan Roese sr@denx.de
Hi Stefan, Can you hold off on merging this until v2?
I have a few more comments to take care in Linux upstreaming and will then use the final DTS versions in v2. Had to convert A37xx bindings to YAML, so that slowed everything down.
Sure. Thanks for the notice. Please make sure though, that you add the new board to some MAINTAINERS file. As this throws an CI build error without this.
Thanks, Stefan
Regards, Robert
Thanks, Stefan
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++++++ arch/arm/dts/armada-3720-eDPU.dts | 14 ++ arch/arm/dts/armada-3720-uDPU.dts | 153 +------------------- arch/arm/dts/armada-3720-uDPU.dtsi | 163 ++++++++++++++++++++++ configs/eDPU_defconfig | 99 +++++++++++++ 5 files changed, 322 insertions(+), 152 deletions(-) create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi create mode 100644 arch/arm/dts/armada-3720-eDPU.dts create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi new file mode 100644 index 0000000000..1b2648f64d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+
+/ {
smbios {compatible = "u-boot,sysinfo-smbios";smbios {system {product = "eDPU";};baseboard {product = "eDPU";};chassis {product = "eDPU";};};};+};
+&spi0 {
u-boot,dm-pre-reloc;spi-flash@0 {u-boot,dm-pre-reloc;};+};
+&sdhci0 {
u-boot,dm-pre-reloc;+};
+ð0 {
/* G.hn does not work without additional configuration */status = "disabled";+};
+ð1 {
fixed-link {speed = <1000>;full-duplex;};+}; diff --git a/arch/arm/dts/armada-3720-eDPU.dts b/arch/arm/dts/armada-3720-eDPU.dts new file mode 100644 index 0000000000..f2e2d21a8d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/dts-v1/;
+#include "armada-3720-uDPU.dtsi"
+/ {
model = "Methode eDPU Board";compatible = "methode,edpu", "marvell,armada3720";+};
+ð0 {
phy-mode = "1000base-x";+}; diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts index 1f534c0c65..b146fae9f6 100644 --- a/arch/arm/dts/armada-3720-uDPU.dts +++ b/arch/arm/dts/armada-3720-uDPU.dts @@ -1,67 +1,13 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/*
- Device tree for the uDPU board.
- Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- Copyright (C) 2016 Marvell
- Copyright (C) 2019 Methode Electronics
- Copyright (C) 2019 Telus
- Vladimir Vid vladimir.vid@sartura.hr
*/
/dts-v1/;
-#include <dt-bindings/gpio/gpio.h> -#include "armada-372x.dtsi" +#include "armada-3720-uDPU.dtsi"
/ { model = "Methode uDPU Board"; compatible = "methode,udpu", "marvell,armada3720";
chosen {stdout-path = "serial0:115200n8";};memory@0 {device_type = "memory";reg = <0x00000000 0x00000000 0x00000000 0x20000000>;};leds {pinctrl-names = "default";compatible = "gpio-leds";power1 {label = "udpu:green:power";gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;};power2 {label = "udpu:red:power";gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;};network1 {label = "udpu:green:network";gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;};network2 {label = "udpu:red:network";gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;};alarm1 {label = "udpu:green:alarm";gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;};alarm2 {label = "udpu:red:alarm";gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;};};sfp_eth0: sfp-eth0 { compatible = "sff,sfp"; i2c-bus = <&i2c0>;@@ -71,55 +17,6 @@ tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; };
sfp_eth1: sfp-eth1 {compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;maximum-power-milliwatt = <3000>;};-};
-&sdhci0 {
status = "okay";bus-width = <8>;mmc-ddr-1_8v;mmc-hs400-1_8v;marvell,pad-type = "fixed-1-8v";non-removable;no-sd;no-sdio;-};
-&spi0 {
status = "okay";pinctrl-names = "default";pinctrl-0 = <&spi_quad_pins>;spi-flash@0 {compatible = "jedec,spi-nor";reg = <0>;spi-max-frequency = <54000000>;partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;partition@0 {label = "firmware";reg = <0x0 0x180000>;};partition@180000 {label = "u-boot-env";reg = <0x180000 0x10000>;};};};};
&pinctrl_nb {
@@ -127,11 +24,6 @@ groups = "i2c1"; function = "gpio"; };
i2c2_recovery_pins: i2c2-recovery-pins {groups = "i2c2";function = "gpio";};};
&i2c0 {
@@ -144,50 +36,7 @@ sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; };
-&i2c1 {
status = "okay";pinctrl-names = "default", "recovery";pinctrl-0 = <&i2c2_pins>;pinctrl-1 = <&i2c2_recovery_pins>;/delete-property/mrvl,i2c-fast-mode;scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;nct375@48 {status = "okay";compatible = "ti,tmp75c";reg = <0x48>;};nct375@49 {status = "okay";compatible = "ti,tmp75c";reg = <0x49>;};-};
- ð0 { phy-mode = "sgmii";
status = "okay";managed = "in-band-status";phys = <&comphy1 0>; sfp = <&sfp_eth0>;-ð1 {
phy-mode = "sgmii";status = "okay";managed = "in-band-status";phys = <&comphy0 1>;sfp = <&sfp_eth1>;-};
-&usb3 {
status = "okay";phys = <&usb2_utmi_otg_phy>;phy-names = "usb2-utmi-otg-phy";-};
-&uart0 {
status = "okay";-}; diff --git a/arch/arm/dts/armada-3720-uDPU.dtsi b/arch/arm/dts/armada-3720-uDPU.dtsi new file mode 100644 index 0000000000..5e38acc92a --- /dev/null +++ b/arch/arm/dts/armada-3720-uDPU.dtsi @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Device tree for the uDPU board.
- Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- Copyright (C) 2016 Marvell
- Copyright (C) 2019 Methode Electronics
- Copyright (C) 2019 Telus
- Vladimir Vid vladimir.vid@sartura.hr
- */
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h> +#include "armada-372x.dtsi"
+/ {
chosen {stdout-path = "serial0:115200n8";};memory@0 {device_type = "memory";reg = <0x00000000 0x00000000 0x00000000 0x20000000>;};leds {pinctrl-names = "default";compatible = "gpio-leds";power1 {label = "udpu:green:power";gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;};power2 {label = "udpu:red:power";gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;};network1 {label = "udpu:green:network";gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;};network2 {label = "udpu:red:network";gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;};alarm1 {label = "udpu:green:alarm";gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;};alarm2 {label = "udpu:red:alarm";gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;};};sfp_eth1: sfp-eth1 {compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;maximum-power-milliwatt = <3000>;};+};
+&sdhci0 {
status = "okay";bus-width = <8>;mmc-ddr-1_8v;mmc-hs400-1_8v;marvell,pad-type = "fixed-1-8v";non-removable;no-sd;no-sdio;+};
+&spi0 {
status = "okay";pinctrl-names = "default";pinctrl-0 = <&spi_quad_pins>;spi-flash@0 {compatible = "jedec,spi-nor";reg = <0>;spi-max-frequency = <54000000>;partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;/* only bootloader is located on the SPI */partition@0 {label = "firmware";reg = <0x0 0x180000>;};partition@180000 {label = "u-boot-env";reg = <0x180000 0x10000>;};};};+};
+&pinctrl_nb {
i2c2_recovery_pins: i2c2-recovery-pins {groups = "i2c2";function = "gpio";};+};
+&i2c1 {
status = "okay";pinctrl-names = "default", "recovery";pinctrl-0 = <&i2c2_pins>;pinctrl-1 = <&i2c2_recovery_pins>;/delete-property/mrvl,i2c-fast-mode;scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;nct375@48 {status = "okay";compatible = "ti,tmp75c";reg = <0x48>;};nct375@49 {status = "okay";compatible = "ti,tmp75c";reg = <0x49>;};+};
+ð0 {
status = "okay";managed = "in-band-status";phys = <&comphy1 0>;+};
+ð1 {
phy-mode = "sgmii";status = "okay";managed = "in-band-status";phys = <&comphy0 1>;sfp = <&sfp_eth1>;+};
+&usb3 {
status = "okay";phys = <&usb2_utmi_otg_phy>;phy-names = "usb2-utmi-otg-phy";+};
+&uart0 {
status = "okay";+}; diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig new file mode 100644 index 0000000000..37f91fc4c2 --- /dev/null +++ b/configs/eDPU_defconfig @@ -0,0 +1,99 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_TEXT_BASE=0x00000000 +CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_MVEBU_EFUSE=y +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-eDPU" +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_SYS_LOAD_ADDR=0x6000000 +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_USE_PREBOOT=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="uDPU>> " +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_MVEBU_BUBT=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MAC_PARTITION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_AHCI_MVEBU=y +CONFIG_CLK=y +CONFIG_CLK_MVEBU=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_GPIO=y +CONFIG_SYS_I2C_MV=y +CONFIG_MISC=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y +CONFIG_MVNETA=y +CONFIG_MVMDIO=y +CONFIG_PCI=y +CONFIG_PCI_AARDVARK=y +CONFIG_PHY=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_MVEBU_A3700_UART=y +CONFIG_MVEBU_A3700_SPI=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_LZO=y +CONFIG_SPL_LZO=y
Viele Grüße, Stefan Roese
-- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
Viele Grüße, Stefan Roese
On Mon, May 16, 2022 at 10:54 AM Stefan Roese sr@denx.de wrote:
On 16.05.22 10:52, Robert Marko wrote:
On Mon, May 16, 2022 at 8:40 AM Stefan Roese sr@denx.de wrote:
On 06.05.22 20:01, Robert Marko wrote:
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko robert.marko@sartura.hr
Reviewed-by: Stefan Roese sr@denx.de
Hi Stefan, Can you hold off on merging this until v2?
I have a few more comments to take care in Linux upstreaming and will then use the final DTS versions in v2. Had to convert A37xx bindings to YAML, so that slowed everything down.
Sure. Thanks for the notice. Please make sure though, that you add the new board to some MAINTAINERS file. As this throws an CI build error without this.
Hi, thanks for the heads up on MAINTAINERS. Sent the v3 with sync to the Linux pending DTS and MAINTAINERS added.
Regards, Robert
Thanks, Stefan
Regards, Robert
Thanks, Stefan
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++++++ arch/arm/dts/armada-3720-eDPU.dts | 14 ++ arch/arm/dts/armada-3720-uDPU.dts | 153 +------------------- arch/arm/dts/armada-3720-uDPU.dtsi | 163 ++++++++++++++++++++++ configs/eDPU_defconfig | 99 +++++++++++++ 5 files changed, 322 insertions(+), 152 deletions(-) create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi create mode 100644 arch/arm/dts/armada-3720-eDPU.dts create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi new file mode 100644 index 0000000000..1b2648f64d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+
+/ {
smbios {compatible = "u-boot,sysinfo-smbios";smbios {system {product = "eDPU";};baseboard {product = "eDPU";};chassis {product = "eDPU";};};};+};
+&spi0 {
u-boot,dm-pre-reloc;spi-flash@0 {u-boot,dm-pre-reloc;};+};
+&sdhci0 {
u-boot,dm-pre-reloc;+};
+ð0 {
/* G.hn does not work without additional configuration */status = "disabled";+};
+ð1 {
fixed-link {speed = <1000>;full-duplex;};+}; diff --git a/arch/arm/dts/armada-3720-eDPU.dts b/arch/arm/dts/armada-3720-eDPU.dts new file mode 100644 index 0000000000..f2e2d21a8d --- /dev/null +++ b/arch/arm/dts/armada-3720-eDPU.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/dts-v1/;
+#include "armada-3720-uDPU.dtsi"
+/ {
model = "Methode eDPU Board";compatible = "methode,edpu", "marvell,armada3720";+};
+ð0 {
phy-mode = "1000base-x";+}; diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts index 1f534c0c65..b146fae9f6 100644 --- a/arch/arm/dts/armada-3720-uDPU.dts +++ b/arch/arm/dts/armada-3720-uDPU.dts @@ -1,67 +1,13 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/*
- Device tree for the uDPU board.
- Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- Copyright (C) 2016 Marvell
- Copyright (C) 2019 Methode Electronics
- Copyright (C) 2019 Telus
- Vladimir Vid vladimir.vid@sartura.hr
*/
/dts-v1/;
-#include <dt-bindings/gpio/gpio.h> -#include "armada-372x.dtsi" +#include "armada-3720-uDPU.dtsi"
/ { model = "Methode uDPU Board"; compatible = "methode,udpu", "marvell,armada3720";
chosen {stdout-path = "serial0:115200n8";};memory@0 {device_type = "memory";reg = <0x00000000 0x00000000 0x00000000 0x20000000>;};leds {pinctrl-names = "default";compatible = "gpio-leds";power1 {label = "udpu:green:power";gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;};power2 {label = "udpu:red:power";gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;};network1 {label = "udpu:green:network";gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;};network2 {label = "udpu:red:network";gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;};alarm1 {label = "udpu:green:alarm";gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;};alarm2 {label = "udpu:red:alarm";gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;};};sfp_eth0: sfp-eth0 { compatible = "sff,sfp"; i2c-bus = <&i2c0>;@@ -71,55 +17,6 @@ tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; };
sfp_eth1: sfp-eth1 {compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;maximum-power-milliwatt = <3000>;};-};
-&sdhci0 {
status = "okay";bus-width = <8>;mmc-ddr-1_8v;mmc-hs400-1_8v;marvell,pad-type = "fixed-1-8v";non-removable;no-sd;no-sdio;-};
-&spi0 {
status = "okay";pinctrl-names = "default";pinctrl-0 = <&spi_quad_pins>;spi-flash@0 {compatible = "jedec,spi-nor";reg = <0>;spi-max-frequency = <54000000>;partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;partition@0 {label = "firmware";reg = <0x0 0x180000>;};partition@180000 {label = "u-boot-env";reg = <0x180000 0x10000>;};};};};
&pinctrl_nb {
@@ -127,11 +24,6 @@ groups = "i2c1"; function = "gpio"; };
i2c2_recovery_pins: i2c2-recovery-pins {groups = "i2c2";function = "gpio";};};
&i2c0 {
@@ -144,50 +36,7 @@ sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; };
-&i2c1 {
status = "okay";pinctrl-names = "default", "recovery";pinctrl-0 = <&i2c2_pins>;pinctrl-1 = <&i2c2_recovery_pins>;/delete-property/mrvl,i2c-fast-mode;scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;nct375@48 {status = "okay";compatible = "ti,tmp75c";reg = <0x48>;};nct375@49 {status = "okay";compatible = "ti,tmp75c";reg = <0x49>;};-};
- ð0 { phy-mode = "sgmii";
status = "okay";managed = "in-band-status";phys = <&comphy1 0>; sfp = <&sfp_eth0>;-ð1 {
phy-mode = "sgmii";status = "okay";managed = "in-band-status";phys = <&comphy0 1>;sfp = <&sfp_eth1>;-};
-&usb3 {
status = "okay";phys = <&usb2_utmi_otg_phy>;phy-names = "usb2-utmi-otg-phy";-};
-&uart0 {
status = "okay";-}; diff --git a/arch/arm/dts/armada-3720-uDPU.dtsi b/arch/arm/dts/armada-3720-uDPU.dtsi new file mode 100644 index 0000000000..5e38acc92a --- /dev/null +++ b/arch/arm/dts/armada-3720-uDPU.dtsi @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Device tree for the uDPU board.
- Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- Copyright (C) 2016 Marvell
- Copyright (C) 2019 Methode Electronics
- Copyright (C) 2019 Telus
- Vladimir Vid vladimir.vid@sartura.hr
- */
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h> +#include "armada-372x.dtsi"
+/ {
chosen {stdout-path = "serial0:115200n8";};memory@0 {device_type = "memory";reg = <0x00000000 0x00000000 0x00000000 0x20000000>;};leds {pinctrl-names = "default";compatible = "gpio-leds";power1 {label = "udpu:green:power";gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;};power2 {label = "udpu:red:power";gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;};network1 {label = "udpu:green:network";gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;};network2 {label = "udpu:red:network";gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;};alarm1 {label = "udpu:green:alarm";gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;};alarm2 {label = "udpu:red:alarm";gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;};};sfp_eth1: sfp-eth1 {compatible = "sff,sfp";i2c-bus = <&i2c1>;los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;maximum-power-milliwatt = <3000>;};+};
+&sdhci0 {
status = "okay";bus-width = <8>;mmc-ddr-1_8v;mmc-hs400-1_8v;marvell,pad-type = "fixed-1-8v";non-removable;no-sd;no-sdio;+};
+&spi0 {
status = "okay";pinctrl-names = "default";pinctrl-0 = <&spi_quad_pins>;spi-flash@0 {compatible = "jedec,spi-nor";reg = <0>;spi-max-frequency = <54000000>;partitions {compatible = "fixed-partitions";#address-cells = <1>;#size-cells = <1>;/* only bootloader is located on the SPI */partition@0 {label = "firmware";reg = <0x0 0x180000>;};partition@180000 {label = "u-boot-env";reg = <0x180000 0x10000>;};};};+};
+&pinctrl_nb {
i2c2_recovery_pins: i2c2-recovery-pins {groups = "i2c2";function = "gpio";};+};
+&i2c1 {
status = "okay";pinctrl-names = "default", "recovery";pinctrl-0 = <&i2c2_pins>;pinctrl-1 = <&i2c2_recovery_pins>;/delete-property/mrvl,i2c-fast-mode;scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;nct375@48 {status = "okay";compatible = "ti,tmp75c";reg = <0x48>;};nct375@49 {status = "okay";compatible = "ti,tmp75c";reg = <0x49>;};+};
+ð0 {
status = "okay";managed = "in-band-status";phys = <&comphy1 0>;+};
+ð1 {
phy-mode = "sgmii";status = "okay";managed = "in-band-status";phys = <&comphy0 1>;sfp = <&sfp_eth1>;+};
+&usb3 {
status = "okay";phys = <&usb2_utmi_otg_phy>;phy-names = "usb2-utmi-otg-phy";+};
+&uart0 {
status = "okay";+}; diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig new file mode 100644 index 0000000000..37f91fc4c2 --- /dev/null +++ b/configs/eDPU_defconfig @@ -0,0 +1,99 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_TEXT_BASE=0x00000000 +CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_MVEBU_EFUSE=y +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-eDPU" +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_SYS_LOAD_ADDR=0x6000000 +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_USE_PREBOOT=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="uDPU>> " +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_MVEBU_BUBT=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MAC_PARTITION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_AHCI_MVEBU=y +CONFIG_CLK=y +CONFIG_CLK_MVEBU=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_GPIO=y +CONFIG_SYS_I2C_MV=y +CONFIG_MISC=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y +CONFIG_MVNETA=y +CONFIG_MVMDIO=y +CONFIG_PCI=y +CONFIG_PCI_AARDVARK=y +CONFIG_PHY=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_MVEBU_A3700_UART=y +CONFIG_MVEBU_A3700_SPI=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_LZO=y +CONFIG_SPL_LZO=y
Viele Grüße, Stefan Roese
-- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
Viele Grüße, Stefan Roese
-- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
On Friday 06 May 2022 20:01:39 Robert Marko wrote:
Currently, pinctrl drivers only get probed if pinconf is actually being used, however on SoC-s like Armada 3720 pinctrl driver is a also the GPIO driver.
So, if the pinctrl driver doesn't get probed GPIO-s won't get registered and thus they cannot be used.
This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s and without them being registered networking won't work as it only has one SFP slot and the TX disable GPIO is on the SB controller.
So, probe the pinctrl drivers using DM_FLAG_PROBE_AFTER_BIND like LED uclass does.
Signed-off-by: Robert Marko robert.marko@sartura.hr
Seems that there is no better solution.
Reviewed-by: Pali Rohár pali@kernel.org
drivers/pinctrl/pinctrl-uclass.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c index 4462ed20e2..38ce2b5e0a 100644 --- a/drivers/pinctrl/pinctrl-uclass.c +++ b/drivers/pinctrl/pinctrl-uclass.c @@ -402,6 +402,13 @@ static int __maybe_unused pinctrl_post_bind(struct udevice *dev) { const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
- /*
* Make sure that the pinctrl driver gets probed after binding* as some pinctrl drivers also register the GPIO driver during* probe, and if they are not probed GPIO-s are not registered.*/- dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
- if (!ops) { dev_dbg(dev, "ops is not set. Do not bind.\n"); return -EINVAL;
-- 2.35.1
On 06.05.22 20:01, Robert Marko wrote:
Currently, pinctrl drivers only get probed if pinconf is actually being used, however on SoC-s like Armada 3720 pinctrl driver is a also the GPIO driver.
So, if the pinctrl driver doesn't get probed GPIO-s won't get registered and thus they cannot be used.
This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s and without them being registered networking won't work as it only has one SFP slot and the TX disable GPIO is on the SB controller.
So, probe the pinctrl drivers using DM_FLAG_PROBE_AFTER_BIND like LED uclass does.
Signed-off-by: Robert Marko robert.marko@sartura.hr
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan
drivers/pinctrl/pinctrl-uclass.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c index 4462ed20e2..38ce2b5e0a 100644 --- a/drivers/pinctrl/pinctrl-uclass.c +++ b/drivers/pinctrl/pinctrl-uclass.c @@ -402,6 +402,13 @@ static int __maybe_unused pinctrl_post_bind(struct udevice *dev) { const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
- /*
* Make sure that the pinctrl driver gets probed after binding* as some pinctrl drivers also register the GPIO driver during* probe, and if they are not probed GPIO-s are not registered.*/- dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
- if (!ops) { dev_dbg(dev, "ops is not set. Do not bind.\n"); return -EINVAL;
Viele Grüße, Stefan Roese
On 06.05.22 20:01, Robert Marko wrote:
Currently, pinctrl drivers only get probed if pinconf is actually being used, however on SoC-s like Armada 3720 pinctrl driver is a also the GPIO driver.
So, if the pinctrl driver doesn't get probed GPIO-s won't get registered and thus they cannot be used.
This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s and without them being registered networking won't work as it only has one SFP slot and the TX disable GPIO is on the SB controller.
So, probe the pinctrl drivers using DM_FLAG_PROBE_AFTER_BIND like LED uclass does.
Signed-off-by: Robert Marko robert.marko@sartura.hr
Applied to u-boot-marvell/master
Thanks, Stefan
drivers/pinctrl/pinctrl-uclass.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c index 4462ed20e2..38ce2b5e0a 100644 --- a/drivers/pinctrl/pinctrl-uclass.c +++ b/drivers/pinctrl/pinctrl-uclass.c @@ -402,6 +402,13 @@ static int __maybe_unused pinctrl_post_bind(struct udevice *dev) { const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
- /*
* Make sure that the pinctrl driver gets probed after binding* as some pinctrl drivers also register the GPIO driver during* probe, and if they are not probed GPIO-s are not registered.*/- dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
- if (!ops) { dev_dbg(dev, "ops is not set. Do not bind.\n"); return -EINVAL;
Viele Grüße, Stefan Roese
participants (3)
-
Pali Rohár -
Robert Marko -
Stefan Roese