On Friday, April 19, 2013 10:38:48 AM, Benoît Thébaudeau wrote:

Dear Marek Vasut,

On Friday, April 19, 2013 6:10:51 AM, Marek Vasut wrote:

...

Add support for generic NAND SPL via the SPL framework into the mxc_nand_spl driver. This is basically just a simple rename and publication of the already implemented functions. To avoid the old function which are used with the nand_spl/ stuff getting in the way of NAND SPL framework, the macro CONFIG_SPL_NAND_LEGACY was introduced and two remaining legacy boards were adjusted. These board need to be either fixed or removed in the long run, but I don't have either.

Also make sure the requested payload is aligned to full pages, otherwise this simple driver fails to load the last page.

Signed-off-by: Marek Vasut marex@denx.de Cc: Albert ARIBAUD albert.u.boot@aribaud.net Cc: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Scott Wood scottwood@freescale.com Cc: Stefano Babic sbabic@denx.de Cc: Tom Rini trini@ti.com

---

drivers/mtd/nand/mxc_nand_spl.c | 13 ++++++++++--- include/configs/mx31pdk.h | 1 + include/configs/tx25.h | 1 + 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/mxc_nand_spl.c b/drivers/mtd/nand/mxc_nand_spl.c index 09f23c3..8ff03c9 100644 --- a/drivers/mtd/nand/mxc_nand_spl.c +++ b/drivers/mtd/nand/mxc_nand_spl.c @@ -290,7 +290,7 @@ static int is_badblock(int pagenumber) return 0; }

-static int nand_load(unsigned int from, unsigned int size, unsigned char *buf) +int nand_spl_load_image(uint32_t from, unsigned int size, void *buf) { int i; unsigned int page; @@ -303,6 +303,7 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf) page = from / CONFIG_SYS_NAND_PAGE_SIZE; i = 0;

• size = roundup(size, CONFIG_SYS_NAND_PAGE_SIZE); while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) { if (nfc_read_page(page, buf) < 0) return -1;

@@ -332,6 +333,7 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf) return 0; }

+#ifdef CONFIG_SPL_NAND_SUPPORT_LEGACY /*

• The main entry for NAND booting. It's necessary that SDRAM is already
• configured and available since this code loads the main U-Boot image

@@ -345,8 +347,9 @@ void nand_boot(void) * CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must * be aligned to full pages */

• if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,

•        (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
  

• if (!nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,

• 	CONFIG_SYS_NAND_U_BOOT_SIZE,
  

• 	(uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
  

  /* Copy from NAND successful, start U-boot */ uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; uboot();

@@ -364,3 +367,7 @@ void hang(void) /* Loop forever */ while (1) ; } +#endif

+void nand_init(void) {} +void nand_deselect(void) {} diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 1754595..217552e 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -50,6 +50,7 @@ #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT_LEGACY

#define CONFIG_SPL_TEXT_BASE 0x87dc0000 #define CONFIG_SYS_TEXT_BASE 0x87e00000 diff --git a/include/configs/tx25.h b/include/configs/tx25.h index e72f8f6..7c362d0 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -37,6 +37,7 @@ #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT_LEGACY

#define CONFIG_SPL_TEXT_BASE 0x810c0000

#define CONFIG_SYS_TEXT_BASE 0x81200000

1.7.11.7

This is not about legacy vs. non-legacy. This is about basic vs. more featured SPL because of SPL size constraints. So what about dropping CONFIG_SPL_NAND_SUPPORT_LEGACY and testing for CONFIG_SPL_FRAMEWORK definition instead?

Also, I don't see any nand_init() (called by spl_nand_load_image()) for m53evk.

Best regards, Benoît

Dear Marek Vasut,

On Friday, April 19, 2013 1:14:16 PM, Marek Vasut wrote:

Dear Benoît Thébaudeau,

...

On Friday, April 19, 2013 10:38:48 AM, Benoît Thébaudeau wrote:

...

Dear Marek Vasut,

On Friday, April 19, 2013 6:10:51 AM, Marek Vasut wrote:

...

Add support for generic NAND SPL via the SPL framework into the mxc_nand_spl driver. This is basically just a simple rename and publication of the already implemented functions. To avoid the old function which are used with the nand_spl/ stuff getting in the way of NAND SPL framework, the macro CONFIG_SPL_NAND_LEGACY was introduced and two remaining legacy boards were adjusted. These board need to be either fixed or removed in the long run, but I don't have either.

Also make sure the requested payload is aligned to full pages, otherwise this simple driver fails to load the last page.

Signed-off-by: Marek Vasut marex@denx.de Cc: Albert ARIBAUD albert.u.boot@aribaud.net Cc: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Scott Wood scottwood@freescale.com Cc: Stefano Babic sbabic@denx.de Cc: Tom Rini trini@ti.com

---

drivers/mtd/nand/mxc_nand_spl.c | 13 ++++++++++--- include/configs/mx31pdk.h | 1 + include/configs/tx25.h | 1 + 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/mxc_nand_spl.c b/drivers/mtd/nand/mxc_nand_spl.c index 09f23c3..8ff03c9 100644 --- a/drivers/mtd/nand/mxc_nand_spl.c +++ b/drivers/mtd/nand/mxc_nand_spl.c @@ -290,7 +290,7 @@ static int is_badblock(int pagenumber)

return 0;

}

-static int nand_load(unsigned int from, unsigned int size, unsigned char *buf) +int nand_spl_load_image(uint32_t from, unsigned int size, void *buf)

{

int i; unsigned int page;

@@ -303,6 +303,7 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)

page = from / CONFIG_SYS_NAND_PAGE_SIZE; i = 0;

• size = roundup(size, CONFIG_SYS_NAND_PAGE_SIZE);

  while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) {

  if (nfc_read_page(page, buf) < 0)

  return -1;
  
  

@@ -332,6 +333,7 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)

return 0;

}

+#ifdef CONFIG_SPL_NAND_SUPPORT_LEGACY

/*

• The main entry for NAND booting. It's necessary that SDRAM is

already * configured and available since this code loads the main U-Boot image

@@ -345,8 +347,9 @@ void nand_boot(void)

* CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
* be aligned to full pages
*/

• if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS,

CONFIG_SYS_NAND_U_BOOT_SIZE, - (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {

• if (!nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,

• 	CONFIG_SYS_NAND_U_BOOT_SIZE,
  

• 	(uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
  
  

  /* Copy from NAND successful, start U-boot */ uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; uboot();

@@ -364,3 +367,7 @@ void hang(void)

/* Loop forever */ while (1) ;

}

+#endif

+void nand_init(void) {} +void nand_deselect(void) {} diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 1754595..217552e 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -50,6 +50,7 @@

#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_NAND_SUPPORT

+#define CONFIG_SPL_NAND_SUPPORT_LEGACY

#define CONFIG_SPL_TEXT_BASE 0x87dc0000 #define CONFIG_SYS_TEXT_BASE 0x87e00000

diff --git a/include/configs/tx25.h b/include/configs/tx25.h index e72f8f6..7c362d0 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -37,6 +37,7 @@

#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-

spl.lds"

...

...

...

#define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_NAND_SUPPORT

+#define CONFIG_SPL_NAND_SUPPORT_LEGACY

#define CONFIG_SPL_TEXT_BASE 0x810c0000 #define CONFIG_SYS_TEXT_BASE 0x81200000

-- 1.7.11.7

This is not about legacy vs. non-legacy. This is about basic vs. more featured SPL because of SPL size constraints. So what about dropping CONFIG_SPL_NAND_SUPPORT_LEGACY and testing for CONFIG_SPL_FRAMEWORK definition instead?

I was thinking about that, but the symbol is unrelated to NAND.

Well, it's CONFIG_SPL_FRAMEWORK + CONFIG_SPL_NAND_SUPPORT that defines the other implementation, and CONFIG_SPL_NAND_SUPPORT triggers the build of mxc_nand_spl.c for SPL, so the common point is CONFIG_SPL_FRAMEWORK.

I still think it's either a matter of fixing for new SPL or removing those two boards. The nand_spl/ stuff shall be removed ASAP.

Removing those boards is not a solution.

Is it really about "new" SPL? The generic SPL is enabled by CONFIG_SPL, and CONFIG_SPL_FRAMEWORK is a sub-option. If the generic SPL rules imposed to use the SPL framework functions, there would be no such sub-option. So it looks like these boards are complying to the new SPL rules.

We could see if using CONFIG_SPL_FRAMEWORK would still allow the SPL to fit in 2 kiB in order to drop this function, but if it does not fit, the new SPL rules should still make it possible to have a solution for any board having SPL size constraints.

...

Also, I don't see any nand_init() (called by spl_nand_load_image()) for m53evk.

What do you mean?

I mean that I don't identify the implementation of nand_init() used in the context of the m53evk since the builds of drivers/mtd/nand/nand.c and drivers/mtd/nand/nand_spl_simple.c do not seem to be enabled for this board, and I don't see another definition.

Best regards, Benoît

Dear Benoît Thébaudeau,

Dear Marek Vasut,

On Friday, April 19, 2013 1:55:31 PM, Benoît Thébaudeau wrote:

...

Dear Marek Vasut,

On Friday, April 19, 2013 1:14:16 PM, Marek Vasut wrote:

...

Dear Benoît Thébaudeau,

...

On Friday, April 19, 2013 10:38:48 AM, Benoît Thébaudeau wrote:

...

Dear Marek Vasut,

On Friday, April 19, 2013 6:10:51 AM, Marek Vasut wrote:

...

Add support for generic NAND SPL via the SPL framework into the mxc_nand_spl driver. This is basically just a simple rename and publication of the already implemented functions. To avoid the old function which are used with the nand_spl/ stuff getting in the way of NAND SPL framework, the macro CONFIG_SPL_NAND_LEGACY was introduced and two remaining legacy boards were adjusted. These board need to be either fixed or removed in the long run, but I don't have either.

Also make sure the requested payload is aligned to full pages, otherwise this simple driver fails to load the last page.

Signed-off-by: Marek Vasut marex@denx.de Cc: Albert ARIBAUD albert.u.boot@aribaud.net Cc: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Scott Wood scottwood@freescale.com Cc: Stefano Babic sbabic@denx.de Cc: Tom Rini trini@ti.com

---

drivers/mtd/nand/mxc_nand_spl.c | 13 ++++++++++--- include/configs/mx31pdk.h | 1 + include/configs/tx25.h | 1 + 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/mxc_nand_spl.c b/drivers/mtd/nand/mxc_nand_spl.c index 09f23c3..8ff03c9 100644 --- a/drivers/mtd/nand/mxc_nand_spl.c +++ b/drivers/mtd/nand/mxc_nand_spl.c @@ -290,7 +290,7 @@ static int is_badblock(int pagenumber)

return 0;

}

-static int nand_load(unsigned int from, unsigned int size, unsigned char *buf) +int nand_spl_load_image(uint32_t from, unsigned int size, void *buf)

{

int i; unsigned int page;

@@ -303,6 +303,7 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)

page = from / CONFIG_SYS_NAND_PAGE_SIZE; i = 0;

• size = roundup(size, CONFIG_SYS_NAND_PAGE_SIZE);

  while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) {

  if (nfc_read_page(page, buf) < 0)

  return -1;
  
  

@@ -332,6 +333,7 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)

return 0;

}

+#ifdef CONFIG_SPL_NAND_SUPPORT_LEGACY

/*

• The main entry for NAND booting. It's necessary that SDRAM is

already * configured and available since this code loads the main U-Boot image

@@ -345,8 +347,9 @@ void nand_boot(void)

* CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE
must * be aligned to full pages
*/

• if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS,

CONFIG_SYS_NAND_U_BOOT_SIZE, - (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {

• if (!nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,

• 	CONFIG_SYS_NAND_U_BOOT_SIZE,
  

• 	(uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
  
  

  /* Copy from NAND successful, start U-boot */ uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; uboot();

@@ -364,3 +367,7 @@ void hang(void)

/* Loop forever */ while (1) ;

}

+#endif

+void nand_init(void) {} +void nand_deselect(void) {} diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 1754595..217552e 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -50,6 +50,7 @@

#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-

spl.lds"

...

...

...

...

...

#define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_NAND_SUPPORT

+#define CONFIG_SPL_NAND_SUPPORT_LEGACY

#define CONFIG_SPL_TEXT_BASE 0x87dc0000 #define CONFIG_SYS_TEXT_BASE 0x87e00000

diff --git a/include/configs/tx25.h b/include/configs/tx25.h index e72f8f6..7c362d0 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -37,6 +37,7 @@

#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-

boot-

...

...

spl.lds"

...

...

...

#define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_NAND_SUPPORT

+#define CONFIG_SPL_NAND_SUPPORT_LEGACY

#define CONFIG_SPL_TEXT_BASE 0x810c0000 #define CONFIG_SYS_TEXT_BASE 0x81200000

-- 1.7.11.7

This is not about legacy vs. non-legacy. This is about basic vs. more featured SPL because of SPL size constraints. So what about dropping CONFIG_SPL_NAND_SUPPORT_LEGACY and testing for CONFIG_SPL_FRAMEWORK definition instead?

I was thinking about that, but the symbol is unrelated to NAND.

Well, it's CONFIG_SPL_FRAMEWORK + CONFIG_SPL_NAND_SUPPORT that defines the other implementation, and CONFIG_SPL_NAND_SUPPORT triggers the build of mxc_nand_spl.c for SPL, so the common point is CONFIG_SPL_FRAMEWORK.

...

I still think it's either a matter of fixing for new SPL or removing those two boards. The nand_spl/ stuff shall be removed ASAP.

Removing those boards is not a solution.

Is it really about "new" SPL? The generic SPL is enabled by CONFIG_SPL, and CONFIG_SPL_FRAMEWORK is a sub-option. If the generic SPL rules imposed to use the SPL framework functions, there would be no such sub-option. So it looks like these boards are complying to the new SPL rules.

We could see if using CONFIG_SPL_FRAMEWORK would still allow the SPL to fit in 2 kiB in order to drop this function, but if it does not fit, the new SPL rules should still make it possible to have a solution for any board having SPL size constraints.

I've just quickly build-tested the hack-patch below to have a guess of the SPL size for mx31pdk with CONFIG_SPL_FRAMEWORK, and I get 3.9 kiB, so way more than the maximum 2 kiB. Hence, these boards can't unfortunately be made more generic, but it's not a reason to remove them. The generic SPL must allow such hardware to be supported by U-Boot.

See the other email for my other idea. Either we can go with that or I can focus on making use of the regular MXC NAND driver on mx5, since there's no 2KiB limit there. [...]

Dear Benoît Thébaudeau,

Dear Marek Vasut,

On Friday, April 19, 2013 1:14:16 PM, Marek Vasut wrote:

...

Dear Benoît Thébaudeau,

...

On Friday, April 19, 2013 10:38:48 AM, Benoît Thébaudeau wrote:

...

Dear Marek Vasut,

On Friday, April 19, 2013 6:10:51 AM, Marek Vasut wrote:

...

Add support for generic NAND SPL via the SPL framework into the mxc_nand_spl driver. This is basically just a simple rename and publication of the already implemented functions. To avoid the old function which are used with the nand_spl/ stuff getting in the way of NAND SPL framework, the macro CONFIG_SPL_NAND_LEGACY was introduced and two remaining legacy boards were adjusted. These board need to be either fixed or removed in the long run, but I don't have either.

Also make sure the requested payload is aligned to full pages, otherwise this simple driver fails to load the last page.

Signed-off-by: Marek Vasut marex@denx.de Cc: Albert ARIBAUD albert.u.boot@aribaud.net Cc: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Scott Wood scottwood@freescale.com Cc: Stefano Babic sbabic@denx.de Cc: Tom Rini trini@ti.com

---

drivers/mtd/nand/mxc_nand_spl.c | 13 ++++++++++--- include/configs/mx31pdk.h | 1 + include/configs/tx25.h | 1 + 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/mxc_nand_spl.c b/drivers/mtd/nand/mxc_nand_spl.c index 09f23c3..8ff03c9 100644 --- a/drivers/mtd/nand/mxc_nand_spl.c +++ b/drivers/mtd/nand/mxc_nand_spl.c @@ -290,7 +290,7 @@ static int is_badblock(int pagenumber)

return 0;

}

-static int nand_load(unsigned int from, unsigned int size, unsigned char *buf) +int nand_spl_load_image(uint32_t from, unsigned int size, void *buf)

{

int i; unsigned int page;

@@ -303,6 +303,7 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)

page = from / CONFIG_SYS_NAND_PAGE_SIZE; i = 0;

• size = roundup(size, CONFIG_SYS_NAND_PAGE_SIZE);

  while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) {

  if (nfc_read_page(page, buf) < 0)

  return -1;
  
  

@@ -332,6 +333,7 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)

return 0;

}

+#ifdef CONFIG_SPL_NAND_SUPPORT_LEGACY

/*

• The main entry for NAND booting. It's necessary that SDRAM is

already * configured and available since this code loads the main U-Boot image

@@ -345,8 +347,9 @@ void nand_boot(void)

* CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE
must * be aligned to full pages
*/

• if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS,

CONFIG_SYS_NAND_U_BOOT_SIZE, - (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {

• if (!nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,

• 	CONFIG_SYS_NAND_U_BOOT_SIZE,
  

• 	(uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
  
  

  /* Copy from NAND successful, start U-boot */ uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; uboot();

@@ -364,3 +367,7 @@ void hang(void)

/* Loop forever */ while (1) ;

}

+#endif

+void nand_init(void) {} +void nand_deselect(void) {} diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 1754595..217552e 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -50,6 +50,7 @@

#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_NAND_SUPPORT

+#define CONFIG_SPL_NAND_SUPPORT_LEGACY

#define CONFIG_SPL_TEXT_BASE 0x87dc0000 #define CONFIG_SYS_TEXT_BASE 0x87e00000

diff --git a/include/configs/tx25.h b/include/configs/tx25.h index e72f8f6..7c362d0 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -37,6 +37,7 @@

#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-

spl.lds"

...

...

...

#define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_NAND_SUPPORT

+#define CONFIG_SPL_NAND_SUPPORT_LEGACY

#define CONFIG_SPL_TEXT_BASE 0x810c0000 #define CONFIG_SYS_TEXT_BASE 0x81200000

-- 1.7.11.7

This is not about legacy vs. non-legacy. This is about basic vs. more featured SPL because of SPL size constraints. So what about dropping CONFIG_SPL_NAND_SUPPORT_LEGACY and testing for CONFIG_SPL_FRAMEWORK definition instead?

I was thinking about that, but the symbol is unrelated to NAND.

Well, it's CONFIG_SPL_FRAMEWORK + CONFIG_SPL_NAND_SUPPORT that defines the other implementation, and CONFIG_SPL_NAND_SUPPORT triggers the build of mxc_nand_spl.c for SPL, so the common point is CONFIG_SPL_FRAMEWORK.

...

I still think it's either a matter of fixing for new SPL or removing those two boards. The nand_spl/ stuff shall be removed ASAP.

Removing those boards is not a solution.

Is it really about "new" SPL? The generic SPL is enabled by CONFIG_SPL, and CONFIG_SPL_FRAMEWORK is a sub-option. If the generic SPL rules imposed to use the SPL framework functions, there would be no such sub-option. So it looks like these boards are complying to the new SPL rules.

We could see if using CONFIG_SPL_FRAMEWORK would still allow the SPL to fit in 2 kiB in order to drop this function, but if it does not fit, the new SPL rules should still make it possible to have a solution for any board having SPL size constraints.

Rather than this, the other option would be to make whatever calls nand_boot() compatible with the SPL frameworks' implementation of spl_nand, so we don't need different function calls.

...

...

Also, I don't see any nand_init() (called by spl_nand_load_image()) for m53evk.

What do you mean?

I mean that I don't identify the implementation of nand_init() used in the context of the m53evk since the builds of drivers/mtd/nand/nand.c and drivers/mtd/nand/nand_spl_simple.c do not seem to be enabled for this board, and I don't see another definition.

It's there, as you said somewhere in the thread below ;-)

Dear Benoît Thébaudeau,

Dear Marek Vasut,

On Friday, April 19, 2013 7:06:39 PM, Marek Vasut wrote:

...

Subject: Re: [PATCH 2/6] nand: Add SPL_NAND support to mxc_nand_spl

Dear Benoît Thébaudeau,

...

Dear Marek Vasut,

On Friday, April 19, 2013 1:14:16 PM, Marek Vasut wrote:

...

Dear Benoît Thébaudeau,

...

On Friday, April 19, 2013 10:38:48 AM, Benoît Thébaudeau wrote:

...

Dear Marek Vasut,

On Friday, April 19, 2013 6:10:51 AM, Marek Vasut wrote: > Add support for generic NAND SPL via the SPL framework into the > mxc_nand_spl driver. This is basically just a simple rename and > publication of the already implemented functions. To avoid the > old function which are used with the nand_spl/ stuff getting in > the way of NAND SPL framework, the macro CONFIG_SPL_NAND_LEGACY > was introduced and two remaining legacy boards were adjusted. > These board need to be either fixed or removed in the long run, > but I don't have either. > > Also make sure the requested payload is aligned to full pages, > otherwise this simple driver fails to load the last page. > > Signed-off-by: Marek Vasut marex@denx.de > Cc: Albert ARIBAUD albert.u.boot@aribaud.net > Cc: Benoît Thébaudeau benoit.thebaudeau@advansee.com > Cc: Fabio Estevam fabio.estevam@freescale.com > Cc: Scott Wood scottwood@freescale.com > Cc: Stefano Babic sbabic@denx.de > Cc: Tom Rini trini@ti.com > --- > > drivers/mtd/nand/mxc_nand_spl.c | 13 ++++++++++--- > include/configs/mx31pdk.h | 1 + > include/configs/tx25.h | 1 + > 3 files changed, 12 insertions(+), 3 deletions(-) > > diff --git a/drivers/mtd/nand/mxc_nand_spl.c > b/drivers/mtd/nand/mxc_nand_spl.c > index 09f23c3..8ff03c9 100644 > --- a/drivers/mtd/nand/mxc_nand_spl.c > +++ b/drivers/mtd/nand/mxc_nand_spl.c > @@ -290,7 +290,7 @@ static int is_badblock(int pagenumber) > > return 0; > > } > > -static int nand_load(unsigned int from, unsigned int size, > unsigned char *buf) > +int nand_spl_load_image(uint32_t from, unsigned int size, void > *buf) > > { > > int i; > unsigned int page; > > @@ -303,6 +303,7 @@ static int nand_load(unsigned int from, > unsigned int size, unsigned char *buf) > > page = from / CONFIG_SYS_NAND_PAGE_SIZE; > i = 0; > > + size = roundup(size, CONFIG_SYS_NAND_PAGE_SIZE); > > while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) { > > if (nfc_read_page(page, buf) < 0) > > return -1; > > @@ -332,6 +333,7 @@ static int nand_load(unsigned int from, > unsigned int size, unsigned char *buf) > > return 0; > > } > > +#ifdef CONFIG_SPL_NAND_SUPPORT_LEGACY > > /* > > * The main entry for NAND booting. It's necessary that SDRAM > is already * configured and available since this code loads > the main U-Boot image > > @@ -345,8 +347,9 @@ void nand_boot(void) > > * CONFIG_SYS_NAND_U_BOOT_OFFS and > CONFIG_SYS_NAND_U_BOOT_SIZE must * be aligned to full pages > */ > > - if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, > CONFIG_SYS_NAND_U_BOOT_SIZE, - (uchar > *)CONFIG_SYS_NAND_U_BOOT_DST)) { > + if (!nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS, > + CONFIG_SYS_NAND_U_BOOT_SIZE, > + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) { > > /* Copy from NAND successful, start U-boot */ > uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; > uboot(); > > @@ -364,3 +367,7 @@ void hang(void) > > /* Loop forever */ > while (1) ; > > } > > +#endif > + > +void nand_init(void) {} > +void nand_deselect(void) {} > diff --git a/include/configs/mx31pdk.h > b/include/configs/mx31pdk.h index 1754595..217552e 100644 > --- a/include/configs/mx31pdk.h > +++ b/include/configs/mx31pdk.h > @@ -50,6 +50,7 @@ > > #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-

spl.lds"

...

...

...

...

...

> #define CONFIG_SPL_MAX_SIZE 2048 > #define CONFIG_SPL_NAND_SUPPORT > > +#define CONFIG_SPL_NAND_SUPPORT_LEGACY > > #define CONFIG_SPL_TEXT_BASE 0x87dc0000 > #define CONFIG_SYS_TEXT_BASE 0x87e00000 > > diff --git a/include/configs/tx25.h b/include/configs/tx25.h > index e72f8f6..7c362d0 100644 > --- a/include/configs/tx25.h > +++ b/include/configs/tx25.h > @@ -37,6 +37,7 @@ > > #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-

boot-

...

...

...

spl.lds"

...

...

> #define CONFIG_SPL_MAX_SIZE 2048 > #define CONFIG_SPL_NAND_SUPPORT > > +#define CONFIG_SPL_NAND_SUPPORT_LEGACY > > #define CONFIG_SPL_TEXT_BASE 0x810c0000 > #define CONFIG_SYS_TEXT_BASE 0x81200000 > > -- > 1.7.11.7

This is not about legacy vs. non-legacy. This is about basic vs. more featured SPL because of SPL size constraints. So what about dropping CONFIG_SPL_NAND_SUPPORT_LEGACY and testing for CONFIG_SPL_FRAMEWORK definition instead?

I was thinking about that, but the symbol is unrelated to NAND.

Well, it's CONFIG_SPL_FRAMEWORK + CONFIG_SPL_NAND_SUPPORT that defines the other implementation, and CONFIG_SPL_NAND_SUPPORT triggers the build of mxc_nand_spl.c for SPL, so the common point is CONFIG_SPL_FRAMEWORK.

...

I still think it's either a matter of fixing for new SPL or removing those two boards. The nand_spl/ stuff shall be removed ASAP.

Removing those boards is not a solution.

Is it really about "new" SPL? The generic SPL is enabled by CONFIG_SPL, and CONFIG_SPL_FRAMEWORK is a sub-option. If the generic SPL rules imposed to use the SPL framework functions, there would be no such sub-option. So it looks like these boards are complying to the new SPL rules.

We could see if using CONFIG_SPL_FRAMEWORK would still allow the SPL to fit in 2 kiB in order to drop this function, but if it does not fit, the new SPL rules should still make it possible to have a solution for any board having SPL size constraints.

Rather than this, the other option would be to make whatever calls nand_boot() compatible with the SPL frameworks' implementation of spl_nand, so we don't need different function calls.

If by that you mean renaming and reorganizing functions without using the main SPL framework, sure. For hang(), this has already been done by Andreas' pending series, and for nand_boot(), Tom's plan seems to be to merge the various existing implementations, and beyond that it would be possible to make the calls look more like the SPL framework's as you suggest.

OK, makes sense.

On 2013-04-19 15:00:13 (+0200), Philip Paeps philip@paeps.cx wrote:

On 2013-04-19 06:10:51 (+0200), Marek Vasut marex@denx.de wrote:

...

To avoid the old function which are used with the nand_spl/ stuff getting in the way of NAND SPL framework, the macro CONFIG_SPL_NAND_LEGACY was introduced and two remaining legacy boards were adjusted. These board need to be either fixed or removed in the long run, but I don't have either.

It sounds like "fixing" these boards is mainly a matter of confirming that a configuration for them based around CONFIG_SPL_FRAMEWORK will fit in 2K. If so, I don't think there is any reason to keep legacy support around.

A first build with CONFIG_SPL_FRAMEWORK came out to nearly 4K. Large contributors being (unsurprisingly) libcommon and libgeneric. I had to get rid of a puts() in libspl to make it build without those libraries. Unfortunately, that still came out to 2.2K. Close. :-)

I couldn't identify any obvious 100 bytes to scrap from glancing at u-boot-spl.map or objdump -D u-boot-spl, but I'll take a look.

- Philip

diff --git a/common/spl/spl.c b/common/spl/spl.c index 6a5a136..c061ab4 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -50,7 +50,6 @@ static bd_t bdata __attribute__ ((section(".data")));

inline void hang(void) { - puts("### ERROR ### Please RESET the board ###\n"); for (;;) ; }

Dear Benoît Thébaudeau,

Dear Marek Vasut,

On Friday, April 19, 2013 6:10:52 AM, Marek Vasut wrote:

...

This target is currently concatenating u-boot SPL in imximage format with u-boot.bin. The NAND SPL can load a raw binary, but the preffered format with much less limitations is uImage format. Fix the target so u-boot.bin is first converted into uImage format and only after that is concatenated.

Please reword: This is not a fix, but an enhancement.

...

Signed-off-by: Marek Vasut marex@denx.de Cc: Albert ARIBAUD albert.u.boot@aribaud.net Cc: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Scott Wood scottwood@freescale.com Cc: Stefano Babic sbabic@denx.de Cc: Tom Rini trini@ti.com

---

arch/arm/imx-common/Makefile | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile index 44b6822..ba31d3e 100644 --- a/arch/arm/imx-common/Makefile +++ b/arch/arm/imx-common/Makefile @@ -69,8 +69,11 @@ $(OBJTREE)/u-boot-with-nand-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin

-I binary -O binary $(OBJTREE)/spl/u-boot-nand-spl.imx \
$(OBJTREE)/spl/u-boot-nand-spl-pad.imx

rm $(OBJTREE)/spl/u-boot-nand-spl.imx

• cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.bin > $@
• rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx

• $(OBJTREE)/tools/mkimage -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \

• -e $(CONFIG_SYS_TEXT_BASE) -C none -d $(OBJTREE)/u-boot.bin \
  

• $(OBJTREE)/u-boot.uim
  

• cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.uim > $@
• rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.uim

######################################################################## #

-- 1.7.11.7

This change is correct.

I don't know the uImage format very well. Can you give examples of what this patch can bring compared to the raw binary format?

If this change is useful, it should probably be made for u-boot-with-spl.imx too.

Please see common/spl/spl_nand.c which calls spl_parse_image_header() on the payload loaded from NAND. This is implemented in common/spl/spl.c and if proper header is not found, the payload is assumed to be of 200kB of size, which is far less than fully configured U-Boot. So using the uimage format is much more flexible.

Best regards, Marek Vasut

Dear Benoît Thébaudeau,

Dear Marek Vasut,

On Friday, April 19, 2013 1:16:31 PM, Marek Vasut wrote:

...

Dear Benoît Thébaudeau,

...

Dear Marek Vasut,

On Friday, April 19, 2013 6:10:52 AM, Marek Vasut wrote:

...

This target is currently concatenating u-boot SPL in imximage format with u-boot.bin. The NAND SPL can load a raw binary, but the preffered format with much less limitations is uImage format. Fix the target so u-boot.bin is first converted into uImage format and only after that is concatenated.

Please reword: This is not a fix, but an enhancement.

...

Signed-off-by: Marek Vasut marex@denx.de Cc: Albert ARIBAUD albert.u.boot@aribaud.net Cc: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Scott Wood scottwood@freescale.com Cc: Stefano Babic sbabic@denx.de Cc: Tom Rini trini@ti.com

---

arch/arm/imx-common/Makefile | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile index 44b6822..ba31d3e 100644 --- a/arch/arm/imx-common/Makefile +++ b/arch/arm/imx-common/Makefile @@ -69,8 +69,11 @@ $(OBJTREE)/u-boot-with-nand-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin

-I binary -O binary $(OBJTREE)/spl/u-boot-nand-spl.imx \
$(OBJTREE)/spl/u-boot-nand-spl-pad.imx

rm $(OBJTREE)/spl/u-boot-nand-spl.imx

• cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.bin

...

...

...

$@ - rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx

• $(OBJTREE)/tools/mkimage -A arm -O U-Boot -a

$(CONFIG_SYS_TEXT_BASE) \ + -e $(CONFIG_SYS_TEXT_BASE) -C

none -d

...

...

...

$(OBJTREE)/u-boot.bin \ + $(OBJTREE)/u-boot.uim

• cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.uim

...

...

...

$@ + rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.uim

#################################################################### #### #

-- 1.7.11.7

This change is correct.

I don't know the uImage format very well. Can you give examples of what this patch can bring compared to the raw binary format?

If this change is useful, it should probably be made for u-boot-with-spl.imx too.

Please see common/spl/spl_nand.c which calls spl_parse_image_header() on the payload loaded from NAND. This is implemented in common/spl/spl.c and if proper header is not found, the payload is assumed to be of 200kB of size, which is far less than fully configured U-Boot.

Or you could #define CONFIG_SYS_MONITOR_LEN to what you need.

YUCK!

...

So using the uimage format is much more flexible.

I agree.

So I'd see the following changes for this patch:

• Reword "fix" to show enhancement, and detail the flexibility rationale

in the description.

• Extend to u-boot-with-spl.imx.

Ok.

Tom, shall we merge this one into current release after it's fixed?

Dear Tom Rini,

On 04/19/2013 07:51 AM, Marek Vasut wrote:

...

Dear Benoît Thébaudeau,

...

Dear Marek Vasut,

On Friday, April 19, 2013 1:16:31 PM, Marek Vasut wrote:

...

Dear Benoît Thébaudeau,

...

Dear Marek Vasut,

On Friday, April 19, 2013 6:10:52 AM, Marek Vasut wrote:

...

This target is currently concatenating u-boot SPL in imximage format with u-boot.bin. The NAND SPL can load a raw binary, but the preffered format with much less limitations is uImage format. Fix the target so u-boot.bin is first converted into uImage format and only after that is concatenated.

Please reword: This is not a fix, but an enhancement.

...

Signed-off-by: Marek Vasut marex@denx.de Cc: Albert ARIBAUD albert.u.boot@aribaud.net Cc: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Scott Wood scottwood@freescale.com Cc: Stefano Babic sbabic@denx.de Cc: Tom Rini trini@ti.com ---

arch/arm/imx-common/Makefile | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile index 44b6822..ba31d3e 100644 --- a/arch/arm/imx-common/Makefile +++ b/arch/arm/imx-common/Makefile @@ -69,8 +69,11 @@ $(OBJTREE)/u-boot-with-nand-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin

-I binary -O binary $(OBJTREE)/spl/u-boot-nand-spl.imx \ $(OBJTREE)/spl/u-boot-nand-spl-pad.imx rm $(OBJTREE)/spl/u-boot-nand-spl.imx

• cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx

$(OBJTREE)/u-boot.bin

$@ - rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx + $(OBJTREE)/tools/mkimage -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \ + -e $(CONFIG_SYS_TEXT_BASE) -C

none -d

...

...

...

...

$(OBJTREE)/u-boot.bin \ + $(OBJTREE)/u-boot.uim + cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.uim

$@ + rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.uim

####################################################################

#### #

...

...

...

...

...

-- 1.7.11.7

This change is correct.

I don't know the uImage format very well. Can you give examples of what this patch can bring compared to the raw binary format?

If this change is useful, it should probably be made for u-boot-with-spl.imx too.

Please see common/spl/spl_nand.c which calls spl_parse_image_header() on the payload loaded from NAND. This is implemented in common/spl/spl.c and if proper header is not found, the payload is assumed to be of 200kB of size, which is far less than fully configured U-Boot.

Or you could #define CONFIG_SYS_MONITOR_LEN to what you need.

YUCK!

...

...

So using the uimage format is much more flexible.

I agree.

So I'd see the following changes for this patch: - Reword "fix" to show enhancement, and detail the flexibility rationale in the description. - Extend to u-boot-with-spl.imx.

Ok.

Tom, shall we merge this one into current release after it's fixed?

This is an enhancement not a bug fix, right? If so, next release.

Since the release is nigh, let's wrap it into the next one. But the usability of the spl is lower :(

Dear Marek Vasut,

On Friday, April 19, 2013 6:10:53 AM, Marek Vasut wrote:

Fix minor adjustments needed to get SPL framework building on MX5.

Signed-off-by: Marek Vasut marex@denx.de Cc: Albert ARIBAUD albert.u.boot@aribaud.net Cc: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Scott Wood scottwood@freescale.com Cc: Stefano Babic sbabic@denx.de Cc: Tom Rini trini@ti.com

---

arch/arm/include/asm/arch-mx5/spl.h | 19 +++++++++++++++++++ spl/Makefile | 4 ++++ 2 files changed, 23 insertions(+) create mode 100644 arch/arm/include/asm/arch-mx5/spl.h

diff --git a/arch/arm/include/asm/arch-mx5/spl.h b/arch/arm/include/asm/arch-mx5/spl.h new file mode 100644 index 0000000..e0b6e3e --- /dev/null +++ b/arch/arm/include/asm/arch-mx5/spl.h @@ -0,0 +1,19 @@ +/*

• • Copyright (C) 2013 Marek Vasut marex@denx.de
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• */

+#ifndef __ASM_ARCH_SPL_H__ +#define __ASM_ARCH_SPL_H__

+#define BOOT_DEVICE_NONE 0 +#define BOOT_DEVICE_NAND 1

+#endif /* __ASM_ARCH_SPL_H__ */ diff --git a/spl/Makefile b/spl/Makefile index b5a8de7..90f932a 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -88,6 +88,10 @@ ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(C LIBS-y += $(CPUDIR)/omap-common/libomap-common.o endif

+ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35)) +LIBS-y += arch/$(ARCH)/imx-common/libimx-common.o +endif

ifneq ($(CONFIG_TEGRA),) LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o -- 1.7.11.7

Reviewed-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com

Best regards, Benoît

Dear Marek Vasut,

On Friday, April 19, 2013 6:10:54 AM, Marek Vasut wrote:

Augment the MX5 clock code with function to enable and configure NFC clock. This is necessary to get NFC working on MX5.

Signed-off-by: Marek Vasut marex@denx.de Cc: Albert ARIBAUD albert.u.boot@aribaud.net Cc: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Scott Wood scottwood@freescale.com Cc: Stefano Babic sbabic@denx.de Cc: Tom Rini trini@ti.com

---

arch/arm/cpu/armv7/mx5/clock.c | 14 ++++++++++++-- arch/arm/include/asm/arch-mx5/clock.h | 1 + 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c index 76c2c52..431756e 100644 --- a/arch/arm/cpu/armv7/mx5/clock.c +++ b/arch/arm/cpu/armv7/mx5/clock.c @@ -739,10 +739,11 @@ static int config_core_clk(u32 ref, u32 freq) static int config_nfc_clk(u32 nfc_clk) { u32 parent_rate = get_emi_slow_clk();

• u32 div = parent_rate / nfc_clk;

• u32 div;

• if (nfc_clk <= 0)

• if (nfc_clk == 0) return -EINVAL;
• div = parent_rate / nfc_clk; if (div == 0) div++; if (parent_rate / div > NFC_CLK_MAX)

@@ -755,6 +756,15 @@ static int config_nfc_clk(u32 nfc_clk) return 0; }

+void enable_nfc_clk(unsigned char enable) +{

• unsigned int cg = enable ? MXC_CCM_CCGR_CG_ON : MXC_CCM_CCGR_CG_OFF;
• clrsetbits_le32(&mxc_ccm->CCGR5,

• MXC_CCM_CCGR5_EMI_ENFC(MXC_CCM_CCGR_CG_MASK),
  

• MXC_CCM_CCGR5_EMI_ENFC(cg));
  

+}

/* Config main_bus_clock for periphs */ static int config_periph_clk(u32 ref, u32 freq) { diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h index 9cdfb48..6910192 100644 --- a/arch/arm/include/asm/arch-mx5/clock.h +++ b/arch/arm/include/asm/arch-mx5/clock.h @@ -68,5 +68,6 @@ void set_usboh3_clk(void); void enable_usboh3_clk(unsigned char enable); void mxc_set_sata_internal_clock(void); int enable_i2c_clk(unsigned char enable, unsigned i2c_num); +void enable_nfc_clk(unsigned char enable);

#endif /* __ASM_ARCH_CLOCK_H */

1.7.11.7

Reviewed-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com

Best regards, Benoît

Dear Benoît Thébaudeau,

On Friday, April 19, 2013 11:02:03 AM, Benoît Thébaudeau wrote:

...

Dear Marek Vasut,

On Friday, April 19, 2013 6:10:54 AM, Marek Vasut wrote:

...

Augment the MX5 clock code with function to enable and configure NFC clock. This is necessary to get NFC working on MX5.

Signed-off-by: Marek Vasut marex@denx.de Cc: Albert ARIBAUD albert.u.boot@aribaud.net Cc: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Scott Wood scottwood@freescale.com Cc: Stefano Babic sbabic@denx.de Cc: Tom Rini trini@ti.com

---

arch/arm/cpu/armv7/mx5/clock.c | 14 ++++++++++++-- arch/arm/include/asm/arch-mx5/clock.h | 1 + 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c index 76c2c52..431756e 100644 --- a/arch/arm/cpu/armv7/mx5/clock.c +++ b/arch/arm/cpu/armv7/mx5/clock.c @@ -739,10 +739,11 @@ static int config_core_clk(u32 ref, u32 freq)

static int config_nfc_clk(u32 nfc_clk) {

u32 parent_rate = get_emi_slow_clk();

• u32 div = parent_rate / nfc_clk;

• u32 div;

• if (nfc_clk <= 0)

• if (nfc_clk == 0)

  return -EINVAL;

• div = parent_rate / nfc_clk;

  if (div == 0)

  div++;

  if (parent_rate / div > NFC_CLK_MAX)

@@ -755,6 +756,15 @@ static int config_nfc_clk(u32 nfc_clk)

return 0;

}

+void enable_nfc_clk(unsigned char enable) +{

• unsigned int cg = enable ? MXC_CCM_CCGR_CG_ON : MXC_CCM_CCGR_CG_OFF;
• clrsetbits_le32(&mxc_ccm->CCGR5,

• MXC_CCM_CCGR5_EMI_ENFC(MXC_CCM_CCGR_CG_MASK),
  

• MXC_CCM_CCGR5_EMI_ENFC(cg));
  

+}

/* Config main_bus_clock for periphs */ static int config_periph_clk(u32 ref, u32 freq) {

diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h index 9cdfb48..6910192 100644 --- a/arch/arm/include/asm/arch-mx5/clock.h +++ b/arch/arm/include/asm/arch-mx5/clock.h @@ -68,5 +68,6 @@ void set_usboh3_clk(void);

void enable_usboh3_clk(unsigned char enable); void mxc_set_sata_internal_clock(void); int enable_i2c_clk(unsigned char enable, unsigned i2c_num);

+void enable_nfc_clk(unsigned char enable);

#endif /* __ASM_ARCH_CLOCK_H */

-- 1.7.11.7

Reviewed-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com

Actually, this code is correct, but why is it needed? Indeed, this clock is already ungated by arch/arm/cpu/armv7/mx5/lowlevel_init.S.

This is not good, the code should be moved away from the assembly.

Also, your board seems to be hardware-bootable only from NAND

This is incorrect, it is bootable from SD card as well.

so in this case the boot ROM also ungates this clock itself.

We can not rely on that.

Dear Marek Vasut,

On Friday, April 19, 2013 6:10:55 AM, Marek Vasut wrote:

Add basic support for the DENX M53EVK board. Currently supported is the MMC, Ethernet, I2C.

Signed-off-by: Marek Vasut marex@denx.de Cc: Albert ARIBAUD albert.u.boot@aribaud.net Cc: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Scott Wood scottwood@freescale.com Cc: Stefano Babic sbabic@denx.de Cc: Tom Rini trini@ti.com Cc: Wolfgang Denk wd@denx.de

---

MAINTAINERS | 1 + board/denx/m53evk/Makefile | 40 ++++ board/denx/m53evk/imximage.cfg | 108 +++++++++++ board/denx/m53evk/m53evk.c | 410 +++++++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/m53evk.h | 252 +++++++++++++++++++++++++ 6 files changed, 812 insertions(+) create mode 100644 board/denx/m53evk/Makefile create mode 100644 board/denx/m53evk/imximage.cfg create mode 100644 board/denx/m53evk/m53evk.c create mode 100644 include/configs/m53evk.h

diff --git a/MAINTAINERS b/MAINTAINERS index 643a5ac..e109be6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -954,6 +954,7 @@ Marek Vasut marek.vasut@gmail.com mx23_olinuxino i.MX23 m28evk i.MX28 sc_sps_1 i.MX28

• m53evk i.MX53

Hugo Villeneuve hugo.villeneuve@lyrtech.com

diff --git a/board/denx/m53evk/Makefile b/board/denx/m53evk/Makefile new file mode 100644 index 0000000..bfb040a --- /dev/null +++ b/board/denx/m53evk/Makefile @@ -0,0 +1,40 @@ +# +# DENX M53EVK +# Copyright (C) 2012-2013 Marek Vasut marex@denx.de +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#

+include $(TOPDIR)/config.mk

+LIB = $(obj)lib$(BOARD).o

+COBJS := m53evk.o

+SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS))

+$(LIB): $(obj).depend $(OBJS)

• $(call cmd_link_o_target, $(OBJS))

+#########################################################################

+# defines $(obj).depend target +include $(SRCTREE)/rules.mk

+sinclude $(obj).depend

+######################################################################### diff --git a/board/denx/m53evk/imximage.cfg b/board/denx/m53evk/imximage.cfg new file mode 100644 index 0000000..3d60de0 --- /dev/null +++ b/board/denx/m53evk/imximage.cfg @@ -0,0 +1,108 @@ +/*

• • DENX M53 DRAM init values
• • Copyright (C) 2012-2013 Marek Vasut marex@denx.de
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not write to the Free Software
• • Foundation Inc. 51 Franklin Street Fifth Floor Boston,
• • MA 02110-1301 USA
• • Refer docs/README.imxmage for more details about how-to configure
• • and create imximage boot image
• • The syntax is taken as close as possible with the kwbimage
• */

+/* image version */ +IMAGE_VERSION 2

+/*

• • Boot Device : one of
• • spi, sd, nand
• */

+BOOT_FROM nand

+/*

• • Device Configuration Data (DCD)
• • Each entry must have the format:
• • Addr-type Address Value
• • where:
• • Addr-type register length (1,2 or 4 bytes)
• • Address absolute address of the register
• • value value to be stored in the register
• */

+DATA 4 0x53fa86f4 0x00000000 /* GRP_DDRMODE_CTL */ +DATA 4 0x53fa8714 0x00000000 /* GRP_DDRMODE */ +DATA 4 0x53fa86fc 0x00000000 /* GRP_DDRPKE */ +DATA 4 0x53fa8724 0x04000000 /* GRP_DDR_TYPE */

+DATA 4 0x53fa872c 0x00300000 /* GRP_B3DS */ +DATA 4 0x53fa8554 0x00300000 /* DRAM_DQM3 */ +DATA 4 0x53fa8558 0x00300040 /* DRAM_SDQS3 */

+DATA 4 0x53fa8728 0x00300000 /* GRP_B2DS */ +DATA 4 0x53fa8560 0x00300000 /* DRAM_DQM2 */ +DATA 4 0x53fa8568 0x00300040 /* DRAM_SDQS2 */

+DATA 4 0x53fa871c 0x00300000 /* GRP_B1DS */ +DATA 4 0x53fa8594 0x00300000 /* DRAM_DQM1 */ +DATA 4 0x53fa8590 0x00300040 /* DRAM_SDQS1 */

+DATA 4 0x53fa8718 0x00300000 /* GRP_B0DS */ +DATA 4 0x53fa8584 0x00300000 /* DRAM_DQM0 */ +DATA 4 0x53fa857c 0x00300040 /* DRAM_SDQS0 */

+DATA 4 0x53fa8578 0x00300000 /* DRAM_SDCLK_0 */ +DATA 4 0x53fa8570 0x00300000 /* DRAM_SDCLK_1 */

+DATA 4 0x53fa8574 0x00300000 /* DRAM_CAS */ +DATA 4 0x53fa8588 0x00300000 /* DRAM_RAS */ +DATA 4 0x53fa86f0 0x00300000 /* GRP_ADDDS */ +DATA 4 0x53fa8720 0x00300000 /* GRP_CTLDS */

+DATA 4 0x53fa8564 0x00300040 /* DRAM_SDODT1 */ +DATA 4 0x53fa8580 0x00300040 /* DRAM_SDODT0 */

+/* ESDCTL */ +DATA 4 0x63fd9088 0x32383535 +DATA 4 0x63fd9090 0x40383538 +DATA 4 0x63fd907c 0x0136014d +DATA 4 0x63fd9080 0x01510141

+DATA 4 0x63fd9018 0x00011740 +DATA 4 0x63fd9000 0xc3190000 +DATA 4 0x63fd900c 0x555952e3 +DATA 4 0x63fd9010 0xb68e8b63 +DATA 4 0x63fd9014 0x01ff00db +DATA 4 0x63fd902c 0x000026d2 +DATA 4 0x63fd9030 0x009f0e21 +DATA 4 0x63fd9008 0x12273030 +DATA 4 0x63fd9004 0x0002002d +DATA 4 0x63fd901c 0x00008032 +DATA 4 0x63fd901c 0x00008033 +DATA 4 0x63fd901c 0x00028031 +DATA 4 0x63fd901c 0x092080b0 +DATA 4 0x63fd901c 0x04008040 +DATA 4 0x63fd901c 0x0000803a +DATA 4 0x63fd901c 0x0000803b +DATA 4 0x63fd901c 0x00028039 +DATA 4 0x63fd901c 0x09208138 +DATA 4 0x63fd901c 0x04008048 +DATA 4 0x63fd9020 0x00001800 +DATA 4 0x63fd9040 0x04b80003 +DATA 4 0x63fd9058 0x00022227 +DATA 4 0x63fd901c 0x00000000 diff --git a/board/denx/m53evk/m53evk.c b/board/denx/m53evk/m53evk.c new file mode 100644 index 0000000..31f60e1 --- /dev/null +++ b/board/denx/m53evk/m53evk.c @@ -0,0 +1,410 @@ +/*

• • DENX M53 module
• • Copyright (C) 2012-2013 Marek Vasut marex@denx.de
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 59 Temple Place, Suite 330, Boston,
• • MA 02111-1307 USA
• */

+#include <common.h> +#include <asm/io.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/mx5x_pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/clock.h> +#include <asm/arch/iomux.h> +#include <asm/arch/spl.h> +#include <asm/errno.h> +#include <netdev.h> +#include <i2c.h> +#include <mmc.h> +#include <spl.h> +#include <fsl_esdhc.h> +#include <asm/gpio.h> +#include <usb/ehci-fsl.h>

+DECLARE_GLOBAL_DATA_PTR;

+int dram_init(void) +{

• u32 size1, size2;
• size1 = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
• size2 = get_ram_size((void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
• gd->ram_size = size1 + size2;
• return 0;

+} +void dram_init_banksize(void) +{

• gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
• gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
• gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
• gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;

+}

+u32 get_board_rev(void) +{

• struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
• struct fuse_bank *bank = &iim->bank[0];
• struct fuse_bank0_regs *fuse =

• (struct fuse_bank0_regs *)bank->fuse_regs;
  

• int rev = readl(&fuse->gp[6]);
• return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;

+}

+static void setup_iomux_uart(void) +{

• mxc_request_iomux(MX53_PIN_ATA_BUFFER_EN, IOMUX_CONFIG_ALT3);
• mxc_request_iomux(MX53_PIN_ATA_DMARQ, IOMUX_CONFIG_ALT3);
• mxc_iomux_set_pad(MX53_PIN_ATA_BUFFER_EN,

• 		PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
  

• 		PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE |
  

• 		PAD_CTL_HYS_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_ATA_DMARQ,

• 		PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
  

• 		PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE |
  

• 		PAD_CTL_HYS_ENABLE);
  

• mxc_iomux_set_input(MX53_UART2_IPP_UART_RXD_MUX_SELECT_INPUT, 0x3);

+}

+#ifdef CONFIG_USB_EHCI_MX5 +int board_ehci_hcd_init(int port) +{

• if (port == 0) {

• /* USB OTG PWRON */
  

• mxc_request_iomux(MX53_PIN_GPIO_4, IOMUX_CONFIG_ALT1);
  

• mxc_iomux_set_pad(MX53_PIN_GPIO_4,
  

• 		PAD_CTL_PKE_ENABLE |
  

• 		PAD_CTL_100K_PD |
  

• 		PAD_CTL_DRV_HIGH
  

• 		);
  

• gpio_direction_output(IOMUX_TO_GPIO(MX53_PIN_GPIO_4), 0);
  

• /* USB OTG Over Current */
  

• mxc_request_iomux(MX53_PIN_GPIO_18, IOMUX_CONFIG_ALT1);
  

• mxc_iomux_set_input(MX53_USBOH3_IPP_IND_OTG_OC_SELECT_INPUT, 1);
  

• } else if (port == 1) {

• /* USB Host PWRON */
  

• mxc_request_iomux(MX53_PIN_GPIO_2, IOMUX_CONFIG_ALT1);
  

• mxc_iomux_set_pad(MX53_PIN_GPIO_2,
  

• 		PAD_CTL_PKE_ENABLE |
  

• 		PAD_CTL_100K_PD |
  

• 		PAD_CTL_DRV_HIGH
  

• 		);
  

• gpio_direction_output(IOMUX_TO_GPIO(MX53_PIN_GPIO_2), 0);
  

• /* USB Host Over Current */
  

• mxc_request_iomux(MX53_PIN_GPIO_3, IOMUX_CONFIG_ALT6);
  

• mxc_iomux_set_input(MX53_USBOH3_IPP_IND_UH1_OC_SELECT_INPUT, 1);
  

• }
• return 0;

+} +#endif

+static void setup_iomux_fec(void) +{

• /* MDIO IOMUX */
• mxc_request_iomux(MX53_PIN_FEC_MDIO, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_FEC_MDC, IOMUX_CONFIG_ALT0);
• /* FEC 0 IOMUX */
• mxc_request_iomux(MX53_PIN_FEC_CRS_DV, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_FEC_REF_CLK, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_FEC_RX_ER, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_FEC_TX_EN, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_FEC_RXD0, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_FEC_RXD1, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_FEC_TXD0, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_FEC_TXD1, IOMUX_CONFIG_ALT0);
• /* FEC 1 IOMUX */
• mxc_request_iomux(MX53_PIN_KEY_COL0, IOMUX_CONFIG_ALT6); /* RXD3 */
• mxc_request_iomux(MX53_PIN_KEY_ROW0, IOMUX_CONFIG_ALT6); /* TX_ER */
• mxc_request_iomux(MX53_PIN_KEY_COL1, IOMUX_CONFIG_ALT6); /* RX_CLK */
• mxc_request_iomux(MX53_PIN_KEY_ROW1, IOMUX_CONFIG_ALT6); /* COL */
• mxc_request_iomux(MX53_PIN_KEY_COL2, IOMUX_CONFIG_ALT6); /* RXD2 */
• mxc_request_iomux(MX53_PIN_KEY_ROW2, IOMUX_CONFIG_ALT6); /* TXD2 */
• mxc_request_iomux(MX53_PIN_KEY_COL3, IOMUX_CONFIG_ALT6); /* CRS */
• mxc_request_iomux(MX53_PIN_GPIO_19, IOMUX_CONFIG_ALT6); /* TXD3 */
• /* MDIO PADs */
• mxc_iomux_set_pad(MX53_PIN_FEC_MDIO,

• 		PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH |
  

• 		PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE |
  

• 		PAD_CTL_22K_PU | PAD_CTL_ODE_OPENDRAIN_ENABLE);
  

• mxc_iomux_set_input(MX53_FEC_FEC_MDI_SELECT_INPUT, 0x1);
• mxc_iomux_set_pad(MX53_PIN_FEC_MDC, PAD_CTL_DRV_HIGH);
• /* FEC 0 PADs */
• mxc_iomux_set_pad(MX53_PIN_FEC_CRS_DV,

• 	PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_FEC_REF_CLK,

• 	PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_FEC_RX_ER,

• 	PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_FEC_TX_EN, PAD_CTL_DRV_HIGH);
• mxc_iomux_set_pad(MX53_PIN_FEC_RXD0,

• 	PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_FEC_RXD1,

• 	PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_FEC_TXD0, PAD_CTL_DRV_HIGH);
• mxc_iomux_set_pad(MX53_PIN_FEC_TXD1, PAD_CTL_DRV_HIGH);
• /* FEC 1 PADs */
• mxc_iomux_set_pad(MX53_PIN_KEY_COL0, /* RXD3 */

• 	PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_KEY_ROW0, /* TX_ER */

• 	PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_KEY_COL1, /* RX_CLK */

• 	PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_KEY_ROW1, /* COL */

• 	PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_KEY_COL2, /* RXD2 */

• 	PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_KEY_ROW2, /* TXD2 */

• 	PAD_CTL_DRV_HIGH);
  

• mxc_iomux_set_pad(MX53_PIN_KEY_COL3, /* CRS */

• 	PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_GPIO_19, /* TXD3 */

• 	PAD_CTL_DRV_HIGH);
  

+}

+#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg = {

• MMC_SDHC1_BASE_ADDR,

+};

+int board_mmc_getcd(struct mmc *mmc) +{

• mxc_request_iomux(MX53_PIN_GPIO_1, IOMUX_CONFIG_ALT1);
• gpio_direction_input(IMX_GPIO_NR(1, 1));
• return !gpio_get_value(IMX_GPIO_NR(1, 1));

+}

+int board_mmc_init(bd_t *bis) +{

• esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
• mxc_request_iomux(MX53_PIN_SD1_CMD, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_SD1_CLK, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_SD1_DATA0,

• 		IOMUX_CONFIG_ALT0);
  

• mxc_request_iomux(MX53_PIN_SD1_DATA1,

• 		IOMUX_CONFIG_ALT0);
  

• mxc_request_iomux(MX53_PIN_SD1_DATA2,

• 		IOMUX_CONFIG_ALT0);
  

• mxc_request_iomux(MX53_PIN_SD1_DATA3,

• 		IOMUX_CONFIG_ALT0);
  

• mxc_request_iomux(MX53_PIN_EIM_DA13,

• 		IOMUX_CONFIG_ALT1);
  

• mxc_iomux_set_pad(MX53_PIN_SD1_CMD,

• PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH |
  

• PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE |
  

• PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU);
  

• mxc_iomux_set_pad(MX53_PIN_SD1_CLK,

• PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE |
  

• PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU |
  

• PAD_CTL_DRV_HIGH);
  

• mxc_iomux_set_pad(MX53_PIN_SD1_DATA0,

• PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH |
  

• PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE |
  

• PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU);
  

• mxc_iomux_set_pad(MX53_PIN_SD1_DATA1,

• PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH |
  

• PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE |
  

• PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU);
  

• mxc_iomux_set_pad(MX53_PIN_SD1_DATA2,

• PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH |
  

• PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE |
  

• PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU);
  

• mxc_iomux_set_pad(MX53_PIN_SD1_DATA3,

• PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH |
  

• PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE |
  

• PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU);
  

• /* GPIO 2_31 is SD power */
• mxc_request_iomux(MX53_PIN_EIM_EB3, IOMUX_CONFIG_ALT1);
• gpio_direction_output(IMX_GPIO_NR(2, 31), 0);
• return fsl_esdhc_initialize(bis, &esdhc_cfg);

+} +#endif

+static void setup_iomux_i2c(void) +{

• mxc_request_iomux(MX53_PIN_EIM_D16,

• IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION);
  

• mxc_request_iomux(MX53_PIN_EIM_EB2,

• IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION);
  

• mxc_iomux_set_pad(MX53_PIN_EIM_D16,

• PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
  

• PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE |
  

• PAD_CTL_PUE_PULL |
  

• PAD_CTL_ODE_OPENDRAIN_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_EIM_EB2,

• PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
  

• PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE |
  

• PAD_CTL_PUE_PULL |
  

• PAD_CTL_ODE_OPENDRAIN_ENABLE);
  

• mxc_iomux_set_input(MX53_I2C2_IPP_SDA_IN_SELECT_INPUT, 0x1);
• mxc_iomux_set_input(MX53_I2C2_IPP_SCL_IN_SELECT_INPUT, 0x1);

+}

+static void setup_iomux_nand(void) +{

• mxc_request_iomux(MX53_PIN_NANDF_WE_B, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_NANDF_RE_B, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_NANDF_CLE, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_NANDF_ALE, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_NANDF_WP_B, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_NANDF_RB0, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_NANDF_CS0, IOMUX_CONFIG_ALT0);
• mxc_request_iomux(MX53_PIN_ATA_DATA0, IOMUX_CONFIG_ALT3);
• mxc_request_iomux(MX53_PIN_ATA_DATA1, IOMUX_CONFIG_ALT3);
• mxc_request_iomux(MX53_PIN_ATA_DATA2, IOMUX_CONFIG_ALT3);
• mxc_request_iomux(MX53_PIN_ATA_DATA3, IOMUX_CONFIG_ALT3);
• mxc_request_iomux(MX53_PIN_ATA_DATA4, IOMUX_CONFIG_ALT3);
• mxc_request_iomux(MX53_PIN_ATA_DATA5, IOMUX_CONFIG_ALT3);
• mxc_request_iomux(MX53_PIN_ATA_DATA6, IOMUX_CONFIG_ALT3);
• mxc_request_iomux(MX53_PIN_ATA_DATA7, IOMUX_CONFIG_ALT3);
• mxc_iomux_set_pad(MX53_PIN_NANDF_WE_B, PAD_CTL_DRV_HIGH);
• mxc_iomux_set_pad(MX53_PIN_NANDF_RE_B, PAD_CTL_DRV_HIGH);
• mxc_iomux_set_pad(MX53_PIN_NANDF_CLE, PAD_CTL_DRV_HIGH);
• mxc_iomux_set_pad(MX53_PIN_NANDF_ALE, PAD_CTL_DRV_HIGH);
• mxc_iomux_set_pad(MX53_PIN_NANDF_WP_B, PAD_CTL_PUE_PULL |

• 	PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_NANDF_RB0, PAD_CTL_PUE_PULL |

• 	PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_NANDF_CS0, PAD_CTL_DRV_HIGH);
• mxc_iomux_set_pad(MX53_PIN_ATA_DATA0, PAD_CTL_DRV_HIGH |

• 	PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_ATA_DATA1, PAD_CTL_DRV_HIGH |

• 	PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_ATA_DATA2, PAD_CTL_DRV_HIGH |

• 	PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_ATA_DATA3, PAD_CTL_DRV_HIGH |

• 	PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_ATA_DATA4, PAD_CTL_DRV_HIGH |

• 	PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_ATA_DATA5, PAD_CTL_DRV_HIGH |

• 	PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_ATA_DATA6, PAD_CTL_DRV_HIGH |

• 	PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE);
  

• mxc_iomux_set_pad(MX53_PIN_ATA_DATA7, PAD_CTL_DRV_HIGH |

• 	PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE);
  

+}

Like for 5/6, why is this function needed? When booting from NAND, the boot ROM sets the NAND pads appropriately itself (see 7.5.2.4), so unless it reverts those changes to the IOMUX reset values afterwards, there is no need to set the NAND IOMUX again. It's not as if the board were using NAND after having been booted from another source (like mx53ard does).

Or perhaps you are planning to add more boot sources later, in which case there are configs missing for M4IF and WEIM (see mx53ard's setup_iomux_nand()).

+static void m53_set_clock(void) +{

• int ret;
• const uint32_t ref_clk = MXC_HCLK;
• const uint32_t dramclk = 400;
• uint32_t cpuclk;
• mxc_request_iomux(MX53_PIN_GPIO_10, IOMUX_CONFIG_GPIO);
• mxc_iomux_set_pad(MX53_PIN_GPIO_10, PAD_CTL_DRV_HIGH |

• 	PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE);
  

• gpio_direction_input(IOMUX_TO_GPIO(MX53_PIN_GPIO_10));
• /* GPIO10 selects modules' CPU speed, 1 = 1200MHz ; 0 = 800MHz */
• cpuclk = gpio_get_value(IOMUX_TO_GPIO(MX53_PIN_GPIO_10)) ? 1200 : 800;
• ret = mxc_set_clock(ref_clk, cpuclk, MXC_ARM_CLK);
• if (ret)

• printf("CPU:   Switch CPU clock to %dMHz failed\n", cpuclk);
  

• ret = mxc_set_clock(ref_clk, dramclk, MXC_PERIPH_CLK);
• if (ret) {

• printf("CPU:   Switch peripheral clock to %dMHz failed\n",
  

• 	dramclk);
  

• }
• ret = mxc_set_clock(ref_clk, dramclk, MXC_DDR_CLK);
• if (ret)

• printf("CPU:   Switch DDR clock to %dMHz failed\n", dramclk);
  

+}

+int board_early_init_f(void) +{

• setup_iomux_uart();
• setup_iomux_fec();
• setup_iomux_i2c();
• setup_iomux_nand();
• m53_set_clock();
• return 0;

+}

+/*

• • Do not overwrite the console
• • Use always serial for U-Boot console
• */

+int overwrite_console(void) +{

• return 1;

+}

+int board_init(void) +{

• gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
• mxc_set_sata_internal_clock();
• mxc_set_clock(0, 33, MXC_NFC_CLK);
• enable_nfc_clk(1);
• return 0;

+}

+int checkboard(void) +{

• puts("Board: DENX M53EVK\n");
• return 0;

+}

+/*

• • NAND SPL
• */

+#ifdef CONFIG_SPL_BUILD +void spl_board_init(void) +{

• m53_set_clock();
• setup_iomux_nand();

+}

+u32 spl_boot_device(void) +{

• return BOOT_DEVICE_NAND;

+} +#endif diff --git a/boards.cfg b/boards.cfg index 31483d6..822ae01 100644 --- a/boards.cfg +++ b/boards.cfg @@ -246,6 +246,7 @@ am335x_evm_usbspl arm armv7 am335x ti ti814x_evm arm armv7 ti814x ti am33xx pcm051 arm armv7 pcm051 phytec am33xx pcm051 highbank arm armv7 highbank - highbank +m53evk arm armv7 m53evk denx mx5 m53evk:IMX_CONFIG=board/denx/m53evk/imximage.cfg mx51_efikamx arm armv7 mx51_efikamx genesi mx5 mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_mx.cfg mx51_efikasb arm armv7 mx51_efikamx genesi mx5 mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_sb.cfg mx51evk arm armv7 mx51evk freescale mx5 mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h new file mode 100644 index 0000000..db9d7ac --- /dev/null +++ b/include/configs/m53evk.h @@ -0,0 +1,252 @@ +/*

• • DENX M53 configuration
• • Copyright (C) 2012-2013 Marek Vasut marex@denx.de
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 59 Temple Place, Suite 330, Boston,
• • MA 02111-1307 USA
• */

+#ifndef __M53EVK_CONFIG_H__ +#define __M53EVK_CONFIG_H__

+#define CONFIG_MX53 +#define CONFIG_MXC_GPIO +#define CONFIG_SYS_HZ 1000

+#include <asm/arch/imx-regs.h>

+#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_REVISION_TAG +#define CONFIG_SYS_NO_FLASH

+/*

• • U-Boot Commands
• */

+#include <config_cmd_default.h> +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_DOS_PARTITION

+#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_MMC +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_SATA +#define CONFIG_CMD_USB

+/*

• • Memory configurations
• */

+#define CONFIG_NR_DRAM_BANKS 2 +#define PHYS_SDRAM_1 CSD0_BASE_ADDR +#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) +#define PHYS_SDRAM_2 CSD1_BASE_ADDR +#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) +#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) +#define CONFIG_SYS_MEMTEST_START 0x70010000 +#define CONFIG_SYS_MEMTEST_END 0x70020000

+#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)

+#define CONFIG_SYS_INIT_SP_OFFSET \

• (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)

+#define CONFIG_SYS_INIT_SP_ADDR \

• (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

+#define CONFIG_SYS_TEXT_BASE 0x71000000

+/*

• • U-Boot general configurations
• */

+#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ +#define CONFIG_SYS_PBSIZE \

• (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)

• 				/* Print buffer size */
  

+#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE

• 				/* Boot argument buffer size */
  

+#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ +#define CONFIG_AUTO_COMPLETE /* Command auto complete */ +#define CONFIG_CMDLINE_EDITING /* Command history etc */ +#define CONFIG_SYS_HUSH_PARSER

+/*

• • Serial Driver
• */

+#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200

+/*

• • MMC Driver
• */

+#ifdef CONFIG_CMD_MMC +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_NUM 1 +#endif

+/*

• • NAND
• */

+#define CONFIG_ENV_SIZE (16 * 1024) +#ifdef CONFIG_CMD_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI +#define CONFIG_NAND_MXC +#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI +#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR +#define CONFIG_SYS_NAND_LARGEPAGE +#define CONFIG_MXC_NAND_HWECC +#define CONFIG_SYS_NAND_USE_FLASH_BBT

+/* Environment is in NAND */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE +#define CONFIG_ENV_SECT_SIZE (128 * 1024) +#define CONFIG_ENV_RANGE (512 * 1024) +#define CONFIG_ENV_OFFSET 0x100000 +#define CONFIG_ENV_OFFSET_REDUND \

• (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
  

+#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define MTDIDS_DEFAULT "nand0=mxc-nand" +#define MTDPARTS_DEFAULT \

• "mtdparts=mxc-nand:" \

• "1m(bootloader)ro,"		\
  

• "512k(environment),"		\
  

• "512k(redundant-environment),"	\
  

• "4m(kernel),"			\
  

• "128k(fdt),"			\
  

• "8m(ramdisk),"			\
  

• "-(filesystem)"
  

+#else +#define CONFIG_ENV_IS_NOWHERE +#endif

+/*

• • Ethernet on SOC (FEC)
• */

+#ifdef CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_ETHPRIME "FEC0" +#define IMX_FEC_BASE FEC_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x0 +#define CONFIG_MII +#define CONFIG_DISCOVER_PHY +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_ARP_TIMEOUT 200UL +#endif

+/*

• • I2C
• */

+#ifdef CONFIG_CMD_I2C +#define CONFIG_HARD_I2C +#define CONFIG_I2C_MXC +#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR +#define CONFIG_SYS_I2C_SPEED 100000 +#endif

+/*

• • USB
• */

+#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX5 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#endif

+/*

• • SATA
• */

+#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif

+/*

• • Boot Linux
• */

+#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_BOOTARGS "console=ttymxc1,115200" +#define CONFIG_BOOTCOMMAND "run bootcmd_net" +#define CONFIG_LOADADDR 0x70800000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_OF_LIBFDT

+/*

• • NAND SPL
• */

+#define CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_BOARD_INIT +/*

• • The 0x1000 offset must be present, otherwise board won't boot.
• • The value (IRAM_BASE_ADDR) must be spelled out, otherwise linker won't

link.

• */

+#define CONFIG_SPL_TEXT_BASE 0x70008000 +#define CONFIG_SPL_PAD_TO 0x8000 +#define CONFIG_SPL_STACK 0x70004000 +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT

+#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0

+#endif /* __M53EVK_CONFIG_H__ */

1.7.11.7

Best regards, Benoît

On Fri, Apr 19, 2013 at 1:10 AM, Marek Vasut marex@denx.de wrote:

Add basic support for the DENX M53EVK board. Currently supported is the MMC, Ethernet, I2C.

What about NAND, SATA and USB ?

--- /dev/null +++ b/board/denx/m53evk/Makefile @@ -0,0 +1,40 @@ +# +# DENX M53EVK +# Copyright (C) 2012-2013 Marek Vasut marex@denx.de +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA

You could just remove the adress paragraph. Same for other places in this patch.

+u32 get_board_rev(void) +{

•   struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
  

•   struct fuse_bank *bank = &iim->bank[0];
  

•   struct fuse_bank0_regs *fuse =
  

•           (struct fuse_bank0_regs *)bank->fuse_regs;
  

•   int rev = readl(&fuse->gp[6]);
  

•   return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
  

+}

Can't you just remove this get_board_rev() from the board file and use the generic one instead?

+/*

• • Do not overwrite the console
• • Use always serial for U-Boot console
• */

+int overwrite_console(void) +{

•   return 1;
  

+}

Is this really needed? It doesn't seem so, as you do not use splash screen.

+int board_init(void) +{

•   gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
  

•   mxc_set_sata_internal_clock();
  

•   mxc_set_clock(0, 33, MXC_NFC_CLK);
  

Can you put a comment explaining which frequency you are setting MXC_NFC_CLK to ?

+/*

• • U-Boot Commands
• */

In this file you use multi-line style for single line comments.

You could simply do:

/* U-Boot Commands */

+#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)

Why do you need such large size?

+#define CONFIG_SYS_MEMTEST_START 0x70010000 +#define CONFIG_SYS_MEMTEST_END 0x70020000

Are these values correct? You are only testing 64kB of the RAM.