From: Marcel Ziswiler marcel.ziswiler@toradex.com

Spotted two missing spaces in comments.

Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com Reviewed-by: Igor Opaniuk igor.opaniuk@toradex.com

---

Changes in v2: None

board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- drivers/video/videomodes.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c index a4c587a390..63cd605b6a 100644 --- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c @@ -112,7 +112,7 @@ void build_info(void) sc_misc_build_info(-1, &sc_build, &sc_commit); if (!sc_build) { printf("SCFW does not support build info\n"); - sc_commit = 0; /* Display 0 when the build info is not supported*/ + sc_commit = 0; /* Display 0 when the build info is not supported */ } printf("Build: SCFW %x\n", sc_commit); } diff --git a/drivers/video/videomodes.c b/drivers/video/videomodes.c index 1cfeaa980f..d7614329ff 100644 --- a/drivers/video/videomodes.c +++ b/drivers/video/videomodes.c @@ -397,7 +397,7 @@ int video_edid_dtd_to_ctfb_res_modes(struct edid_detailed_timing *t, EDID_DETAILED_TIMING_VERTICAL_BLANKING(*t) == 0 || EDID_DETAILED_TIMING_HSYNC_OFFSET(*t) == 0 || EDID_DETAILED_TIMING_VSYNC_OFFSET(*t) == 0 || - /* 3d formats are not supported*/ + /* 3d formats are not supported */ EDID_DETAILED_TIMING_FLAG_STEREO(*t) != 0) return -EINVAL;

From: Marcel Ziswiler marcel.ziswiler@toradex.com

Allow using bootaux also on VF610 aka Vybrid.

Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com Reviewed-by: Igor Opaniuk igor.opaniuk@toradex.com

---

Changes in v2: None

arch/arm/mach-imx/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 8631fbd481..ec09ef240f 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -23,7 +23,7 @@ config IMX_RDC

config IMX_BOOTAUX bool "Support boot auxiliary core" - depends on ARCH_MX7 || ARCH_MX6 + depends on ARCH_MX7 || ARCH_MX6 || ARCH_VF610 help bootaux [addr] to boot auxiliary core.

From: Marcel Ziswiler marcel.ziswiler@toradex.com

Remove obsolete MMC/SD card environment configuration dating back to un-fused samples times.

While at it also remove meanwhile spurious "USB Storage" comment.

Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com Reviewed-by: Igor Opaniuk igor.opaniuk@toradex.com

---

Changes in v2: None

include/configs/colibri_vf.h | 9 --------- 1 file changed, 9 deletions(-)

diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 2fe7f217fa..7b974d9e97 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -145,13 +145,6 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* Environment organization */ - -#ifdef CONFIG_ENV_IS_IN_MMC -#define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_ENV_OFFSET (12 * 64 * 1024) -#define CONFIG_ENV_SIZE (8 * 1024) -#endif - #ifdef CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE (64 * 2048) #define CONFIG_ENV_RANGE (4 * 64 * 2048) @@ -165,6 +158,4 @@ /* USB DFU */ #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024)

-/* USB Storage */ - #endif /* __CONFIG_H */

From: Marcel Ziswiler marcel.ziswiler@toradex.com

While commit 3e020f03e94f ("driver: misc: add MXC_OCOTP Kconfig entry") introduced a Kconfig entry it did not actually migrate all configurations to using it.

As CONFIG_MXC_OCOTP was in mx{6/7}_common.h enable it by default on those architectures. Additionally, also enable it on ARCH_IMX8M and ARCH_VF610 where all current members enabled it through their legacy configuration header files.

Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com Reviewed-by: Lukasz Majewski lukma@denx.de

---

Changes in v2: None

configs/bk4r1_defconfig | 1 - configs/pcm052_defconfig | 1 - drivers/misc/Kconfig | 2 ++ include/configs/advantech_dms-ba16.h | 2 -- include/configs/apalis_imx6.h | 5 ----- include/configs/colibri_imx6.h | 5 ----- include/configs/colibri_vf.h | 4 ---- include/configs/dh_imx6.h | 5 ----- include/configs/ge_bx50v3.h | 2 -- include/configs/imx8mq_evk.h | 1 - include/configs/kp_imx6q_tpc.h | 5 ----- include/configs/mx6_common.h | 3 --- include/configs/mx7_common.h | 3 --- include/configs/vf610twr.h | 4 ---- 14 files changed, 2 insertions(+), 41 deletions(-)

diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index e3852f4856..439207fd39 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -49,7 +49,6 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MISC=y -CONFIG_MXC_OCOTP=y CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_SYS_I2C_EEPROM_BUS=2 diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 906abbfd69..fd093b35c2 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -36,7 +36,6 @@ CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_MISC=y -CONFIG_MXC_OCOTP=y CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_SYS_I2C_EEPROM_BUS=2 diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index d6e677fba8..0e645f58be 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -128,6 +128,8 @@ config JZ4780_EFUSE

config MXC_OCOTP bool "Enable MXC OCOTP Driver" + depends on ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_VF610 + default y help If you say Y here, you will get support for the One Time Programmable memory pages that are stored on the some diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h index 0c9de6125d..a22c6a7d45 100644 --- a/include/configs/advantech_dms-ba16.h +++ b/include/configs/advantech_dms-ba16.h @@ -34,8 +34,6 @@

#define CONFIG_MXC_UART

-#define CONFIG_MXC_OCOTP - /* SATA Configs */ #define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index c8aa1bdddf..95dd6f9362 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -41,11 +41,6 @@ #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_MXC_I2C3_SPEED 400000

-/* OCOTP Configs */ -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* MMC Configs */ #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index a6a823ee1f..d2f8a58e80 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -39,11 +39,6 @@ #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_MXC_I2C3_SPEED 400000

-/* OCOTP Configs */ -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* MMC Configs */ #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 7b974d9e97..e7b786e48b 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -17,10 +17,6 @@

#define CONFIG_SKIP_LOWLEVEL_INIT

-#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - #ifdef CONFIG_VIDEO_FSL_DCU_FB #define CONFIG_SPLASH_SCREEN_ALIGN #define CONFIG_VIDEO_LOGO diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 9231bd853f..4dc795c3f4 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -48,11 +48,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_ARP_TIMEOUT 200UL

-/* Fuses */ -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* I2C Configs */ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index a5d7cb1be0..134145c473 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -35,8 +35,6 @@

#define CONFIG_MXC_UART

-#define CONFIG_MXC_OCOTP - /* SATA Configs */ #ifdef CONFIG_CMD_SATA #define CONFIG_SYS_SATA_MAX_DEVICE 1 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index a9e38a70e6..6094d1bf18 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -230,7 +230,6 @@

#define CONFIG_MXC_GPIO

-#define CONFIG_MXC_OCOTP #define CONFIG_CMD_FUSE

/* I2C Configs */ diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index b6b27ee1d5..d2ebf92953 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -31,11 +31,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_ARP_TIMEOUT 200UL

-/* Fuses */ -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* I2C Configs */ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index cdc8833778..6b20c6db58 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -57,9 +57,6 @@ /* MMC */ #define CONFIG_FSL_USDHC

-/* Fuses */ -#define CONFIG_MXC_OCOTP - /* Secure boot (HAB) support */ #ifdef CONFIG_SECURE_BOOT #define CONFIG_CSF_SIZE 0x2000 diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index a895c936aa..cc7e87269e 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -42,9 +42,6 @@ /* MMC */ #define CONFIG_FSL_USDHC

-/* Fuses */ -#define CONFIG_MXC_OCOTP - #define CONFIG_ARMV7_SECURE_BASE 0x00900000

#define CONFIG_ARMV7_PSCI_1_0 diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 686a383739..ba85bc91e7 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -19,10 +19,6 @@ /* Enable passing of ATAGs */ #define CONFIG_CMDLINE_TAG

-#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)

From: Marcel Ziswiler marcel.ziswiler@toradex.com

Update device tree in preparation of further driver model migration: Ethernet FEC, ESDHC aka MMC/SD card, I2C, NFC aka NAND flash controller, USBH_PEN GPIO regulator.

Add iomux resp. pinctrl entries to be removed from proprietary platform data: DSPI, ESDHC, FEC, I2C, NFC, UART, USBH_PEN GPIO.

Introduce a U-Boot specific device tree with some required u-boot,dm-pre-reloc properties: soc, aips0, pinctrl_ddr and uart0 incl. pinctrl.

While at it also update the MAINTAINERS file.

Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com

---

Changes in v2: None

arch/arm/dts/vf-colibri-u-boot.dtsi | 23 ++++ arch/arm/dts/vf-colibri.dtsi | 198 ++++++++++++++++++++++++++- arch/arm/dts/vf500-colibri.dts | 1 + arch/arm/dts/vf610-colibri.dts | 1 + board/toradex/colibri_vf/MAINTAINERS | 4 +- 5 files changed, 224 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/vf-colibri-u-boot.dtsi

diff --git a/arch/arm/dts/vf-colibri-u-boot.dtsi b/arch/arm/dts/vf-colibri-u-boot.dtsi new file mode 100644 index 0000000000..db86739805 --- /dev/null +++ b/arch/arm/dts/vf-colibri-u-boot.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 + +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&aips0 { + u-boot,dm-pre-reloc; +}; + +&pinctrl_ddr { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; +}; + +&uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/vf-colibri.dtsi b/arch/arm/dts/vf-colibri.dtsi index 923dc2451c..5ce17076e9 100644 --- a/arch/arm/dts/vf-colibri.dtsi +++ b/arch/arm/dts/vf-colibri.dtsi @@ -1,18 +1,37 @@ // SPDX-License-Identifier: GPL-2.0+ OR X11 /* - * Copyright 2014 Toradex AG + * Copyright 2014-2019 Toradex AG */ + +/dts-v1/; #include "vf.dtsi" +#include "vf610-pinfunc.h"

/ { chosen { stdout-path = &uart0; }; + + aliases { + usb0 = &ehci0; /* required for ums */ + }; + + reg_usbh_vbus: regulator-usbh-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1_reg>; + regulator-name = "VCC_USB[1-4]"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio2 19 GPIO_ACTIVE_LOW>; /* USBH_PEN */ + }; };

&dspi1 { - status = "okay"; bus-num = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dspi1>; + status = "okay";

spi_cmd: sspi@0 { reg = <0>; @@ -29,8 +48,183 @@ &ehci1 { dr_mode = "host"; status = "okay"; + vbus-supply = <&reg_usbh_vbus>; +}; + +&esdhc1 { + bus-width = <4>; + cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + status = "okay"; +}; + +&fec1 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc: m41t0m6@68 { + compatible = "st,m41t0"; + reg = <0x68>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ddr>; + + pinctrl_ddr: ddrgrp { + fsl,pins = < + VF610_PAD_DDR_A15__DDR_A_15 0x180 + VF610_PAD_DDR_A14__DDR_A_14 0x180 + VF610_PAD_DDR_A13__DDR_A_13 0x180 + VF610_PAD_DDR_A12__DDR_A_12 0x180 + VF610_PAD_DDR_A11__DDR_A_11 0x180 + VF610_PAD_DDR_A10__DDR_A_10 0x180 + VF610_PAD_DDR_A9__DDR_A_9 0x180 + VF610_PAD_DDR_A8__DDR_A_8 0x180 + VF610_PAD_DDR_A7__DDR_A_7 0x180 + VF610_PAD_DDR_A6__DDR_A_6 0x180 + VF610_PAD_DDR_A5__DDR_A_5 0x180 + VF610_PAD_DDR_A4__DDR_A_4 0x180 + VF610_PAD_DDR_A3__DDR_A_3 0x180 + VF610_PAD_DDR_A2__DDR_A_2 0x180 + VF610_PAD_DDR_A1__DDR_A_1 0x180 + VF610_PAD_DDR_A0__DDR_A_0 0x180 + VF610_PAD_DDR_BA2__DDR_BA_2 0x180 + VF610_PAD_DDR_BA1__DDR_BA_1 0x180 + VF610_PAD_DDR_BA0__DDR_BA_0 0x180 + VF610_PAD_DDR_CAS__DDR_CAS_B 0x180 + VF610_PAD_DDR_CKE__DDR_CKE_0 0x180 + VF610_PAD_DDR_CLK__DDR_CLK_0 0x180 + VF610_PAD_DDR_CS__DDR_CS_B_0 0x180 + VF610_PAD_DDR_D15__DDR_D_15 0x10180 + VF610_PAD_DDR_D14__DDR_D_14 0x10180 + VF610_PAD_DDR_D13__DDR_D_13 0x10180 + VF610_PAD_DDR_D12__DDR_D_12 0x10180 + VF610_PAD_DDR_D11__DDR_D_11 0x10180 + VF610_PAD_DDR_D10__DDR_D_10 0x10180 + VF610_PAD_DDR_D9__DDR_D_9 0x10180 + VF610_PAD_DDR_D8__DDR_D_8 0x10180 + VF610_PAD_DDR_D7__DDR_D_7 0x10180 + VF610_PAD_DDR_D6__DDR_D_6 0x10180 + VF610_PAD_DDR_D5__DDR_D_5 0x10180 + VF610_PAD_DDR_D4__DDR_D_4 0x10180 + VF610_PAD_DDR_D3__DDR_D_3 0x10180 + VF610_PAD_DDR_D2__DDR_D_2 0x10180 + VF610_PAD_DDR_D1__DDR_D_1 0x10180 + VF610_PAD_DDR_D0__DDR_D_0 0x10180 + VF610_PAD_DDR_DQM1__DDR_DQM_1 0x10180 + VF610_PAD_DDR_DQM0__DDR_DQM_0 0x10180 + VF610_PAD_DDR_DQS1__DDR_DQS_1 0x10180 + VF610_PAD_DDR_DQS0__DDR_DQS_0 0x10180 + VF610_PAD_DDR_RAS__DDR_RAS_B 0x180 + VF610_PAD_DDR_WE__DDR_WE_B 0x180 + VF610_PAD_DDR_ODT1__DDR_ODT_0 0x180 + VF610_PAD_DDR_ODT0__DDR_ODT_1 0x180 + VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1 0x180 + VF610_PAD_DDR_DDRBYTE2__DDR_DDRBYTE2 0x180 + VF610_PAD_DDR_RESETB 0x180 + >; + }; + + pinctrl_dspi1: dspi1grp { + fsl,pins = < + VF610_PAD_PTD5__DSPI1_CS0 0x33e2 + VF610_PAD_PTD6__DSPI1_SIN 0x33e1 + VF610_PAD_PTD7__DSPI1_SOUT 0x33e2 + VF610_PAD_PTD8__DSPI1_SCK 0x33e2 + >; + }; + + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + VF610_PAD_PTA24__ESDHC1_CLK 0x31ef + VF610_PAD_PTA25__ESDHC1_CMD 0x31ef + VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef + VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef + VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef + VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef + VF610_PAD_PTB20__GPIO_42 0x219d + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + VF610_PAD_PTA6__RMII_CLKOUT 0x30df + VF610_PAD_PTC9__ENET_RMII1_MDC 0x30df + VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30df + VF610_PAD_PTC11__ENET_RMII1_CRS 0x30df + VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30df + VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30df + VF610_PAD_PTC14__ENET_RMII1_RXER 0x30df + VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30df + VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30df + VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30df + >; + }; + + pinctrl_i2c0: i2c0grp { + fsl,pins = < + VF610_PAD_PTB14__I2C0_SCL 0x37ff + VF610_PAD_PTB15__I2C0_SDA 0x37ff + >; + }; + + pinctrl_nfc: nfcgrp { + fsl,pins = < + VF610_PAD_PTD23__NF_IO7 0x28df + VF610_PAD_PTD22__NF_IO6 0x28df + VF610_PAD_PTD21__NF_IO5 0x28df + VF610_PAD_PTD20__NF_IO4 0x28df + VF610_PAD_PTD19__NF_IO3 0x28df + VF610_PAD_PTD18__NF_IO2 0x28df + VF610_PAD_PTD17__NF_IO1 0x28df + VF610_PAD_PTD16__NF_IO0 0x28df + VF610_PAD_PTB24__NF_WE_B 0x28c2 + VF610_PAD_PTB25__NF_CE0_B 0x28c2 + VF610_PAD_PTB27__NF_RE_B 0x28c2 + VF610_PAD_PTC26__NF_RB_B 0x283d + VF610_PAD_PTC27__NF_ALE 0x28c2 + VF610_PAD_PTC28__NF_CLE 0x28c2 + >; + }; + + pinctrl_uart0: uart0grp { + fsl,pins = < + VF610_PAD_PTB10__UART0_TX 0x11af + VF610_PAD_PTB11__UART0_RX 0x11af + VF610_PAD_PTB12__UART0_RTS 0x11af + VF610_PAD_PTB13__UART0_CTS 0x11af + >; + }; + + pinctrl_usbh1_reg: gpio_usb_vbus { + fsl,pins = < + VF610_PAD_PTD4__GPIO_83 0x22ed + >; + }; +}; + +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nfc>; + status = "okay"; };

&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; status = "okay"; }; diff --git a/arch/arm/dts/vf500-colibri.dts b/arch/arm/dts/vf500-colibri.dts index 3f33d970e0..c83a16fdcb 100644 --- a/arch/arm/dts/vf500-colibri.dts +++ b/arch/arm/dts/vf500-colibri.dts @@ -5,6 +5,7 @@

/dts-v1/; #include "vf-colibri.dtsi" +#include "vf-colibri-u-boot.dtsi"

/ { model = "Toradex Colibri VF50"; diff --git a/arch/arm/dts/vf610-colibri.dts b/arch/arm/dts/vf610-colibri.dts index 0a6b937fee..7275fec279 100644 --- a/arch/arm/dts/vf610-colibri.dts +++ b/arch/arm/dts/vf610-colibri.dts @@ -5,6 +5,7 @@

/dts-v1/; #include "vf-colibri.dtsi" +#include "vf-colibri-u-boot.dtsi"

/ { model = "Toradex Colibri VF61"; diff --git a/board/toradex/colibri_vf/MAINTAINERS b/board/toradex/colibri_vf/MAINTAINERS index a1217a47bd..3ee2b33152 100644 --- a/board/toradex/colibri_vf/MAINTAINERS +++ b/board/toradex/colibri_vf/MAINTAINERS @@ -1,10 +1,12 @@ Colibri VFxx M: Stefan Agner stefan.agner@toradex.com +W: http://developer.toradex.com/software/linux/linux-software +W: https://www.toradex.com/community S: Maintained F: board/toradex/colibri_vf/ F: include/configs/colibri_vf.h F: configs/colibri_vf_defconfig -F: configs/colibri_vf_dtb_defconfig F: arch/arm/dts/vf-colibri.dtsi +F: arch/arm/dts/vf-colibri-u-boot.dtsi F: arch/arm/dts/vf500-colibri.dts F: arch/arm/dts/vf610-colibri.dts

From: Marcel Ziswiler marcel.ziswiler@toradex.com

Disable more obscure options to save another 26 KB in preparation of the upcoming driver model migration.

Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com

---

Changes in v2: None

configs/colibri_vf_defconfig | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 8188582ed9..706d7ca634 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -17,11 +17,17 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set +# CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Colibri VFxx # " +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADB is not set @@ -46,10 +52,10 @@ CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri" CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y -CONFIG_DFU_MMC=y CONFIG_DFU_NAND=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y +# CONFIG_MMC_HW_PARTITIONING is not set CONFIG_FSL_ESDHC=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y @@ -57,6 +63,8 @@ CONFIG_MTD_UBI_FASTMAP=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y +# CONFIG_SPL_SERIAL_PRESENT is not set +# CONFIG_TPL_SERIAL_PRESENT is not set CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_USB=y

From: Marcel Ziswiler marcel.ziswiler@toradex.com

Migrate pinctrl and regulators to device tree resp. driver model: DDR, DSPI, ENET, ESDHC, I2C, NFC and UART.

Enable CMD_DM, PINCTRL and DM_REGULATOR.

While at it also update copyright period and sort include files.

Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com

---

Changes in v2: None

board/toradex/colibri_vf/colibri_vf.c | 139 ++------------------------ configs/colibri_vf_defconfig | 5 + 2 files changed, 16 insertions(+), 128 deletions(-)

diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 79f702f2bf..8e0dea2dc2 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -1,43 +1,36 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2015 Toradex, Inc. + * Copyright 2015-2019 Toradex, Inc. * * Based on vf610twr.c: * Copyright 2013 Freescale Semiconductor, Inc. */

#include <common.h> -#include <asm/io.h> + +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/ddrmc-vf610.h> #include <asm/arch/imx-regs.h> #include <asm/arch/iomux-vf610.h> -#include <asm/arch/ddrmc-vf610.h> -#include <asm/arch/crm_regs.h> -#include <asm/arch/clock.h> -#include <mmc.h> +#include <asm/gpio.h> +#include <asm/io.h> #include <fdt_support.h> #include <fsl_esdhc.h> #include <fsl_dcu_fb.h> +#include <g_dnl.h> +#include <i2c.h> #include <jffs2/load_kernel.h> #include <miiphy.h> +#include <mmc.h> #include <mtd_node.h> #include <netdev.h> -#include <i2c.h> -#include <g_dnl.h> -#include <asm/gpio.h> #include <usb.h> + #include "../common/tdx-common.h"

DECLARE_GLOBAL_DATA_PTR;

-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_25ohm | PAD_CTL_OBE_IBE_ENABLE) - -#define ESDHC_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_20ohm | PAD_CTL_OBE_IBE_ENABLE) - -#define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE) - #define USB_PEN_GPIO 83 #define USB_CDET_GPIO 102 #define PTC0_GPIO_45 45 @@ -89,11 +82,6 @@ static struct ddrmc_cr_setting colibri_vf_cr_settings[] = { { 0, -1 } };

-static const iomux_v3_cfg_t usb_pads[] = { - VF610_PAD_PTD4__GPIO_83, - VF610_PAD_PTC29__GPIO_102, -}; - int dram_init(void) { static const struct ddr3_jedec_timings timings = { @@ -147,92 +135,12 @@ int dram_init(void) .wldqsen = 25, };

- ddrmc_setup_iomux(NULL, 0); - ddrmc_ctrl_init_ddr3(&timings, colibri_vf_cr_settings, NULL, 1, 2); gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);

return 0; }

-static void setup_iomux_uart(void) -{ - static const iomux_v3_cfg_t uart_pads[] = { - NEW_PAD_CTRL(VF610_PAD_PTB4__UART1_TX, UART_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTB5__UART1_RX, UART_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTB10__UART0_TX, UART_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTB11__UART0_RX, UART_PAD_CTRL), - }; - - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); -} - -static void setup_iomux_enet(void) -{ - static const iomux_v3_cfg_t enet0_pads[] = { - NEW_PAD_CTRL(VF610_PAD_PTA6__RMII0_CLKOUT, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC10__RMII1_MDIO, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC9__RMII1_MDC, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC11__RMII1_CRS_DV, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC12__RMII1_RD1, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC13__RMII1_RD0, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC14__RMII1_RXER, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC15__RMII1_TD1, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC16__RMII1_TD0, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC17__RMII1_TXEN, ENET_PAD_CTRL), - }; - - imx_iomux_v3_setup_multiple_pads(enet0_pads, ARRAY_SIZE(enet0_pads)); -} - -static void setup_iomux_i2c(void) -{ - static const iomux_v3_cfg_t i2c0_pads[] = { - VF610_PAD_PTB14__I2C0_SCL, - VF610_PAD_PTB15__I2C0_SDA, - }; - - imx_iomux_v3_setup_multiple_pads(i2c0_pads, ARRAY_SIZE(i2c0_pads)); -} - -#ifdef CONFIG_NAND_VF610_NFC -static void setup_iomux_nfc(void) -{ - static const iomux_v3_cfg_t nfc_pads[] = { - VF610_PAD_PTD23__NF_IO7, - VF610_PAD_PTD22__NF_IO6, - VF610_PAD_PTD21__NF_IO5, - VF610_PAD_PTD20__NF_IO4, - VF610_PAD_PTD19__NF_IO3, - VF610_PAD_PTD18__NF_IO2, - VF610_PAD_PTD17__NF_IO1, - VF610_PAD_PTD16__NF_IO0, - VF610_PAD_PTB24__NF_WE_B, - VF610_PAD_PTB25__NF_CE0_B, - VF610_PAD_PTB27__NF_RE_B, - VF610_PAD_PTC26__NF_RB_B, - VF610_PAD_PTC27__NF_ALE, - VF610_PAD_PTC28__NF_CLE - }; - - imx_iomux_v3_setup_multiple_pads(nfc_pads, ARRAY_SIZE(nfc_pads)); -} -#endif - -#ifdef CONFIG_FSL_DSPI -static void setup_iomux_dspi(void) -{ - static const iomux_v3_cfg_t dspi1_pads[] = { - VF610_PAD_PTD5__DSPI1_CS0, - VF610_PAD_PTD6__DSPI1_SIN, - VF610_PAD_PTD7__DSPI1_SOUT, - VF610_PAD_PTD8__DSPI1_SCK, - }; - - imx_iomux_v3_setup_multiple_pads(dspi1_pads, ARRAY_SIZE(dspi1_pads)); -} -#endif - #ifdef CONFIG_VYBRID_GPIO static void setup_iomux_gpio(void) { @@ -344,20 +252,8 @@ int board_mmc_getcd(struct mmc *mmc)

int board_mmc_init(bd_t *bis) { - static const iomux_v3_cfg_t esdhc1_pads[] = { - NEW_PAD_CTRL(VF610_PAD_PTA24__ESDHC1_CLK, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA25__ESDHC1_CMD, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA26__ESDHC1_DAT0, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA27__ESDHC1_DAT1, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA28__ESDHC1_DAT2, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA29__ESDHC1_DAT3, ESDHC_PAD_CTRL), - }; - esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);

- imx_iomux_v3_setup_multiple_pads( - esdhc1_pads, ARRAY_SIZE(esdhc1_pads)); - return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); } #endif @@ -496,21 +392,10 @@ int board_early_init_f(void) clock_init(); mscm_init();

- setup_iomux_uart(); - setup_iomux_enet(); - setup_iomux_i2c(); -#ifdef CONFIG_NAND_VF610_NFC - setup_iomux_nfc(); -#endif - #ifdef CONFIG_VYBRID_GPIO setup_iomux_gpio(); #endif

-#ifdef CONFIG_FSL_DSPI - setup_iomux_dspi(); -#endif - #ifdef CONFIG_VIDEO_FSL_DCU_FB setup_tcon(); setup_iomux_fsl_dcu(); @@ -594,8 +479,6 @@ int ft_board_setup(void *blob, bd_t *bd) #ifdef CONFIG_USB_EHCI_VF int board_ehci_hcd_init(int port) { - imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); - switch (port) { case 0: /* USBC does not have PEN, also configured as USB client only */ diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 706d7ca634..9a91cb4b82 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_ASKENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y @@ -63,6 +64,10 @@ CONFIG_MTD_UBI_FASTMAP=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_VYBRID=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y # CONFIG_SPL_SERIAL_PRESENT is not set # CONFIG_TPL_SERIAL_PRESENT is not set CONFIG_DM_SERIAL=y

From: Marcel Ziswiler marcel.ziswiler@toradex.com

Use SZ_X{MK} macros from linux/sizes.h for include/configs/colibri_vf.h.

Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com Reviewed-by: Igor Opaniuk igor.opaniuk@toradex.com

---

Changes in v2: None

include/configs/colibri_vf.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 1acc6e5056..9effa56539 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -12,6 +12,7 @@ #define __CONFIG_H

#include <asm/arch/imx-regs.h> +#include <linux/sizes.h>

#define CONFIG_SYS_FSL_CLK

@@ -28,7 +29,7 @@ #endif

/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M)

/* Allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -118,7 +119,7 @@

/* Physical memory map */ #define PHYS_SDRAM (0x80000000) -#define PHYS_SDRAM_SIZE (256 * 1024 * 1024) +#define PHYS_SDRAM_SIZE (256 * SZ_1M)

#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR @@ -141,6 +142,6 @@ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET

/* USB DFU */ -#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)

#endif /* __CONFIG_H */

From: Stefan Agner stefan.agner@toradex.com

Add support for distro boot. This is especially helpful for external devices. There is a global boot command which scans a predefined list of boot targets: run distro_bootcmd

As well as direct boot commands such as: run bootcmd_mmc0 run bootcmd_usb run bootcmd_dhcp ...

Refer to doc/README.distro fo details.

While at it also re-order boot command macros as well as the CONFIG_EXTRA_ENV_SETTINGS.

Signed-off-by: Stefan Agner stefan.agner@toradex.com Acked-by: Max Krummenacher max.krummenacher@toradex.com Acked-by: Marcel Ziswiler marcel.ziswiler@toradex.com

---

Changes in v2: None

include/configs/colibri_vf.h | 75 ++++++++++++++++++++++-------------- 1 file changed, 46 insertions(+), 29 deletions(-)

diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 9effa56539..83a33ff786 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -48,13 +48,15 @@ /* We boot from the gfxRAM area of the OCRAM. */ #define CONFIG_BOARD_SIZE_LIMIT 520192

-#define SD_BOOTCMD \ - "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ - "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \ - "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ - "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \ - "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \ - "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ +#define MEM_LAYOUT_ENV_SETTINGS \ + "bootm_size=0x10000000\0" \ + "fdt_addr_r=0x82000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "kernel_addr_r=0x81000000\0" \ + "pxefile_addr_r=0x87100000\0" \ + "ramdisk_addr_r=0x82100000\0" \ + "scriptaddr=0x87000000\0"

#define NFS_BOOTCMD \ "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ @@ -65,7 +67,15 @@ "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \

-#define UBI_BOOTCMD \ +#define SD_BOOTCMD \ + "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ + "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \ + "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ + "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \ + "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \ + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ + +#define UBI_BOOTCMD \ "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ "ubi.fm_autoconvert=1\0" \ "ubiboot=run setup; " \ @@ -76,36 +86,43 @@ "ubi read ${fdt_addr_r} dtb && " \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \

-#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" +#define CONFIG_BOOTCOMMAND "run ubiboot; run distro_bootcmd;" + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(DHCP, dhcp, na) +#include <config_distro_bootcmd.h> +#undef BOOTENV_RUN_NET_USB_START +#define BOOTENV_RUN_NET_USB_START ""

#define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"

#define CONFIG_EXTRA_ENV_SETTINGS \ - "kernel_addr_r=0x82000000\0" \ - "fdt_addr_r=0x84000000\0" \ - "kernel_file=zImage\0" \ - "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \ + BOOTENV \ + MEM_LAYOUT_ENV_SETTINGS \ + NFS_BOOTCMD \ + SD_BOOTCMD \ + UBI_BOOTCMD \ + "console=ttyLP0\0" \ + "defargs=\0" \ + "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ "fdt_board=eval-v3\0" \ + "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \ "fdt_fixup=;\0" \ - "defargs=\0" \ - "console=ttyLP0\0" \ - "setup=setenv setupargs " \ - "console=tty1 console=${console}" \ - ",${baudrate}n8 ${memargs}\0" \ + "kernel_file=zImage\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "setsdupdate=mmc rescan && set interface mmc && " \ - "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ - "source ${loadaddr}\0" \ - "setusbupdate=usb start && set interface usb && " \ - "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ - "source ${loadaddr}\0" \ + "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ + "source ${loadaddr}\0" \ + "setup=setenv setupargs console=tty1 console=${console}" \ + ",${baudrate}n8 ${memargs}\0" \ "setupdate=run setsdupdate || run setusbupdate\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ - "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ - "video-mode=dcufb:640x480-16@60,monitor=lcd\0" \ + "setusbupdate=usb start && set interface usb && " \ + "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ + "source ${loadaddr}\0" \ "splashpos=m,m\0" \ - SD_BOOTCMD \ - NFS_BOOTCMD \ - UBI_BOOTCMD + "video-mode=dcufb:640x480-16@60,monitor=lcd\0"

/* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */

From: Stefan Agner stefan.agner@toradex.com

Set fdtfile to represent the current board. This allows distribution to load the correct device tree, which in the module case often deviates from the common fallback ${soc}-${board}${boardver}.dtb...

Signed-off-by: Stefan Agner stefan.agner@toradex.com Acked-by: Max Krummenacher max.krummenacher@toradex.com Acked-by: Marcel Ziswiler marcel.ziswiler@toradex.com

---

Changes in v2: None

include/configs/colibri_vf.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 83a33ff786..0bbeeb902e 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -86,7 +86,8 @@ "ubi read ${fdt_addr_r} dtb && " \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \

-#define CONFIG_BOOTCOMMAND "run ubiboot; run distro_bootcmd;" +#define CONFIG_BOOTCOMMAND "run ubiboot; " \ + "setenv fdtfile ${soc}-colibri-${fdt_board}.dtb && run distro_bootcmd;"

#define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ @@ -108,7 +109,6 @@ "defargs=\0" \ "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ "fdt_board=eval-v3\0" \ - "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \ "fdt_fixup=;\0" \ "kernel_file=zImage\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \

From: Stefan Agner stefan.agner@toradex.com

The DDR validation tool (which is part of Processor Expert) allows to evaluate leveling parameters for CR105/CR106/CR110. Several runs have been made with Colibri VF50 and VF61 and it seems to evaluate very similar values. Use this values by default.

Note: The newly evaluated parameters seem to require CTLUPD_AREF to be enabled!

Note 2: The tool also evaluated 6 as a new value for PHY02/18 GATE_CFG (Coarse adjust of gate open time). However, this seems not to work in practise.

Signed-off-by: Stefan Agner stefan.agner@toradex.com Acked-by: Marcel Ziswiler marcel.ziswiler@toradex.com

---

Changes in v2: None

board/toradex/colibri_vf/colibri_vf.c | 7 +++++++ 1 file changed, 7 insertions(+)

diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 3e39912f91..9d63fbf3bd 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -29,6 +29,13 @@ DECLARE_GLOBAL_DATA_PTR; #define PTC0_GPIO_45 45

static struct ddrmc_cr_setting colibri_vf_cr_settings[] = { + { DDRMC_CR79_CTLUPD_AREF(1), 79 }, + /* sets manual values for read lvl. (gate) delay of data slice 0/1 */ + { DDRMC_CR105_RDLVL_DL_0(28), 105 }, + { DDRMC_CR106_RDLVL_GTDL_0(24), 106 }, + { DDRMC_CR110_RDLVL_DL_1(28) | DDRMC_CR110_RDLVL_GTDL_1(24), 110 }, + { DDRMC_CR102_RDLVL_GT_REGEN | DDRMC_CR102_RDLVL_REG_EN, 102 }, + /* AXI */ { DDRMC_CR117_AXI0_W_PRI(0) | DDRMC_CR117_AXI0_R_PRI(0), 117 }, { DDRMC_CR118_AXI1_W_PRI(1) | DDRMC_CR118_AXI1_R_PRI(1), 118 },

From: Gerard Salvatella gerard.salvatella@toradex.com

Currently, Vybrid's sdboot variable tries to load the kernel from /boot of the root partition (typically second partition when using the sdcard image). However, since we moved to flash the kernel in a separate UBI volume, we no longer deploy the kernel/device tree to /boot, hence sdboot does not work in its current state.

Load the kernel and device tree from the first (typically FAT) partition as customary on all Toradex modules.

While at it also change from rw to ro as e.g. systemd will re-mount the root file system rw anyway after checking it.

Signed-off-by: Gerard Salvatella gerard.salvatella@toradex.com Acked-by: Stefan Agner stefan.agner@toradex.com Acked-by: Marcel Ziswiler marcel.ziswiler@toradex.com Reviewed-by: Igor Opaniuk igor.opaniuk@toradex.com

---

Changes in v2: - Added various reviewed-bys.

include/configs/colibri_vf.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index b2f27c1977..0d57e303a1 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -68,11 +68,11 @@ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \

#define SD_BOOTCMD \ - "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ + "sdargs=root=/dev/mmcblk0p2 ro rootwait\0" \ "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \ "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ - "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \ - "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \ + "load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \ + "load mmc 0:1 ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \

#define UBI_BOOTCMD \