On Wednesday, May 13, 2015 at 01:00:01 PM, Peter Griffin wrote:

Hi Marek,

On Tue, 12 May 2015, Marek Vasut wrote:

...

On Tuesday, May 12, 2015 at 03:38:27 PM, Peter Griffin wrote:

...

This has been tested to the extent that I can enumerate a asix usb networking adapter and boot a kernel over usb on the 96boards hikey u-boot port I'm currently doing.

Signed-off-by: Peter Griffin peter.griffin@linaro.org

drivers/usb/host/dwc2.c | 3 ++- drivers/usb/host/dwc2.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index e8142ac..19a6007 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -1015,7 +1015,8 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) snpsid = readl(&regs->gsnpsid);

printf("Core Release: %x.%03x\n", snpsid >> 12 & 0xf, snpsid & 0xfff);

• if ((snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_2xx) {

• if ((snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_2xx &&

•    (snpsid & DWC2_SNPSID_DEVID_MASK) != DWC2_SNPSID_DEVID_VER_3xx) {
  

Isn't this then a DWC3 controller instead ?

No I don't believe so. dwc3 is a usb3 controller with different register set AFAIK.

I believe this piece of code is replicating what the Linux driver does here: -

http://lxr.free-electrons.com/source/drivers/usb/dwc2/core.c#L2664

Also see here for the various different sub core revisions within 2.xx and 3.xx which are supported by the dwc2 Linux driver http://lxr.free-electrons.com/source/drivers/usb/dwc2/core.h#L625.

This also matches up with the available datasheet here https://github.com/96boards/documentation/blob/master/hikey/ Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf on page 219 which states it is a USB2 OTG controller, but near the bottom of the page also tates: -

"The USB core used in Hi6220 is build from Synopsys IP(3.00a).".

I just checked through the DWC_otg_databook.odf, and these revision numbers also match up with the "Revision History" changes in the document. So it all ties together.

It is worth highlighting at this point that not bailing here (along with setting up the appropriate clocks to the IP) was enough for me to get a DWC2 core rev 3.00a enumerating a ASIX networking adapter and tftp a kernel into DDR. However there maybe some other changes required to "fully" support the 3.00a hardware version. There is of course the problem I mentioned in the cover letter regarding enumerating mass storage devices which may or may not be related to this.

Although a quick grep of the Linux driver only gets three hits

git grep DWC2_CORE_REV_3_00a core.h:#define DWC2_CORE_REV_3_00a 0x4f54300a core_intr.c: if (hsotg->hw_params.snpsid >= DWC2_CORE_REV_3_00a) hcd.c: if (hsotg->hw_params.snpsid >= DWC2_CORE_REV_3_00a) {

Neither of which seem relevant to the mass storage device problem (one adds a delay in the irq handler, and the other sets a bit when freeing the hcd.

Ooh, I see. Thank you for the extensive explanation!

I picked this patch for u-boot-usb, so feel free to submit any improvements for the 3.xx core as you cook them. Thanks!