[U-Boot] [PATCH 1/1] mx5: drop boot cause code from board support code
The boot cause code has been factor out to soc common code,we need drop the part from the board support code
Signed-off-by: Jason Liu jason.hui@linaro.org --- board/efikamx/efikamx.c | 30 ++++++------------------------ board/freescale/mx51evk/mx51evk.c | 26 ++++++-------------------- board/freescale/mx53evk/mx53evk.c | 21 +-------------------- board/ttcontrol/vision2/vision2.c | 28 ++++++---------------------- 4 files changed, 19 insertions(+), 86 deletions(-)
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c index f735260..0aef654 100644 --- a/board/efikamx/efikamx.c +++ b/board/efikamx/efikamx.c @@ -644,46 +644,28 @@ int board_late_init(void) int checkboard(void) { u32 system_rev = get_cpu_rev(); - u32 cause; - struct src *src_regs = (struct src *)SRC_BASE_ADDR;
puts("Board: Efika MX ");
switch (system_rev & 0xff) { case CHIP_REV_3_0: - puts("3.0 ["); + puts("3.0"); break; case CHIP_REV_2_5: - puts("2.5 ["); + puts("2.5"); break; case CHIP_REV_2_0: - puts("2.0 ["); + puts("2.0"); break; case CHIP_REV_1_1: - puts("1.1 ["); + puts("1.1"); break; case CHIP_REV_1_0: default: - puts("1.0 ["); + puts("1.0"); break; }
- cause = src_regs->srsr; - switch (cause) { - case 0x0001: - puts("POR"); - break; - case 0x0009: - puts("RST"); - break; - case 0x0010: - case 0x0011: - puts("WDOG"); - break; - default: - printf("unknown 0x%x", cause); - } - puts("]\n"); - + puts("\n"); return 0; } diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 02a765d..cff2ff1 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -435,37 +435,23 @@ int checkboard(void)
switch (system_rev & 0xff) { case CHIP_REV_3_0: - puts("3.0 ["); + puts("3.0"); break; case CHIP_REV_2_5: - puts("2.5 ["); + puts("2.5"); break; case CHIP_REV_2_0: - puts("2.0 ["); + puts("2.0"); break; case CHIP_REV_1_1: - puts("1.1 ["); + puts("1.1"); break; case CHIP_REV_1_0: default: - puts("1.0 ["); + puts("1.0"); break; }
- switch (__raw_readl(SRC_BASE_ADDR + 0x8)) { - case 0x0001: - puts("POR"); - break; - case 0x0009: - puts("RST"); - break; - case 0x0010: - case 0x0011: - puts("WDOG"); - break; - default: - puts("unknown"); - } - puts("]\n"); + puts("\n"); return 0; } diff --git a/board/freescale/mx53evk/mx53evk.c b/board/freescale/mx53evk/mx53evk.c index e71701b..a89aa25 100644 --- a/board/freescale/mx53evk/mx53evk.c +++ b/board/freescale/mx53evk/mx53evk.c @@ -372,26 +372,7 @@ int board_late_init(void)
int checkboard(void) { - u32 cause; - struct src *src_regs = (struct src *)SRC_BASE_ADDR; + puts("Board: MX53EVK\n");
- puts("Board: MX53EVK ["); - - cause = src_regs->srsr; - switch (cause) { - case 0x0001: - printf("POR"); - break; - case 0x0009: - printf("RST"); - break; - case 0x0010: - case 0x0011: - printf("WDOG"); - break; - default: - printf("unknown"); - } - printf("]\n"); return 0; } diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c index f8ef4fc..8423110 100644 --- a/board/ttcontrol/vision2/vision2.c +++ b/board/ttcontrol/vision2/vision2.c @@ -708,40 +708,24 @@ int checkboard(void)
switch (system_rev & 0xff) { case CHIP_REV_3_0: - puts("3.0 ["); + puts("3.0"); break; case CHIP_REV_2_5: - puts("2.5 ["); + puts("2.5"); break; case CHIP_REV_2_0: - puts("2.0 ["); + puts("2.0"); break; case CHIP_REV_1_1: - puts("1.1 ["); + puts("1.1"); break; case CHIP_REV_1_0: default: - puts("1.0 ["); + puts("1.0"); break; }
- cause = src_regs->srsr; - switch (cause) { - case 0x0001: - puts("POR"); - break; - case 0x0009: - puts("RST"); - break; - case 0x0010: - case 0x0011: - puts("WDOG"); - break; - default: - printf("unknown 0x%x", cause); - } - puts("]\n"); - + puts("\n"); return 0; }
factor out boot cause funciton to common code to avoid the duplicate code in each board support package
Signed-off-by: Jason Liu jason.hui@linaro.org --- change since v4: - make common code soc specific changes since v3: - add full boot reset cause --- arch/arm/cpu/armv7/mx5/soc.c | 28 ++++++++++++++++++++++++++++ 1 files changed, 28 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c index 09500b3..6f4e8db 100644 --- a/arch/arm/cpu/armv7/mx5/soc.c +++ b/arch/arm/cpu/armv7/mx5/soc.c @@ -77,6 +77,33 @@ u32 get_cpu_rev(void) return system_rev; }
+static char *get_reset_cause(void) +{ + u32 cause; + struct src *src_regs = (struct src *)SRC_BASE_ADDR; + + cause = readl(&src_regs->srsr); + writel(cause, &src_regs->srsr); + + switch (cause) { + case 0x00001: + return "POR"; + case 0x00004: + return "CSU"; + case 0x00008: + return "IPP USER"; + case 0x00010: + return "WDOG"; + case 0x00020: + return "JTAG HIGH-Z"; + case 0x00040: + return "JTAG SW"; + case 0x10000: + return "WARM BOOT"; + default: + return "unknown reset"; + } +}
#if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo(void) @@ -89,6 +116,7 @@ int print_cpuinfo(void) (cpurev & 0x000F0) >> 4, (cpurev & 0x0000F) >> 0, mxc_get_clock(MXC_ARM_CLK) / 1000000); + printf("Reset cause: %s\n", get_reset_cause()); return 0; } #endif
On 04/20/2011 12:47 PM, Jason Liu wrote:
factor out boot cause funciton to common code to avoid the duplicate code in each board support package
Signed-off-by: Jason Liu jason.hui@linaro.org
change since v4:
- make common code soc specific
changes since v3:
- add full boot reset cause
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
This patch add initial support for freescale MX53LOCO board. Network(FEC),SD/MMC, UART have been supported by this patch.
Signed-off-by: Jason Liu jason.hui@linaro.org --- changes since v4: - remove the boot reset cause from board support changes since v3: - include other two small patch into this commit, mx53loco: set mmc env to MMC slot1 MX5: Enable flat-device-tree support on mx53 loco board changes since V2: -factor out the boot cause function to common code, -fix gd->ram_size with full memory size -remove the '1' from all #defines that just enable features -correct memory test end address value --- MAINTAINERS | 1 + arch/arm/cpu/armv7/mx5/soc.c | 2 +- board/freescale/mx53loco/Makefile | 47 +++++ board/freescale/mx53loco/imximage.cfg | 96 +++++++++++ board/freescale/mx53loco/mx53loco.c | 301 +++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/mx53loco.h | 199 ++++++++++++++++++++++ 7 files changed, 646 insertions(+), 1 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS index 4756f14..7c311f7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -567,6 +567,7 @@ Stefano Babic sbabic@denx.de Jason Liu r64343@freescale.com
mx53evk i.MX53 + mx53loco i.MX53
Enric Balletbo i Serra eballetbo@iseebcn.com
diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c index 6f4e8db..9c03474 100644 --- a/arch/arm/cpu/armv7/mx5/soc.c +++ b/arch/arm/cpu/armv7/mx5/soc.c @@ -116,7 +116,7 @@ int print_cpuinfo(void) (cpurev & 0x000F0) >> 4, (cpurev & 0x0000F) >> 0, mxc_get_clock(MXC_ARM_CLK) / 1000000); - printf("Reset cause: %s\n", get_reset_cause()); + printf("Reset cause: %s\n", get_reset_cause()); return 0; } #endif diff --git a/board/freescale/mx53loco/Makefile b/board/freescale/mx53loco/Makefile new file mode 100644 index 0000000..2088a48 --- /dev/null +++ b/board/freescale/mx53loco/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2011 Freescale Semiconductor, Inc. +# Jason Liu r64343@freescale.com +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := mx53loco.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/freescale/mx53loco/imximage.cfg b/board/freescale/mx53loco/imximage.cfg new file mode 100644 index 0000000..ce9c8fc --- /dev/null +++ b/board/freescale/mx53loco/imximage.cfg @@ -0,0 +1,96 @@ +# Copyright (C) 2011 Freescale Semiconductor, Inc. +# Jason Liu r64343@freescale.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not write to the Free Software +# Foundation Inc. 51 Franklin Street Fifth Floor Boston, +# MA 02110-1301 USA +# +# Refer docs/README.imxmage for more details about how-to configure +# and create imximage boot image +# +# The syntax is taken as close as possible with the kwbimage + +# image version + +IMAGE_VERSION 2 + +# Boot Device : one of +# spi, sd (the board has no nand neither onenand) + +BOOT_FROM sd + +# Device Configuration Data (DCD) +# +# Each entry must have the format: +# Addr-type Address Value +# +# where: +# Addr-type register length (1,2 or 4 bytes) +# Address absolute address of the register +# value value to be stored in the register + +DATA 4 0x53fa8554 0x00300000 +DATA 4 0x53fa8558 0x00300040 +DATA 4 0x53fa8560 0x00300000 +DATA 4 0x53fa8564 0x00300040 +DATA 4 0x53fa8568 0x00300040 +DATA 4 0x53fa8570 0x00300000 +DATA 4 0x53fa8574 0x00300000 +DATA 4 0x53fa8578 0x00300000 +DATA 4 0x53fa857c 0x00300040 +DATA 4 0x53fa8580 0x00300040 +DATA 4 0x53fa8584 0x00300000 +DATA 4 0x53fa8588 0x00300000 +DATA 4 0x53fa8590 0x00300040 +DATA 4 0x53fa8594 0x00300000 +DATA 4 0x53fa86f0 0x00300000 +DATA 4 0x53fa86f4 0x00000000 +DATA 4 0x53fa86fc 0x00000000 +DATA 4 0x53fa8714 0x00000000 +DATA 4 0x53fa8718 0x00300000 +DATA 4 0x53fa871c 0x00300000 +DATA 4 0x53fa8720 0x00300000 +DATA 4 0x53fa8724 0x04000000 +DATA 4 0x53fa8728 0x00300000 +DATA 4 0x53fa872c 0x00300000 +DATA 4 0x63fd9088 0x35343535 +DATA 4 0x63fd9090 0x4d444c44 +DATA 4 0x63fd907c 0x01370138 +DATA 4 0x63fd9080 0x013b013c +DATA 4 0x63fd9018 0x00011740 +DATA 4 0x63fd9000 0xc3190000 +DATA 4 0x63fd900c 0x9f5152e3 +DATA 4 0x63fd9010 0xb68e8a63 +DATA 4 0x63fd9014 0x01ff00db +DATA 4 0x63fd902c 0x000026d2 +DATA 4 0x63fd9030 0x009f0e21 +DATA 4 0x63fd9008 0x12273030 +DATA 4 0x63fd9004 0x0002002d +DATA 4 0x63fd901c 0x00008032 +DATA 4 0x63fd901c 0x00008033 +DATA 4 0x63fd901c 0x00028031 +DATA 4 0x63fd901c 0x092080b0 +DATA 4 0x63fd901c 0x04008040 +DATA 4 0x63fd901c 0x0000803a +DATA 4 0x63fd901c 0x0000803b +DATA 4 0x63fd901c 0x00028039 +DATA 4 0x63fd901c 0x09208138 +DATA 4 0x63fd901c 0x04008048 +DATA 4 0x63fd9020 0x00001800 +DATA 4 0x63fd9040 0x04b80003 +DATA 4 0x63fd9058 0x00022227 +DATA 4 0x63fd901c 0x00000000 diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c new file mode 100644 index 0000000..f6f05ff --- /dev/null +++ b/board/freescale/mx53loco/mx53loco.c @@ -0,0 +1,301 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/mx5x_pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/iomux.h> +#include <asm/errno.h> +#include <netdev.h> +#include <i2c.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <mxc_gpio.h> + +DECLARE_GLOBAL_DATA_PTR; + +u32 get_board_rev(void) +{ + return get_cpu_rev(); +} + +int dram_init(void) +{ + u32 size1, size2; + + size1 = get_ram_size((volatile void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); + size2 = get_ram_size((volatile void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE); + + gd->ram_size = size1 + size2; + + return 0; +} +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + gd->bd->bi_dram[1].start = PHYS_SDRAM_2; + gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; +} + +static void setup_iomux_uart(void) +{ + /* UART1 RXD */ + mxc_request_iomux(MX53_PIN_CSI0_D11, IOMUX_CONFIG_ALT2); + mxc_iomux_set_pad(MX53_PIN_CSI0_D11, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU | + PAD_CTL_ODE_OPENDRAIN_ENABLE); + mxc_iomux_set_input(MX53_UART1_IPP_UART_RXD_MUX_SELECT_INPUT, 0x1); + + /* UART1 TXD */ + mxc_request_iomux(MX53_PIN_CSI0_D10, IOMUX_CONFIG_ALT2); + mxc_iomux_set_pad(MX53_PIN_CSI0_D10, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU | + PAD_CTL_ODE_OPENDRAIN_ENABLE); +} + +static void setup_iomux_fec(void) +{ + /*FEC_MDIO*/ + mxc_request_iomux(MX53_PIN_FEC_MDIO, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_MDIO, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_22K_PU | PAD_CTL_ODE_OPENDRAIN_ENABLE); + mxc_iomux_set_input(MX53_FEC_FEC_MDI_SELECT_INPUT, 0x1); + + /*FEC_MDC*/ + mxc_request_iomux(MX53_PIN_FEC_MDC, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_MDC, PAD_CTL_DRV_HIGH); + + /* FEC RXD1 */ + mxc_request_iomux(MX53_PIN_FEC_RXD1, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_RXD1, + PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE); + + /* FEC RXD0 */ + mxc_request_iomux(MX53_PIN_FEC_RXD0, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_RXD0, + PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE); + + /* FEC TXD1 */ + mxc_request_iomux(MX53_PIN_FEC_TXD1, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_TXD1, PAD_CTL_DRV_HIGH); + + /* FEC TXD0 */ + mxc_request_iomux(MX53_PIN_FEC_TXD0, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_TXD0, PAD_CTL_DRV_HIGH); + + /* FEC TX_EN */ + mxc_request_iomux(MX53_PIN_FEC_TX_EN, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_TX_EN, PAD_CTL_DRV_HIGH); + + /* FEC TX_CLK */ + mxc_request_iomux(MX53_PIN_FEC_REF_CLK, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_REF_CLK, + PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE); + + /* FEC RX_ER */ + mxc_request_iomux(MX53_PIN_FEC_RX_ER, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_RX_ER, + PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE); + + /* FEC CRS */ + mxc_request_iomux(MX53_PIN_FEC_CRS_DV, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX53_PIN_FEC_CRS_DV, + PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE); +} + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[2] = { + {MMC_SDHC1_BASE_ADDR, 1}, + {MMC_SDHC3_BASE_ADDR, 1}, +}; + +int board_mmc_getcd(u8 *cd, struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + + if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR) + *cd = mxc_gpio_get(77); /*GPIO3_13*/ + else + *cd = mxc_gpio_get(75); /*GPIO3_11*/ + + return 0; +} + +int board_mmc_init(bd_t *bis) +{ + u32 index; + s32 status = 0; + + for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { + switch (index) { + case 0: + mxc_request_iomux(MX53_PIN_SD1_CMD, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX53_PIN_SD1_CLK, IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX53_PIN_SD1_DATA0, + IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX53_PIN_SD1_DATA1, + IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX53_PIN_SD1_DATA2, + IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX53_PIN_SD1_DATA3, + IOMUX_CONFIG_ALT0); + mxc_request_iomux(MX53_PIN_EIM_DA13, + IOMUX_CONFIG_ALT1); + + mxc_iomux_set_pad(MX53_PIN_SD1_CMD, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX53_PIN_SD1_CLK, + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | + PAD_CTL_DRV_HIGH); + mxc_iomux_set_pad(MX53_PIN_SD1_DATA0, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_SD1_DATA1, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_SD1_DATA2, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_SD1_DATA3, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + break; + case 1: + mxc_request_iomux(MX53_PIN_ATA_RESET_B, + IOMUX_CONFIG_ALT2); + mxc_request_iomux(MX53_PIN_ATA_IORDY, + IOMUX_CONFIG_ALT2); + mxc_request_iomux(MX53_PIN_ATA_DATA8, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA9, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA10, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA11, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA0, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA1, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA2, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_ATA_DATA3, + IOMUX_CONFIG_ALT4); + mxc_request_iomux(MX53_PIN_EIM_DA11, + IOMUX_CONFIG_ALT1); + + mxc_iomux_set_pad(MX53_PIN_ATA_RESET_B, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_100K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_IORDY, + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU | + PAD_CTL_DRV_HIGH); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA8, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA9, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA10, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA11, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA0, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA1, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA2, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + mxc_iomux_set_pad(MX53_PIN_ATA_DATA3, + PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | + PAD_CTL_PUE_PULL | PAD_CTL_PKE_ENABLE | + PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU); + + break; + default: + printf("Warning: you configured more ESDHC controller" + "(%d) as supported by the board(2)\n", + CONFIG_SYS_FSL_ESDHC_NUM); + return status; + } + status |= fsl_esdhc_initialize(bis, &esdhc_cfg[index]); + } + + return status; +} +#endif + +int board_early_init_f(void) +{ + setup_iomux_uart(); + setup_iomux_fec(); + + return 0; +} + +int board_init(void) +{ + gd->bd->bi_arch_number = MACH_TYPE_MX53_LOCO; + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + + return 0; +} + +int checkboard(void) +{ + puts("Board: MX53 LOCO\n"); + + return 0; +} diff --git a/boards.cfg b/boards.cfg index b78e321..ce6e2e9 100644 --- a/boards.cfg +++ b/boards.cfg @@ -110,6 +110,7 @@ ca9x4_ct_vxp arm armv7 vexpress armltd efikamx arm armv7 efikamx - mx5 mx51evk arm armv7 mx51evk freescale mx5 mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg mx53evk arm armv7 mx53evk freescale mx5 mx53evk:IMX_CONFIG=board/freescale/mx53evk/imximage.cfg +mx53loco arm armv7 mx53loco freescale mx5 mx53loco:IMX_CONFIG=board/freescale/mx53loco/imximage.cfg vision2 arm armv7 vision2 ttcontrol mx5 cm_t35 arm armv7 cm_t35 - omap3 omap3_overo arm armv7 overo - omap3 diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h new file mode 100644 index 0000000..57eefc4 --- /dev/null +++ b/include/configs/mx53loco.h @@ -0,0 +1,199 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu r64343@freescale.com + * + * Configuration settings for Freescale MX53 low cost board. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_MX53 + +#define CONFIG_SYS_MX5_HCLK 24000000 +#define CONFIG_SYS_MX5_CLK32 32768 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_L2_OFF + +#include <asm/arch/imx-regs.h> + +#define CONFIG_CMDLINE_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MXC_GPIO + +#define CONFIG_MXC_UART +#define CONFIG_SYS_MX53_UART1 + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_HARD_I2C +#define CONFIG_I2C_MXC +#define CONFIG_SYS_I2C_MX53_PORT2 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0xfe + +/* PMIC Configs */ +#define CONFIG_FSL_PMIC +#define CONFIG_FSL_PMIC_I2C +#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + +/* Eth Configs */ +#define CONFIG_HAS_ETH1 +#define CONFIG_NET_MULTI +#define CONFIG_MII +#define CONFIG_DISCOVER_PHY + +#define CONFIG_FEC_MXC +#define IMX_FEC_BASE FEC_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1F + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} + +/* Command definition */ +#include <config_cmd_default.h> + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_PRIME "FEC0" + +#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ +#define CONFIG_SYS_TEXT_BASE 0x77800000 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "uimage=uImage\0" \ + "mmcdev=0\0" \ + "mmcpart=2\0" \ + "mmcroot=/dev/mmcblk0p3 rw\0" \ + "mmcrootfstype=ext3 rootwait\0" \ + "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "loadbootscript=" \ + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "bootm\0" \ + "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "dhcp ${uimage}; bootm\0" \ + +#define CONFIG_BOOTCOMMAND \ + "if mmc rescan ${mmcdev}; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loaduimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else run netboot; fi" + +#define CONFIG_ARP_TIMEOUT 200UL + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "MX53LOCO U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x70000000 +#define CONFIG_SYS_MEMTEST_END 0x70010000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_CMDLINE_EDITING + +/* Stack sizes */ +#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 2 +#define PHYS_SDRAM_1 CSD0_BASE_ADDR +#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) +#define PHYS_SDRAM_2 CSD1_BASE_ADDR +#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) +#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) + +#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#define CONFIG_OF_LIBFDT +#define CONFIG_SYS_BOOTMAPSZ 0x800000 + +#endif /* __CONFIG_H */
On 04/20/2011 12:47 PM, Jason Liu wrote:
+int board_mmc_getcd(u8 *cd, struct mmc *mmc) +{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
*cd = mxc_gpio_get(77); /*GPIO3_13*/- else
*cd = mxc_gpio_get(75); /*GPIO3_11*/- return 0;
+}
Rereading the thread regarding this board I see there is an open question issued by Wolfgang about this code, if accessors should be used in this case. IMHO the code is correct, using the GPIO get function to acquire the current value of a pin. Wolfgang, is it enough to answer your question ? Do you see an open issue ?
+/* PMIC Configs */ +#define CONFIG_FSL_PMIC +#define CONFIG_FSL_PMIC_I2C +#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
If I am not confused, this setup is not valid as you already sent a patchset to drop these lines and adding support for the DA9053 pmic.
PMIC: Add dialog pmic support MX53: loco: Add power init support
As this patchset is based on the LOCO patch (this one), and it does not apply anymore, please drop these lines and rebase your patches to add pmic support on the actual state of the current patch. IMHO it should be better if you resend them as a single patchset, as they are strictly related, merging "Add power init support" inside this patch.
+#define CONFIG_SYS_MEMTEST_START 0x70000000 +#define CONFIG_SYS_MEMTEST_END 0x70010000
There is still an open question about this range. Can you answer to Wolfgang's question ?
Best regards, Stefano
Dear Stefano Babic,
In message 4DB06CBE.8050803@denx.de you wrote:
On 04/20/2011 12:47 PM, Jason Liu wrote:
+int board_mmc_getcd(u8 *cd, struct mmc *mmc) +{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
*cd = mxc_gpio_get(77); /*GPIO3_13*/- else
*cd = mxc_gpio_get(75); /*GPIO3_11*/- return 0;
+}
Rereading the thread regarding this board I see there is an open question issued by Wolfgang about this code, if accessors should be used in this case. IMHO the code is correct, using the GPIO get function to acquire the current value of a pin. Wolfgang, is it enough to answer your question ? Do you see an open issue ?
I was just asking.
Best regards,
Wolfgang Denk
Hi, Stefano,
On Fri, Apr 22, 2011 at 1:43 AM, Stefano Babic sbabic@denx.de wrote:
On 04/20/2011 12:47 PM, Jason Liu wrote:
+int board_mmc_getcd(u8 *cd, struct mmc *mmc) +{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
- *cd = mxc_gpio_get(77); /*GPIO3_13*/
- else
- *cd = mxc_gpio_get(75); /*GPIO3_11*/
- return 0;
+}
Rereading the thread regarding this board I see there is an open question issued by Wolfgang about this code, if accessors should be used in this case. IMHO the code is correct, using the GPIO get function to acquire the current value of a pin. Wolfgang, is it enough to answer your question ? Do you see an open issue ?
+/* PMIC Configs */ +#define CONFIG_FSL_PMIC +#define CONFIG_FSL_PMIC_I2C +#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
If I am not confused, this setup is not valid as you already sent a patchset to drop these lines and adding support for the DA9053 pmic.
PMIC: Add dialog pmic support MX53: loco: Add power init support
As this patchset is based on the LOCO patch (this one), and it does not apply anymore, please drop these lines and rebase your patches to add pmic support on the actual state of the current patch. IMHO it should be better if you resend them as a single patchset, as they are strictly related, merging "Add power init support" inside this patch.
OK, I will resend the patchset as the following layout:
MX5: clock: Add clock config interface MX5: factor out boot cause funciton to common code PMIC: Add dialog pmic support MX53: support for freescale MX53LOCO board (merge "Add power init support")
I will rebase on the u-boot-imx git, do you think is it OK?
+#define CONFIG_SYS_MEMTEST_START 0x70000000 +#define CONFIG_SYS_MEMTEST_END 0x70010000
There is still an open question about this range. Can you answer to Wolfgang's question ?
In fact, I want to give one simple test range when use mtest, I don't know what you are worrying about, please tell it clearly?
Best regards, Stefano
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de =====================================================================
Hi, Stefano,
On Fri, Apr 22, 2011 at 12:36 PM, Jason Hui jason.hui@linaro.org wrote:
Hi, Stefano,
On Fri, Apr 22, 2011 at 1:43 AM, Stefano Babic sbabic@denx.de wrote:
On 04/20/2011 12:47 PM, Jason Liu wrote:
+int board_mmc_getcd(u8 *cd, struct mmc *mmc) +{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
- *cd = mxc_gpio_get(77); /*GPIO3_13*/
- else
- *cd = mxc_gpio_get(75); /*GPIO3_11*/
- return 0;
+}
Rereading the thread regarding this board I see there is an open question issued by Wolfgang about this code, if accessors should be used in this case. IMHO the code is correct, using the GPIO get function to acquire the current value of a pin. Wolfgang, is it enough to answer your question ? Do you see an open issue ?
+/* PMIC Configs */ +#define CONFIG_FSL_PMIC +#define CONFIG_FSL_PMIC_I2C +#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
If I am not confused, this setup is not valid as you already sent a patchset to drop these lines and adding support for the DA9053 pmic.
PMIC: Add dialog pmic support MX53: loco: Add power init support
As this patchset is based on the LOCO patch (this one), and it does not apply anymore, please drop these lines and rebase your patches to add pmic support on the actual state of the current patch. IMHO it should be better if you resend them as a single patchset, as they are strictly related, merging "Add power init support" inside this patch.
OK, I will resend the patchset as the following layout:
MX5: clock: Add clock config interface MX5: factor out boot cause funciton to common code PMIC: Add dialog pmic support MX53: support for freescale MX53LOCO board (merge "Add power init support")
I will rebase on the u-boot-imx git, do you think is it OK?
I just noticed that MX5: factor out boot cause funciton to common code has been applied. So, I will send out the following,
MX5: clock: Add clock config interface PMIC: Add dialog pmic support MX53: support for freescale MX53LOCO board (merge "Add power init support")
Any comments?
Jason
+#define CONFIG_SYS_MEMTEST_START 0x70000000 +#define CONFIG_SYS_MEMTEST_END 0x70010000
There is still an open question about this range. Can you answer to Wolfgang's question ?
In fact, I want to give one simple test range when use mtest, I don't know what you are worrying about, please tell it clearly?
Best regards, Stefano
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de =====================================================================
On 04/22/2011 06:36 AM, Jason Hui wrote:
OK, I will resend the patchset as the following layout:
MX5: clock: Add clock config interface MX5: factor out boot cause funciton to common code PMIC: Add dialog pmic support MX53: support for freescale MX53LOCO board (merge "Add power init support")
I will rebase on the u-boot-imx git, do you think is it OK?
Yes, thanks.
+#define CONFIG_SYS_MEMTEST_START 0x70000000 +#define CONFIG_SYS_MEMTEST_END 0x70010000
There is still an open question about this range. Can you answer to Wolfgang's question ?
In fact, I want to give one simple test range when use mtest, I don't know what you are worrying about, please tell it clearly?
I think the only issue is if there is some reasons to set the test range to only 64KB, except the fact this was the value set for the mx51evk. If you do not see any special reasons, you could increase the CONFIG_SYS_MEMTEST_END to a larger value.
Best regards, Stefano
Hi, Stefano,
2011/4/22 Stefano Babic sbabic@denx.de:
On 04/22/2011 06:36 AM, Jason Hui wrote:
OK, I will resend the patchset as the following layout:
MX5: clock: Add clock config interface MX5: factor out boot cause funciton to common code PMIC: Add dialog pmic support MX53: support for freescale MX53LOCO board (merge "Add power init support")
I will rebase on the u-boot-imx git, do you think is it OK?
Yes, thanks.
+#define CONFIG_SYS_MEMTEST_START 0x70000000 +#define CONFIG_SYS_MEMTEST_END 0x70010000
There is still an open question about this range. Can you answer to Wolfgang's question ?
In fact, I want to give one simple test range when use mtest, I don't know what you are worrying about, please tell it clearly?
I think the only issue is if there is some reasons to set the test range to only 64KB, except the fact this was the value set for the mx51evk. If you do not see any special reasons, you could increase the CONFIG_SYS_MEMTEST_END to a larger value.
Is there any rule that we need must follow to set the CONFIG_SYS_MEMTEST_START CONFIG_SYS_MEMTEST_END ??
If no, I think the value we set is free. Here I set for 64KB is just for simple and quick test, there is no other reasons.
In fact, mtest command line can override the value.
What the value you think I need set?
Jason
Best regards, Stefano
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de ===================================================================== _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
On 04/22/2011 10:33 AM, Jason Liu wrote:
Is there any rule that we need must follow to set the CONFIG_SYS_MEMTEST_START CONFIG_SYS_MEMTEST_END ??
There is no rule, it was only a question if there are some specific reasons.
If no, I think the value we set is free. Here I set for 64KB is just for simple and quick test, there is no other reasons.
In fact, mtest command line can override the value.
That is correct.
What the value you think I need set?
As I said, there is no rule. You choose the value you think it is better for your board as default values for mtest.
Best regards, Stefano Babic
Dear Jason Liu,
In message BANLkTi=Q7Ty4UtWWv5_3ED3gg3UeA3JiKQ@mail.gmail.com you wrote:
I think the only issue is if there is some reasons to set the test range to only 64KB, except the fact this was the value set for the mx51evk. If you do not see any special reasons, you could increase the CONFIG_SYS_MEMTEST_END to a larger value.
Is there any rule that we need must follow to set the CONFIG_SYS_MEMTEST_START CONFIG_SYS_MEMTEST_END ??
The only strict rule is that the test must work with the defined area.
If no, I think the value we set is free. Here I set for 64KB is just for simple and quick test, there is no other reasons.
In fact, mtest command line can override the value.
What the value you think I need set?
My recommendation is to set a range that is as big as possible for the given system, so the default call of the mtest command will actually test all (well, most of) the present RAM.
Best regards,
Wolfgang Denk
Hi, Wolfgang,
2011/4/22 Wolfgang Denk wd@denx.de:
Dear Jason Liu,
In message BANLkTi=Q7Ty4UtWWv5_3ED3gg3UeA3JiKQ@mail.gmail.com you wrote:
I think the only issue is if there is some reasons to set the test range to only 64KB, except the fact this was the value set for the mx51evk. If you do not see any special reasons, you could increase the CONFIG_SYS_MEMTEST_END to a larger value.
Is there any rule that we need must follow to set the CONFIG_SYS_MEMTEST_START CONFIG_SYS_MEMTEST_END ??
The only strict rule is that the test must work with the defined area.
Agree, I have tested it and it works.
If no, I think the value we set is free. Here I set for 64KB is just for simple and quick test, there is no other reasons.
In fact, mtest command line can override the value.
What the value you think I need set?
My recommendation is to set a range that is as big as possible for the given system, so the default call of the mtest command will actually test all (well, most of) the present RAM.
As I said, I just want the user to do one quick test for the memory. I don't think it need be set as big as possible.
Since there is no other rule I need follow for setting such value, So I will keep as it's.
Jason
Best regards,
Wolfgang Denk
-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de On our campus the UNIX system has proved to be not only an effective software tool, but an agent of technical and social change within the University. - John Lions (U. of Toronto (?))
On 04/20/2011 12:47 PM, Jason Liu wrote:
The boot cause code has been factor out to soc common code,we need drop the part from the board support code
Signed-off-by: Jason Liu jason.hui@linaro.org
Hi Jason,
board/efikamx/efikamx.c | 30 ++++++------------------------ board/freescale/mx51evk/mx51evk.c | 26 ++++++-------------------- board/freescale/mx53evk/mx53evk.c | 21 +-------------------- board/ttcontrol/vision2/vision2.c | 28 ++++++---------------------- 4 files changed, 19 insertions(+), 86 deletions(-)
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c index f735260..0aef654 100644 --- a/board/efikamx/efikamx.c +++ b/board/efikamx/efikamx.c @@ -644,46 +644,28 @@ int board_late_init(void) int checkboard(void) { u32 system_rev = get_cpu_rev();
- u32 cause;
- struct src *src_regs = (struct src *)SRC_BASE_ADDR;
This seems to me not the best solution. If we have now factored out code to print the reset cause and the silicon version (inside print_cpuinfo), why do we need to repeat this code for each board ? Calling get_cpu_rev seems to me redundant (then each board should only set CONFIG_DISPLAY_CPUINFO). And then the CPU revision is printed again, and this is redundant.
puts("Board: Efika MX ");
switch (system_rev & 0xff) {
As I see in code, in system_rev & 0xff we can find the cpu revision, and the output is already part of print_cpuinfo.
I think we need more clean up, removing all part related to CPU revision and leaving (if any) only the output related to the board revision.
Best regards, Stefano Babic
Hi, Stefano,
On Fri, Apr 22, 2011 at 1:18 AM, Stefano Babic sbabic@denx.de wrote:
On 04/20/2011 12:47 PM, Jason Liu wrote:
The boot cause code has been factor out to soc common code,we need drop the part from the board support code
Signed-off-by: Jason Liu jason.hui@linaro.org
Hi Jason,
board/efikamx/efikamx.c | 30 ++++++------------------------ board/freescale/mx51evk/mx51evk.c | 26 ++++++-------------------- board/freescale/mx53evk/mx53evk.c | 21 +-------------------- board/ttcontrol/vision2/vision2.c | 28 ++++++---------------------- 4 files changed, 19 insertions(+), 86 deletions(-)
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c index f735260..0aef654 100644 --- a/board/efikamx/efikamx.c +++ b/board/efikamx/efikamx.c @@ -644,46 +644,28 @@ int board_late_init(void) int checkboard(void) { u32 system_rev = get_cpu_rev();
- u32 cause;
- struct src *src_regs = (struct src *)SRC_BASE_ADDR;
This seems to me not the best solution. If we have now factored out code to print the reset cause and the silicon version (inside print_cpuinfo), why do we need to repeat this code for each board ? Calling get_cpu_rev seems to me redundant (then each board should only set CONFIG_DISPLAY_CPUINFO). And then the CPU revision is printed again, and this is redundant.
The purpose for this patch is to remove the boot cause code and and don't change any cpu rev code. The cpu rev part of code is as it is as before.
puts("Board: Efika MX ");
switch (system_rev & 0xff) {
As I see in code, in system_rev & 0xff we can find the cpu revision, and the output is already part of print_cpuinfo.
Ditto, as I only remove the boot cause part of code as the patch tile said.
I think we need more clean up, removing all part related to CPU revision and leaving (if any) only the output related to the board revision.
If that, I need change the patch tile, and include more clean up in the patch and send again.
Jason
Best regards, Stefano Babic
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de =====================================================================
On 04/22/2011 07:45 AM, Jason Hui wrote:
Hi, Stefano,
Hi Jason,
int checkboard(void) { u32 system_rev = get_cpu_rev();
u32 cause;struct src *src_regs = (struct src *)SRC_BASE_ADDR;This seems to me not the best solution. If we have now factored out code to print the reset cause and the silicon version (inside print_cpuinfo), why do we need to repeat this code for each board ? Calling get_cpu_rev seems to me redundant (then each board should only set CONFIG_DISPLAY_CPUINFO). And then the CPU revision is printed again, and this is redundant.
The purpose for this patch is to remove the boot cause code and and don't change any cpu rev code. The cpu rev part of code is as it is as before.
However, it seems to me a half-way clean up. As we have already factorize function for printing the cpu revision and the reset cause, I will see in the checkboard only board related information. If there is no revision number for board, printing only the board name as you make for the LOCO is correct.
Taking as example the efika board (all boards make the same):
puts("Board: Efika MX "); switch (system_rev & 0xff) {
The only new information is the board name. If I am not wrong, system_rev & 0xff contains only the cpu revision, and the switch prints out the silicon version. Everything already done in print_cpuinfo as well.
Ditto, as I only remove the boot cause part of code as the patch tile said.
Yes, but this it is redundant with the print_cpuinfo(). As you plan to clean up the code, this part should be cleaned up as well. Or do you think there is something not covered by the common code ?
I think we need more clean up, removing all part related to CPU revision and leaving (if any) only the output related to the board revision.
If that, I need change the patch tile, and include more clean up in the patch and send again.
Agree.
Best regards, Stefano Babic
Hi, Stefano,
2011/4/22 Stefano Babic sbabic@denx.de:
On 04/22/2011 07:45 AM, Jason Hui wrote:
Hi, Stefano,
Hi Jason,
int checkboard(void) { u32 system_rev = get_cpu_rev();
- u32 cause;
- struct src *src_regs = (struct src *)SRC_BASE_ADDR;
This seems to me not the best solution. If we have now factored out code to print the reset cause and the silicon version (inside print_cpuinfo), why do we need to repeat this code for each board ? Calling get_cpu_rev seems to me redundant (then each board should only set CONFIG_DISPLAY_CPUINFO). And then the CPU revision is printed again, and this is redundant.
The purpose for this patch is to remove the boot cause code and and don't change any cpu rev code. The cpu rev part of code is as it is as before.
However, it seems to me a half-way clean up. As we have already factorize function for printing the cpu revision and the reset cause, I will see in the checkboard only board related information. If there is no revision number for board, printing only the board name as you make for the LOCO is correct.
Taking as example the efika board (all boards make the same):
puts("Board: Efika MX ");
switch (system_rev & 0xff) {
The only new information is the board name. If I am not wrong, system_rev & 0xff contains only the cpu revision, and the switch prints out the silicon version. Everything already done in print_cpuinfo as well.
Ditto, as I only remove the boot cause part of code as the patch tile said.
Yes, but this it is redundant with the print_cpuinfo(). As you plan to clean up the code, this part should be cleaned up as well. Or do you think there is something not covered by the common code ?
I think we need more clean up, removing all part related to CPU revision and leaving (if any) only the output related to the board revision.
If that, I need change the patch tile, and include more clean up in the patch and send again.
Agree.
OK, I will re-send the patch with more clean-up.
Jason
Best regards, Stefano Babic
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de ===================================================================== _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
participants (5)
-
Jason Hui -
Jason Liu
-
Jason Liu -
Stefano Babic -
Wolfgang Denk