[U-Boot] [PATCH 1/5][v6] arch: powerpc: Move CONFIG_FSL_IFC to Kconfig

30 Jan 2017

Enable IFC from Kconfig.
Signed-off-by: Prabhakar Kushwaha prabhakar.kushwaha@nxp.com
---
Changes for v5: Added first time
Changes for v6: Sending as it is
arch/powerpc/cpu/mpc85xx/Kconfig | 17 +++++++++++++++++
 include/configs/B4860QDS.h       |  1 -
 include/configs/BSC9131RDB.h     |  1 -
 include/configs/BSC9132QDS.h     |  1 -
 include/configs/C29XPCIE.h       |  1 -
 include/configs/P1010RDB.h       |  1 -
 include/configs/T102xQDS.h       |  1 -
 include/configs/T102xRDB.h       |  1 -
 include/configs/T1040QDS.h       |  1 -
 include/configs/T104xRDB.h       |  1 -
 include/configs/T208xQDS.h       |  1 -
 include/configs/T208xRDB.h       |  1 -
 include/configs/T4240RDB.h       |  1 -
 include/configs/t4qds.h          |  1 -
 14 files changed, 17 insertions(+), 13 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 704f65b..c67b6b0 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -349,6 +349,7 @@ config ARCH_B4420
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_4
    select SYS_PPC64
+	select FSL_IFC
config ARCH_B4860
    bool
@@ -372,6 +373,7 @@ config ARCH_B4860
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_4
    select SYS_PPC64
+	select FSL_IFC
config ARCH_BSC9131
    bool
@@ -384,6 +386,7 @@ config ARCH_BSC9131
    select SYS_FSL_HAS_SEC
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_4
+	select FSL_IFC
config ARCH_BSC9132
    bool
@@ -400,6 +403,7 @@ config ARCH_BSC9132
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_4
    select SYS_PPC_E500_USE_DEBUG_TLB
+	select FSL_IFC
config ARCH_C29X
    bool
@@ -412,6 +416,7 @@ config ARCH_C29X
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_6
    select SYS_PPC_E500_USE_DEBUG_TLB
+	select FSL_IFC
config ARCH_MPC8536
    bool
@@ -527,6 +532,7 @@ config ARCH_P1010
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_4
    select SYS_PPC_E500_USE_DEBUG_TLB
+	select FSL_IFC
config ARCH_P1011
    bool
@@ -769,6 +775,7 @@ config ARCH_T1023
    select SYS_FSL_QORIQ_CHASSIS2
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_5
+	select FSL_IFC
config ARCH_T1024
    bool
@@ -785,6 +792,7 @@ config ARCH_T1024
    select SYS_FSL_QORIQ_CHASSIS2
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_5
+	select FSL_IFC
config ARCH_T1040
    bool
@@ -802,6 +810,7 @@ config ARCH_T1040
    select SYS_FSL_QORIQ_CHASSIS2
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_5
+	select FSL_IFC
config ARCH_T1042
    bool
@@ -819,6 +828,7 @@ config ARCH_T1042
    select SYS_FSL_QORIQ_CHASSIS2
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_5
+	select FSL_IFC
config ARCH_T2080
    bool
@@ -838,6 +848,7 @@ config ARCH_T2080
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_4
    select SYS_PPC64
+	select FSL_IFC
config ARCH_T2081
    bool
@@ -857,6 +868,7 @@ config ARCH_T2081
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_4
    select SYS_PPC64
+	select FSL_IFC
config ARCH_T4160
    bool
@@ -877,6 +889,7 @@ config ARCH_T4160
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_4
    select SYS_PPC64
+	select FSL_IFC
config ARCH_T4240
    bool
@@ -898,6 +911,7 @@ config ARCH_T4240
    select SYS_FSL_SEC_BE
    select SYS_FSL_SEC_COMPAT_4
    select SYS_PPC64
+	select FSL_IFC
config BOOKE
    bool
@@ -1224,6 +1238,9 @@ config SYS_PPC64
 config SYS_PPC_E500_USE_DEBUG_TLB
    bool
+config FSL_IFC
+	bool
+
 config SYS_PPC_E500_DEBUG_TLB
    int "Temporary TLB entry for external debugger"
    depends on SYS_PPC_E500_USE_DEBUG_TLB
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 3ad9f80..4267d81 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -63,7 +63,6 @@
#define CONFIG_SYS_FSL_CPC		/* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC		CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC			/* Enable IFC Support */
 #define CONFIG_FSL_CAAM			/* Enable SEC/CAAM */
 #define CONFIG_PCIE1			/* PCIE controller 1 */
 #define CONFIG_FSL_PCI_INIT		/* Use common FSL init code */
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index a6f73f2..1fe22b6 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -46,7 +46,6 @@
 #endif
/* High Level Configuration Options */
-#define CONFIG_FSL_IFC			/* Enable IFC Support */
 #define CONFIG_FSL_CAAM			/* Enable SEC/CAAM */
#define CONFIG_TSEC_ENET
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 8aec315..ef84ee7 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -68,7 +68,6 @@
 #endif
/* High Level Configuration Options */
-#define CONFIG_FSL_IFC			/* Enable IFC Support */
 #define CONFIG_FSL_CAAM			/* Enable SEC/CAAM */
 #define CONFIG_SYS_HAS_SERDES		/* common SERDES init code */
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 53ee98c..269cd49 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -68,7 +68,6 @@
 #endif
/* High Level Configuration Options */
-#define CONFIG_FSL_IFC			/* Enable IFC Support */
 #define CONFIG_FSL_CAAM			/* Enable SEC/CAAM */
 #define CONFIG_SYS_HAS_SERDES		/* common SERDES init code */
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index cd9cd9a..d043888 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -130,7 +130,6 @@
 #endif
/* High Level Configuration Options */
-#define CONFIG_FSL_IFC			/* Enable IFC Support */
 #define CONFIG_FSL_CAAM			/* Enable SEC/CAAM */
 #define CONFIG_SYS_HAS_SERDES		/* common SERDES init code */
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index c9a1334..4e46196 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -23,7 +23,6 @@
#define CONFIG_SYS_FSL_CPC		/* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC		CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC			/* Enable IFC Support */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 36eba4e..9b3d298 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -23,7 +23,6 @@
#define CONFIG_SYS_FSL_CPC		/* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC		CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC			/* Enable IFC Support */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 8d6d986..e1aceb6 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -54,7 +54,6 @@
#define CONFIG_SYS_FSL_CPC		/* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC		CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC			/* Enable IFC Support */
 #define CONFIG_FSL_CAAM			/* Enable SEC/CAAM */
 #define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_PCIE1			/* PCIE controller 1 */
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index d574bbb..7c8ff5e 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -165,7 +165,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#define CONFIG_SYS_FSL_CPC		/* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC		CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC			/* Enable IFC Support */
 #define CONFIG_FSL_CAAM			/* Enable SEC/CAAM */
 #define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_PCIE1			/* PCIE controller 1 */
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 210d8d8..9ec326a 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -33,7 +33,6 @@
#define CONFIG_SYS_FSL_CPC	/* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC	CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC		/* Enable IFC Support */
 #define CONFIG_FSL_CAAM		/* Enable SEC/CAAM */
 #define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 1941188..b114234 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -27,7 +27,6 @@
#define CONFIG_SYS_FSL_CPC	/* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC	CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC		/* Enable IFC Support */
 #define CONFIG_FSL_CAAM		/* Enable SEC/CAAM */
 #define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index e15b0ea..9136bf0 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -73,7 +73,6 @@
#define CONFIG_SYS_FSL_CPC		/* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC		CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC			/* Enable IFC Support */
 #define CONFIG_FSL_CAAM			/* Enable SEC/CAAM */
 #define CONFIG_PCIE1			/* PCIE controller 1 */
 #define CONFIG_PCIE2			/* PCIE controller 2 */
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 0f59eb1..82e4691 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -26,7 +26,6 @@
#define CONFIG_SYS_FSL_CPC		/* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC		CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC			/* Enable IFC Support */
 #define CONFIG_PCIE1			/* PCIE controller 1 */
 #define CONFIG_PCIE2			/* PCIE controller 2 */
 #define CONFIG_PCIE3			/* PCIE controller 3 */
-- 
2.7.4



    

Prabhakar Kushwaha

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