[U-Boot] [PATCH 1/4] common/env_common: Add CONFIG_SILENT_CONSOLE_AT_BOOT env option
From: Matthew McClintock msm@freescale.com
Just setting CONFIG_SILENT_CONSOLE does not make the CONSOLE silent without the silent env variable set. This adds a new define to add this to the default environment easily
Signed-off-by: Matthew McClintock msm@freescale.com --- README | 4 ++++ common/env_common.c | 3 +++ 2 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/README b/README index ed73981..8779544 100644 --- a/README +++ b/README @@ -546,6 +546,10 @@ The following options need to be configured: the "silent" environment variable. See doc/README.silent for more information.
+ When CONFIG_SILENT_CONSOLE_AT_BOOT is set u-boot + will be built with silent defined in the default + environment for a completly silent console at boot + - Console Baudrate: CONFIG_BAUDRATE - in bps Select one of the baudrates listed in diff --git a/common/env_common.c b/common/env_common.c index c3e6388..3b09373 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -123,6 +123,9 @@ uchar default_environment[] = { #if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0) "pcidelay=" MK_STR(CONFIG_PCI_BOOTDELAY) "\0" #endif +#ifdef CONFIG_SILENT_CONSOLE_AT_BOOT + "silent=1\0" +#endif #ifdef CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS #endif
From: Matthew McClintock msm@freescale.com
Allow users to pass in extra defines via make so they can modify the build. Example
make P1022DS EXTRA_OPTS=NAND
is equivalent to
make P1022DS_NAND
Signed-off-by: Matthew McClintock msm@freescale.com --- mkconfig | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/mkconfig b/mkconfig index 6ff533f..e72ec3d 100755 --- a/mkconfig +++ b/mkconfig @@ -81,6 +81,12 @@ if [ "${ARCH}" -a "${ARCH}" != "${arch}" ]; then exit 1 fi
+if [ -z "${options}" ] ; then +options+=$EXTRA_OPTS +else +options+=,$EXTRA_OPTS +fi + if [ "$options" ] ; then echo "Configuring for ${BOARD_NAME} - Board: ${CONFIG_NAME}, Options: ${options}" else @@ -146,7 +152,7 @@ else > config.h # Create new config file fi echo "/* Automatically generated - do not edit */" >>config.h - +TARGETS+=`echo $EXTRA_OPTS | tr ',' ' '` for i in ${TARGETS} ; do i="`echo ${i} | sed '/=/ {s/=/\t/;q } ; { s/$/\t1/ }'`" echo "#define CONFIG_${i}" >>config.h ;
On Thursday, June 02, 2011 15:27:30 y@right.am.freescale.net wrote:
--- a/mkconfig +++ b/mkconfig @@ -81,6 +81,12 @@ if [ "${ARCH}" -a "${ARCH}" != "${arch}" ]; then exit 1 fi
+if [ -z "${options}" ] ; then +options+=$EXTRA_OPTS +else +options+=,$EXTRA_OPTS +fi
style is broken (lacking indentation), and the "+=" operator is not in the POSIX shell spec -mike
Allow users to pass in extra defines via make so they can modify the build. Example
make P1022DS EXTRA_OPTS=NAND
is equivalent to
make P1022DS_NAND
Signed-off-by: Matthew McClintock msm@freescale.com --- v2: Fix tab indention, fix posix compliance
mkconfig | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/mkconfig b/mkconfig index 6ff533f..bc6ce06 100755 --- a/mkconfig +++ b/mkconfig @@ -81,6 +81,12 @@ if [ "${ARCH}" -a "${ARCH}" != "${arch}" ]; then exit 1 fi
+if [ -z "${options}" ] ; then + options=$EXTRA_OPTS +else + options="$options,$EXTRA_OPTS" +fi + if [ "$options" ] ; then echo "Configuring for ${BOARD_NAME} - Board: ${CONFIG_NAME}, Options: ${options}" else @@ -146,7 +152,7 @@ else > config.h # Create new config file fi echo "/* Automatically generated - do not edit */" >>config.h - +TARGETS+=`echo $EXTRA_OPTS | tr ',' ' '` for i in ${TARGETS} ; do i="`echo ${i} | sed '/=/ {s/=/\t/;q } ; { s/$/\t1/ }'`" echo "#define CONFIG_${i}" >>config.h ;
On Friday, June 03, 2011 14:36:03 Matthew McClintock wrote:
+if [ -z "${options}" ] ; then
- options=$EXTRA_OPTS
+else
- options="$options,$EXTRA_OPTS"
+fi
this can be simplified (or at least done in one line) with: options=${options:+${options},}${EXTRA_OPTS}
although i can understand that not everyone can grok that at first blush
+TARGETS+=`echo $EXTRA_OPTS | tr ',' ' '`
you're still using non-portable += append operator
although i dont understand how EXTRA_OPTS can both be extra options and extra targets at the same time ... -mike
On Fri, Jun 3, 2011 at 2:24 PM, Mike Frysinger vapier@gentoo.org wrote:
On Friday, June 03, 2011 14:36:03 Matthew McClintock wrote:
+if [ -z "${options}" ] ; then
- options=$EXTRA_OPTS
+else
- options="$options,$EXTRA_OPTS"
+fi
this can be simplified (or at least done in one line) with: options=${options:+${options},}${EXTRA_OPTS}
although i can understand that not everyone can grok that at first blush
I'm fine with doing this if it's understandable by all
+TARGETS+=`echo $EXTRA_OPTS | tr ',' ' '`
you're still using non-portable += append operator
although i dont understand how EXTRA_OPTS can both be extra options and extra targets at the same time ...
Actually I just looked over this again and I found a much simpler way to accomplish the same thing. See my next patch.
-M
Allow users to pass in extra defines via make so they can modify the build. Example
make P1022DS EXTRA_OPTS=NAND
is equivalent to
make P1022DS_NAND
Signed-off-by: Matthew McClintock msm@freescale.com --- v2: Fix tab indention, fix posix compliance v3: Move appending $EXTRA_OPTS up higher before we set $TARGETS so we only need to append $EXTRA_OPTS to $options and not $TARGETS
mkconfig | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/mkconfig b/mkconfig index 6ff533f..77ddc1b 100755 --- a/mkconfig +++ b/mkconfig @@ -72,9 +72,13 @@ fi # Check if we only have a colon... if [ "${tmp}" != "$7" ] ; then options=${7#*:} - TARGETS="`echo ${options} | sed 's:,: :g'` ${TARGETS}" fi } +# Append options passed in via EXTRA_OPTS +if [ -n "$EXTRA_OPTS" ] ; then + options=${options:+${options},}${EXTRA_OPTS} +fi +TARGETS="`echo ${options} | sed 's:,: :g'` ${TARGETS}"
if [ "${ARCH}" -a "${ARCH}" != "${arch}" ]; then echo "Failed: $ARCH=${ARCH}, should be '${arch}' for ${BOARD_NAME}" 1>&2
Dear Matthew McClintock,
In message 1307131671-22745-1-git-send-email-msm@freescale.com you wrote:
Allow users to pass in extra defines via make so they can modify the build. Example
make P1022DS EXTRA_OPTS=NAND
is equivalent to
make P1022DS_NAND
I see absolutely no sense in this, We already have a way to specify such arguments, as you write yourself in your commit message. Your new way is just more complicated, more typing effort, and as such just useless overhead.
NAK.
Best regards,
Wolfgang Denk
On Sat, Jun 4, 2011 at 2:56 AM, Wolfgang Denk wd@denx.de wrote:
I see absolutely no sense in this, We already have a way to specify such arguments, as you write yourself in your commit message. Your new way is just more complicated, more typing effort, and as such just useless overhead.
Did you not see the other patch in the same series that makes use of this feature? It's not about actually typing it out. Let me know if you need help finding patch 3/4.
-M
Dear McClintock Matthew-B29882,
In message BANLkTikCFptKvKK=PvABWgrVL4pvzcQBBw@mail.gmail.com you wrote:
On Sat, Jun 4, 2011 at 2:56 AM, Wolfgang Denk wd@denx.de wrote:
I see absolutely no sense in this, =A0We already have a way to specify such arguments, as you write yourself in your commit message. =A0Your new way is just more complicated, more typing effort, and as such just useless overhead.
Did you not see the other patch in the same series that makes use of this feature? It's not about actually typing it out. Let me know if you need help finding patch 3/4.
It does not matter if you add it here and use it there. We already have a mechanhism to do that, so no new method is needed. Please use the existing code instead oif reinventing the wheel.
Best regards,
Wolfgang Denk
On Sat, Jun 4, 2011 at 7:33 AM, Wolfgang Denk wd@denx.de wrote:
Did you not see the other patch in the same series that makes use of this feature? It's not about actually typing it out. Let me know if you need help finding patch 3/4.
It does not matter if you add it here and use it there. We already have a mechanhism to do that, so no new method is needed. Please use the existing code instead oif reinventing the wheel.
How do I make a new build configuration without making changes to boards.cfg or the Makefile? I could add a new entry there for every bootstrap build but I was trying and hoping to avoid this. For example for every build I could need the following
BOARD_NAND BOARD_NAND_IN_BOOTSTRAP BOARD_SPIFLASH BOARD_SPIFLASH_IN_BOOTSTRAP BOARD_SDCARD BOARD_SDCARD_IN_BOOTSTRAP
I was hoping to avoid all the IN_BOOTSTRAP variants.
-M
Dear McClintock Matthew-B29882,
In message BANLkTiknz2xgLw=w-FynuZo=X6AY-pUdpA@mail.gmail.com you wrote:
How do I make a new build configuration without making changes to boards.cfg or the Makefile? I could add a new entry there for every bootstrap build but I was trying and hoping to avoid this. For example for every build I could need the following
BOARD_NAND BOARD_NAND_IN_BOOTSTRAP BOARD_SPIFLASH BOARD_SPIFLASH_IN_BOOTSTRAP BOARD_SDCARD BOARD_SDCARD_IN_BOOTSTRAP
Are these independent targets? I think you don't run a "./MAKEALL BOARD_SDCARD_IN_BOOTSTRAP" alone, right?
You can set all types of make variable sinternally during different stages of the build, like we already do with the nand_spl code.
I have to admit that I don't even understand why you would need separate top-level FOO and FOO_IN_BOOTSTRAP make targets. Please elucidate.
Best regards,
Wolfgang Denk
On Tue, Jun 7, 2011 at 3:04 PM, Wolfgang Denk wd@denx.de wrote:
BOARD_NAND BOARD_NAND_IN_BOOTSTRAP BOARD_SPIFLASH BOARD_SPIFLASH_IN_BOOTSTRAP BOARD_SDCARD BOARD_SDCARD_IN_BOOTSTRAP
Are these independent targets? I think you don't run a "./MAKEALL BOARD_SDCARD_IN_BOOTSTRAP" alone, right?
Correct, however I was hoping to use a normal build system to make this image. With the only difference being that CONFIG_IN_BOOTSTRAP is defined when parsing the board config file.
You can set all types of make variable sinternally during different stages of the build, like we already do with the nand_spl code.
Right but nand_spl provides more Makefiles for building it's own image. I want to reuse the normal u-boot build system to create this shim/bootstrap image.
I have to admit that I don't even understand why you would need separate top-level FOO and FOO_IN_BOOTSTRAP make targets. Please elucidate.
Sorry, let me try to explain some more.
Certain boards require some sort of shim, or spl for booting from media other than NOR on our parts. We need this shim to perform DDR initialization. This shim does not need to be anything but a stripped down version of u-boot since it needs to be <256k and contain the DDR SPD initialization code. Therefore I just wanted to reuse the u-boot build system as is and add some configuration changes to create all the final images for booting this board.
So when I build a target for my board the following happens:
make FOO -> builds u-boot.bin to run from RAM -> calls make FOO_IN_BOOTSTRAP to run from L2 and configure DDR -> NAND will also have a nand_spl shim as well (where as SDCARD and SPI booting currently do not have support in u-boot for making this shim)
The FOO_IN_BOOTSTRAP build above creates a u-boot image that runs from L2 and its BOOTCOMMAND is set such that it will automatically load the final u-boot image from the boot media to ram and then execute the full version of u-boot.
-M
Dear Matthew McClintock,
In message 1307126163-24859-1-git-send-email-msm@freescale.com you wrote:
Allow users to pass in extra defines via make so they can modify the build. Example
make P1022DS EXTRA_OPTS=NAND
is equivalent to
make P1022DS_NAND
Signed-off-by: Matthew McClintock msm@freescale.com
What would that be good for?
I consider this not a good idea.
NAK.
Best regards,
Wolfgang Denk
From: Matthew McClintock msm@freescale.com
This patch allows some boards do define CONFIG_BOOTSTRAP to let them build a MPL or middle program loader to setup the board before booting to the full u-boot build. The advantage is that we are using the same build system and linker scripts that would be used in a normal u-boot build.
This is used on powerpc/85xx parts that only have 256kB of cache and also need to perform DDR SPD. So, the nand_spl will load the MPL to L2 SRAM and there DDR will be configured. Afterwards the MPL uses the CONFIG_BOOTCOMMAND environment variable to boot to the appropriate media. This also works with SD and SPI via the on chip rom but instead it goes from on-chip-rom to MPL to full version of u-boot.
Depends on previous icache/dcache command changes and various build fixes for add cases that occur when trying to build an extremely minimal image
Signed-off-by: Matthew McClintock msm@freescale.com --- Makefile | 38 +++++++++++++++++++++++++++++++++++++- mkconfig | 1 + 2 files changed, 38 insertions(+), 1 deletions(-)
diff --git a/Makefile b/Makefile index 0400930..7a9cae7 100644 --- a/Makefile +++ b/Makefile @@ -317,6 +317,16 @@ ifeq ($(CONFIG_NAND_U_BOOT),y) ALL += $(obj)u-boot-nand.bin endif
+ifndef CONFIG_IN_BOOTSTRAP +ifeq ($(CONFIG_SPIFLASH), y) +ALL += $(obj)u-boot-spi.bin +endif + +ifeq ($(CONFIG_SDCARD), y) +ALL += $(obj)u-boot-sd.bin +endif +endif + ifeq ($(CONFIG_ONENAND_U_BOOT),y) ALL += $(obj)u-boot-onenand.bin ONENAND_BIN ?= $(obj)onenand_ipl/onenand-ipl-2k.bin @@ -404,8 +414,16 @@ $(obj)u-boot.lds: $(LDSCRIPT) nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend $(MAKE) -C nand_spl/board/$(BOARDDIR) all
+NAND_SPL_OBJS-y += $(obj)nand_spl/u-boot-spl-16k.bin +NAND_SPL_OBJS-$(CONFIG_BOOTSTRAP) += $(obj)u-boot-bootstrap.bin +NAND_SPL_OBJS-y += $(obj)u-boot.bin + +ifeq ($(CONFIG_BOOTSTRAP),y) +$(obj)u-boot-nand.bin: nand_spl $(obj)u-boot-bootstrap.bin $(obj)u-boot.bin +else $(obj)u-boot-nand.bin: nand_spl $(obj)u-boot.bin - cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin +endif + cat $(NAND_SPL_OBJS-y) > $(obj)u-boot-nand.bin
onenand_ipl: $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk $(MAKE) -C onenand_ipl/board/$(BOARDDIR) all @@ -413,6 +431,23 @@ onenand_ipl: $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk $(obj)u-boot-onenand.bin: onenand_ipl $(obj)u-boot.bin cat $(ONENAND_BIN) $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
+ifdef CONFIG_BOOTSTRAP +$(obj)u-boot-spi.bin: $(obj)u-boot.bin $(obj)u-boot-bootstrap.bin + cat $(obj)u-boot-bootstrap.bin $(obj)u-boot.bin > $(obj)u-boot-spi.bin +$(obj)u-boot-sd.bin: $(obj)u-boot.bin $(obj)u-boot-bootstrap.bin + cat $(obj)u-boot-bootstrap.bin $(obj)u-boot.bin > $(obj)u-boot-sd.bin +else +$(obj)u-boot-spi.bin: $(obj)u-boot.bin + ln -s u-boot.bin u-boot-spi.bin +$(obj)u-boot-sd.bin: $(obj)u-boot.bin + ln -s u-boot.bin u-boot-sd.bin +endif + +$(obj)u-boot-bootstrap.bin: + rm -rf $(BUILD_DIR)bootstrap + $(MAKE) $(CONFIG_BOARD_NAME) O=bootstrap/ EXTRA_OPTS=IN_BOOTSTRAP + cp $(BUILD_DIR)bootstrap/u-boot.bin u-boot-bootstrap.bin + $(VERSION_FILE): @( localvers='$(shell $(TOPDIR)/tools/setlocalversion $(TOPDIR))' ; \ printf '#define PLAIN_VERSION "%s%s"\n' \ @@ -1130,6 +1165,7 @@ clean: ( -name 'core' -o -name '*.bak' -o -name '*~' \ -o -name '*.o' -o -name '*.a' -o -name '*.exe' ) -print \ | xargs rm -f + @rm -fr $(BUILD_DIR)bootstrap/
clobber: clean @find $(OBJTREE) -type f ( -name '*.depend' \ diff --git a/mkconfig b/mkconfig index e72ec3d..74294ec 100755 --- a/mkconfig +++ b/mkconfig @@ -159,6 +159,7 @@ for i in ${TARGETS} ; do done
cat << EOF >> config.h +#define CONFIG_BOARD_NAME $BOARD_NAME #define CONFIG_BOARDDIR board/$BOARDDIR #include <config_cmd_defaults.h> #include <config_defaults.h>
Dear y@right.am.freescale.net,
In message <1307042852-10385-3-git-send-email-y> you wrote:
This patch allows some boards do define CONFIG_BOOTSTRAP to let them build a MPL or middle program loader to setup the board before booting to the full u-boot build. The advantage is that we are using the same build system and linker scripts that would be used in a normal u-boot build.
The intention is OK, but I disagree with the implementation.
+ifndef CONFIG_IN_BOOTSTRAP +ifeq ($(CONFIG_SPIFLASH), y) +ALL += $(obj)u-boot-spi.bin +endif
+ifeq ($(CONFIG_SDCARD), y) +ALL += $(obj)u-boot-sd.bin +endif +endif
I really dislike to have this in the top level Makefile. We want to make it simpler, less board specific. and this is the opposite.
I doubt you always need all these images. If you need u-boot-sd.bin, then just type "make u-boot-sd.bin".
nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend $(MAKE) -C nand_spl/board/$(BOARDDIR) all
+NAND_SPL_OBJS-y += $(obj)nand_spl/u-boot-spl-16k.bin +NAND_SPL_OBJS-$(CONFIG_BOOTSTRAP) += $(obj)u-boot-bootstrap.bin +NAND_SPL_OBJS-y += $(obj)u-boot.bin
This looks pretty much board specific to me. I doubt all boards can use u-boot-spl-16k.bin here.
+ifeq ($(CONFIG_BOOTSTRAP),y) +$(obj)u-boot-nand.bin: nand_spl $(obj)u-boot-bootstrap.bin $(obj)u-boot.bin +else
...
+$(obj)u-boot-bootstrap.bin:
rm -rf $(BUILD_DIR)bootstrap$(MAKE) $(CONFIG_BOARD_NAME) O=bootstrap/ EXTRA_OPTS=IN_BOOTSTRAPcp $(BUILD_DIR)bootstrap/u-boot.bin u-boot-bootstrap.bin
Argh.. how many different images are you going to add? This is becoming a mess.
Do we really need all this in the top level Makefile?
diff --git a/mkconfig b/mkconfig index e72ec3d..74294ec 100755 --- a/mkconfig +++ b/mkconfig @@ -159,6 +159,7 @@ for i in ${TARGETS} ; do done
cat << EOF >> config.h +#define CONFIG_BOARD_NAME $BOARD_NAME #define CONFIG_BOARDDIR board/$BOARDDIR #include <config_cmd_defaults.h> #include <config_defaults.h>
NAK. This breaks existing code, also it should not be needed.
Best regards,
Wolfgang Denk
On Sat, Jun 4, 2011 at 7:32 AM, Wolfgang Denk wd@denx.de wrote:
+ifndef CONFIG_IN_BOOTSTRAP +ifeq ($(CONFIG_SPIFLASH), y) +ALL += $(obj)u-boot-spi.bin +endif
+ifeq ($(CONFIG_SDCARD), y) +ALL += $(obj)u-boot-sd.bin +endif +endif
I really dislike to have this in the top level Makefile. We want to make it simpler, less board specific. and this is the opposite.
Perhaps having a CONFIG_TARGET_IMAGE available and having just one generic TARGET available?
ifdef CONFIG_TARGET_IMAGE ALL += $(CONFIG_TARGET_IMAGE) endif
TARGET_IMAGE_OBJS-y += various.bin TARGET_IMAGE_OBJS-y += required.bin TARGET_IMAGE_OBJS-y += blobs.bin
$(obj)$(CONFIG_TARGET_IMAGE): $(TARGET_IMAGE_OBJS-y) cat $(TARGET_IMAGE_OBJS-y) > $(obj)$(CONFIG_TARGET_IMAGE)
I doubt you always need all these images. If you need u-boot-sd.bin, then just type "make u-boot-sd.bin".
We choose these targets by adding a config line in boards.cfg. We don't build them unless we do a make BOARD_{NAND,SDCARD,SPIFLASH}. We could optionally just require the user to type out the target manually or do what I mentioned above however, I strongly believe these images should always be built as we don't want end user confusion about which image to program.
nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend $(MAKE) -C nand_spl/board/$(BOARDDIR) all
+NAND_SPL_OBJS-y += $(obj)nand_spl/u-boot-spl-16k.bin +NAND_SPL_OBJS-$(CONFIG_BOOTSTRAP) += $(obj)u-boot-bootstrap.bin +NAND_SPL_OBJS-y += $(obj)u-boot.bin
This looks pretty much board specific to me. I doubt all boards can use u-boot-spl-16k.bin here.
This u-boot-spl-16k.bin reference has been here before this patch. It is typically just the u-boot-nand image to be used and not actually required to be 16k. It could probably be updated to just be u-boot-spl.bin except that for some boards this is not the right image. Usually the 16k one points at the right image.
+ifeq ($(CONFIG_BOOTSTRAP),y) +$(obj)u-boot-nand.bin: nand_spl $(obj)u-boot-bootstrap.bin $(obj)u-boot.bin +else
...
+$(obj)u-boot-bootstrap.bin:
- rm -rf $(BUILD_DIR)bootstrap
- $(MAKE) $(CONFIG_BOARD_NAME) O=bootstrap/ EXTRA_OPTS=IN_BOOTSTRAP
- cp $(BUILD_DIR)bootstrap/u-boot.bin u-boot-bootstrap.bin
Argh.. how many different images are you going to add? This is becoming a mess.
Do we really need all this in the top level Makefile?
I'm not sure there is a great way around this. I played around with trying to include them in the config.mk or a board/cpu/arch Makefile (I'll admit my lack of Makefile mastery here) but what seems to work best is something like this to add "other" targets that don't need to reside in the top level Makefile. This is best because targets depend on things in the toplevel Makefile.
sinclude $(obj)arch/$(ARCH)/Makefile.targets sinclude $(obj)arch/$(ARCH)/cpu/$(CPU)/Makefile.targets
diff --git a/mkconfig b/mkconfig index e72ec3d..74294ec 100755 --- a/mkconfig +++ b/mkconfig @@ -159,6 +159,7 @@ for i in ${TARGETS} ; do done
cat << EOF >> config.h +#define CONFIG_BOARD_NAME $BOARD_NAME #define CONFIG_BOARDDIR board/$BOARDDIR #include <config_cmd_defaults.h> #include <config_defaults.h>
NAK. This breaks existing code, also it should not be needed.
How does this break existing code? Because a specific board might also defined this? I can drop it and add it to the board config file instead, but it seemed easier to programmatically do this so one target can build another target. This combined with the previous patch lets one build invoke another build (then we can add an additional option via EXTRA_OPTS from the previous patch)
-M
Dear McClintock Matthew-B29882,
In message BANLkTikgy1nw8rwrk=ex6N9oVSfAfhEgZQ@mail.gmail.com you wrote:
Perhaps having a CONFIG_TARGET_IMAGE available and having just one generic TARGET available?
ifdef CONFIG_TARGET_IMAGE ALL += $(CONFIG_TARGET_IMAGE) endif
TARGET_IMAGE_OBJS-y += various.bin TARGET_IMAGE_OBJS-y += required.bin TARGET_IMAGE_OBJS-y += blobs.bin
$(obj)$(CONFIG_TARGET_IMAGE): $(TARGET_IMAGE_OBJS-y) cat $(TARGET_IMAGE_OBJS-y) > $(obj)$(CONFIG_TARGET_IMAGE)
THis will probably not work, as different images may require different levels of alignment / padding. Also, some architectures require more fancy image building capabilities (provided for example by the mkimage tool).
I doubt you always need all these images. If you need u-boot-sd.bin, then just type "make u-boot-sd.bin".
We choose these targets by adding a config line in boards.cfg. We don't build them unless we do a make BOARD_{NAND,SDCARD,SPIFLASH}. We
Ok, so you do run individual builds for one selected image type each. This is IMHO OK.
could optionally just require the user to type out the target manually
What's the difference? Writing "make BOARD_{NAND,SDCARD,SPIFLASH}" is typing out the target manually, isn't it?
or do what I mentioned above however, I strongly believe these images should always be built as we don't want end user confusion about which image to program.
In which way would that prevent any confusion? In any case you have to know which image you want to program. It's poretty much the same to me if I have to select a name from a list of images that resault from a "make" run, or if I select a name from a list of possible make target names. Actually, the latter seems more logical to me.
+NAND_SPL_OBJS-y += $(obj)nand_spl/u-boot-spl-16k.bin +NAND_SPL_OBJS-$(CONFIG_BOOTSTRAP) += $(obj)u-boot-bootstrap.bin +NAND_SPL_OBJS-y += $(obj)u-boot.bin
This looks pretty much board specific to me. I doubt all boards can use u-boot-spl-16k.bin here.
This u-boot-spl-16k.bin reference has been here before this patch. It
Yes, I know.
is typically just the u-boot-nand image to be used and not actually required to be 16k. It could probably be updated to just be u-boot-spl.bin except that for some boards this is not the right image. Usually the 16k one points at the right image.
In general, it's wrong and should be fixed.
Do we really need all this in the top level Makefile?
I'm not sure there is a great way around this. I played around with trying to include them in the config.mk or a board/cpu/arch Makefile (I'll admit my lack of Makefile mastery here) but what seems to work best is something like this to add "other" targets that don't need to reside in the top level Makefile. This is best because targets depend on things in the toplevel Makefile.
I think we should step back a bit. Assume I forgot everything I've read so far, and try to explain me in simple words (completely independent from your suggested implementation) what exactly you want to do.
cat << EOF >> config.h +#define CONFIG_BOARD_NAME $BOARD_NAME #define CONFIG_BOARDDIR board/$BOARDDIR #include <config_cmd_defaults.h> #include <config_defaults.h>
NAK. This breaks existing code, also it should not be needed.
How does this break existing code? Because a specific board might also defined this? I can drop it and add it to the board config file
Not might, bot actually does.
instead, but it seemed easier to programmatically do this so one target can build another target. This combined with the previous patch lets one build invoke another build (then we can add an additional option via EXTRA_OPTS from the previous patch)
All this is way too obscure to me. I fail to see what you are trying to acchieve.
Best regards,
Wolfgang Denk
On Tue, Jun 7, 2011 at 3:19 PM, Wolfgang Denk wd@denx.de wrote:
Perhaps having a CONFIG_TARGET_IMAGE available and having just one generic TARGET available?
ifdef CONFIG_TARGET_IMAGE ALL += $(CONFIG_TARGET_IMAGE) endif
TARGET_IMAGE_OBJS-y += various.bin TARGET_IMAGE_OBJS-y += required.bin TARGET_IMAGE_OBJS-y += blobs.bin
$(obj)$(CONFIG_TARGET_IMAGE): $(TARGET_IMAGE_OBJS-y) cat $(TARGET_IMAGE_OBJS-y) > $(obj)$(CONFIG_TARGET_IMAGE)
THis will probably not work, as different images may require different levels of alignment / padding. Also, some architectures require more fancy image building capabilities (provided for example by the mkimage tool).
It works for the images in the Makefile currently, but in the future more complicated and board specific targets could live in board/arch/cpu specific files that are included into the top level makefile.
sinclude $(obj)arch/$(ARCH)/Makefile.targets sinclude $(obj)arch/$(ARCH)/cpu/$(CPU)/Makefile.targets
In fact we could move all image creation (besides u-boot.bin) out to the files and clean out the top level makefile.
Do we really need all this in the top level Makefile?
I'm not sure there is a great way around this. I played around with trying to include them in the config.mk or a board/cpu/arch Makefile (I'll admit my lack of Makefile mastery here) but what seems to work best is something like this to add "other" targets that don't need to reside in the top level Makefile. This is best because targets depend on things in the toplevel Makefile.
I think we should step back a bit. Assume I forgot everything I've read so far, and try to explain me in simple words (completely independent from your suggested implementation) what exactly you want to do.
I think my other reply to your email on patch 2/4 should provide a good summary on what I am trying to accomplish.
cat << EOF >> config.h +#define CONFIG_BOARD_NAME $BOARD_NAME #define CONFIG_BOARDDIR board/$BOARDDIR #include <config_cmd_defaults.h> #include <config_defaults.h>
NAK. This breaks existing code, also it should not be needed.
How does this break existing code? Because a specific board might also defined this? I can drop it and add it to the board config file
Not might, bot actually does.
Still not sure how this is breaking anything. Can you point me at a build that fails?
From: Haiying Wang Haiying.Wang@freescale.com
This patch supports P1021MDS board to boot from NAND flash (No NOR flash on this board). And because P1021 only has 256K L2 SRAM, which can not used for final uboot image it makes use of the MPL.
Signed-off-by: Haiying Wang Haiying.Wang@freescale.com Signed-off-by: Mohit Kumar Mohit.Kumar@freescale.com Signed-off-by: Yu Liu Yu.Liu@freescale.com Signed-off-by: Kai Jiang Kai.Jiang@freescale.com Signed-off-by: Zhao Chenhui b35336@freescale.com Signed-off-by: Matthew McClintock msm@freescale.com --- This patch requires some previously sent patches to build correctly. They deal build fixes for building the <256k middle u-boot image:
http://patchwork.ozlabs.org/patch/97219/ http://patchwork.ozlabs.org/patch/97177/ http://patchwork.ozlabs.org/patch/97174/ http://patchwork.ozlabs.org/patch/97026/
and one from Mike Frysinger
http://patchwork.ozlabs.org/patch/98422/
I'm skipping the following checkpatch warnings since they don't seem to apply:
WARNING: Use #include <linux/io.h> instead of <asm/io.h> +#include <asm/io.h>
WARNING: Use #include <linux/io.h> instead of <asm/io.h> +#include <asm/io.h>
WARNING: suspect code indent for conditional statements (8, 8) if (uec->the_first_run == 0) { [...] + /* P1021MDS board needs to reset micrel phy for each UEC */
ERROR: Macros with multiple statements should be enclosed in a do - while loop +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* Don't probe these addrs */
ERROR: need consistent spacing around '/' (ctx:WxV) +#define CONFIG_ROOTPATH /nfsroot ^
ERROR: Macros with complex values should be enclosed in parenthesis +#define CONFIG_ROOTPATH /nfsroot
WARNING: Use #include <linux/io.h> instead of <asm/io.h> +#include <asm/io.h>
MAINTAINERS | 4 + README | 13 + board/freescale/p1021mds/Makefile | 52 ++ board/freescale/p1021mds/ddr.c | 81 ++++ board/freescale/p1021mds/law.c | 32 ++ board/freescale/p1021mds/p1021mds.c | 181 +++++++ board/freescale/p1021mds/tlb.c | 100 ++++ boards.cfg | 1 + drivers/qe/uec.c | 9 + include/configs/P1021MDS.h | 629 +++++++++++++++++++++++++ nand_spl/board/freescale/p1021mds/Makefile | 137 ++++++ nand_spl/board/freescale/p1021mds/nand_boot.c | 69 +++ 12 files changed, 1308 insertions(+), 0 deletions(-) create mode 100644 board/freescale/p1021mds/Makefile create mode 100644 board/freescale/p1021mds/ddr.c create mode 100644 board/freescale/p1021mds/law.c create mode 100644 board/freescale/p1021mds/p1021mds.c create mode 100644 board/freescale/p1021mds/tlb.c create mode 100644 include/configs/P1021MDS.h create mode 100644 nand_spl/board/freescale/p1021mds/Makefile create mode 100644 nand_spl/board/freescale/p1021mds/nand_boot.c
diff --git a/MAINTAINERS b/MAINTAINERS index e2c48a8..71a1310 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17,6 +17,10 @@ # Board CPU # #########################################################################
+Haiying Wang Haiying.Wang@freescale.com + + P1021MDS P1021 + Poonam Aggrwal poonam.aggrwal@freescale.com
P2020RDB P2020 diff --git a/README b/README index 8779544..cd785c5 100644 --- a/README +++ b/README @@ -2225,6 +2225,19 @@ FIT uImage format: Adds the MTD partitioning infrastructure from the Linux kernel. Needed for UBI support.
+- NAND Boot Support + CONFIG_NAND_U_BOOT + + Builds a U-Boot image that boots from NAND, prefixed by a small + loader stub (secondary program loader -- SPL) that loads the + rest of U-Boot into RAM. This symbol will be set in all build + phases. + + CONFIG_NAND_SPL + + This is set by the build system when compiling code to go into + the SPL. It is not set when building the code that the SPL + loads.
Modem Support: -------------- diff --git a/board/freescale/p1021mds/Makefile b/board/freescale/p1021mds/Makefile new file mode 100644 index 0000000..50d4743 --- /dev/null +++ b/board/freescale/p1021mds/Makefile @@ -0,0 +1,52 @@ +# +# Copyright (C) 2010-2011 Freescale Semiconductor, Inc. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS-y += $(BOARD).o +COBJS-y += law.o +COBJS-y += tlb.o +COBJS-y += ddr.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) $(SOBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/freescale/p1021mds/ddr.c b/board/freescale/p1021mds/ddr.c new file mode 100644 index 0000000..19a2072 --- /dev/null +++ b/board/freescale/p1021mds/ddr.c @@ -0,0 +1,81 @@ +/* + * Copyright 2010-2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <i2c.h> +#include <asm/processor.h> +#include <asm/io.h> +#include <asm/fsl_law.h> +#include <asm/fsl_ddr_sdram.h> +#include <asm/fsl_ddr_dimm_params.h> + +void fsl_ddr_board_options(memctl_options_t *popts, + dimm_params_t *pdimm, + unsigned int ctrl_num) +{ + /* + * Factors to consider for clock adjust: + */ + popts->clk_adjust = 6; + + /* + * Factors to consider for CPO: + */ + popts->cpo_override = 0x1f; + + /* + * Factors to consider for write data delay: + */ + popts->write_data_delay = 2; + + /* + * Factors to consider for half-strength driver enable: + */ + popts->half_strength_driver_enable = 1; + + /* + * Rtt and Rtt_WR override + */ + popts->rtt_override = 1; + popts->rtt_override_value = DDR3_RTT_40_OHM; /* 40 Ohm rtt */ + popts->rtt_wr_override_value = 2; /* Rtt_WR */ + + /* Write leveling override */ + popts->wrlvl_en = 1; + popts->wrlvl_override = 1; + popts->wrlvl_sample = 0xa; + popts->wrlvl_start = 0x8; + /* + * P1021 supports max 32-bit DDR width + */ + popts->data_bus_width = 1; + + /* + * disable on-the-fly burst chop mode for 32 bit data bus + */ + popts->OTF_burst_chop_en = 0; + + /* + * Set fixed 8 beat burst for 32 bit data bus + */ + popts->burst_length = DDR_BL8; +} diff --git a/board/freescale/p1021mds/law.c b/board/freescale/p1021mds/law.c new file mode 100644 index 0000000..8e5e305 --- /dev/null +++ b/board/freescale/p1021mds/law.c @@ -0,0 +1,32 @@ +/* + * Copyright 2010-2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/fsl_law.h> +#include <asm/mmu.h> + +struct law_entry law_table[] = { + SET_LAW(CONFIG_SYS_BCSR_BASE_PHYS, LAW_SIZE_256K, LAW_TRGT_IF_LBC), + SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC), +}; + +int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/freescale/p1021mds/p1021mds.c b/board/freescale/p1021mds/p1021mds.c new file mode 100644 index 0000000..f6dccc0 --- /dev/null +++ b/board/freescale/p1021mds/p1021mds.c @@ -0,0 +1,181 @@ +/* + * Copyright 2010-2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <hwconfig.h> +#include <pci.h> +#include <asm/processor.h> +#include <asm/mmu.h> +#include <asm/immap_85xx.h> +#include <asm/fsl_pci.h> +#include <asm/io.h> +#include <asm/mp.h> +#include <i2c.h> +#include <ioports.h> +#include <libfdt.h> +#include <fdt_support.h> +#include <fsl_esdhc.h> +#include <fsl_mdio.h> +#include <tsec.h> +#include <netdev.h> + +#ifdef CONFIG_QE +const qe_iop_conf_t qe_iop_conf_tab[] = { + /* QE_MUX_MDC */ + {1, 19, 1, 0, 1}, /* QE_MUX_MDC */ + /* QE_MUX_MDIO */ + {1, 20, 3, 0, 1}, /* QE_MUX_MDIO */ + + /* UCC_1_MII */ + {0, 23, 2, 0, 2}, /* CLK12 */ + {0, 24, 2, 0, 1}, /* CLK9 */ + {0, 7, 1, 0, 2}, /* ENET1_TXD0_SER1_TXD0 */ + {0, 9, 1, 0, 2}, /* ENET1_TXD1_SER1_TXD1 */ + {0, 11, 1, 0, 2}, /* ENET1_TXD2_SER1_TXD2 */ + {0, 12, 1, 0, 2}, /* ENET1_TXD3_SER1_TXD3 */ + {0, 6, 2, 0, 2}, /* ENET1_RXD0_SER1_RXD0 */ + {0, 10, 2, 0, 2}, /* ENET1_RXD1_SER1_RXD1 */ + {0, 14, 2, 0, 2}, /* ENET1_RXD2_SER1_RXD2 */ + {0, 15, 2, 0, 2}, /* ENET1_RXD3_SER1_RXD3 */ + {0, 5, 1, 0, 2}, /* ENET1_TX_EN_SER1_RTS_B */ + {0, 13, 1, 0, 2}, /* ENET1_TX_ER */ + {0, 4, 2, 0, 2}, /* ENET1_RX_DV_SER1_CTS_B */ + {0, 8, 2, 0, 2}, /* ENET1_RX_ER_SER1_CD_B */ + {0, 17, 2, 0, 2}, /* ENET1_CRS */ + {0, 16, 2, 0, 2}, /* ENET1_COL */ + + /* UCC_5_RMII */ + {1, 11, 2, 0, 1}, /* CLK13 */ + {1, 7, 1, 0, 2}, /* ENET5_TXD0_SER5_TXD0 */ + {1, 10, 1, 0, 2}, /* ENET5_TXD1_SER5_TXD1 */ + {1, 6, 2, 0, 2}, /* ENET5_RXD0_SER5_RXD0 */ + {1, 9, 2, 0, 2}, /* ENET5_RXD1_SER5_RXD1 */ + {1, 5, 1, 0, 2}, /* ENET5_TX_EN_SER5_RTS_B */ + {1, 4, 2, 0, 2}, /* ENET5_RX_DV_SER5_CTS_B */ + {1, 8, 2, 0, 2}, /* ENET5_RX_ER_SER5_CD_B */ + + {0, 0, 0, 0, QE_IOP_TAB_END} /* END of table */ +}; +#endif + +int board_early_init_f(void) +{ + + fsl_lbc_t *lbc = LBC_BASE_ADDR; + +#ifdef CONFIG_MMC + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + + setbits_be32(&gur->pmuxcr, + (MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP)); +#endif + + /* Set ABSWP to implement conversion of addresses in the LBC */ + setbits_be32(&lbc->lbcr, CONFIG_SYS_LBC_LBCR); + + return 0; +} + +int checkboard(void) +{ + printf("Board: P1021 MDS\n"); + + return 0; +} + +#ifdef CONFIG_PCI +void pci_init_board(void) +{ + fsl_pcie_init_board(0); +} +#endif + +#ifdef CONFIG_TSEC_ENET +int board_eth_init(bd_t *bis) +{ + struct fsl_pq_mdio_info mdio_info; + struct tsec_info_struct tsec_info[3]; + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + int num = 0; + +#ifdef CONFIG_TSEC1 + SET_STD_TSEC_INFO(tsec_info[num], 1); + num++; +#endif + +#ifdef CONFIG_TSEC2 + SET_STD_TSEC_INFO(tsec_info[num], 2); + num++; +#endif + +#ifdef CONFIG_TSEC3 + SET_STD_TSEC_INFO(tsec_info[num], 3); + if (!(in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_SGMII3_DIS)) + tsec_info[num].flags |= TSEC_SGMII; + num++; +#endif + + if (!num) { + printf("No TSECs initialized\n"); + return 0; + } + + mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR; + mdio_info.name = DEFAULT_MII_NAME; + + fsl_pq_mdio_init(bis, &mdio_info); + + tsec_eth_init(bis, tsec_info, num); + +#if defined(CONFIG_UEC_ETH) + /* QE0 and QE3 need to be exposed for UCC1 and UCC5 Eth mode */ + setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE0); + setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE3); + + uec_standard_init(bis); +#endif + + return pci_eth_init(bis); +} +#endif + +#if defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ + phys_addr_t base; + phys_size_t size; + + ft_cpu_setup(blob, bd); + + base = getenv_bootm_low(); + size = getenv_bootm_size(); + + fdt_fixup_memory(blob, base, size); + + FT_FSL_PCI_SETUP; + +#ifdef CONFIG_QE + do_fixup_by_compat(blob, "fsl,qe", "status", "okay", + sizeof("okay"), 0); +#endif +} +#endif diff --git a/board/freescale/p1021mds/tlb.c b/board/freescale/p1021mds/tlb.c new file mode 100644 index 0000000..f121552 --- /dev/null +++ b/board/freescale/p1021mds/tlb.c @@ -0,0 +1,100 @@ +/* + * Copyright 2010-2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <asm/mmu.h> + +struct fsl_e_tlb_entry tlb_table[] = { + /* TLB 0 - for temp stack in cache */ + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, + CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, + CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, + CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + + /* TLB 1 */ + /* *I*** - Covers boot page */ + SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I, + 0, 0, BOOKE_PAGESZ_4K, 1), + + /* *I*G* - CCSRBAR */ + SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 1, BOOKE_PAGESZ_1M, 1), + + /* *I*G* - PCIE */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_MEM_VIRT, CONFIG_SYS_PCIE2_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 2, BOOKE_PAGESZ_256M, 1), + + SET_TLB_ENTRY(1, (CONFIG_SYS_PCIE2_MEM_VIRT + 0x10000000), + (CONFIG_SYS_PCIE2_MEM_PHYS + 0x10000000), + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 3, BOOKE_PAGESZ_256M, 1), + + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 4, BOOKE_PAGESZ_256M, 1), + + SET_TLB_ENTRY(1, (CONFIG_SYS_PCIE1_MEM_VIRT + 0x10000000), + (CONFIG_SYS_PCIE2_MEM_PHYS + 0x10000000), + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 5, BOOKE_PAGESZ_256M, 1), + + /* *I*G* - PCIE I/O */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_IO_VIRT, CONFIG_SYS_PCIE2_IO_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 6, BOOKE_PAGESZ_256K, 1), + + /* + * *I*G BCSR/PMC0/PMC1 + */ + SET_TLB_ENTRY(1, CONFIG_SYS_BCSR_BASE, CONFIG_SYS_BCSR_BASE_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 7, BOOKE_PAGESZ_256K, 1), + + /* *I*G - NAND */ + SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 8, BOOKE_PAGESZ_1M, 1), + +#if defined(CONFIG_NAND_SPL) || defined(CONFIG_IN_TPL) + /* *I*G - L2SRAM */ + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G, + 0, 9, BOOKE_PAGESZ_256K, 1) +#endif +}; + +int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/boards.cfg b/boards.cfg index 9f2b118..07425a3 100644 --- a/boards.cfg +++ b/boards.cfg @@ -550,6 +550,7 @@ P1020RDB_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb freesca P1020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,NAND P1020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SDCARD P1020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SPIFLASH +P1021MDS_NAND powerpc mpc85xx p1021mds freescale - P1021MDS:NAND P1022DS powerpc mpc85xx p1022ds freescale P1022DS_36BIT powerpc mpc85xx p1022ds freescale - P1022DS:36BIT P2010RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index 1ecb137..8edd6d5 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -31,6 +31,9 @@ #include "uec_phy.h" #include "miiphy.h" #include <phy.h> +#ifdef CONFIG_P1021MDS +#define BCSR11_ENET_MICRST 0x20 +#endif
/* Default UTBIPAR SMI address */ #ifndef CONFIG_UTBIPAR_INIT_TBIPA @@ -1225,6 +1228,12 @@ static int uec_init(struct eth_device* dev, bd_t *bd) if (uec->the_first_run == 0) { #if defined(CONFIG_P1012) || defined(CONFIG_P1016) || \ defined(CONFIG_P1021) || defined(CONFIG_P1025) +#ifdef CONFIG_P1021MDS + /* P1021MDS board needs to reset micrel phy for each UEC */ + clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 11), BCSR11_ENET_MICRST); + udelay(200); + setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 11), BCSR11_ENET_MICRST); +#endif /* QE9 and QE12 need to be set for enabling QE MII managment signals */ setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE9); setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12); diff --git a/include/configs/P1021MDS.h b/include/configs/P1021MDS.h new file mode 100644 index 0000000..d0a0f21 --- /dev/null +++ b/include/configs/P1021MDS.h @@ -0,0 +1,629 @@ +/* + * Copyright 2010-2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +/* + * p1021mds board configuration file + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_BOOTSTRAP_SIZE (220 * 1024) + +#ifndef CONFIG_IN_BOOTSTRAP +#ifdef CONFIG_NAND +#define CONFIG_NAND_U_BOOT +#define CONFIG_RAMBOOT_NAND +#define CONFIG_SYS_RAMBOOT +#define CONFIG_SYS_TEXT_BASE_SPL 0xff800000 +#ifdef CONFIG_NAND_SPL +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL +#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CONFIG_SYS_L2_SIZE (256 << 10) +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR +\ + CONFIG_SYS_L2_SIZE) +#else +#define CONFIG_SYS_TEXT_BASE 0x11001000 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_BOOTSTRAP +#endif +#endif /* CONFIG_NAND */ +#else /* CONFIG_IN_BOOTSTRAP */ +#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CONFIG_SYS_RAMBOOT +#define CONFIG_SYS_TEXT_BASE 0xf8f84000 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_RESET_VECTOR_ADDRESS (CONFIG_SYS_INIT_L2_ADDR +\ + CONFIG_SYS_NAND_SPL_SIZE +\ + CONFIG_BOOTSTRAP_SIZE - 4) +#define CONFIG_ENV_IS_NOWHERE + +#undef CONFIG_PARTITIONS +#define CONFIG_CMD_CACHE +#define CONFIG_SILENT_CONSOLE +#define CONFIG_SILENT_CONSOLE_AT_BOOT + +/* These CONFIG_RAMBOOT defines can not have any text in them as they + * are converted into strings to be placed in a u-boot command */ +#define CONFIG_RAMBOOT_LOAD 0x11000000 +#define CONFIG_RAMBOOT_SIZE 0x80000 + +#if defined(CONFIG_NAND) +#define CONFIG_NAND_FSL_ELBC +/* NANDboot has a slightly different start and offset address, again these + * defines can not have any strings in them */ +#define NEW_OFFSET 0x3b000 /* SPL + BOOTSTRAP size */ +#define CONFIG_BOOTCOMMAND "nand read " MK_STR(CONFIG_RAMBOOT_LOAD)\ + " " MK_STR(NEW_OFFSET) " "\ + MK_STR(CONFIG_RAMBOOT_SIZE) "; dcache flush;"\ + " icache flush; go " MK_STR(CONFIG_RAMBOOT_LOAD) +#else +#define CONFIG_BOOTCOMMAND "echo Bootstrap without known media!\n" +#endif +#define CONFIG_BOOTDELAY 0 +#endif /* CONFIG_IN_BOOTSTRAP */ + +/* High Level Configuration Options */ +#define CONFIG_BOOKE /* BOOKE */ +#define CONFIG_E500 /* BOOKE e500 family */ +#define CONFIG_MPC85xx /* MPC8540/60/55/41/48/68/P1021 */ +#define CONFIG_P1021 /* P1021 silicon support */ +#define CONFIG_P1021MDS /* P1021MDS board specific */ + +#define CONFIG_FSL_LAW /* Use common FSL init code */ +#define CONFIG_FSL_ELBC /* Has Enhance localbus controller */ + +/* Replace a call to get_clock_freq (after it is implemented)*/ +#define CONFIG_SYS_CLK_FREQ 66666666 +#define CONFIG_DDR_CLK_FREQ CONFIG_SYS_CLK_FREQ + +/* + * These can be toggled for performance analysis, otherwise use default. + */ +#define CONFIG_L2_CACHE /* toggle L2 cache */ +#define CONFIG_BTB /* toggle branch predition */ + +#define CONFIG_HWCONFIG + +/* + * Only possible on E500 Version 2 or newer cores. + */ +#define CONFIG_ENABLE_36BIT_PHYS + +#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x1fffffff + +#define CONFIG_SYS_LBC_LBCR 0x00080000 /* Implement conversion of + addresses in the LBC */ + +/* + * Base addresses -- Note these are effective addresses where the + * actual resources get mapped (not physical addresses) + */ +#define CONFIG_SYS_CCSRBAR 0xffe00000 /* relocated CCSRBAR */ + +#if defined(CONFIG_IN_BOOTSTRAP) || defined(CONFIG_NAND_SPL) +#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ +#else +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfffe00000ull /* CCSRBAR Default */ +#else +#define CONFIG_SYS_CCSRBAR_DEFAULT 0xffe00000 +#endif +#endif + +/* CCSRBAR PHYSICAL Address */ +/* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k + SPL code*/ +#if defined(CONFIG_NAND_U_BOOT) && defined(CONFIG_NAND_SPL) +#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_DEFAULT +#else +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_CCSRBAR_PHYS 0xfffe00000ull +#else +#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* phys addr of */ +#endif +#endif +#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses */ + +/* DDR Setup */ +#define CONFIG_FSL_DDR3 +#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ +#define CONFIG_DDR_SPD +#define CONFIG_SYS_DDR_TLB_START 11 + +#define CONFIG_MEM_INIT_VALUE 0xDeadBeef + +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 + /* DDR is system memory*/ +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE + +#define CONFIG_NUM_DDR_CONTROLLERS 1 +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL 2 + +/* I2C addresses of SPD EEPROMs */ +#define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ + +/* + * Config the L2 Cache as L2 SRAM + */ +#ifdef CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_L2_SIZE (256 << 10) +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR +\ + CONFIG_SYS_L2_SIZE) +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#endif + +/* + * Memory map + * + * 0x0000_0000 0x1fff_ffff DDR3 512MB cacheable + * 0xa000_0000 0xbfff_ffff PCIE2 Mem 512MB non-cacheable + * 0xc000_0000 0xdfff_ffff PCIE1 Mem 512MB non-cacheable + * 0xffc1_0000 0xffc1_ffff PCIE2 IO range 64K non-cacheable + * 0xffc2_0000 0xffc2_ffff PCIE1 IO range 64K non-cacheable + * 0xf800_0000 0xf800_7fff BCSR on CS1 32KB non-cacheable + * 0xf801_0000 0xf801_ffff PMC1 on CS2 64KB non-cacheable + * 0xf802_0000 0xf802_ffff PMC0 on CS3 64KB non-cacheable + * 0xfc00_0000 0xfdff_ffff NAND on CS0 32MB non-cacheable + * 0xffe0_0000 0xffef_ffff CCSRBAR 1M + */ + + +/* + * Local Bus Definitions + */ + +#define CONFIG_SYS_BCSR_BASE 0xf8000000 +#define CONFIG_SYS_BCSR_BASE_PHYS CONFIG_SYS_BCSR_BASE + +#define CONFIG_SYS_PIB_PMC1_BASE 0xf8010000 + /* start of PIB-QOC3(PMC1) 64K */ +#define CONFIG_SYS_PIB_PMC1_BASE_PHYS CONFIG_SYS_PIB_PMC1_BASE + +#define CONFIG_SYS_PIB_PMC0_BASE 0xf8020000 + /* start of PIB-T1/E1(PMC0) 64K */ +#define CONFIG_SYS_PIB_PMC0_BASE_PHYS CONFIG_SYS_PIB_PMC0_BASE + +/* chip select 1 - BCSR*/ +#define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_BCSR_BASE_PHYS) \ + | BR_PS_8 | BR_V) +#define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_XACS \ + | OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR \ + | OR_GPCM_EAD) + +/* chip select 2 - PIB(QOC3-PMC1)*/ +#define CONFIG_SYS_BR2_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_PIB_PMC1_BASE_PHYS) \ + | BR_PS_8 | BR_V) +#define CONFIG_SYS_OR2_PRELIM (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS \ + | OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR \ + | OR_GPCM_EAD) + +/* chip select 3 - PIB(T1/E1-PMC0)*/ +#define CONFIG_SYS_BR3_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_PIB_PMC0_BASE_PHYS) \ + | BR_PS_8 | BR_V) +#define CONFIG_SYS_OR3_PRELIM (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS \ + | OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR \ + | OR_GPCM_EAD) + +#define CONFIG_SYS_NO_FLASH + +#ifdef CONFIG_NAND_SPL +#define CONFIG_SYS_NAND_BASE 0xFF800000 +#else +#define CONFIG_SYS_NAND_BASE 0xFC000000 +#endif +#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, } +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS 1 +#define CONFIG_MTD_NAND_VERIFY_WRITE +#define CONFIG_CMD_NAND +#define CONFIG_NAND_FSL_ELBC +#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) + +/* NAND boot: 4K NAND loader config */ +#define CONFIG_SYS_NAND_SPL_SIZE 0x4000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE (CONFIG_BOOTSTRAP_SIZE +\ + CONFIG_SYS_NAND_SPL_SIZE) +#define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR) +#define CONFIG_SYS_NAND_U_BOOT_START (CONFIG_SYS_NAND_U_BOOT_DST +\ + CONFIG_SYS_NAND_U_BOOT_SIZE - 4) +#define CONFIG_SYS_NAND_U_BOOT_OFFS (0) +#define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x5000) +#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) + +/* NAND FLASH CONFIG */ +#define CONFIG_SYS_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE_PHYS \ + | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ + | BR_PS_8 /* Port Size = 8 bit */ \ + | BR_MS_FCM /* MSEL = FCM */ \ + | BR_V) /* valid */ +#define CONFIG_SYS_NAND_OR_PRELIM (0xFFF80000 /* length 32K */ \ + | OR_FCM_CSCT \ + | OR_FCM_CST \ + | OR_FCM_CHT \ + | OR_FCM_SCY_1 \ + | OR_FCM_TRLX \ + | OR_FCM_EHTR) +/* chip select 0 - NAND */ +#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ + +#define CONFIG_SYS_INIT_RAM_LOCK 1 +#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of area in RAM */ + +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ + +/* Serial Port */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SERIAL_MULTI +#undef CONFIG_SERIAL_SOFTWARE_FIFO +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */ + +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} + +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) +#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) +#ifdef CONFIG_NAND_SPL +#define CONFIG_NS16550_MIN_FUNCTIONS +#endif + +#define CONFIG_BAUDRATE 115200 + +/* Use the HUSH parser*/ +#ifndef CONFIG_IN_BOOTSTRAP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#endif + +/* + * I2C + */ +#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ +#define CONFIG_HARD_I2C /* I2C with hardware support*/ +#undef CONFIG_SOFT_I2C /* I2C bit-banged */ +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* Don't probe these addrs */ +#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C2_OFFSET 0x3100 + +/* + * Environment + */ +#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE +#if defined(CONFIG_NAND) +#ifndef CONFIG_IN_BOOTSTRAP +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET (1024 * 1024) +#endif +#define CONFIG_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR +\ + CONFIG_BOOTSTRAP_SIZE +\ + CONFIG_SYS_NAND_SPL_SIZE) +#endif + +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_CMDLINE_EDITING /* Command-line editing */ +#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#endif +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT)+16) + /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + /* Boot Argument Buffer Size */ + +/*********************************/ + +#define CONFIG_MP /* Multiprocessor support */ + +#ifndef CONFIG_IN_BOOTSTRAP +#define CONFIG_PCI /* Enable PCI/PCIE */ +#define CONFIG_PCIE1 /* PCIE controller */ +#define CONFIG_PCIE2 /* PCIE controller */ +#define CONFIG_FSL_PCI_INIT /* use common fsl pci init code */ +#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ +#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_TSEC_ENET /* tsec ethernet support */ + +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP +#define CONFIG_OF_STDOUT_VIA_ALIAS + +#define CONFIG_SYS_64BIT_VSPRINTF +#define CONFIG_SYS_64BIT_STRTOUL + +/* new uImage format support */ +#define CONFIG_FIT +#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ +#endif + +/* TSEC support */ +#if defined(CONFIG_TSEC_ENET) + +#ifndef CONFIG_NET_MULTI +#define CONFIG_NET_MULTI +#endif + +#define CONFIG_MII /* MII PHY management */ +#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ +#define CONFIG_TSEC1 +#define CONFIG_TSEC1_NAME "eTSEC1" +#define CONFIG_TSEC2 +#define CONFIG_TSEC2_NAME "eTSEC2" +#define CONFIG_TSEC3 +#define CONFIG_TSEC3_NAME "eTSEC3" + +#define TSEC1_PHY_ADDR 0 +#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) +#define TSEC1_PHYIDX 0 + +#define TSEC2_PHY_ADDR 4 +#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_SGMII) +#define TSEC2_PHYIDX 0 + +#ifdef CONFIG_TSEC3_IN_SGMII /* Need to set SW8.6 to 0 */ +#define TSEC3_PHY_ADDR 6 +#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_SGMII) +#else +#define TSEC3_PHY_ADDR 1 +#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) +#endif +#define TSEC3_PHYIDX 0 + +#define CONFIG_ETHPRIME "eTSEC1" + +#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ +#endif /* CONFIG_TSEC_ENET */ + +#ifndef CONFIG_IN_BOOTSTRAP +#define CONFIG_QE +#endif + +#ifdef CONFIG_QE +/* QE microcode/firmware address */ +#define CONFIG_SYS_QE_FW_IN_NAND 0x1f00000 +#define CONFIG_SYS_QE_FW_ADDR 0x10000000 +#define CONFIG_SYS_QE_FW_LENGTH 0x10000 + +/* + * QE UEC ethernet configuration + */ +#define CONFIG_MIIM_ADDRESS (CONFIG_SYS_CCSRBAR + 0x82120) + +#define CONFIG_UEC_ETH +#define CONFIG_PHY_MODE_NEED_CHANGE + +#define CONFIG_UEC_ETH1 /* GETH1 */ +#define CONFIG_HAS_ETH0 + +#ifdef CONFIG_UEC_ETH1 +#define CONFIG_SYS_UEC1_UCC_NUM 0 /* UCC1 */ +#define CONFIG_SYS_UEC1_RX_CLK QE_CLK12 /* CLK12 for MII */ +#define CONFIG_SYS_UEC1_TX_CLK QE_CLK9 /* CLK9 for MII */ +#define CONFIG_SYS_UEC1_ETH_TYPE FAST_ETH +#define CONFIG_SYS_UEC1_PHY_ADDR 0x0 /* 0x0 for MII */ +#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_MII +#define CONFIG_SYS_UEC1_INTERFACE_SPEED 100 +#endif /* CONFIG_UEC_ETH1 */ + +#define CONFIG_UEC_ETH5 /* GETH5 */ +#define CONFIG_HAS_ETH1 + +#ifdef CONFIG_UEC_ETH5 +#define CONFIG_SYS_UEC5_UCC_NUM 4 /* UCC5 */ +#define CONFIG_SYS_UEC5_RX_CLK QE_CLK_NONE +#define CONFIG_SYS_UEC5_TX_CLK QE_CLK13 /* CLK 13 for RMII */ +#define CONFIG_SYS_UEC5_ETH_TYPE FAST_ETH +#define CONFIG_SYS_UEC5_PHY_ADDR 0x3 /* 0x3 for RMII */ +#define CONFIG_SYS_UEC5_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII +#define CONFIG_SYS_UEC5_INTERFACE_SPEED 100 +#endif /* CONFIG_UEC_ETH2 */ + +#endif /* CONFIG_QE */ +/* + * I2C2 EEPROM + */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_BUS_NUM 1 + +#define PLPPAR1_I2C_BIT_MASK 0x0000000F +#define PLPPAR1_I2C2_VAL 0x00000000 +#define PLPPAR1_ESDHC_VAL 0x0000000A +#define PLPDIR1_I2C_BIT_MASK 0x0000000F +#define PLPDIR1_I2C2_VAL 0x0000000F +#define PLPDIR1_ESDHC_VAL 0x00000006 + +/* + * General PCI + * Memory Addresses are mapped 1-1. I/O is mapped from 0 + */ +#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 +#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64K */ + +#define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000 +#define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000 +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_VIRT 0xffc20000 +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64K */ + +#if defined(CONFIG_PCI) +#define CONFIG_PCI_PNP /* do pci plug-and-play */ +#endif + +#ifndef CONFIG_IN_BOOTSTRAP +#define CONFIG_E1000 /* Enable E1000 PCI Ethernet Card */ + +#define CONFIG_LOADS_ECHO /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ +#endif + + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + +#ifndef CONFIG_IN_BOOTSTRAP +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_PING +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_ELF +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_SETEXPR + +#if defined(CONFIG_PCI) + #define CONFIG_CMD_PCI +#endif +#endif /* CONFIG_IN_BOOTSTRAP */ + + +#undef CONFIG_WATCHDOG /* watchdog disabled */ + +#define CONFIG_BOARD_EARLY_INIT_F /* Call board_pre_init */ + +#define CONFIG_MMC +#ifdef CONFIG_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#ifndef CONFIG_IN_BOOTSTRAP +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#endif +#endif + +/* + * For booting Linux, the board info and command line data + * have to be in the first 16 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) + /* Initial Memory map for Linux*/ + +/* + * Internal Definitions + * + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ +#endif + +/* + * Environment Configuration + */ +#define CONFIG_HOSTNAME p1021mds +#define CONFIG_ROOTPATH /nfsroot +#define CONFIG_BOOTFILE uImage + +#define CONFIG_LOADADDR 1000000 /*default location for tftp and bootm*/ + +#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "consoledev=ttyS0\0" \ + "ramdiskaddr=2000000\0" \ + "ramdiskfile=rootfs.ext2.gz.uboot\0" \ + "fdtaddr=c00000\0" \ + "fdtfile=p1021mds.dtb\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$serverip:$rootpath " \ + "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ + "console=$consoledev,$baudrate $othbootargs\0" \ + "ramargs=setenv bootargs root=/dev/ram rw " \ + "console=$consoledev,$baudrate $othbootargs\0" \ + "hwconfig=fsl_ddr:ctrl_intlv=null\0" \ + +#define CONFIG_NFSBOOTCOMMAND \ + "run nfsargs;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" + +#define CONFIG_RAMBOOTCOMMAND \ + "run ramargs;" \ + "tftp $ramdiskaddr $ramdiskfile;" \ + "tftp $loadaddr $bootfile;" \ + "bootm $loadaddr $ramdiskaddr" + +#ifndef CONFIG_IN_BOOTSTRAP +#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ +#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND +#endif + +#endif /* __CONFIG_H */ diff --git a/nand_spl/board/freescale/p1021mds/Makefile b/nand_spl/board/freescale/p1021mds/Makefile new file mode 100644 index 0000000..fb63da2 --- /dev/null +++ b/nand_spl/board/freescale/p1021mds/Makefile @@ -0,0 +1,137 @@ +# +# Copyright (C) 2010-2011 Freescale Semiconductor, Inc. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +NAND_SPL := y +PAD_TO := 0xff804000 + +include $(TOPDIR)/config.mk + +nandobj := $(OBJTREE)/nand_spl/ + +LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds +LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) $(LDFLAGS) \ + $(LDFLAGS_FINAL) +AFLAGS += -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_NAND_SPL + +SOBJS = start.o resetvec.o +COBJS = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \ + nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o + +SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +all: $(obj).depend $(ALL) + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) + $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@ + +# create symbolic links for common files + +$(obj)cache.c: + @rm -f $(obj)cache.c + ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $(obj)cache.c + +$(obj)cpu_init_early.c: + @rm -f $(obj)cpu_init_early.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c \ + $(obj)cpu_init_early.c + +$(obj)cpu_init_nand.c: + @rm -f $(obj)cpu_init_nand.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c \ + $(obj)cpu_init_nand.c + +$(obj)fsl_law.c: + @rm -f $(obj)fsl_law.c + ln -sf $(SRCTREE)/drivers/misc/fsl_law.c $(obj)fsl_law.c + +$(obj)law.c: + @rm -f $(obj)law.c + ln -sf $(SRCTREE)/board/$(BOARDDIR)/law.c $(obj)law.c + +$(obj)nand_boot_fsl_elbc.c: + @rm -f $(obj)nand_boot_fsl_elbc.c + ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \ + $(obj)nand_boot_fsl_elbc.c + +$(obj)ns16550.c: + @rm -f $(obj)ns16550.c + ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c + +$(obj)resetvec.S: + @rm -f $(obj)resetvec.S + ln -s $(SRCTREE)/arch/powerpc/cpu/$(CPU)/resetvec.S $(obj)resetvec.S + +$(obj)fixed_ivor.S: + @rm -f $(obj)fixed_ivor.S + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/fixed_ivor.S \ + $(obj)fixed_ivor.S + +$(obj)start.S: $(obj)fixed_ivor.S + @rm -f $(obj)start.S + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/start.S $(obj)start.S + +$(obj)tlb.c: + @rm -f $(obj)tlb.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/tlb.c $(obj)tlb.c + +$(obj)tlb_table.c: + @rm -f $(obj)tlb_table.c + ln -sf $(SRCTREE)/board/$(BOARDDIR)/tlb.c $(obj)tlb_table.c + +ifneq ($(OBJTREE), $(SRCTREE)) +$(obj)nand_boot.c: + @rm -f $(obj)nand_boot.c + ln -s $(SRCTREE)/nand_spl/board/$(BOARDDIR)/nand_boot.c \ + $(obj)nand_boot.c +endif + +######################################################################### + +$(obj)%.o: $(obj)%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(obj)%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/nand_spl/board/freescale/p1021mds/nand_boot.c b/nand_spl/board/freescale/p1021mds/nand_boot.c new file mode 100644 index 0000000..a52b50a --- /dev/null +++ b/nand_spl/board/freescale/p1021mds/nand_boot.c @@ -0,0 +1,69 @@ +/* + * Copyright 2010-2011 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <mpc85xx.h> +#include <asm/io.h> +#include <ns16550.h> +#include <nand.h> +#include <asm/mmu.h> +#include <asm/immap_85xx.h> + +DECLARE_GLOBAL_DATA_PTR; + +void board_init_f(ulong bootflag) +{ + uint plat_ratio, bus_clk, sys_clk = 0; + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + + sys_clk = CONFIG_SYS_CLK_FREQ; + + plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; + plat_ratio >>= 1; + bus_clk = plat_ratio * sys_clk; + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + bus_clk / 16 / CONFIG_BAUDRATE); + + puts("\nNAND boot... "); + /* copy code to DDR and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, + CONFIG_SYS_NAND_U_BOOT_RELOC); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + nand_boot(); +} + +void putc(char c) +{ + if (c == '\n') + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); + + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); +} + +void puts(const char *str) +{ + while (*str) + putc(*str++); +}
On Thursday, June 02, 2011 15:27:29 y@right.am.freescale.net wrote:
Just setting CONFIG_SILENT_CONSOLE does not make the CONSOLE silent without the silent env variable set. This adds a new define to add this to the default environment easily
any reason you couldnt add silent=0 to CONFIG_EXTRA_ENV_SETTINGS ? -mike
On Thu, Jun 2, 2011 at 11:48 PM, Mike Frysinger vapier@gentoo.org wrote:
any reason you couldnt add silent=0 to CONFIG_EXTRA_ENV_SETTINGS ?
I was just perturbed that setting CONFIG_SILENT_CONSOLE did not actually make the console silent - I thought it would be cleaner to have a define available for this. This is an optional patch though in that sense
-M
On Friday, June 03, 2011 14:34:27 McClintock Matthew-B29882 wrote:
On Thu, Jun 2, 2011 at 11:48 PM, Mike Frysinger wrote:
any reason you couldnt add silent=0 to CONFIG_EXTRA_ENV_SETTINGS ?
I was just perturbed that setting CONFIG_SILENT_CONSOLE did not actually make the console silent - I thought it would be cleaner to have a define available for this.
i know people are surprised by this from time to time, but i think the README is pretty clear about it. is there clarification there that you'd like ?
since CONFIG_EXTRA_ENV_SETTINGS is board-specific, i'm not sure adding another board-specific define for a single default env var gains us anything. -mike
On Fri, Jun 3, 2011 at 2:16 PM, Mike Frysinger vapier@gentoo.org wrote:
On Thu, Jun 2, 2011 at 11:48 PM, Mike Frysinger wrote:
any reason you couldnt add silent=0 to CONFIG_EXTRA_ENV_SETTINGS ?
I was just perturbed that setting CONFIG_SILENT_CONSOLE did not actually make the console silent - I thought it would be cleaner to have a define available for this.
i know people are surprised by this from time to time, but i think the README is pretty clear about it. is there clarification there that you'd like ?
since CONFIG_EXTRA_ENV_SETTINGS is board-specific, i'm not sure adding another board-specific define for a single default env var gains us anything.
Not really too concerned either way here.
Some of our boards have some really long CONFIG_EXTRA_ENV_SETTINGS and it's nice to try to keep that shorter by moving stuff into CONFIG_NFSBOOTCOMMAND, CONFIG_RAMBOOTCOMMAD, CONFIG_SILENT_CONSOLE_AT_BOOT, etc. but beyond that we can just add to our CONFIG_EXTRA_ENV_SETTINGS as well.
On Friday, June 03, 2011 16:14:29 McClintock Matthew-B29882 wrote:
On Fri, Jun 3, 2011 at 2:16 PM, Mike Frysinger wrote:
On Thu, Jun 2, 2011 at 11:48 PM, Mike Frysinger wrote:
any reason you couldnt add silent=0 to CONFIG_EXTRA_ENV_SETTINGS ?
I was just perturbed that setting CONFIG_SILENT_CONSOLE did not actually make the console silent - I thought it would be cleaner to have a define available for this.
i know people are surprised by this from time to time, but i think the README is pretty clear about it. is there clarification there that you'd like ?
since CONFIG_EXTRA_ENV_SETTINGS is board-specific, i'm not sure adding another board-specific define for a single default env var gains us anything.
Not really too concerned either way here.
Some of our boards have some really long CONFIG_EXTRA_ENV_SETTINGS and it's nice to try to keep that shorter by moving stuff into CONFIG_NFSBOOTCOMMAND, CONFIG_RAMBOOTCOMMAD, CONFIG_SILENT_CONSOLE_AT_BOOT, etc. but beyond that we can just add to our CONFIG_EXTRA_ENV_SETTINGS as well.
we had a similar thing with Blackfin boards, but we just made it our own set of defines that eventually culminated in a single CONFIG_EXTRA_ENV_SETTINGS
*shrug* -mike
Dear y@right.am.freescale.net,
In message <1307042852-10385-1-git-send-email-y> you wrote:
From: Matthew McClintock msm@freescale.com
Just setting CONFIG_SILENT_CONSOLE does not make the CONSOLE silent without the silent env variable set. This adds a new define to add this to the default environment easily
Mike has explained why: I NAK this, too.
Best regards,
Wolfgang Denk
participants (5)
-
Matthew McClintock -
McClintock Matthew-B29882 -
Mike Frysinger -
Wolfgang Denk -
y＠right.am.freescale.net