[U-Boot] [PATCH 01/11] zipitz2: restore board support
zipitz2 was dropped in 49d8899ba9c26335e4a12e01c18028fc5e40c796
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- arch/arm/Kconfig | 5 ++ board/zipitz2/Kconfig | 9 ++ board/zipitz2/MAINTAINERS | 6 ++ board/zipitz2/Makefile | 10 +++ board/zipitz2/zipitz2.c | 200 +++++++++++++++++++++++++++++++++++++++++ configs/zipitz2_defconfig | 7 ++ include/configs/zipitz2.h | 224 ++++++++++++++++++++++++++++++++++++++++++++++ 7 files changed, 461 insertions(+) create mode 100644 board/zipitz2/Kconfig create mode 100644 board/zipitz2/MAINTAINERS create mode 100644 board/zipitz2/Makefile create mode 100644 board/zipitz2/zipitz2.c create mode 100644 configs/zipitz2_defconfig create mode 100644 include/configs/zipitz2.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e5f57ef..882a818 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -686,6 +686,10 @@ config TARGET_H2200 bool "Support h2200" select CPU_PXA
+config TARGET_ZIPITZ2 + bool "Support zipitz2" + select CPU_PXA + config TARGET_COLIBRI_PXA270 bool "Support colibri_pxa270" select CPU_PXA @@ -859,6 +863,7 @@ source "board/technologic/ts4800/Kconfig" source "board/vscom/baltos/Kconfig" source "board/woodburn/Kconfig" source "board/work-microwave/work_92105/Kconfig" +source "board/zipitz2/Kconfig"
source "arch/arm/Kconfig.debug"
diff --git a/board/zipitz2/Kconfig b/board/zipitz2/Kconfig new file mode 100644 index 0000000..c663504 --- /dev/null +++ b/board/zipitz2/Kconfig @@ -0,0 +1,9 @@ +if TARGET_ZIPITZ2 + +config SYS_BOARD + default "zipitz2" + +config SYS_CONFIG_NAME + default "zipitz2" + +endif diff --git a/board/zipitz2/MAINTAINERS b/board/zipitz2/MAINTAINERS new file mode 100644 index 0000000..e027cd3 --- /dev/null +++ b/board/zipitz2/MAINTAINERS @@ -0,0 +1,6 @@ +ZIPITZ2 BOARD +M: Vasily Khoruzhick anarsoul@gmail.com +S: Maintained +F: board/zipitz2/ +F: include/configs/zipitz2.h +F: configs/zipitz2_defconfig diff --git a/board/zipitz2/Makefile b/board/zipitz2/Makefile new file mode 100644 index 0000000..855f6bc --- /dev/null +++ b/board/zipitz2/Makefile @@ -0,0 +1,10 @@ +# +# Copyright (C) 2009 +# Marek Vasut marek.vasut@gmail.com +# +# Heavily based on pxa255_idp platform +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := zipitz2.o diff --git a/board/zipitz2/zipitz2.c b/board/zipitz2/zipitz2.c new file mode 100644 index 0000000..8fa1261 --- /dev/null +++ b/board/zipitz2/zipitz2.c @@ -0,0 +1,200 @@ +/* + * Copyright (C) 2009 + * Marek Vasut marek.vasut@gmail.com + * + * Heavily based on pxa255_idp platform + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <command.h> +#include <serial.h> +#include <asm/arch/hardware.h> +#include <asm/arch/pxa.h> +#include <asm/arch/regs-mmc.h> +#include <spi.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_CMD_SPI +void lcd_start(void); +#else +inline void lcd_start(void) {}; +#endif + +/* + * Miscelaneous platform dependent initialisations + */ +int board_init(void) +{ + /* We have RAM, disable cache */ + dcache_disable(); + icache_disable(); + + /* arch number of Z2 */ + gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = 0xa0000100; + + /* Enable LCD */ + lcd_start(); + + return 0; +} + +int dram_init(void) +{ + pxa2xx_dram_init(); + gd->ram_size = PHYS_SDRAM_1_SIZE; + return 0; +} + +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; +} + +#ifdef CONFIG_CMD_MMC +int board_mmc_init(bd_t *bis) +{ + pxa_mmc_register(0); + return 0; +} +#endif + +#ifdef CONFIG_CMD_SPI + +struct { + unsigned char reg; + unsigned short data; + unsigned char mdelay; +} lcd_data[] = { + { 0x07, 0x0000, 0 }, + { 0x13, 0x0000, 10 }, + { 0x11, 0x3004, 0 }, + { 0x14, 0x200F, 0 }, + { 0x10, 0x1a20, 0 }, + { 0x13, 0x0040, 50 }, + { 0x13, 0x0060, 0 }, + { 0x13, 0x0070, 200 }, + { 0x01, 0x0127, 0 }, + { 0x02, 0x0700, 0 }, + { 0x03, 0x1030, 0 }, + { 0x08, 0x0208, 0 }, + { 0x0B, 0x0620, 0 }, + { 0x0C, 0x0110, 0 }, + { 0x30, 0x0120, 0 }, + { 0x31, 0x0127, 0 }, + { 0x32, 0x0000, 0 }, + { 0x33, 0x0503, 0 }, + { 0x34, 0x0727, 0 }, + { 0x35, 0x0124, 0 }, + { 0x36, 0x0706, 0 }, + { 0x37, 0x0701, 0 }, + { 0x38, 0x0F00, 0 }, + { 0x39, 0x0F00, 0 }, + { 0x40, 0x0000, 0 }, + { 0x41, 0x0000, 0 }, + { 0x42, 0x013f, 0 }, + { 0x43, 0x0000, 0 }, + { 0x44, 0x013f, 0 }, + { 0x45, 0x0000, 0 }, + { 0x46, 0xef00, 0 }, + { 0x47, 0x013f, 0 }, + { 0x48, 0x0000, 0 }, + { 0x07, 0x0015, 30 }, + { 0x07, 0x0017, 0 }, + { 0x20, 0x0000, 0 }, + { 0x21, 0x0000, 0 }, + { 0x22, 0x0000, 0 }, +}; + +void zipitz2_spi_sda(int set) +{ + /* GPIO 13 */ + if (set) + writel((1 << 13), GPSR0); + else + writel((1 << 13), GPCR0); +} + +void zipitz2_spi_scl(int set) +{ + /* GPIO 22 */ + if (set) + writel((1 << 22), GPCR0); + else + writel((1 << 22), GPSR0); +} + +unsigned char zipitz2_spi_read(void) +{ + /* GPIO 40 */ + return !!(readl(GPLR1) & (1 << 8)); +} + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + /* Always valid */ + return 1; +} + +void spi_cs_activate(struct spi_slave *slave) +{ + /* GPIO 88 low */ + writel((1 << 24), GPCR2); +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + /* GPIO 88 high */ + writel((1 << 24), GPSR2); +} + +void lcd_start(void) +{ + int i; + unsigned char reg[3] = { 0x74, 0x00, 0 }; + unsigned char data[3] = { 0x76, 0, 0 }; + unsigned char dummy[3] = { 0, 0, 0 }; + + /* PWM2 AF */ + writel(readl(GAFR0_L) | 0x00800000, GAFR0_L); + /* Enable clock to all PWM */ + writel(readl(CKEN) | 0x3, CKEN); + /* Configure PWM2 */ + writel(0x4f, PWM_CTRL2); + writel(0x2ff, PWM_PWDUTY2); + writel(792, PWM_PERVAL2); + + /* Toggle the reset pin to reset the LCD */ + writel((1 << 19), GPSR0); + udelay(100000); + writel((1 << 19), GPCR0); + udelay(20000); + writel((1 << 19), GPSR0); + udelay(20000); + + /* Program the LCD init sequence */ + for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) { + reg[0] = 0x74; + reg[1] = 0x0; + reg[2] = lcd_data[i].reg; + spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END); + + data[0] = 0x76; + data[1] = lcd_data[i].data >> 8; + data[2] = lcd_data[i].data & 0xff; + spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END); + + if (lcd_data[i].mdelay) + udelay(lcd_data[i].mdelay * 1000); + } + + writel((1 << 11), GPSR0); +} +#endif diff --git a/configs/zipitz2_defconfig b/configs/zipitz2_defconfig new file mode 100644 index 0000000..2977ccc --- /dev/null +++ b/configs/zipitz2_defconfig @@ -0,0 +1,7 @@ +CONFIG_ARM=y +CONFIG_TARGET_ZIPITZ2=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_SYS_PROMPT="$ " diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h new file mode 100644 index 0000000..586a445 --- /dev/null +++ b/include/configs/zipitz2.h @@ -0,0 +1,224 @@ +/* + * Aeronix Zipit Z2 configuration file + * + * Copyright (C) 2009-2010 Marek Vasut marek.vasut@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Board Configuration Options + */ +#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ +#define CONFIG_SYS_TEXT_BASE 0x0 + +#undef CONFIG_BOARD_LATE_INIT +#undef CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_PREBOOT + +/* + * Environment settings + */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR 0x40000 +#define CONFIG_ENV_SIZE 0x10000 + +#define CONFIG_SYS_DCACHE_OFF + +#define CONFIG_SYS_MALLOC_LEN (128*1024) +#define CONFIG_ARCH_CPU_INIT + +#define CONFIG_BOOTCOMMAND \ + "if mmc rescan && ext2load mmc 0 0xa0000000 boot/uboot.script ;"\ + "then " \ + "source 0xa0000000; " \ + "else " \ + "bootm 0x50000; " \ + "fi; " +#define CONFIG_BOOTARGS \ + "console=tty0 console=ttyS2,115200 fbcon=rotate:3" +#define CONFIG_TIMESTAMP +#define CONFIG_BOOTDELAY 2 /* Autoboot delay */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_SYS_TEXT_BASE 0x0 +#define CONFIG_LZMA /* LZMA compression support */ + +/* + * Serial Console Configuration + * STUART - the lower serial port on Colibri board + */ +#define CONFIG_PXA_SERIAL +#define CONFIG_STUART 1 +#define CONFIG_CONS_INDEX 2 +#define CONFIG_BAUDRATE 115200 + +/* + * Bootloader Components Configuration + */ +#define CONFIG_CMD_ENV +#define CONFIG_CMD_MMC +#define CONFIG_CMD_SPI + +/* + * MMC Card Configuration + */ +#ifdef CONFIG_CMD_MMC +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_PXA_MMC_GENERIC +#define CONFIG_SYS_MMC_BASE 0xF0000000 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 +#define CONFIG_DOS_PARTITION +#endif + +/* + * SPI and LCD + */ +#ifdef CONFIG_CMD_SPI +#define CONFIG_SOFT_SPI +#define CONFIG_LCD +#define CONFIG_PXA_LCD +#define CONFIG_LMS283GF05 + +#define SPI_DELAY udelay(10) +#define SPI_SDA(val) zipitz2_spi_sda(val) +#define SPI_SCL(val) zipitz2_spi_scl(val) +#define SPI_READ zipitz2_spi_read() +#ifndef __ASSEMBLY__ +void zipitz2_spi_sda(int); +void zipitz2_spi_scl(int); +unsigned char zipitz2_spi_read(void); +#endif +#endif + +/* + * HUSH Shell Configuration + */ +#define CONFIG_SYS_HUSH_PARSER 1 + +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_DEVICE_NULLDEV 1 + +/* + * Clock Configuration + */ +#define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */ + +/* + * SRAM Map + */ +#define PHYS_SRAM 0x5c000000 /* SRAM Bank #1 */ +#define PHYS_SRAM_SIZE 0x00040000 /* 256k */ + +/* + * DRAM Map + */ +#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ +#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ + +#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ +#define CONFIG_SYS_DRAM_SIZE 0x02000000 /* 32 MB DRAM */ + +#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ + +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SRAM + 2048) + +/* + * NOR FLASH + */ +#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ +#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */ +#define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */ +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 + +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT + +#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 +#define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 256 + +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 + +#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 +#define CONFIG_SYS_FLASH_WRITE_TOUT 240000 +#define CONFIG_SYS_FLASH_LOCK_TOUT 240000 +#define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000 +#define CONFIG_SYS_FLASH_PROTECTION + +/* + * GPIO settings + */ +#define CONFIG_SYS_GAFR0_L_VAL 0x02000140 +#define CONFIG_SYS_GAFR0_U_VAL 0x59188000 +#define CONFIG_SYS_GAFR1_L_VAL 0x63900002 +#define CONFIG_SYS_GAFR1_U_VAL 0xaaa03950 +#define CONFIG_SYS_GAFR2_L_VAL 0x0aaaaaaa +#define CONFIG_SYS_GAFR2_U_VAL 0x29000308 +#define CONFIG_SYS_GAFR3_L_VAL 0x54000000 +#define CONFIG_SYS_GAFR3_U_VAL 0x000000d5 +#define CONFIG_SYS_GPCR0_VAL 0x00000000 +#define CONFIG_SYS_GPCR1_VAL 0x00000020 +#define CONFIG_SYS_GPCR2_VAL 0x00000000 +#define CONFIG_SYS_GPCR3_VAL 0x00000000 +#define CONFIG_SYS_GPDR0_VAL 0xdafcee00 +#define CONFIG_SYS_GPDR1_VAL 0xffa3aaab +#define CONFIG_SYS_GPDR2_VAL 0x8fe9ffff +#define CONFIG_SYS_GPDR3_VAL 0x001b1f8a +#define CONFIG_SYS_GPSR0_VAL 0x06080400 +#define CONFIG_SYS_GPSR1_VAL 0x007f0000 +#define CONFIG_SYS_GPSR2_VAL 0x032a0000 +#define CONFIG_SYS_GPSR3_VAL 0x00000180 + +#define CONFIG_SYS_PSSR_VAL 0x30 + +/* + * Clock settings + */ +#define CONFIG_SYS_CKEN 0x00511220 +#define CONFIG_SYS_CCCR 0x00000190 + +/* + * Memory settings + */ +#define CONFIG_SYS_MSC0_VAL 0x2ffc38f8 +#define CONFIG_SYS_MSC1_VAL 0x0000ccd1 +#define CONFIG_SYS_MSC2_VAL 0x0000b884 +#define CONFIG_SYS_MDCNFG_VAL 0x08000ba9 +#define CONFIG_SYS_MDREFR_VAL 0x2011a01e +#define CONFIG_SYS_MDMRS_VAL 0x00000000 +#define CONFIG_SYS_FLYCNFG_VAL 0x00010001 +#define CONFIG_SYS_SXCNFG_VAL 0x40044004 + +/* + * PCMCIA and CF Interfaces + */ +#define CONFIG_SYS_MECR_VAL 0x00000001 +#define CONFIG_SYS_MCMEM0_VAL 0x00014307 +#define CONFIG_SYS_MCMEM1_VAL 0x00014307 +#define CONFIG_SYS_MCATT0_VAL 0x0001c787 +#define CONFIG_SYS_MCATT1_VAL 0x0001c787 +#define CONFIG_SYS_MCIO0_VAL 0x0001430f +#define CONFIG_SYS_MCIO1_VAL 0x0001430f + +#include "pxa-common.h" + +#endif /* __CONFIG_H */
z2's screen is rotated by 270 degrees
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- drivers/video/pxa_lcd.c | 1 + include/configs/zipitz2.h | 1 + 2 files changed, 2 insertions(+)
diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c index 2799425..1809fc6 100644 --- a/drivers/video/pxa_lcd.c +++ b/drivers/video/pxa_lcd.c @@ -175,6 +175,7 @@ vidinfo_t panel_info = { vidinfo_t panel_info = { .vl_col = 240, .vl_row = 320, + .vl_rot = 3, .vl_width = 240, .vl_height = 320, .vl_clkp = CONFIG_SYS_HIGH, diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 586a445..169eaf3 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -83,6 +83,7 @@ #ifdef CONFIG_CMD_SPI #define CONFIG_SOFT_SPI #define CONFIG_LCD +#define CONFIG_LCD_ROTATION #define CONFIG_PXA_LCD #define CONFIG_LMS283GF05
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
z2's screen is rotated by 270 degrees
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
drivers/video/pxa_lcd.c | 1 + include/configs/zipitz2.h | 1 + 2 files changed, 2 insertions(+)
diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c index 2799425..1809fc6 100644 --- a/drivers/video/pxa_lcd.c +++ b/drivers/video/pxa_lcd.c @@ -175,6 +175,7 @@ vidinfo_t panel_info = { vidinfo_t panel_info = { .vl_col = 240, .vl_row = 320,
- .vl_rot = 3, .vl_width = 240, .vl_height = 320, .vl_clkp = CONFIG_SYS_HIGH,
Someone should rewrite the entire pxa_lcd driver to cfb-console API and DM, but yeah:
Acked-by: Marek Vasut marex@denx.de
Best regards, Marek Vasut
On Sun, Mar 20, 2016 at 06:37:01PM -0700, Vasily Khoruzhick wrote:
z2's screen is rotated by 270 degrees
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com Acked-by: Marek Vasut marex@denx.de
Applied to u-boot/master, thanks!
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- drivers/video/pxa_lcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c index 1809fc6..ba4f897 100644 --- a/drivers/video/pxa_lcd.c +++ b/drivers/video/pxa_lcd.c @@ -166,7 +166,7 @@ vidinfo_t panel_info = { #ifdef CONFIG_LMS283GF05
# define LCD_BPP LCD_COLOR8 -/*# define LCD_INVERT_COLORS*/ +# define LCD_INVERT_COLORS
/* you have to set lccr0 and lccr3 (including pcd) */ # define REG_LCCR0 0x043008f8
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
What happens if you display picture ? Will the colors be complete mess ?
drivers/video/pxa_lcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c index 1809fc6..ba4f897 100644 --- a/drivers/video/pxa_lcd.c +++ b/drivers/video/pxa_lcd.c @@ -166,7 +166,7 @@ vidinfo_t panel_info = { #ifdef CONFIG_LMS283GF05
# define LCD_BPP LCD_COLOR8 -/*# define LCD_INVERT_COLORS*/ +# define LCD_INVERT_COLORS
/* you have to set lccr0 and lccr3 (including pcd) */ # define REG_LCCR0 0x043008f8
On Sun, Mar 20, 2016 at 6:48 PM, Marek Vasut marex@denx.de wrote:
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
What happens if you display picture ? Will the colors be complete mess ?
Yes, inverted. Can be fixed by inverting colors in BMP. I didn't find another way to get white on black console in u-boot.
drivers/video/pxa_lcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c index 1809fc6..ba4f897 100644 --- a/drivers/video/pxa_lcd.c +++ b/drivers/video/pxa_lcd.c @@ -166,7 +166,7 @@ vidinfo_t panel_info = { #ifdef CONFIG_LMS283GF05
# define LCD_BPP LCD_COLOR8 -/*# define LCD_INVERT_COLORS*/ +# define LCD_INVERT_COLORS
/* you have to set lccr0 and lccr3 (including pcd) */ # define REG_LCCR0 0x043008f8
-- Best regards, Marek Vasut
On 03/21/2016 03:10 AM, Vasily Khoruzhick wrote:
On Sun, Mar 20, 2016 at 6:48 PM, Marek Vasut marex@denx.de wrote:
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
What happens if you display picture ? Will the colors be complete mess ?
Yes, inverted. Can be fixed by inverting colors in BMP. I didn't find another way to get white on black console in u-boot.
CONFIG_SYS_WHITE_ON_BLACK might help.
drivers/video/pxa_lcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c index 1809fc6..ba4f897 100644 --- a/drivers/video/pxa_lcd.c +++ b/drivers/video/pxa_lcd.c @@ -166,7 +166,7 @@ vidinfo_t panel_info = { #ifdef CONFIG_LMS283GF05
# define LCD_BPP LCD_COLOR8 -/*# define LCD_INVERT_COLORS*/ +# define LCD_INVERT_COLORS
/* you have to set lccr0 and lccr3 (including pcd) */ # define REG_LCCR0 0x043008f8
-- Best regards, Marek Vasut
On Sun, Mar 20, 2016 at 06:37:02PM -0700, Vasily Khoruzhick wrote:
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Applied to u-boot/master, thanks!
On 03/28/2016 12:29 AM, Tom Rini wrote:
On Sun, Mar 20, 2016 at 06:37:02PM -0700, Vasily Khoruzhick wrote:
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Applied to u-boot/master, thanks!
NAK.
This actually breaks the correct behavior of the PXA framebuffer driver. Please do not ignore comments which these patches have. I will pick them through the PXA tree when this is sorted out.
On Mon, Mar 28, 2016 at 01:26:43AM +0200, Marek Vasut wrote:
On 03/28/2016 12:29 AM, Tom Rini wrote:
On Sun, Mar 20, 2016 at 06:37:02PM -0700, Vasily Khoruzhick wrote:
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Applied to u-boot/master, thanks!
NAK.
This actually breaks the correct behavior of the PXA framebuffer driver. Please do not ignore comments which these patches have. I will pick them through the PXA tree when this is sorted out.
Sorry, reverted.
zipitz2 supports DT boot since linux-4.4 (not mainlined yet)
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- include/configs/zipitz2.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 169eaf3..f69b52e 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -47,6 +47,7 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_SYS_TEXT_BASE 0x0 #define CONFIG_LZMA /* LZMA compression support */ +#define CONFIG_OF_LIBFDT
/* * Serial Console Configuration
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
zipitz2 supports DT boot since linux-4.4 (not mainlined yet)
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
include/configs/zipitz2.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 169eaf3..f69b52e 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -47,6 +47,7 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_SYS_TEXT_BASE 0x0 #define CONFIG_LZMA /* LZMA compression support */ +#define CONFIG_OF_LIBFDT
Also enable CONFIG_FIT and fold this into patch 01 .
/*
- Serial Console Configuration
On Sun, Mar 20, 2016 at 06:37:03PM -0700, Vasily Khoruzhick wrote:
zipitz2 supports DT boot since linux-4.4 (not mainlined yet)
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Applied to u-boot/master, thanks!
3rd port can be used as a device or host.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- include/configs/pxa-common.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/include/configs/pxa-common.h b/include/configs/pxa-common.h index f0ecc34..4c1c2c7 100644 --- a/include/configs/pxa-common.h +++ b/include/configs/pxa-common.h @@ -37,7 +37,11 @@ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_BOARD_INIT +#ifdef CONFIG_CPU_PXA27X +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 +#else #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#endif #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4c000000 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "pxa-ohci" #define CONFIG_USB_STORAGE
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
3rd port can be used as a device or host.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Acked-by: Marek Vasut marex@denx.de
On Sun, Mar 20, 2016 at 06:37:04PM -0700, Vasily Khoruzhick wrote:
3rd port can be used as a device or host.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com Acked-by: Marek Vasut marex@denx.de
Applied to u-boot/master, thanks!
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- board/zipitz2/zipitz2.c | 21 +++++++++++++++++++++ include/configs/zipitz2.h | 1 + 2 files changed, 22 insertions(+)
diff --git a/board/zipitz2/zipitz2.c b/board/zipitz2/zipitz2.c index 8fa1261..aefbeee 100644 --- a/board/zipitz2/zipitz2.c +++ b/board/zipitz2/zipitz2.c @@ -15,6 +15,7 @@ #include <asm/arch/regs-mmc.h> #include <spi.h> #include <asm/io.h> +#include <usb.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -52,6 +53,26 @@ int dram_init(void) return 0; }
+#ifdef CONFIG_CMD_USB +int board_usb_init(int index, enum usb_init_type init) +{ + /* enable port 2 */ + writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS | + UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR); + + return 0; +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + return 0; +} + +void usb_board_stop(void) +{ +} +#endif + void dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index f69b52e..52a36b7 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -64,6 +64,7 @@ #define CONFIG_CMD_ENV #define CONFIG_CMD_MMC #define CONFIG_CMD_SPI +#define CONFIG_CMD_USB
/* * MMC Card Configuration
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
Commit message is missing, NAK
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
board/zipitz2/zipitz2.c | 21 +++++++++++++++++++++ include/configs/zipitz2.h | 1 + 2 files changed, 22 insertions(+)
diff --git a/board/zipitz2/zipitz2.c b/board/zipitz2/zipitz2.c index 8fa1261..aefbeee 100644 --- a/board/zipitz2/zipitz2.c +++ b/board/zipitz2/zipitz2.c @@ -15,6 +15,7 @@ #include <asm/arch/regs-mmc.h> #include <spi.h> #include <asm/io.h> +#include <usb.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -52,6 +53,26 @@ int dram_init(void) return 0; }
+#ifdef CONFIG_CMD_USB +int board_usb_init(int index, enum usb_init_type init) +{
- /* enable port 2 */
- writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);- return 0;
+}
+int board_usb_cleanup(int index, enum usb_init_type init) +{
- return 0;
+}
+void usb_board_stop(void) +{
Please stop the USB here, otherwise it can corrupt the memory when Linux boots.
+} +#endif
void dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index f69b52e..52a36b7 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -64,6 +64,7 @@ #define CONFIG_CMD_ENV #define CONFIG_CMD_MMC #define CONFIG_CMD_SPI +#define CONFIG_CMD_USB
/*
- MMC Card Configuration
On Sun, Mar 20, 2016 at 06:37:05PM -0700, Vasily Khoruzhick wrote:
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Applied to u-boot/master, thanks!
SRAM is used for early stack, but kernel disables its clock on suspend. Re-enable SRAM clock on startup, otherwise u-boot crashes on resume from suspend.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- arch/arm/cpu/pxa/start.S | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 24b6ad1..ce1181a 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -53,7 +53,15 @@ reset: #ifdef CONFIG_CPU_PXA25X bl lock_cache_for_stack #endif - +#ifdef CONFIG_CPU_PXA27X + /* + * enable clock for SRAM + */ + ldr r0,=CKEN + ldr r1,[r0] + orr r1,r1,#(1 << 20) + str r1,[r0] +#endif bl _main
/*------------------------------------------------------------------------------*/
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
SRAM is used for early stack, but kernel disables its clock on suspend. Re-enable SRAM clock on startup, otherwise u-boot crashes on resume from suspend.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
arch/arm/cpu/pxa/start.S | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index 24b6ad1..ce1181a 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -53,7 +53,15 @@ reset: #ifdef CONFIG_CPU_PXA25X bl lock_cache_for_stack #endif
+#ifdef CONFIG_CPU_PXA27X
- /*
* enable clock for SRAM*/- ldr r0,=CKEN
- ldr r1,[r0]
- orr r1,r1,#(1 << 20)
Don't we have a macro for this 1 << 20 already ?
- str r1,[r0]
+#endif bl _main
/*------------------------------------------------------------------------------*/
On Sun, Mar 20, 2016 at 06:37:06PM -0700, Vasily Khoruzhick wrote:
SRAM is used for early stack, but kernel disables its clock on suspend. Re-enable SRAM clock on startup, otherwise u-boot crashes on resume from suspend.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Applied to u-boot/master, thanks!
Tested with OHCI and pxafb drivers - no issues found
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- arch/arm/cpu/pxa/Makefile | 1 + arch/arm/cpu/pxa/cache.c | 62 ++++++++++++++++++++++++++++++++++++++++++++ arch/arm/cpu/pxa/pxa2xx.c | 10 +++++++ include/configs/pxa-common.h | 1 + 4 files changed, 74 insertions(+) create mode 100644 arch/arm/cpu/pxa/cache.c
diff --git a/arch/arm/cpu/pxa/Makefile b/arch/arm/cpu/pxa/Makefile index 3ee08cd..79fcb73 100644 --- a/arch/arm/cpu/pxa/Makefile +++ b/arch/arm/cpu/pxa/Makefile @@ -14,3 +14,4 @@ obj-y += cpuinfo.o obj-y += timer.o obj-y += usb.o obj-y += relocate.o +obj-y += cache.o diff --git a/arch/arm/cpu/pxa/cache.c b/arch/arm/cpu/pxa/cache.c new file mode 100644 index 0000000..7aba112 --- /dev/null +++ b/arch/arm/cpu/pxa/cache.c @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2016 Vasily Khoruzhick anarsoul@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/types.h> +#include <common.h> + +#ifndef CONFIG_SYS_DCACHE_OFF + +#ifndef CONFIG_SYS_CACHELINE_SIZE +#define CONFIG_SYS_CACHELINE_SIZE 32 +#endif + +void invalidate_dcache_all(void) +{ + /* Flush/Invalidate I cache */ + asm volatile("mcr p15, 0, %0, c7, c5, 0\n" : : "r"(0)); + /* Flush/Invalidate D cache */ + asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0)); +} + +void flush_dcache_all(void) +{ + return invalidate_dcache_all(); +} + +void invalidate_dcache_range(unsigned long start, unsigned long stop) +{ + start &= ~(CONFIG_SYS_CACHELINE_SIZE - 1); + stop &= ~(CONFIG_SYS_CACHELINE_SIZE - 1); + + while (start <= stop) { + asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start)); + start += CONFIG_SYS_CACHELINE_SIZE; + } +} + +void flush_dcache_range(unsigned long start, unsigned long stop) +{ + return invalidate_dcache_range(start, stop); +} +#else /* #ifndef CONFIG_SYS_DCACHE_OFF */ +void invalidate_dcache_all(void) +{ +} + +void flush_dcache_all(void) +{ +} +#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */ + +/* + * Stub implementations for l2 cache operations + */ + +__weak void l2_cache_disable(void) {} + +#if defined CONFIG_SYS_THUMB_BUILD +__weak void invalidate_l2_cache(void) {} +#endif diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c index 2f12fb9..77f0ef2 100644 --- a/arch/arm/cpu/pxa/pxa2xx.c +++ b/arch/arm/cpu/pxa/pxa2xx.c @@ -284,3 +284,13 @@ void reset_cpu(ulong ignored) for (;;) ; } + +void enable_caches(void) +{ +#ifndef CONFIG_SYS_ICACHE_OFF + icache_enable(); +#endif +#ifndef CONFIG_SYS_DCACHE_OFF + dcache_enable(); +#endif +} diff --git a/include/configs/pxa-common.h b/include/configs/pxa-common.h index 4c1c2c7..7295687 100644 --- a/include/configs/pxa-common.h +++ b/include/configs/pxa-common.h @@ -10,6 +10,7 @@ #define __CONFIG_PXA_COMMON_H__
#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
/* * KGDB
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
Tested with OHCI and pxafb drivers - no issues found
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
arch/arm/cpu/pxa/Makefile | 1 + arch/arm/cpu/pxa/cache.c | 62 ++++++++++++++++++++++++++++++++++++++++++++ arch/arm/cpu/pxa/pxa2xx.c | 10 +++++++ include/configs/pxa-common.h | 1 + 4 files changed, 74 insertions(+) create mode 100644 arch/arm/cpu/pxa/cache.c
diff --git a/arch/arm/cpu/pxa/Makefile b/arch/arm/cpu/pxa/Makefile index 3ee08cd..79fcb73 100644 --- a/arch/arm/cpu/pxa/Makefile +++ b/arch/arm/cpu/pxa/Makefile @@ -14,3 +14,4 @@ obj-y += cpuinfo.o obj-y += timer.o obj-y += usb.o obj-y += relocate.o +obj-y += cache.o diff --git a/arch/arm/cpu/pxa/cache.c b/arch/arm/cpu/pxa/cache.c new file mode 100644 index 0000000..7aba112 --- /dev/null +++ b/arch/arm/cpu/pxa/cache.c @@ -0,0 +1,62 @@ +/*
- (C) Copyright 2016 Vasily Khoruzhick anarsoul@gmail.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <linux/types.h> +#include <common.h>
+#ifndef CONFIG_SYS_DCACHE_OFF
+#ifndef CONFIG_SYS_CACHELINE_SIZE +#define CONFIG_SYS_CACHELINE_SIZE 32
This condition where CONFIG_SYS_CACHELINE_SIZE is undefined must not ever happen.
+#endif
+void invalidate_dcache_all(void) +{
- /* Flush/Invalidate I cache */
- asm volatile("mcr p15, 0, %0, c7, c5, 0\n" : : "r"(0));
- /* Flush/Invalidate D cache */
- asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0));
+}
+void flush_dcache_all(void) +{
- return invalidate_dcache_all();
+}
+void invalidate_dcache_range(unsigned long start, unsigned long stop) +{
- start &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);
- stop &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);
Apply same sanity check as armv7 does please.
- while (start <= stop) {
asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start));start += CONFIG_SYS_CACHELINE_SIZE;- }
+}
+void flush_dcache_range(unsigned long start, unsigned long stop) +{
- return invalidate_dcache_range(start, stop);
+} +#else /* #ifndef CONFIG_SYS_DCACHE_OFF */ +void invalidate_dcache_all(void) +{ +}
+void flush_dcache_all(void) +{ +} +#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
+/*
- Stub implementations for l2 cache operations
- */
+__weak void l2_cache_disable(void) {}
+#if defined CONFIG_SYS_THUMB_BUILD +__weak void invalidate_l2_cache(void) {} +#endif diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c index 2f12fb9..77f0ef2 100644 --- a/arch/arm/cpu/pxa/pxa2xx.c +++ b/arch/arm/cpu/pxa/pxa2xx.c @@ -284,3 +284,13 @@ void reset_cpu(ulong ignored) for (;;) ; }
+void enable_caches(void) +{ +#ifndef CONFIG_SYS_ICACHE_OFF
- icache_enable();
+#endif +#ifndef CONFIG_SYS_DCACHE_OFF
- dcache_enable();
+#endif +} diff --git a/include/configs/pxa-common.h b/include/configs/pxa-common.h index 4c1c2c7..7295687 100644 --- a/include/configs/pxa-common.h +++ b/include/configs/pxa-common.h @@ -10,6 +10,7 @@ #define __CONFIG_PXA_COMMON_H__
#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
/*
- KGDB
On Sun, Mar 20, 2016 at 06:37:07PM -0700, Vasily Khoruzhick wrote:
Tested with OHCI and pxafb drivers - no issues found
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Applied to u-boot/master, thanks!
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- drivers/video/pxa_lcd.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c index ba4f897..d64c25b 100644 --- a/drivers/video/pxa_lcd.c +++ b/drivers/video/pxa_lcd.c @@ -353,6 +353,9 @@ void lcd_ctrl_init (void *lcdbase) pxafb_init(&panel_info); pxafb_setup_gpio(&panel_info); pxafb_enable_controller(&panel_info); + + /* Enable flushing if we enabled dcache */ + lcd_set_flush_dcache(1); }
/*----------------------------------------------------------------------*/ @@ -565,6 +568,10 @@ static int pxafb_init (vidinfo_t *vid) fbi->dmadesc_fblow->fidr = 0; fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL;
+ flush_dcache_range((u32)fbi->dmadesc_fblow, + (u32)fbi->dmadesc_fblow + + sizeof(*fbi->dmadesc_fblow)); + fbi->fdadr1 = (u_long)fbi->dmadesc_fblow; /* only used in dual-panel mode */
fbi->dmadesc_fbhigh->fsadr = fbi->screen; @@ -580,11 +587,20 @@ static int pxafb_init (vidinfo_t *vid) /* assume any mode with <12 bpp is palette driven */ fbi->dmadesc_palette->fdadr = (u_long)fbi->dmadesc_fbhigh; fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_palette; + flush_dcache_range((u32)fbi->dmadesc_fbhigh, + (u32)fbi->dmadesc_fbhigh + + sizeof(*fbi->dmadesc_fbhigh)); + flush_dcache_range((u32)fbi->dmadesc_palette, + (u32)fbi->dmadesc_palette + + sizeof(*fbi->dmadesc_palette)); /* flips back and forth between pal and fbhigh */ fbi->fdadr0 = (u_long)fbi->dmadesc_palette; } else { + flush_dcache_range((u32)fbi->dmadesc_fbhigh, + (u32)fbi->dmadesc_fbhigh + + sizeof(*fbi->dmadesc_fbhigh)); /* palette shouldn't be loaded in true-color mode */ fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_fbhigh; fbi->fdadr0 = (u_long)fbi->dmadesc_fbhigh; /* no pal just fbhigh */
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
drivers/video/pxa_lcd.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
Why don't you just allocate the piece of LCD memory as non-cachable ?
On Sun, Mar 20, 2016 at 06:37:08PM -0700, Vasily Khoruzhick wrote:
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Applied to u-boot/master, thanks!
On 03/28/2016 12:29 AM, Tom Rini wrote:
On Sun, Mar 20, 2016 at 06:37:08PM -0700, Vasily Khoruzhick wrote:
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Applied to u-boot/master, thanks!
NAK, this is pure wrong. The memory area should be non-cacheable. Please remove the patch from the tree.
On Mon, Mar 28, 2016 at 01:27:27AM +0200, Marek Vasut wrote:
On 03/28/2016 12:29 AM, Tom Rini wrote:
On Sun, Mar 20, 2016 at 06:37:08PM -0700, Vasily Khoruzhick wrote:
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Applied to u-boot/master, thanks!
NAK, this is pure wrong. The memory area should be non-cacheable. Please remove the patch from the tree.
Sorry, reverted.
It speeds up loading kernel from SD or USB a lot.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- board/zipitz2/zipitz2.c | 4 ---- include/configs/zipitz2.h | 3 +-- 2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/board/zipitz2/zipitz2.c b/board/zipitz2/zipitz2.c index aefbeee..d3ca939 100644 --- a/board/zipitz2/zipitz2.c +++ b/board/zipitz2/zipitz2.c @@ -30,10 +30,6 @@ inline void lcd_start(void) {}; */ int board_init(void) { - /* We have RAM, disable cache */ - dcache_disable(); - icache_disable(); - /* arch number of Z2 */ gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 52a36b7..5200e02 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -27,8 +27,6 @@ #define CONFIG_ENV_ADDR 0x40000 #define CONFIG_ENV_SIZE 0x10000
-#define CONFIG_SYS_DCACHE_OFF - #define CONFIG_SYS_MALLOC_LEN (128*1024) #define CONFIG_ARCH_CPU_INIT
@@ -65,6 +63,7 @@ #define CONFIG_CMD_MMC #define CONFIG_CMD_SPI #define CONFIG_CMD_USB +#define CONFIG_CMD_CACHE
/* * MMC Card Configuration
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
It speeds up loading kernel from SD or USB a lot.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Acked-by: Marek Vasut marex@denx.de
On Sun, Mar 20, 2016 at 06:37:09PM -0700, Vasily Khoruzhick wrote:
It speeds up loading kernel from SD or USB a lot.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com Acked-by: Marek Vasut marex@denx.de
Applied to u-boot/master, thanks!
Otherwise flash remains in read status mode and it's not possible to access data on flash.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com --- drivers/mtd/cfi_flash.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 39932f4..18831c6 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -2203,6 +2203,8 @@ ulong flash_get_size (phys_addr_t base, int banknum) flash_isset (info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT); + flash_write_cmd(info, sect_cnt, 0, + FLASH_CMD_RESET); break; case CFI_CMDSET_AMD_EXTENDED: case CFI_CMDSET_AMD_STANDARD:
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
Otherwise flash remains in read status mode and it's not possible to access data on flash.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
CCing Stefan and Scott on this one.
drivers/mtd/cfi_flash.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 39932f4..18831c6 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -2203,6 +2203,8 @@ ulong flash_get_size (phys_addr_t base, int banknum) flash_isset (info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
flash_write_cmd(info, sect_cnt, 0,FLASH_CMD_RESET); break; case CFI_CMDSET_AMD_EXTENDED: case CFI_CMDSET_AMD_STANDARD:
s
Hi Vasily,
On 21.03.2016 02:54, Marek Vasut wrote:
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
Otherwise flash remains in read status mode and it's not possible to access data on flash.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
CCing Stefan and Scott on this one.
drivers/mtd/cfi_flash.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 39932f4..18831c6 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -2203,6 +2203,8 @@ ulong flash_get_size (phys_addr_t base, int banknum) flash_isset (info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
flash_write_cmd(info, sect_cnt, 0,FLASH_CMD_RESET); break; case CFI_CMDSET_AMD_EXTENDED: case CFI_CMDSET_AMD_STANDARD:
I can't test this patch, since I don't have such a board here available right now any more. But I'm wondering if this is really necessary. The driver used to work just fine on Intel Strata flash chips without this patch.
And looking at the code, a bit later (after the loop) the flash is actually reset:
... /* round up when converting to ms */ info->write_tout = (tmp + 999) / 1000; info->flash_id = FLASH_MAN_CFI; if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) { /* XXX - Need to test on x8/x16 in parallel. */ info->portwidth >>= 1; }
flash_write_cmd (info, 0, 0, info->cmd_reset); } ...
So what exactly does not work for you with the current version? Which flash chip are you using?
Thanks, Stefan
On Mon, Mar 21, 2016 at 9:19 AM, Stefan Roese sr@denx.de wrote:
Hi Vasily,
Hi Stefan,
On 21.03.2016 02:54, Marek Vasut wrote:
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
Otherwise flash remains in read status mode and it's not possible to access data on flash.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
CCing Stefan and Scott on this one.
drivers/mtd/cfi_flash.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 39932f4..18831c6 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -2203,6 +2203,8 @@ ulong flash_get_size (phys_addr_t base, int banknum) flash_isset (info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
flash_write_cmd(info, sect_cnt, 0,FLASH_CMD_RESET); break; case CFI_CMDSET_AMD_EXTENDED: case CFI_CMDSET_AMD_STANDARD:I can't test this patch, since I don't have such a board here available right now any more. But I'm wondering if this is really necessary. The driver used to work just fine on Intel Strata flash chips without this patch.
And looking at the code, a bit later (after the loop) the flash is actually reset:
It sends status cmd for each erase block to check if it's protected or not, and apparently this chip (Manufacturer ID 0x000089 Chip ID 0x008865) wants reset for each erase block as well. Otherwise it returns status data instead of actual data. Btw, that is exactly what Linux driver does.
... /* round up when converting to ms */ info->write_tout = (tmp + 999) / 1000; info->flash_id = FLASH_MAN_CFI; if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) { /* XXX - Need to test on x8/x16 in parallel. */ info->portwidth >>= 1; }
flash_write_cmd (info, 0, 0, info->cmd_reset); }...
So what exactly does not work for you with the current version?
It returns status page on read for each erase block instead of actual data.
Which flash chip are you using?
Manufacturer ID 0x000089 Chip ID 0x008865
Thanks, Stefan
Hi Vasily,
On 21.03.2016 20:22, Vasily Khoruzhick wrote:
On Mon, Mar 21, 2016 at 9:19 AM, Stefan Roese sr@denx.de wrote:
Hi Vasily,
Hi Stefan,
On 21.03.2016 02:54, Marek Vasut wrote:
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
Otherwise flash remains in read status mode and it's not possible to access data on flash.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
CCing Stefan and Scott on this one.
drivers/mtd/cfi_flash.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 39932f4..18831c6 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -2203,6 +2203,8 @@ ulong flash_get_size (phys_addr_t base, int banknum) flash_isset (info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
flash_write_cmd(info, sect_cnt, 0,FLASH_CMD_RESET); break; case CFI_CMDSET_AMD_EXTENDED: case CFI_CMDSET_AMD_STANDARD:I can't test this patch, since I don't have such a board here available right now any more. But I'm wondering if this is really necessary. The driver used to work just fine on Intel Strata flash chips without this patch.
And looking at the code, a bit later (after the loop) the flash is actually reset:
It sends status cmd for each erase block to check if it's protected or not, and apparently this chip (Manufacturer ID 0x000089 Chip ID 0x008865) wants reset for each erase block as well. Otherwise it returns status data instead of actual data. Btw, that is exactly what Linux driver does.
I see. Okay, then:
Acked-by: Stefan Roese sr@denx.de
Thanks, Stefan
On Sun, Mar 20, 2016 at 06:37:10PM -0700, Vasily Khoruzhick wrote:
Otherwise flash remains in read status mode and it's not possible to access data on flash.
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com Acked-by: Stefan Roese sr@denx.de
Applied to u-boot/master, thanks!
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
zipitz2 was dropped in 49d8899ba9c26335e4a12e01c18028fc5e40c796
That's great to know. So what does this patch do ?
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Hi!
+int dram_init(void) +{
- pxa2xx_dram_init();
- gd->ram_size = PHYS_SDRAM_1_SIZE;
- return 0;
+}
+void dram_init_banksize(void) +{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
There should be a default function for this in common/board_*c
+}
+#ifdef CONFIG_CMD_MMC +int board_mmc_init(bd_t *bis) +{
- pxa_mmc_register(0);
- return 0;
+} +#endif
[...]
+void zipitz2_spi_sda(int set) +{
- /* GPIO 13 */
- if (set)
writel((1 << 13), GPSR0);- else
writel((1 << 13), GPCR0);
This could seriously use a conversion to GPIO driver, but this can be done later. You can drop the excess parenthesis around 1 << 13 here and all over the place. You can even convert it to BIT(13) .
+}
+void zipitz2_spi_scl(int set) +{
- /* GPIO 22 */
- if (set)
writel((1 << 22), GPCR0);- else
writel((1 << 22), GPSR0);+}
[...]
+void lcd_start(void) +{
- int i;
- unsigned char reg[3] = { 0x74, 0x00, 0 };
- unsigned char data[3] = { 0x76, 0, 0 };
- unsigned char dummy[3] = { 0, 0, 0 };
all should be const
- /* PWM2 AF */
- writel(readl(GAFR0_L) | 0x00800000, GAFR0_L);
- /* Enable clock to all PWM */
- writel(readl(CKEN) | 0x3, CKEN);
- /* Configure PWM2 */
- writel(0x4f, PWM_CTRL2);
- writel(0x2ff, PWM_PWDUTY2);
- writel(792, PWM_PERVAL2);
- /* Toggle the reset pin to reset the LCD */
- writel((1 << 19), GPSR0);
- udelay(100000);
- writel((1 << 19), GPCR0);
- udelay(20000);
- writel((1 << 19), GPSR0);
BIT()
- udelay(20000);
- /* Program the LCD init sequence */
- for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) {
reg[0] = 0x74;reg[1] = 0x0;reg[2] = lcd_data[i].reg;spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END);data[0] = 0x76;data[1] = lcd_data[i].data >> 8;data[2] = lcd_data[i].data & 0xff;spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END);if (lcd_data[i].mdelay)udelay(lcd_data[i].mdelay * 1000);
mdelay ;-)
- }
- writel((1 << 11), GPSR0);
+} +#endif
[...]
diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h new file mode 100644 index 0000000..586a445 --- /dev/null +++ b/include/configs/zipitz2.h @@ -0,0 +1,224 @@ +/*
- Aeronix Zipit Z2 configuration file
- Copyright (C) 2009-2010 Marek Vasut marek.vasut@gmail.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __CONFIG_H +#define __CONFIG_H
+/*
- High Level Board Configuration Options
- */
+#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ +#define CONFIG_SYS_TEXT_BASE 0x0
use #define[SPACE] not #define[TAB] and please fix it all over the patch.
+#undef CONFIG_BOARD_LATE_INIT +#undef CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_PREBOOT
[...]
Run checkpatch.pl on the patches please ;-)
On Sun, Mar 20, 2016 at 06:37:00PM -0700, Vasily Khoruzhick wrote:
zipitz2 was dropped in 49d8899ba9c26335e4a12e01c18028fc5e40c796
Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com
Applied to u-boot/master, thanks!
participants (4)
-
Marek Vasut -
Stefan Roese -
Tom Rini -
Vasily Khoruzhick