Add stream_id_cur field to ls_pcie structure and initialize it with 0 for all pcie controllers. This field will be used for streamId calculation.

Signed-off-by: Wasim Khan wasim.khan@nxp.com ---

Changes in v2: Updated copyright

drivers/pci/pcie_layerscape.c | 3 ++- drivers/pci/pcie_layerscape.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index db1375a..232479d 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2017 NXP + * Copyright 2017-2019 NXP * Copyright 2014-2015 Freescale Semiconductor, Inc. * Layerscape PCIe driver */ @@ -339,6 +339,7 @@ static void ls_pcie_setup_ctrl(struct ls_pcie *pcie) dbi_writel(pcie, 0, PCIE_DBI_RO_WR_EN);

ls_pcie_disable_bars(pcie); + pcie->stream_id_cur = 0; }

static void ls_pcie_ep_setup_atu(struct ls_pcie *pcie) diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h index ddfbba6..95454bc 100644 --- a/drivers/pci/pcie_layerscape.h +++ b/drivers/pci/pcie_layerscape.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017 NXP + * Copyright 2017-2019 NXP * Copyright 2014-2015 Freescale Semiconductor, Inc. * Layerscape PCIe driver */ @@ -144,6 +144,7 @@ struct ls_pcie { bool big_endian; bool enabled; int next_lut_index; + int stream_id_cur; int mode; };

Update API names for layerscape gen4 fixup. Suffix layerscape_gen4 fixup API names with _ls_gen4. This is required to organize device tree fixup in common, layerscape and layerscape_gen4 specific code.

Signed-off-by: Wasim Khan wasim.khan@nxp.com ---

Changes in v2: Updated patch subject and description based on Priyanka Jain review comments --- drivers/pci/pcie_layerscape_gen4_fixup.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c index 1c9e575..fe478db 100644 --- a/drivers/pci/pcie_layerscape_gen4_fixup.c +++ b/drivers/pci/pcie_layerscape_gen4_fixup.c @@ -64,8 +64,9 @@ static void ls_pcie_g4_lut_set_mapping(struct ls_pcie_g4 *pcie, int index, * msi-map = <[devid] [phandle-to-msi-ctrl] [stream-id] [count] * [devid] [phandle-to-msi-ctrl] [stream-id] [count]>; */ -static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie_g4 *pcie, - u32 devid, u32 streamid) +static void fdt_pcie_set_msi_map_entry_ls_gen4(void *blob, + struct ls_pcie_g4 *pcie, + u32 devid, u32 streamid) { u32 *prop; u32 phandle; @@ -106,8 +107,9 @@ static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie_g4 *pcie, * iommu-map = <[devid] [phandle-to-iommu-ctrl] [stream-id] [count] * [devid] [phandle-to-iommu-ctrl] [stream-id] [count]>; */ -static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie_g4 *pcie, - u32 devid, u32 streamid) +static void fdt_pcie_set_iommu_map_entry_ls_gen4(void *blob, + struct ls_pcie_g4 *pcie, + u32 devid, u32 streamid) { u32 *prop; u32 iommu_map[4]; @@ -145,7 +147,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie_g4 *pcie, fdt_appendprop(blob, nodeoff, "iommu-map", iommu_map, 16); }

-static void fdt_fixup_pcie(void *blob) +static void fdt_fixup_pcie_ls_gen4(void *blob) { struct udevice *dev, *bus; struct ls_pcie_g4 *pcie; @@ -176,9 +178,11 @@ static void fdt_fixup_pcie(void *blob) /* map PCI b.d.f to streamID in LUT */ ls_pcie_g4_lut_set_mapping(pcie, index, bdf >> 8, streamid); /* update msi-map in device tree */ - fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8, streamid); + fdt_pcie_set_msi_map_entry_ls_gen4(blob, pcie, bdf >> 8, + streamid); /* update iommu-map in device tree */ - fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8, streamid); + fdt_pcie_set_iommu_map_entry_ls_gen4(blob, pcie, bdf >> 8, + streamid); } } #endif @@ -238,7 +242,7 @@ void ft_pci_setup(void *blob, bd_t *bd) ft_pcie_layerscape_gen4_setup(blob, pcie);

#if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2) - fdt_fixup_pcie(blob); + fdt_fixup_pcie_ls_gen4(blob); #endif }

Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup.

Signed-off-by: Wasim Khan wasim.khan@nxp.com ---

Changes in v2 Ported changes to latest codebase. Added Author for the new files.

configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + drivers/pci/Makefile | 5 +++-- drivers/pci/pcie_layerscape_fixup.c | 5 +++-- drivers/pci/pcie_layerscape_fixup_common.c | 29 +++++++++++++++++++++++++++++ drivers/pci/pcie_layerscape_fixup_common.h | 26 ++++++++++++++++++++++++++ drivers/pci/pcie_layerscape_gen4_fixup.c | 5 +++-- 7 files changed, 66 insertions(+), 6 deletions(-) create mode 100644 drivers/pci/pcie_layerscape_fixup_common.c create mode 100644 drivers/pci/pcie_layerscape_fixup_common.h

diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index ef774af..9d761d4 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -55,6 +55,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index 1ad4ad7..0cf1f07 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -54,6 +54,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index d6a9b8c..c044704 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -33,9 +33,10 @@ obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o obj-$(CONFIG_PCIE_DW_MVEBU) += pcie_dw_mvebu.o obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o -obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o +obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o pcie_layerscape_fixup_common.o obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \ - pcie_layerscape_gen4_fixup.o pcie_layerscape.o + pcie_layerscape_gen4_fixup.o \ + pcie_layerscape_fixup_common.o obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index 3d23840..7635df7 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -17,6 +17,7 @@ #include <asm/arch/clock.h> #endif #include "pcie_layerscape.h" +#include "pcie_layerscape_fixup_common.h"

#if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2) /* @@ -271,7 +272,7 @@ static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie) }

/* Fixup Kernel DT for PCIe */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls(void *blob, bd_t *bd) { struct ls_pcie *pcie;

@@ -284,7 +285,7 @@ void ft_pci_setup(void *blob, bd_t *bd) }

#else /* !CONFIG_OF_BOARD_SETUP */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls(void *blob, bd_t *bd) { } #endif diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c new file mode 100644 index 0000000..b953952 --- /dev/null +++ b/drivers/pci/pcie_layerscape_fixup_common.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + * + * PCIe DT fixup for NXP Layerscape SoCs + * Author: Wasim Khan wasim.khan@nxp.com + * + */ + +#include <common.h> +#include <asm/arch/clock.h> +#include <asm/arch/soc.h> +#include "pcie_layerscape_fixup_common.h" + +void ft_pci_setup(void *blob, bd_t *bd) +{ +#if defined(CONFIG_FSL_LAYERSCAPE) + uint svr; + + svr = SVR_SOC_VER(get_svr()); + + if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 1, 0)) + ft_pci_setup_ls_gen4(blob, bd); + else + ft_pci_setup_ls(blob, bd); +#else /* CONFIG_FSL_LAYERSCAPE */ + ft_pci_setup_ls(blob, bd); +#endif /* CONFIG_FSL_LAYERSCAPE */ +} diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h new file mode 100644 index 0000000..5640406 --- /dev/null +++ b/drivers/pci/pcie_layerscape_fixup_common.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 NXP + * + * PCIe DT fixup for NXP Layerscape SoCs + * Author: Wasim Khan wasim.khan@nxp.com + * + */ +#ifndef _PCIE_LAYERSCAPE_FIXUP_COMMON_H_ +#define _PCIE_LAYERSCAPE_FIXUP_COMMON_H_ + +#include <common.h> + +void ft_pci_setup_ls(void *blob, bd_t *bd); + +#if defined(CONFIG_FSL_LAYERSCAPE) +#ifdef CONFIG_PCIE_LAYERSCAPE_GEN4 +void ft_pci_setup_ls_gen4(void *blob, bd_t *bd); +#else +static void ft_pci_setup_ls_gen4(void *blob, bd_t *bd) +{ +} +#endif +#endif /* CONFIG_FSL_LAYERSCAPE */ + +#endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_ diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c index b58ddd5..480d242 100644 --- a/drivers/pci/pcie_layerscape_gen4_fixup.c +++ b/drivers/pci/pcie_layerscape_gen4_fixup.c @@ -19,6 +19,7 @@ #include <asm/arch/clock.h> #endif #include "pcie_layerscape_gen4.h" +#include "pcie_layerscape_fixup_common.h"

#if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2) /* @@ -234,7 +235,7 @@ static void ft_pcie_layerscape_gen4_setup(void *blob, struct ls_pcie_g4 *pcie) }

/* Fixup Kernel DT for PCIe */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls_gen4(void *blob, bd_t *bd) { struct ls_pcie_g4 *pcie;

@@ -247,7 +248,7 @@ void ft_pci_setup(void *blob, bd_t *bd) }

#else /* !CONFIG_OF_BOARD_SETUP */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls_gen4(void *blob, bd_t *bd) { } #endif

lx2-rev1 requires layerscape_gen4 device tree fixup and lx2-rev2 requires layerscape device tree fixup. Add device tree fixup for lx2 based on SoC and Version.

Signed-off-by: Wasim Khan wasim.khan@nxp.com ---

Changes in v2: Updated patch description based on Priyanka Jain review comments

drivers/pci/pcie_layerscape_fixup.c | 1 + drivers/pci/pcie_layerscape_fixup_common.c | 76 ++++++++++++++++++++++++++++++ drivers/pci/pcie_layerscape_fixup_common.h | 1 + 3 files changed, 78 insertions(+)

diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index b1d2470..df76048 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -208,6 +208,7 @@ static void fdt_fixup_pcie_ls(void *blob) fdt_pcie_set_iommu_map_entry_ls(blob, pcie, bdf >> 8, streamid); } + pcie_board_fix_fdt(blob); } #endif

diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c index 3458ae8..ff8cd1f 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.c +++ b/drivers/pci/pcie_layerscape_fixup_common.c @@ -29,6 +29,82 @@ void ft_pci_setup(void *blob, bd_t *bd) }

#if defined(CONFIG_FSL_LAYERSCAPE) +int lx2_board_fix_fdt(void *fdt) +{ + char *reg_name, *old_str, *new_str; + const char *reg_names; + int names_len, old_str_len, new_str_len, remaining_str_len; + struct str_map { + char *old_str; + char *new_str; + } reg_names_map[] = { + { "csr_axi_slave", "regs" }, + { "config_axi_slave", "config" } + }; + int off = -1, i; + u32 val; + + off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie"); + while (off != -FDT_ERR_NOTFOUND) { + fdt_setprop(fdt, off, "compatible", "fsl,ls2088a-pcie", + strlen("fsl,ls2088a-pcie") + 1); + + reg_names = fdt_getprop(fdt, off, "reg-names", &names_len); + if (!reg_names) + continue; + reg_name = (char *)reg_names; + remaining_str_len = names_len - (reg_name - reg_names); + i = 0; + while ((i < ARRAY_SIZE(reg_names_map)) && remaining_str_len) { + old_str = reg_names_map[i].old_str; + new_str = reg_names_map[i].new_str; + old_str_len = strlen(old_str); + new_str_len = strlen(new_str); + if (memcmp(reg_name, old_str, old_str_len) == 0) { + /* first only leave required bytes for new_str + * and copy rest of the string after it + */ + memcpy(reg_name + new_str_len, + reg_name + old_str_len, + remaining_str_len - old_str_len); + + /* Now copy new_str */ + memcpy(reg_name, new_str, new_str_len); + names_len -= old_str_len; + names_len += new_str_len; + i++; + } + + reg_name = memchr(reg_name, '\0', remaining_str_len); + if (!reg_name) + break; + reg_name += 1; + + remaining_str_len = names_len - (reg_name - reg_names); + } + fdt_setprop(fdt, off, "reg-names", reg_names, names_len); + fdt_delprop(fdt, off, "apio-wins"); + fdt_delprop(fdt, off, "ppio-wins"); + val = cpu_to_fdt32(0x4); + fdt_setprop(fdt, off, "num-lanes", &val, sizeof(val)); + off = fdt_node_offset_by_compatible(fdt, off, + "fsl,lx2160a-pcie"); + } + return 0; +} + +int pcie_board_fix_fdt(void *fdt) +{ + uint svr; + + svr = SVR_SOC_VER(get_svr()); + + if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 2, 0)) + return lx2_board_fix_fdt(fdt); + + return 0; +} + #ifdef CONFIG_ARCH_LX2160A /* returns the next available streamid for pcie, -errno if failed */ int pcie_next_streamid(int currentid, int idx) diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h index e747396..8d95690 100644 --- a/drivers/pci/pcie_layerscape_fixup_common.h +++ b/drivers/pci/pcie_layerscape_fixup_common.h @@ -23,5 +23,6 @@ static void ft_pci_setup_ls_gen4(void *blob, bd_t *bd) #endif #endif /* CONFIG_FSL_LAYERSCAPE */ int pcie_next_streamid(int currentid, int id); +int pcie_board_fix_fdt(void *fdt);

#endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_