[U-Boot-Users] 85xx SPD LAW setup issue?

Hi,
I found that there is a possible LAW conflict between SPD and 85xx default settings.
LAWBAR0 is used for DDR whereas LAWBAR1 for PCI1. But SPD initializes DDR LAW as LAWBAR1.
I think it could be a setup mess, right?
diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c index 6da5367..c4d3956 100644 --- a/cpu/mpc85xx/spd_sdram.c +++ b/cpu/mpc85xx/spd_sdram.c @@ -1043,12 +1043,12 @@ setup_laws_and_tlbs(unsigned int memsize /* * Set up LAWBAR for all of DDR. */ - ecm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); - ecm->lawar1 = (LAWAR_EN + ecm->lawbar0 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); + ecm->lawar0 = (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & law_size)); - debug("DDR: LAWBAR1=0x%08x\n", ecm->lawbar1); - debug("DDR: LARAR1=0x%08x\n", ecm->lawar1); + debug("DDR: LAWBAR0=0x%08x\n", ecm->lawbar0); + debug("DDR: LARAR0=0x%08x\n", ecm->lawar0);
/* * Confirm that the requested amount of memory was mapped.
Best regards,
Sam
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On Nov 8, 2006, at 4:45 AM, Sam Song wrote:
Hi,
I found that there is a possible LAW conflict between SPD and 85xx default settings.
LAWBAR0 is used for DDR whereas LAWBAR1 for PCI1. But SPD initializes DDR LAW as LAWBAR1.
I think it could be a setup mess, right?
Agreed, however I do remember something about wanting to keep LAWBAR0 free always to allow an external agent to do things. Maybe Jon remembers more about that than I do.
- k
diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c index 6da5367..c4d3956 100644 --- a/cpu/mpc85xx/spd_sdram.c +++ b/cpu/mpc85xx/spd_sdram.c @@ -1043,12 +1043,12 @@ setup_laws_and_tlbs(unsigned int memsize /* * Set up LAWBAR for all of DDR. */
ecm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) &
0xfffff);
ecm->lawar1 = (LAWAR_EN
ecm->lawbar0 = ((CFG_DDR_SDRAM_BASE >> 12) &
0xfffff);
ecm->lawar0 = (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & law_size));
debug("DDR: LAWBAR1=0x%08x\n", ecm->lawbar1);
debug("DDR: LARAR1=0x%08x\n", ecm->lawar1);
debug("DDR: LAWBAR0=0x%08x\n", ecm->lawbar0);
debug("DDR: LARAR0=0x%08x\n", ecm->lawar0); /* * Confirm that the requested amount of memory
was mapped.
Best regards,
Sam
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On Nov 8, 2006, at 12:16 PM, Kumar Gala wrote:
On Nov 8, 2006, at 4:45 AM, Sam Song wrote:
Hi,>> I found that there is a possible LAW conflict> between SPD and 85xx default settings.>> LAWBAR0 is used for DDR whereas LAWBAR1 for> PCI1. But SPD initializes DDR LAW as LAWBAR1.>> I think it could be a setup mess, right?
Agreed, however I do remember something about wanting to keep LAWBAR0 free always to allow an external agent to do things. Maybe Jon remembers more about that than I do.
The code is confusing on this point.
LAWBAR0 is reserved for an external agent boot. However, the code in start.S explicitly sets LAWBAR0 for this feature. The thing called LAWBAR0 in the board specific file is actually loaded into LAWBAR1 of the processor. The board specific LAWBARs defined in the init.S are actually off-by-one in their numbering into the actual processor BARs.
We should all update our board specific init.S files so the #defines start with LAWBAR1. It's just a name change to make it more clear. :-)
Once the boot over external agent is done, we could also reclaim LAWBAR0 for more DDR space if needed.
Thanks.
-- Dan

On Wed, 2006-11-08 at 11:16, Kumar Gala wrote:
On Nov 8, 2006, at 4:45 AM, Sam Song wrote:
Hi,
I found that there is a possible LAW conflict between SPD and 85xx default settings.
LAWBAR0 is used for DDR whereas LAWBAR1 for PCI1. But SPD initializes DDR LAW as LAWBAR1.
I think it could be a setup mess, right?
Agreed, however I do remember something about wanting to keep LAWBAR0 free always to allow an external agent to do things. Maybe Jon remembers more about that than I do.
- k
Hmmm... I'm going to have to plead "getting old" ... :-) I don't recall anything special here...
It could be pure confusion, it could be with some hidden purpose. I just don't recall off hand. I seem to recall that there was a 0-based or a 1-based numbering issue too. I'd have to dig.
jdl

Jon Loeliger wrote:
On Wed, 2006-11-08 at 11:16, Kumar Gala wrote:
On Nov 8, 2006, at 4:45 AM, Sam Song wrote:
Hi,
I found that there is a possible LAW conflict between SPD and 85xx default settings.
LAWBAR0 is used for DDR whereas LAWBAR1 for PCI1. But SPD initializes DDR LAW as LAWBAR1.
I think it could be a setup mess, right?
Agreed, however I do remember something about wanting to keep LAWBAR0 free always to allow an external agent to do things. Maybe Jon remembers more about that than I do.
- k
Hmmm... I'm going to have to plead "getting old" ... :-) I don't recall anything special here...
It could be pure confusion, it could be with some hidden purpose. I just don't recall off hand. I seem to recall that there was a 0-based or a 1-based numbering issue too. I'd have to dig.
jdl
Using Tomcat but need to do more? Need to support web services, security? Get stuff done quickly with pre-integrated technology to make your job easier Download IBM WebSphere Application Server v.1.0.1 based on Apache Geronimo http://sel.as-us.falkag.net/sel?cmd=lnk&kid=120709&bid=263057&da... _______________________________________________ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Jon, Kumar,
The original intent was to keep LAWBAR0 free to allow external agents to initialise a different Boot Rom Interface.
John

John Traill wrote:
The original intent was to keep LAWBAR0 free to allow external agents to initialise a different Boot Rom Interface.
Could you please explain that in a little more detail? I'm not really sure I understand what you're talking about, but I have a strange feeling that I need to.

On Nov 10, 2006, at 8:01 AM, Timur Tabi wrote:
John Traill wrote:
The original intent was to keep LAWBAR0 free to allow external agents to initialise a different Boot Rom Interface.
Could you please explain that in a little more detail? I'm not really sure I understand what you're talking about, but I have a strange feeling that I need to.
The idea is that you could have a system with multiple 85xx processors in it. One can act as master and the others as slaves/ agents and lets say they are all connected over RapidIO. Having LAWBAR0 free allows for the master to come in and setup a global memory map for the whole system. John's probably got better details as I think that's what he did for the RapidIO based 85xx system he had.
- k
participants (6)
-
Dan Malek
-
John Traill
-
Jon Loeliger
-
Kumar Gala
-
Sam Song
-
Timur Tabi