[U-Boot] [v2, 1/2] armv7: ls102xa: add errata ID A-008646 for workaround
The patch adds errata ID A-008646 for workaround
Signed-off-by: Biwen Li biwen.li@nxp.com --- Change in v2: - split one patch to two patches
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index bb169aaaf4..e23fcc135b 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -68,7 +68,7 @@ static void __secure ls1_deepsleep_irq_cfg(void)
ippdexpcr0 = in_be32(&rcpm->ippdexpcr0); /* - * Workaround: There is bug of register ippdexpcr1, when read it always + * Workaround of errata A-008646: There is bug of register ippdexpcr1, when read it always * returns zero, so its value is saved to a scrachpad register to be * read, that is why we don't read it from register ippdexpcr1 itself. */
The patch always not power down OCRAM1 for wakeup source to wakeup system in deep sleep
Signed-off-by: Biwen Li biwen.li@nxp.com --- Change in v2: - split one patch to two patches - always not power down OCRAM1
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index e23fcc135b..34773305ae 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -73,7 +73,8 @@ static void __secure ls1_deepsleep_irq_cfg(void) * read, that is why we don't read it from register ippdexpcr1 itself. */ ippdexpcr1 = in_le32(&scfg->sparecr[7]); - out_be32(&rcpm->ippdexpcr1, ippdexpcr1); + /* Always not power down OCRAM1 */ + out_be32(&rcpm->ippdexpcr1, ippdexpcr1 | RCPM_IPPDEXPCR1_OCRAM1);
if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC) pmcintecr |= SCFG_PMCINTECR_ETSECRXG0 |
-----Original Message----- From: Biwen Li biwen.li@nxp.com Sent: Tuesday, September 24, 2019 12:49 PM To: albert.u.boot@aribaud.net; Prabhakar X prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Priyanka Jain priyanka.jain@nxp.com; Ran Wang ran.wang_1@nxp.com; Leo Li leoyang.li@nxp.com; Jagdish Gediya jagdish.gediya@nxp.com Cc: u-boot@lists.denx.de; Biwen Li biwen.li@nxp.com Subject: [v2,2/2] armv7: ls102xa: not power down OCRAM1
The patch always not power down OCRAM1 for wakeup source to wakeup system in deep sleep
Please provide a better description.
--priyankajain
Signed-off-by: Biwen Li biwen.li@nxp.com
Change in v2:
- split one patch to two patches
- always not power down OCRAM1
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index e23fcc135b..34773305ae 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -73,7 +73,8 @@ static void __secure ls1_deepsleep_irq_cfg(void) * read, that is why we don't read it from register ippdexpcr1 itself. */ ippdexpcr1 = in_le32(&scfg->sparecr[7]);
- out_be32(&rcpm->ippdexpcr1, ippdexpcr1);
- /* Always not power down OCRAM1 */
- out_be32(&rcpm->ippdexpcr1, ippdexpcr1 |
RCPM_IPPDEXPCR1_OCRAM1);
if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC) pmcintecr |= SCFG_PMCINTECR_ETSECRXG0 | -- 2.17.1
: [v2,2/2] armv7: ls102xa: not power down OCRAM1
The patch always not power down OCRAM1 for wakeup source to wakeup system in deep sleep
Please provide a better description.
Okay, got it, I will provide it in v3.
--priyankajain
Signed-off-by: Biwen Li biwen.li@nxp.com
Change in v2:
- split one patch to two patches
- always not power down OCRAM1
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index e23fcc135b..34773305ae 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -73,7 +73,8 @@ static void __secure ls1_deepsleep_irq_cfg(void) * read, that is why we don't read it from register ippdexpcr1 itself. */ ippdexpcr1 = in_le32(&scfg->sparecr[7]);
- out_be32(&rcpm->ippdexpcr1, ippdexpcr1);
- /* Always not power down OCRAM1 */
- out_be32(&rcpm->ippdexpcr1, ippdexpcr1 |
RCPM_IPPDEXPCR1_OCRAM1);
if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC) pmcintecr |= SCFG_PMCINTECR_ETSECRXG0 | -- 2.17.1
-----Original Message----- From: Biwen Li biwen.li@nxp.com Sent: Tuesday, September 24, 2019 12:49 PM To: albert.u.boot@aribaud.net; Prabhakar X prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Priyanka Jain priyanka.jain@nxp.com; Ran Wang ran.wang_1@nxp.com; Leo Li leoyang.li@nxp.com; Jagdish Gediya jagdish.gediya@nxp.com Cc: u-boot@lists.denx.de; Biwen Li biwen.li@nxp.com Subject: [v2,1/2] armv7: ls102xa: add errata ID A-008646 for workaround
The patch adds errata ID A-008646 for workaround
Only comment is updated in this patch. Update subject and description to reflect this.
Signed-off-by: Biwen Li biwen.li@nxp.com
Change in v2:
- split one patch to two patches
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index bb169aaaf4..e23fcc135b 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -68,7 +68,7 @@ static void __secure ls1_deepsleep_irq_cfg(void)
ippdexpcr0 = in_be32(&rcpm->ippdexpcr0); /*
* Workaround: There is bug of register ippdexpcr1, when read italways
* Workaround of errata A-008646: There is bug of register ippdexpcr1,when read it always
Line over 80 characters Test and fix checkpatch errors before submitting patch
--priyankajain
* returns zero, so its value is saved to a scrachpad register to be * read, that is why we don't read it from register ippdexpcr1 itself. */-- 2.17.1
The patch adds errata ID A-008646 for workaround
Only comment is updated in this patch. Update subject and description to reflect this.
Signed-off-by: Biwen Li biwen.li@nxp.com
Change in v2:
- split one patch to two patches
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index bb169aaaf4..e23fcc135b 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -68,7 +68,7 @@ static void __secure ls1_deepsleep_irq_cfg(void)
ippdexpcr0 = in_be32(&rcpm->ippdexpcr0); /*
* Workaround: There is bug of register ippdexpcr1, when read italways
* Workaround of errata A-008646: There is bug of register+ippdexpcr1, when read it always
Line over 80 characters Test and fix checkpatch errors before submitting patch
Okay, got it, I will fix it in v3.
--priyankajain
* returns zero, so its value is saved to a scrachpad register to be * read, that is why we don't read it from register ippdexpcr1 itself. */-- 2.17.1
participants (2)
-
Biwen Li -
Priyanka Jain