[U-Boot] [PATCH] arc: cache: Add required NOPs after invalidation of instruction cache

As per ARC HS databook (see chapter 5.3.3.2) it is required to add 3 NOPs after each write to IC_IVIC which we do from now on.
Signed-off-by: Alexey Brodkin abrodkin@synopsys.com Cc: Eugeniy Paltsev paltsev@synopsys.com --- arch/arc/lib/cache.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c index cbae27e9fcec..d8741fe959c3 100644 --- a/arch/arc/lib/cache.c +++ b/arch/arc/lib/cache.c @@ -278,6 +278,13 @@ void invalidate_icache_all(void) /* Any write to IC_IVIC register triggers invalidation of entire I$ */ if (icache_status()) { write_aux_reg(ARC_AUX_IC_IVIC, 1); + /* + * As per ARC HS databook (see chapter 5.3.3.2) + * it is required to add 3 NOPs after each write to IC_IVIC. + */ + __builtin_arc_nop(); + __builtin_arc_nop(); + __builtin_arc_nop(); read_aux_reg(ARC_AUX_IC_CTRL); /* blocks */ } }
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Alexey Brodkin