[U-Boot-Users] [PATCH ARM/AT91 0/6] AT91CAP9/AT91SAM9260 cleanups

Hi,
The following patches do a few cleanups for the AT91CAP9ADK and AT91SAM9260EK boards: - enable handling of 8 or 16 bit NAND memories - set the SPI clock to 15MHz (like Linux does) - set bootargs to sane values so that Linux boots out of the box in the supported configurations.
Please apply,
Thanks,
Stelian.

Enable the user specify in the board configuration header if the board is fitted with 8 bit (CFG_NAND_DBW_8) or 16 bit (CFG_NAND_DBW_16) NAND memory.
Signed-off-by: Stelian Pop stelian@popies.net --- board/atmel/at91cap9adk/at91cap9adk.c | 8 ++++++-- board/atmel/at91cap9adk/nand.c | 3 +++ include/configs/at91cap9adk.h | 1 + 3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c index 7444c5a..8f96228 100644 --- a/board/atmel/at91cap9adk/at91cap9adk.c +++ b/board/atmel/at91cap9adk/at91cap9adk.c @@ -116,7 +116,12 @@ static void at91cap9_nand_hw_init(void) at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_DBW_8 | AT91_SMC_TDF_(1)); +#ifdef CFG_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CFG_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(1));
at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_PIOABCD);
@@ -252,7 +257,6 @@ int board_init(void) #ifdef CONFIG_USB_OHCI_NEW at91cap9_uhp_hw_init(); #endif - return 0; }
diff --git a/board/atmel/at91cap9adk/nand.c b/board/atmel/at91cap9adk/nand.c index c72b024..5d49aee 100644 --- a/board/atmel/at91cap9adk/nand.c +++ b/board/atmel/at91cap9adk/nand.c @@ -63,6 +63,9 @@ static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd, int cmd) int board_nand_init(struct nand_chip *nand) { nand->eccmode = NAND_ECC_SOFT; +#ifdef CFG_NAND_DBW_16 + nand->options = NAND_BUSWIDTH_16; +#endif nand->hwcontrol = at91cap9adk_nand_hwcontrol; nand->chip_delay = 20;
diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index dab21d0..88527a4 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -110,6 +110,7 @@ #define NAND_MAX_CHIPS 1 #define CFG_MAX_NAND_DEVICE 1 #define CFG_NAND_BASE 0x40000000 +#define CFG_NAND_DBW_8 1
/* Ethernet */ #define CONFIG_MACB 1

Set the SPI clock to 15 MHz, like Linux does.
Signed-off-by: Stelian Pop stelian@popies.net --- include/configs/at91cap9adk.h | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 88527a4..a648ce0 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -94,9 +94,9 @@ #define CFG_SPI_WRITE_TOUT (5*CFG_HZ) #define CFG_MAX_DATAFLASH_BANKS 1 #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ -#define AT91_SPI_CLK 20000000 -#define DATAFLASH_TCSS (0xFA << 16) -#define DATAFLASH_TCHS (0x8 << 24) +#define AT91_SPI_CLK 15000000 +#define DATAFLASH_TCSS (0x1a << 16) +#define DATAFLASH_TCHS (0x1 << 24)
/* NOR flash */ #define CFG_FLASH_CFI 1

Set bootargs to sane values so that Linux boots out of the box in the two supported configurations: - boot from dataflash: the bootstrap, U-Boot, its environment and the Linux kernel are located in the dataflash, the JFFS2 root filesystem occupies the whole NAND memory. - boot from NOR: the bootstrap, U-Boot, its environment and the Linux kernel are located in the NOR memory, the JFFS2 root filesystem occupies the whole NAND memory.
Signed-off-by: Stelian Pop stelian@popies.net --- include/configs/at91cap9adk.h | 10 ++++++++-- 1 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index a648ce0..78b2283 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -56,8 +56,6 @@ #define CONFIG_USART3 1 /* USART 3 is DBGU */
#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ - "root=/dev/mtdblock1 rw rootfstype=jffs2"
/* #define CONFIG_ENV_OVERWRITE 1 */
@@ -145,6 +143,10 @@ #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) #define CFG_ENV_SIZE 0x4200 #define CONFIG_BOOTCOMMAND "cp.b 0xC003DE00 0x72000000 0x200040; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock1 " \ + "mtdparts=physmap-flash.0:-(nor);at91_nand:-(root) "\ + "rw rootfstype=jffs2"
#else
@@ -155,6 +157,10 @@ #define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_ENV_OFFSET) #define CFG_ENV_SIZE 0x4000 #define CONFIG_BOOTCOMMAND "cp.b 0x10040000 0x72000000 0x200000; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock4 " \ + "mtdparts=physmap-flash.0:16k(bootstrap)ro,16k(env),224k(uboot)ro,-(linux);at91_nand:-(root) "\ + "rw rootfstype=jffs2"
#endif

Enable the user specify in the board configuration header if the board is fitted with 8 bit (CFG_NAND_DBW_8) or 16 bit (CFG_NAND_DBW_16) NAND memory.
Signed-off-by: Stelian Pop stelian@popies.net --- board/atmel/at91sam9260ek/at91sam9260ek.c | 7 ++++++- board/atmel/at91sam9260ek/nand.c | 3 +++ include/configs/at91sam9260ek.h | 1 + 3 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index a55468e..7d325e8 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -90,7 +90,12 @@ static void at91sam9260ek_nand_hw_init(void) at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_DBW_8 | AT91_SMC_TDF_(2)); +#ifdef CFG_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CFG_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(2));
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
diff --git a/board/atmel/at91sam9260ek/nand.c b/board/atmel/at91sam9260ek/nand.c index abb788a..a92b105 100644 --- a/board/atmel/at91sam9260ek/nand.c +++ b/board/atmel/at91sam9260ek/nand.c @@ -68,6 +68,9 @@ static int at91sam9260ek_nand_ready(struct mtd_info *mtd) int board_nand_init(struct nand_chip *nand) { nand->eccmode = NAND_ECC_SOFT; +#ifdef CFG_NAND_DBW_16 + nand->options = NAND_BUSWIDTH_16; +#endif nand->hwcontrol = at91sam9260ek_nand_hwcontrol; nand->dev_ready = at91sam9260ek_nand_ready; nand->chip_delay = 20; diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 96d1b8d..8d02416 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -104,6 +104,7 @@ #define NAND_MAX_CHIPS 1 #define CFG_MAX_NAND_DEVICE 1 #define CFG_NAND_BASE 0x40000000 +#define CFG_NAND_DBW_8 1
/* NOR flash - no real flash on this board */ #define CFG_NO_FLASH 1

Set the SPI clock to 15 MHz, like Linux does.
Signed-off-by: Stelian Pop stelian@popies.net --- include/configs/at91sam9260ek.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 8d02416..0aac0f5 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -96,7 +96,7 @@ #define CFG_MAX_DATAFLASH_BANKS 2 #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ #define CFG_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ -#define AT91_SPI_CLK 33000000 +#define AT91_SPI_CLK 15000000 #define DATAFLASH_TCSS (0x1a << 16) #define DATAFLASH_TCHS (0x1 << 24)

Set bootargs to sane values so that Linux boots out of the box in the three supported configurations: - boot from dataflash (CS0 or CS1): the bootstrap, U-Boot, its environment and the Linux kernel are located in the dataflash, the JFFS2 root filesystem occupies the whole NAND memory. - boot from NAND: the bootstrap, U-Boot, its environment, the Linux kernel and the JFFS2 root filesystem are all located in different partitions of the NAND memory.
Signed-off-by: Stelian Pop stelian@popies.net --- include/configs/at91sam9260ek.h | 14 ++++++++++++-- 1 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 0aac0f5..e25985e 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -56,8 +56,6 @@ #define CONFIG_USART3 1 /* USART 3 is DBGU */
#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ - "root=/dev/mtdblock0 rw rootfstype=jffs2"
/* #define CONFIG_ENV_OVERWRITE 1 */
@@ -144,6 +142,10 @@ #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET) #define CFG_ENV_SIZE 0x4200 #define CONFIG_BOOTCOMMAND "cp.b 0xC003DE00 0x22000000 0x200040; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock0 " \ + "mtdparts=at91_nand:-(root) "\ + "rw rootfstype=jffs2"
#elif CFG_USE_DATAFLASH_CS1
@@ -154,6 +156,10 @@ #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS1 + CFG_ENV_OFFSET) #define CFG_ENV_SIZE 0x4200 #define CONFIG_BOOTCOMMAND "cp.b 0xD003DE00 0x22000000 0x200040; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock0 " \ + "mtdparts=at91_nand:-(root) "\ + "rw rootfstype=jffs2"
#else /* CFG_USE_NANDFLASH */
@@ -163,6 +169,10 @@ #define CFG_ENV_OFFSET_REDUND 0x80000 #define CFG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock5 " \ + "mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ + "rw rootfstype=jffs2"
#endif
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Stelian Pop